[PATCH 4/5] hw/arm/smmuv3: Use correct bit positions in EVT_SET_ADDR2 macro

The bit offsets in the EVT_SET_ADDR2 macro do not match those specified in the ARM SMMUv3 Architecture Specification. In all events that use this macro, e.g. F_WALK_EABT, the faulting fetch address or IPA actually occupies the 32-bit words 6 and 7 in the event record contiguously, with the upper an

[PATCH 2/5] hw/arm/smmuv3: Check stream IDs against actual table LOG2SIZE

When checking whether a stream ID is in range of the stream table, we have so far been only checking it against our implementation limit (SMMU_IDR1_SIDSIZE). However, the guest can program the STRTAB_BASE_CFG.LOG2SIZE field to a size that is smaller than this limit. Check the stream ID against thi

[PATCH 3/5] hw/arm/smmuv3: Align stream table base address to table size

Per the specification, and as observed in hardware, the SMMUv3 aligns the SMMU_STRTAB_BASE address to the size of the table by masking out the respective least significant bits in the ADDR field. Apply this masking logic to our smmu_find_ste() lookup function per the specification. ref. ARM IHI 0

[PATCH 5/5] hw/arm/smmuv3: Report F_STE_FETCH fault address in correct word position

The smmuv3_record_event() function that generates the F_STE_FETCH error uses the EVT_SET_ADDR macro to record the fetch address, placing it in 32-bit words 4 and 5. The correct position for this address is in words 6 and 7, per the SMMUv3 Architecture Specification. Update the function to use the

Re: [PATCH 0/6] Enable Travis builds on arm64, ppc64le and s390x

On 27/11/2019 09.50, Thomas Huth wrote: > On 25/11/2019 11.28, Alex Bennée wrote: >> >> Alex Bennée writes: >> >>> Thomas Huth writes: >>> Travis recently added build hosts for arm64, ppc64le and s390x, so this is a welcome addition to our Travis testing matrix. Unfortunately,

Re: [PATCH v2] qga: fence guest-set-time if hwclock not available

On Thu, 28 Nov 2019 19:11:00 +0100 Cornelia Huck wrote: > The Posix implementation of guest-set-time invokes hwclock to > set/retrieve the time to/from the hardware clock. If hwclock > is not available, the user is currently informed that "hwclock > failed to set hardware clock to system time", w

Re: [PATCH v3] travis.yml: Run tcg tests with tci

Thomas Huth writes: > On 04/12/2019 14.48, Alex Bennée wrote: >> >> Thomas Huth writes: >> >>> So far we only have compile coverage for tci. But since commit >>> 2f160e0f9797c7522bfd0d09218d0c9340a5137c ("tci: Add implementation >>> for INDEX_op_ld16u_i64") has been included now, we can also

Re: [PATCH v4 19/40] target/arm: Add regime_has_2_ranges

Richard Henderson writes: > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée > --- > target/arm/internals.h | 16 > target/arm/helper.c| 23 ++- > target/arm/translate-a64.c | 3 +-- > 3 files changed, 23 insertions(+), 19 deletion

[Bug 1852196] Re: update edk2 submodule & binaries to edk2-stable201911

** Changed in: qemu Assignee: Laszlo Ersek (Red Hat) (lersek) => Philippe Mathieu-Daudé (philmd) ** Changed in: qemu Status: New => In Progress -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/b

Re: [PATCH v4 14/40] target/arm: Recover 4 bits from TBFLAGs

On 12/4/19 3:43 AM, Alex Bennée wrote: > I'm not sure if this visual aid helps but here you go: > > * 31 20 1916 15 10 90 > * +--++-+--+ > * | || TBFLAG_A64

Re: [PATCH v2 04/18] tests: Clean up initialization of Error *err variables

On 12/4/19 3:36 AM, Markus Armbruster wrote: Declaring a local Error *err without initializer looks suspicious. Fuse the declaration with the initialization to avoid that. Signed-off-by: Markus Armbruster --- tests/test-qobject-output-visitor.c | 8 tests/test-string-output-visitor.

Re: virtiofsd: Where should it live?

On 12/4/19 1:43 AM, Markus Armbruster wrote: +- qemu-img | +- qemu-img.c Perhaps this one can all go into existing block/, similar to how pr-manager-helper.c is in scsi/, and virtfs-proxy-helper.c is in fsdev/. Up to the block maintainers, of course. +- qemu-nbd | +-

Re: qom device lifecycle interaction with hotplug/hotunplug ?

On Wed, Dec 04, 2019 at 10:18:24AM +0100, Jens Freimann wrote: > On Tue, Dec 03, 2019 at 06:40:04PM -0300, Eduardo Habkost wrote: > > +jfreimann, +mst > > > > On Sat, Nov 30, 2019 at 11:10:19AM +, Peter Maydell wrote: > > > On Fri, 29 Nov 2019 at 20:05, Eduardo Habkost wrote: > > > > So, to s

Re: virtiofsd: Where should it live?

On 12/4/19 7:28 AM, Kevin Wolf wrote: Am 04.12.2019 um 09:17 hat Gerd Hoffmann geschrieben: Hi, | ... +- qemu-edid Has its own MAINTAINERS section, together with hw/display/edit* and include/hw/display/edid.h. I'm not sure moving it hw/display/ is a good idea. Gerd? Sort-o

Re: [PATCH v4 20/40] target/arm: Update arm_mmu_idx for VHE

Richard Henderson writes: > Return the indexes for the EL2&0 regime when the appropriate bits > are set within HCR_EL2. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée > --- > target/arm/helper.c | 11 +-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --g

Re: [PATCH v2 1/3] virtio: add ability to delete vq through a pointer

On 12/4/19 1:31 AM, pannengy...@huawei.com wrote: From: Pan Nengyuan Devices tend to maintain vq pointers, allow deleting them trough a vq pointer. through Signed-off-by: Michael S. Tsirkin Signed-off-by: Pan Nengyuan --- Also, don't forget to send a 0/3 cover letter (any series longer

Re: [PATCH v2 3/3] virtio-serial-bus: fix memory leak while attach virtio-serial-bus

On 12/4/19 1:31 AM, pannengy...@huawei.com wrote: From: Pan Nengyuan ivqs/ovqs/c_ivq/c_ovq is forgot to cleanup in s/is // virtio_serial_device_unrealize, the memory leak stack is as bellow: below Direct leak of 1290240 byte(s) in 180 object(s) allocated from: #0 0x7fc9bfc27560 in

Re: [PATCH v2 05/18] exec: Fix file_ram_alloc() error API violations

On 12/4/19 10:36 AM, Markus Armbruster wrote: When os_mem_prealloc() fails, file_ram_alloc() calls qemu_ram_munmap() and returns null. Except it doesn't when its @errp argument is null, because it checks for failure with (errp && *errp). Introduced in commit 056b68af77 "fix qemu exit on memory

Re: [PATCH v2 04/18] tests: Clean up initialization of Error *err variables

On 12/4/19 10:36 AM, Markus Armbruster wrote: Declaring a local Error *err without initializer looks suspicious. Fuse the declaration with the initialization to avoid that. Signed-off-by: Markus Armbruster --- tests/test-qobject-output-visitor.c | 8 tests/test-string-output-visitor

Re: [PATCH v2 07/18] hw/core: Fix fit_load_fdt() error handling violations

On 12/4/19 10:36 AM, Markus Armbruster wrote: fit_load_fdt() passes @errp to fit_image_addr(), then recovers from ENOENT failures. Passing @errp is wrong, because it works only as long as @errp is neither @error_fatal nor @error_abort. Messed up in commit 3eb99edb48 "loader-fit: Wean off error_

Re: [PATCH v2 09/18] qga: Fix guest-get-fsinfo error API violations

On 12/4/19 10:36 AM, Markus Armbruster wrote: build_guest_fsinfo_for_virtual_device() dereferences @errp when build_guest_fsinfo_for_device() fails. That's wrong; see the big comment in error.h. Introduced in commit 46d4c5723e "qga: Add guest-get-fsinfo command". No caller actually passes null

Re: [PATCH v6] error: rename errp to errp_in where it is IN-argument

04.12.2019 16:03, Markus Armbruster wrote: > Markus Armbruster writes: > >> Vladimir Sementsov-Ogievskiy writes: >> >>> 29.11.2019 17:35, Markus Armbruster wrote: > [...] I pushed my fixups to git://repo.or.cz/qemu/armbru.git branch error-prep for your convenience. The commit messages

Re: [PATCH v3 2/4] s390x: Add missing vcpu reset functions

On Tue, 3 Dec 2019 08:28:11 -0500 Janosch Frank wrote: > Up to now we only had an ioctl to reset vcpu data QEMU couldn't reach > for the initial reset, and that was also called for the clear > reset. To be architecture compliant, we also need to clear local > interrupts on a normal reset. Do we

Re: [RFC v5 024/126] error: auto propagated local_err

Vladimir Sementsov-Ogievskiy writes: > Here is introduced ERRP_AUTO_PROPAGATE macro, to be used at start of > functions with errp OUT parameter. > > It has three goals: > > 1. Fix issue with error_fatal & error_prepend/error_append_hint: user > can't see this additional information, because exit(

Re: [PATCH v4 22/40] target/arm: Update aa64_zva_access for EL2

Richard Henderson writes: > The comment that we don't support EL2 is somewhat out of date. > Update to include checks against HCR_EL2.TDZ. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée > --- > target/arm/helper.c | 26 +- > 1 file changed, 21 inserti

Re: [PATCH v2] qga: fence guest-set-time if hwclock not available

Quoting Cornelia Huck (2019-11-28 12:11:00) > The Posix implementation of guest-set-time invokes hwclock to > set/retrieve the time to/from the hardware clock. If hwclock > is not available, the user is currently informed that "hwclock > failed to set hardware clock to system time", which is quite

Re: [PATCH v3 2/4] s390x: Add missing vcpu reset functions

On 04.12.19 15:59, Cornelia Huck wrote: > On Tue, 3 Dec 2019 08:28:11 -0500 > Janosch Frank wrote: > >> Up to now we only had an ioctl to reset vcpu data QEMU couldn't reach >> for the initial reset, and that was also called for the clear >> reset. To be architecture compliant, we also need to c

Re: [PATCH] target/i386: relax assert when old host kernels don't include msrs

Hi Paolo On Wed, 4 Dec 2019 at 21:53, Paolo Bonzini wrote: > > On 04/12/19 14:33, Catherine Ho wrote: > > Hi Paolo > > [sorry to resend it, seems to reply it incorrectly] > > > > On Wed, 4 Dec 2019 at 19:23, Paolo Bonzini > > wrote: > > > > On 04/12/19 09:50, Cat

Re: [PATCH v3 2/4] s390x: Add missing vcpu reset functions

On 04.12.19 16:07, David Hildenbrand wrote: > On 04.12.19 15:59, Cornelia Huck wrote: >> On Tue, 3 Dec 2019 08:28:11 -0500 >> Janosch Frank wrote: >> >>> Up to now we only had an ioctl to reset vcpu data QEMU couldn't reach >>> for the initial reset, and that was also called for the clear >>> res

Re: [PATCH] net/imx_fec: Updating the IMX_FEC IP to support loopback mode.

On Wed, 4 Dec 2019 at 02:15, Jason Wang wrote: > > > On 2019/11/30 上午12:04, Philippe Mathieu-Daudé wrote: > > On Fri, Nov 29, 2019 at 4:59 PM Wasim, Bilal wrote: > >> Thanks for the pointers philippe.. Is the patch okay to be merged without > >> it or do I need to do a re-submission with the upd

Re: [PATCH 10/10] arm: allwinner-h3: add EMAC ethernet device

On 12/3/19 10:33 AM, KONRAD Frederic wrote: Le 12/2/19 à 10:09 PM, Niek Linnenbank a écrit : The Allwinner H3 System on Chip includes an Ethernet MAC (EMAC) which provides 10M/100M/1000M Ethernet connectivity. This commit adds support for the Allwinner H3 EMAC, including emulation for the follow

Re: [PATCH 10/10] arm: allwinner-h3: add EMAC ethernet device

Le 12/4/19 à 4:14 PM, Philippe Mathieu-Daudé a écrit : On 12/3/19 10:33 AM, KONRAD Frederic wrote: Le 12/2/19 à 10:09 PM, Niek Linnenbank a écrit : The Allwinner H3 System on Chip includes an Ethernet MAC (EMAC) which provides 10M/100M/1000M Ethernet connectivity. This commit adds support fo

Re: [PATCH v3 2/4] s390x: Add missing vcpu reset functions

On Wed, 4 Dec 2019 16:08:48 +0100 David Hildenbrand wrote: > On 04.12.19 16:07, David Hildenbrand wrote: > > On 04.12.19 15:59, Cornelia Huck wrote: > >> On Tue, 3 Dec 2019 08:28:11 -0500 > >> Janosch Frank wrote: > >> > >>> Up to now we only had an ioctl to reset vcpu data QEMU couldn't re

Re: [PATCH] target/i386: relax assert when old host kernels don't include msrs

On 04/12/19 16:07, Catherine Ho wrote: >> Ok, so the problem is that some MSR didn't exist in that version. Which > I thought in my platform, the only MSR didn't exist is MSR_IA32_VMX_BASIC > (0x480). If I remove this kvm_msr_entry_add(), everything is ok, the guest can > be boot up successfully.

Re: [PATCH 02/11] target/arm: Add arm_mmu_idx_is_stage1

On 12/3/19 11:53 PM, Richard Henderson wrote: Use a common predicate for querying stage1-ness. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/arm/internals.h | 11 +++ target/arm/helper.c| 8 +++- 2 files changed, 14 insertions(+), 5 de

Re: [PATCH v3 2/4] s390x: Add missing vcpu reset functions

On 04.12.19 16:33, Cornelia Huck wrote: > On Wed, 4 Dec 2019 16:08:48 +0100 > David Hildenbrand wrote: > >> On 04.12.19 16:07, David Hildenbrand wrote: >>> On 04.12.19 15:59, Cornelia Huck wrote: On Tue, 3 Dec 2019 08:28:11 -0500 Janosch Frank wrote: > Up to now we only h

Re: [PATCH v6] error: rename errp to errp_in where it is IN-argument

Vladimir Sementsov-Ogievskiy writes: > 04.12.2019 16:03, Markus Armbruster wrote: >> Markus Armbruster writes: >> >>> Vladimir Sementsov-Ogievskiy writes: >>> 29.11.2019 17:35, Markus Armbruster wrote: >> [...] > I pushed my fixups to git://repo.or.cz/qemu/armbru.git branch error-prep

[PATCH v2 1/7] iotests: Provide a function for checking the creation of huge files

Some tests create huge (but sparse) files, and to be able to run those tests in certain limited environments (like CI containers), we have to check for the possibility to create such files first. Thus let's introduce a common function to check for large files, and replace the already existing check

[PATCH v2 4/7] tests/hd-geo-test: Skip test when images can not be created

In certain environments like restricted containers, we can not create huge test images. To be able to use "make check" in such container environments, too, let's skip the hd-geo-test instead of failing when the test images could not be created. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ale

[PATCH v2 0/7] Enable Travis builds on arm64, ppc64le and s390x

Travis recently added build hosts for arm64, ppc64le and s390x, so this is a welcome addition to our Travis testing matrix. Unfortunately, the builds are running in quite restricted LXD containers there, for example it is not possible to create huge files there (even if they are just sparse), and

[PATCH v2 3/7] iotests: Skip test 079 if it is not possible to create large files

Test 079 fails in the arm64, s390x and ppc64le LXD containers on Travis (which we will hopefully enable in our CI soon). These containers apparently do not allow large files to be created. Test 079 tries to create a 4G sparse file, which is apparently already too big for these containers, so check

[PATCH v2 7/7] travis.yml: Enable builds on arm64, ppc64le and s390x

Travis recently added the possibility to test on these architectures, too, so let's enable them in our travis.yml file to extend our test coverage. Unfortunately, the libssh in this Ubuntu version (bionic) is in a pretty unusable Frankenstein state and libspice-server-dev is not available here, so

[PATCH v2 2/7] iotests: Skip test 060 if it is not possible to create large files

Test 060 fails in the arm64, s390x and ppc64le LXD containers on Travis (which we will hopefully enable in our CI soon). These containers apparently do not allow large files to be created. The repair process in test 060 creates a file of 64 GiB, so test first whether such large files are possible a

[PATCH v2 5/7] tests/test-util-filemonitor: Skip test on non-x86 Travis containers

test-util-filemonitor fails in restricted non-x86 Travis containers since they apparently blacklisted some required system calls there. Let's simply skip the test if we detect such an environment. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Signed-off-by: Thomas Huth --- tests

[PATCH v2 6/7] configure: allow disable of cross compilation containers

From: Alex Bennée Our docker infrastructure isn't quite as multiarch as we would wish so let's allow the user to disable it if they want. This will allow us to use still run check-tcg on non-x86 CI setups. Signed-off-by: Alex Bennée Reviewed-by: Stefan Weil Signed-off-by: Thomas Huth --- con

Re: [PATCH v2 1/7] iotests: Provide a function for checking the creation of huge files

On 12/4/19 4:46 PM, Thomas Huth wrote: Some tests create huge (but sparse) files, and to be able to run those tests in certain limited environments (like CI containers), we have to check for the possibility to create such files first. Thus let's introduce a common function to check for large file

Re: [PATCH v2 2/7] iotests: Skip test 060 if it is not possible to create large files

On 12/4/19 4:46 PM, Thomas Huth wrote: Test 060 fails in the arm64, s390x and ppc64le LXD containers on Travis (which we will hopefully enable in our CI soon). These containers apparently do not allow large files to be created. The repair process in test 060 creates a file of 64 GiB, so test firs

Re: [PATCH] target/i386: relax assert when old host kernels don't include msrs

On Wed, Dec 04, 2019 at 04:34:45PM +0100, Paolo Bonzini wrote: > On 04/12/19 16:07, Catherine Ho wrote: > >> Ok, so the problem is that some MSR didn't exist in that version. Which > > I thought in my platform, the only MSR didn't exist is MSR_IA32_VMX_BASIC > > (0x480). If I remove this kvm_msr_e

Re: [PATCH v4 14/40] target/arm: Recover 4 bits from TBFLAGs

Richard Henderson writes: > On 12/4/19 3:43 AM, Alex Bennée wrote: >>> void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int >>> max_insns) >>> { >>> -DisasContext dc; >>> +DisasContext dc = { }; >> >> We seemed to have dropped an initialise here which seems unrelated

Re: [PATCH v2 3/7] iotests: Skip test 079 if it is not possible to create large files

On 12/4/19 4:46 PM, Thomas Huth wrote: Test 079 fails in the arm64, s390x and ppc64le LXD containers on Travis (which we will hopefully enable in our CI soon). These containers apparently do not allow large files to be created. Test 079 tries to create a 4G sparse file, which is apparently alread

Re: [PATCH 04/10] arm: allwinner-h3: add USB host controller

On Monday, December 2, 2019, Niek Linnenbank wrote: > The Allwinner H3 System on Chip contains multiple USB 2.0 bus > connections which provide software access using the Enhanced > Host Controller Interface (EHCI) and Open Host Controller > Interface (OHCI) interfaces. This commit adds support fo

Re: [PATCH v4 16/40] target/arm: Rearrange ARMMMUIdxBit

On 12/3/19 3:29 AM, Richard Henderson wrote: Define via macro expansion, so that renumbering of the base ARMMMUIdx symbols is automatically reflexed in the bit definitions. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 39 +++ 1 file changed, 23

Re: [PATCH] target/i386: relax assert when old host kernels don't include msrs

On 04/12/19 16:47, Eduardo Habkost wrote: > On Wed, Dec 04, 2019 at 04:34:45PM +0100, Paolo Bonzini wrote: >> On 04/12/19 16:07, Catherine Ho wrote: Ok, so the problem is that some MSR didn't exist in that version. Which >>> I thought in my platform, the only MSR didn't exist is MSR_IA32_VMX_

Re: [PATCH v4 23/40] target/arm: Update ctr_el0_access for EL2

Richard Henderson writes: > Update to include checks against HCR_EL2.TID2. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée > --- > target/arm/helper.c | 26 +- > 1 file changed, 21 insertions(+), 5 deletions(-) > > diff --git a/target/arm/helper.c b/ta

Re: [PATCH v4 14/40] target/arm: Recover 4 bits from TBFLAGs

On 12/4/19 7:53 AM, Alex Bennée wrote: > > Richard Henderson writes: > >> On 12/4/19 3:43 AM, Alex Bennée wrote: > void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns) { -DisasContext dc; +DisasContext dc = { }; >>> >>> We seemed to

Re: [PATCH] target/sparc: Remove old TODO file

On 30/09/2019 19.10, Thomas Huth wrote: > This file hasn't seen a real (non-trivial) update since 2008 anymore, > so we can assume that it is pretty much out of date and nobody cares > for it anymore. Let's simply remove it. > > Signed-off-by: Thomas Huth > --- > target/sparc/TODO | 88 -

Re: qom device lifecycle interaction with hotplug/hotunplug ?

On Wed, Dec 04, 2019 at 11:35:37AM -0300, Eduardo Habkost wrote: On Wed, Dec 04, 2019 at 10:18:24AM +0100, Jens Freimann wrote: On Tue, Dec 03, 2019 at 06:40:04PM -0300, Eduardo Habkost wrote: > +jfreimann, +mst > > On Sat, Nov 30, 2019 at 11:10:19AM +, Peter Maydell wrote: > > On Fri, 29 No

Re: [PATCH] target/sparc: Remove old TODO file

On Wed, Dec 4, 2019 at 5:27 PM Thomas Huth wrote: > > On 30/09/2019 19.10, Thomas Huth wrote: > > This file hasn't seen a real (non-trivial) update since 2008 anymore, > > so we can assume that it is pretty much out of date and nobody cares > > for it anymore. Let's simply remove it. > > > > Signe

Re: virtiofsd: Where should it live?

We seem to be settling out to either fsdev/virtiofsd or tools/virtiofsd with tools picking up some speed as people seem to want to put a bunch of other stuff in there. Unless anyone shouts really loud, I'll work on making it tools/virtiofsd. Dave -- Dr. David Alan Gilbert / dgilb...@redhat.com /

Re: [PATCH v2 2/2] migration: savevm_state_handler_insert: constant-time element insertion

* Scott Cheloha (chel...@linux.vnet.ibm.com) wrote: > savevm_state's SaveStateEntry TAILQ is a priority queue. Priority > sorting is maintained by searching from head to tail for a suitable > insertion spot. Insertion is thus an O(n) operation. > > If we instead keep track of the head of each pr

Re: [PATCH v2 1/2] migration: add savevm_state_handler_remove()

* Scott Cheloha (chel...@linux.vnet.ibm.com) wrote: > Create a function to abstract common logic needed when removing a > SaveStateEntry element from the savevm_state.handlers queue. > > For now we just remove the element. Soon it will involve additional > cleanup. > > Signed-off-by: Scott Chelo

Re: [PATCH v6 0/9] Clock framework API

On 12/2/19 5:15 PM, Peter Maydell wrote: > > The one topic I think we could do with discussing is whether > a simple uint64_t giving the frequency of the clock in Hz is > the right representation. In particular in your patch 9 the > board has a clock frequency that's not a nice integer number >

Re: [PATCH v2 2/2] migration: savevm_state_handler_insert: constant-time element insertion

* Scott Cheloha (chel...@linux.vnet.ibm.com) wrote: > On Mon, Oct 21, 2019 at 09:14:44AM +0100, Dr. David Alan Gilbert wrote: > > * David Gibson (da...@gibson.dropbear.id.au) wrote: > > > On Fri, Oct 18, 2019 at 10:43:52AM +0100, Dr. David Alan Gilbert wrote: > > > > * Laurent Vivier (lviv...@redha

Re: [PATCH 01/10] hw: arm: add Allwinner H3 System-on-Chip

Hi Niek, On 12/2/19 10:09 PM, Niek Linnenbank wrote: The Allwinner H3 is a System on Chip containing four ARM Cortex A7 processor cores. Features and specifications include DDR2/DDR3 memory, SD/MMC storage cards, 10/100/1000Mbit ethernet, USB 2.0, HDMI and various I/O modules. This commit adds s

[PATCH for-5.0 7/8] acpi: cpuhp: add CPHP_GET_CPU_ID_CMD command

Extend CPU hotplug interface to return architecture specific identifier for current CPU in 2 registers: - lower 32 bits existing ACPI_CPU_CMD_DATA_OFFSET_RW - upper 32 bits in new ACPI_CPU_CMD_DATA2_OFFSET_R at offset 0. Target user is UEFI firmware, which needs a way to enumerate all CPUs (i

[PATCH for-5.0 0/8] q35: CPU hotplug with secure boot, part 1+2

Series consists of 2 parts: 1st is lockable SMRAM at SMBASE and the 2nd adds means to enumerate APIC IDs for possible CPUs. 1st part [1-2/8]: In order to support CPU hotplug in secure boot mode, UEFI firmware needs to relocate SMI handler of hotplugged CPU, in a way that won't allow ring 0 user

[PATCH for-5.0 8/8] acpi: cpuhp: spec: document procedure for enabling modern CPU hotplug

Describe how to enable and detect modern CPU hotplug interface. Detection part is based on new CPHP_GET_CPU_ID_CMD command, introduced by "acpi: cpuhp: add CPHP_GET_CPU_ID_CMD command" patch. Signed-off-by: Igor Mammedov --- docs/specs/acpi_cpu_hotplug.txt | 22 -- 1 file cha

[PATCH for-5.0 1/8] q35: implement 128K SMRAM at default SMBASE address

Use commit (2f295167e0 q35/mch: implement extended TSEG sizes) for inspiration and (ab)use reserved register in config space at 0x9c offset [*] to extend q35 pci-host with ability to use 128K at 0x3 as SMRAM and hide it (like TSEG) from non-SMM context. Usage: 1: write 0xff in the register

[PATCH for-5.0 2/8] tests: q35: MCH: add default SMBASE SMRAM lock test

test lockable SMRAM at default SMBASE feature, introduced by patch "q35: implement 128K SMRAM at default SMBASE address" Signed-off-by: Igor Mammedov --- tests/q35-test.c | 105 +++ 1 file changed, 105 insertions(+) diff --git a/tests/q35-test

[PATCH for-5.0 4/8] acpi: cpuhp: spec: fix 'Command data' description

Correct returned value description in case 'Command field' == 0x0, it's in not PXM but CPU selector value with pending event In addition describe 0 blanket value in case of not supported 'Command field' value. Signed-off-by: Igor Mammedov --- docs/specs/acpi_cpu_hotplug.txt | 11 +-- 1

[PATCH for-5.0 5/8] acpi: cpuhp: spec: clarify store into 'Command data' when 'Command field' == 0

Write section of 'Command data' register should describe what happens when it's written into. Correct description in case the last stored 'Command field' value equals to 0, to reflect that currently it's not supported. Signed-off-by: Igor Mammedov --- docs/specs/acpi_cpu_hotplug.txt | 3 +-- 1 f

[PATCH for-5.0 3/8] acpi: cpuhp: spec: clarify 'CPU selector' register usage and endianness

* Move reserved registers to the top of the section, so reader would be aware of effects when reading registers description. * State registers endianness explicitly at the beginning of the section * Describe registers behavior in case of 'CPU selector' register contains value that doesn't point

[PATCH for-5.0 6/8] acpi: cpuhp: spec: add typical usecases

Document work-flows for * finding a CPU with pending 'insert/remove' event * enumerating present and possible CPUs Signed-off-by: Igor Mammedov --- docs/specs/acpi_cpu_hotplug.txt | 29 + 1 file changed, 29 insertions(+) diff --git a/docs/specs/acpi_cpu_hotplug.t

Re: [PATCH v9 Kernel 2/5] vfio iommu: Add ioctl defination to get dirty pages bitmap.

On 12/3/2019 11:34 PM, Alex Williamson wrote: On Mon, 25 Nov 2019 19:57:39 -0500 Yan Zhao wrote: On Fri, Nov 15, 2019 at 05:06:25AM +0800, Alex Williamson wrote: On Fri, 15 Nov 2019 00:26:07 +0530 Kirti Wankhede wrote: On 11/14/2019 1:37 AM, Alex Williamson wrote: On Thu, 14 Nov 201

Re: [PATCH v9 Kernel 2/5] vfio iommu: Add ioctl defination to get dirty pages bitmap.

On Wed, 4 Dec 2019 23:40:25 +0530 Kirti Wankhede wrote: > On 12/3/2019 11:34 PM, Alex Williamson wrote: > > On Mon, 25 Nov 2019 19:57:39 -0500 > > Yan Zhao wrote: > > > >> On Fri, Nov 15, 2019 at 05:06:25AM +0800, Alex Williamson wrote: > >>> On Fri, 15 Nov 2019 00:26:07 +0530 > >>> Kirti W

Re: [PATCH v4 25/40] target/arm: Update timer access for VHE

Richard Henderson writes: > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée > --- > target/arm/helper.c | 102 +++- > 1 file changed, 81 insertions(+), 21 deletions(-) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index a4a7f

Re: qom device lifecycle interaction with hotplug/hotunplug ?

On Wed, Dec 04, 2019 at 05:21:25PM +0100, Jens Freimann wrote: > On Wed, Dec 04, 2019 at 11:35:37AM -0300, Eduardo Habkost wrote: > > On Wed, Dec 04, 2019 at 10:18:24AM +0100, Jens Freimann wrote: > > > On Tue, Dec 03, 2019 at 06:40:04PM -0300, Eduardo Habkost wrote: > > > > +jfreimann, +mst > > >

Re: [PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE

Richard Henderson writes: > For ARMv8.1, op1 == 5 is reserved for EL2 aliases of > EL1 and EL0 registers. > > Signed-off-by: Richard Henderson > --- > target/arm/helper.c | 5 + > 1 file changed, 1 insertion(+), 4 deletions(-) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > i

[PATCH v2 2/5] virtiofsd: Release file locks using F_UNLCK

We are emulating posix locks for guest using open file description locks in virtiofsd. When any of the fd is closed in guest, we find associated OFD lock fd (if there is one) and close it to release all the locks. Assumption here is that there is no other thread using lo_inode_plock structure or p

[PATCH v2 0/5] [RFC] virtiofsd, vhost-user-fs: Add support for notification queue

Hi, Here is V2 of RFC patches for adding a notification queue to vhost-user-fs device to send notifications from host to guest. It also has patches to support remote posix locks which make use of this newly introduced notification queue. I have taken care of most of the comments from last iterati

[PATCH v2 4/5] virtiofsd: Specify size of notification buffer using config space

Daemon specifies size of notification buffer needed and that should be done using config space. Only ->notify_buf_size value of config space comes from daemon. Rest of it is filled by qemu device emulation code. Signed-off-by: Vivek Goyal --- contrib/virtiofsd/fuse_virtio.c| 31

[PATCH v2 1/5] virtiofsd: Get rid of unused fields in fv_QueueInfo

There are some unused fields in "struct fv_QueueInfo". Get rid of these fields. Signed-off-by: Vivek Goyal --- contrib/virtiofsd/fuse_virtio.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/contrib/virtiofsd/fuse_virtio.c b/contrib/virtiofsd/fuse_virtio.c index 31c8542b6c..2a9cd60a01 1

[PATCH v2 3/5] virtiofd: Create a notification queue

Add a notification queue which will be used to send async notifications for file lock availability. Signed-off-by: Vivek Goyal --- contrib/virtiofsd/fuse_i.h | 1 + contrib/virtiofsd/fuse_virtio.c| 74 +++--- hw/virtio/vhost-user-fs-pci.c

[PATCH v2 5/5] virtiofsd: Implement blocking posix locks

As of now we don't support fcntl(F_SETLKW) and if we see one, we return -EOPNOTSUPP. Change that by accepting these requests and returning a reply immediately asking caller to wait. Once lock is available, send a notification to the waiter indicating lock is available. Signed-off-by: Vivek Goyal

Re: [PATCH v2 1/5] virtiofsd: Get rid of unused fields in fv_QueueInfo

* Vivek Goyal (vgo...@redhat.com) wrote: > There are some unused fields in "struct fv_QueueInfo". Get rid of these > fields. > > Signed-off-by: Vivek Goyal > --- > contrib/virtiofsd/fuse_virtio.c | 6 -- > 1 file changed, 6 deletions(-) > > diff --git a/contrib/virtiofsd/fuse_virtio.c b/co

[for-5.0 PATCH 0/4] ppc: Fix interrupt controller emulation

Guest hangs have been observed recently on POWER9 hosts, specifically LC92x "Boston" systems, when the guests are being rebooted multiple times. The issue isn't POWER9 specific though. It is caused by a very long standing bug when using the uncommon accel=kvm,kernel-irqchip=off machine configuratio

[for-5.0 PATCH 1/4] ppc: Deassert the external interrupt pin in KVM on reset

When a CPU is reset, QEMU makes sure no interrupt is pending by clearing CPUPPCstate::pending_interrupts in ppc_cpu_reset(). In the case of a complete machine emulation, eg. a sPAPR machine, an external interrupt request could still be pending in KVM though, eg. an IPI. It will be eventually presen

[for-5.0 PATCH 2/4] xics: Don't deassert outputs

The correct way to do this is to deassert the input pins on the CPU side. This is the case since a previous change. Signed-off-by: Greg Kurz --- hw/intc/xics.c |3 --- 1 file changed, 3 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 0b259a09c545..1952009e6d22 100644 --- a/h

[for-5.0 PATCH 4/4] ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM

This only makes sense with an emulated CPU. Don't set the bit in CPUState::interrupt_request when using KVM to avoid confusions. Signed-off-by: Greg Kurz --- target/ppc/helper_regs.h |5 + 1 file changed, 5 insertions(+) diff --git a/target/ppc/helper_regs.h b/target/ppc/helper_regs.h i

[for-5.0 PATCH 3/4] ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models

The power7_set_irq() and power9_set_irq() functions set this but it is never used actually. Modern Book3s compatible CPUs are only supported by the pnv and spapr machines. They have an interrupt controller, XICS for POWER7/8 and XIVE for POWER9, whose models don't require to track IRQ input states

Re: [PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE

On 12/4/19 10:58 AM, Alex Bennée wrote: >> @@ -7437,13 +7437,10 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu, >> mask = PL0_RW; >> break; >> case 4: >> +case 5: >> /* min_EL EL2 */ >> mask = PL2_RW; >> break;

Re: [PATCH 02/10] hw: arm: add Xunlong Orange Pi PC machine

On Wed, Dec 4, 2019 at 10:03 AM Philippe Mathieu-Daudé wrote: > On 12/3/19 8:33 PM, Niek Linnenbank wrote: > > Hello Philippe, > > > > Thanks for your quick review comments! > > I'll start working on a v2 of the patches and include the changes you > > suggested. > > Thanks, but I'd suggest to wai

Re: [PATCH v2 0/7] Enable Travis builds on arm64, ppc64le and s390x

On Wed, Dec 04, 2019 at 04:46:11PM +0100, Thomas Huth wrote: > Travis recently added build hosts for arm64, ppc64le and s390x, so > this is a welcome addition to our Travis testing matrix. > > Unfortunately, the builds are running in quite restricted LXD containers > there, for example it is not p

Re: [PATCH 04/10] arm: allwinner-h3: add USB host controller

On Wed, Dec 4, 2019 at 5:11 PM Aleksandar Markovic < aleksandar.m.m...@gmail.com> wrote: > > > On Monday, December 2, 2019, Niek Linnenbank > wrote: > >> The Allwinner H3 System on Chip contains multiple USB 2.0 bus >> connections which provide software access using the Enhanced >> Host Controlle

Re: [PATCH v6 0/9] Clock framework API

On 12/4/19 5:40 PM, Damien Hedde wrote: On 12/2/19 5:15 PM, Peter Maydell wrote: The one topic I think we could do with discussing is whether a simple uint64_t giving the frequency of the clock in Hz is the right representation. In particular in your patch 9 the board has a clock frequency that

Re: [PATCH 01/10] hw: arm: add Allwinner H3 System-on-Chip

Hello Philippe, On Wed, Dec 4, 2019 at 5:53 PM Philippe Mathieu-Daudé wrote: > Hi Niek, > > On 12/2/19 10:09 PM, Niek Linnenbank wrote: > > The Allwinner H3 is a System on Chip containing four ARM Cortex A7 > > processor cores. Features and specifications include DDR2/DDR3 memory, > > SD/MMC sto

[PATCH-for-5.0] roms/edk2-funcs.sh: Use available GCC for ARM/Aarch64 targets

Centos 7.7 only provides cross GCC 4.8.5, but the script forces us to use GCC5. Since the same machinery is valid to check the GCC version, remove the $emulation_target check. $ cat /etc/redhat-release CentOS Linux release 7.7.1908 (Core) $ aarch64-linux-gnu-gcc -v 2>&1 | tail -1 gcc vers

Re: [PATCH v2 7/7] travis.yml: Enable builds on arm64, ppc64le and s390x

On Wed, Dec 04, 2019 at 04:46:18PM +0100, Thomas Huth wrote: > Travis recently added the possibility to test on these architectures, > too, so let's enable them in our travis.yml file to extend our test > coverage. > > Unfortunately, the libssh in this Ubuntu version (bionic) is in a pretty > unus

Re: [PATCH v2 2/2] migration: savevm_state_handler_insert: constant-time element insertion

On Wed, Dec 04, 2019 at 04:49:15PM +, Dr. David Alan Gilbert wrote: > * Scott Cheloha (chel...@linux.vnet.ibm.com) wrote: > > On Mon, Oct 21, 2019 at 09:14:44AM +0100, Dr. David Alan Gilbert wrote: > > > * David Gibson (da...@gibson.dropbear.id.au) wrote: > > > > On Fri, Oct 18, 2019 at 10:43:5

Re: [PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE

Richard Henderson writes: > On 12/4/19 10:58 AM, Alex Bennée wrote: >>> @@ -7437,13 +7437,10 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu, >>> mask = PL0_RW; >>> break; >>> case 4: >>> +case 5: >>> /* min_EL EL2 */ >>>

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