Build out/bios.bin on QEMU, out/bios.bin.elf on coreboot, and
out/Csm16.bin for CSM. This reduces the chance that one accidentally
builds for an incorrect target.
Signed-off-by: Kevin O'Connor
---
Makefile | 20 +---
README | 6 --
README.CSM | 11 ++-
3 files
On Wed, Oct 02, 2013 at 09:38:41PM -0400, Kevin O'Connor wrote:
> This series converts the AHCI driver to run entirely in 32bit mode.
> Currently, ahci will only jump into 32bit mode when it needs to access
> the ahci device's PCI config space. However, if the code has to run
> anything in 32bit m
On Mon, Oct 14, 2013 at 11:11:57PM +0200, Paul Menzel wrote:
> Am Montag, den 14.10.2013, 18:03 +0300 schrieb Evgeny Budilovsky:
> > +static int
> > +pvscsi_add_lun(struct pci_device *pci, u32 iobase,
> > + struct pvscsi_ring_dsc_s *ring_dsc, u8 target, u8 lun)
> > +{
> > +struct
Dear Evgeny,
thanks again for the next iteration!
Am Montag, den 14.10.2013, 18:03 +0300 schrieb Evgeny Budilovsky:
> Testing was done on windows images (win 2008/2012) taken from esx with vmware
> tools installed and boot disk configured to use pvscsi.
> Also I've used linux (ubuntu 12.04) whe
Dear all,
I am reading the source code of SeaBIOS. In QEMU detection part
(qemu_detect()), I notice the method to detect QEMU is the same as detect other
PCI devices through PCI Configuration Space (I/O port: 0xcf8 and 0xcfc). Does
QEMU emulate the PCI Configuration Space? Any help or comm
Testing was done on windows images (win 2008/2012) taken from esx with vmware
tools installed and boot disk configured to use pvscsi.
Also I've used linux (ubuntu 12.04) where pvscsi drivers are installed by
default and booted it using qemu cmd similar to this:
./x86_64-softmmu/qemu-system-x86_64
On Mon, Oct 14, 2013 at 06:15:25PM +0200, Igor Mammedov wrote:
> On Mon, 14 Oct 2013 17:00:47 +0300
> "Michael S. Tsirkin" wrote:
>
> > On Mon, Oct 14, 2013 at 03:04:45PM +0200, Gerd Hoffmann wrote:
> > > Hi,
> > >
> > > > >
> > > > > To me it makes more sense to just go the direct route and
On Mon, 14 Oct 2013 17:00:47 +0300
"Michael S. Tsirkin" wrote:
> On Mon, Oct 14, 2013 at 03:04:45PM +0200, Gerd Hoffmann wrote:
> > Hi,
> >
> > > >
> > > > To me it makes more sense to just go the direct route and say "please
> > > > put the 64bit bars at this location" rather than indirect "
On Mon, Oct 14, 2013 at 1:21 AM, Paul Menzel <
paulepan...@users.sourceforge.net> wrote:
> Dear Evgeny,
>
>
> thank you for the patch iterations!
>
> A minor nitpick, I prefer having a verb in the commit summary.
>
> Add pvscsi boot support
>
> Also you could add your reply (the things you tes
I apologize for the ignorance... Sorry!
Here is what needed to be done:
(X) Build for
( ) Build for QEMU/Xen/KVM/
( ) Build as Compatibilty Support Module for EFI BIOS
___
(X) None
( ) GeodeGX2
( ) GeodeLX
YES, USB keyboard does work! And yes, I was able to do almost impossible:
To boot in
On Mon, Oct 14, 2013 at 03:04:45PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > >
> > > To me it makes more sense to just go the direct route and say "please
> > > put the 64bit bars at this location" rather than indirect "we might want
> > > hotplug $thatmuch memory" and then expect the bios to lea
On Mon, 14 Oct 2013 10:28:08 +0200
Gerd Hoffmann wrote:
> Check the e820 entries we get from qemu for ram entries and handle them
> accordingly:
>
> (1) Entries overlapping with the lowmem range will be ignored.
> At least initially qemu will not send such entries for
> compatibility
On Mo, 2013-10-14 at 15:24 +0200, Igor Mammedov wrote:
> On Mon, 14 Oct 2013 14:22:15 +0200
> Gerd Hoffmann wrote:
>
> > Hi,
> >
> > > > +if (0x1LL + RamSizeOver4G < entry.address +
> > > > entry.length)
> > > > +RamSizeOver4G = entry.address + entr
On Mon, 14 Oct 2013 14:22:15 +0200
Gerd Hoffmann wrote:
> Hi,
>
> > > +if (0x1LL + RamSizeOver4G < entry.address +
> > > entry.length)
> > > +RamSizeOver4G = entry.address + entry.length -
> > > 0x1LL;
> > it's all based on assumption that
Hi,
> >
> > To me it makes more sense to just go the direct route and say "please
> > put the 64bit bars at this location" rather than indirect "we might want
> > hotplug $thatmuch memory" and then expect the bios to leave that much
> > room.
>
> Only if the newfeature address is not under bio
Hello Kevin,
Here are all options I have to choose. Please, advise. I do not see Coreboot
here.
( ) None
(X) QEMU/Bochs Original IBM 256K
( ) QEMU/Bochs Cirrus
( ) QEMU/Bochs VBE
( ) GeodeGX2
( ) GeodeLX
Thank you,
Zoran
___
Most of The Time you should be "intel inside" to be capable to thin
On Mon, Oct 14, 2013 at 12:35:53PM +, Stojsavljevic, Zoran wrote:
> I am resending this email since it never reached the wide audience.
>
> Hello to seabios list (and to direct participants of below thread),
> I have problem to boot to GRUB from SeaBIOS, since I was able to
> overcome some of
On Mon, Oct 14, 2013 at 02:16:23PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > > And there is slight difference between PCI holes and PCI address space
> > > mappings
> > > represented by MemoryRegion-s in QEMU.
> > >
> > > Basically we only need to inform BIOS where to PCI address spaces start
>
On Mon, 14 Oct 2013 14:00:12 +0300
"Michael S. Tsirkin" wrote:
> On Mon, Oct 14, 2013 at 12:27:26PM +0200, Igor Mammedov wrote:
> > On Sun, 13 Oct 2013 23:28:47 +0300
> > "Michael S. Tsirkin" wrote:
> >
> > > On Sun, Oct 13, 2013 at 07:33:19PM +0200, Igor Mammedov wrote:
> > > > On Sun, 13 Oct
Hi,
> > +if (0x1LL + RamSizeOver4G < entry.address +
> > entry.length)
> > +RamSizeOver4G = entry.address + entry.length -
> > 0x1LL;
> it's all based on assumption that there is only one highmem entry,
> why don't take just entry.length then
Hi,
> > And there is slight difference between PCI holes and PCI address space
> > mappings
> > represented by MemoryRegion-s in QEMU.
> >
> > Basically we only need to inform BIOS where to PCI address spaces start and
> > simple "etc/pcimem64-start" + "etc/pcimem32-start" are just fine for th
On Mon, Oct 14, 2013 at 12:27:26PM +0200, Igor Mammedov wrote:
> On Sun, 13 Oct 2013 23:28:47 +0300
> "Michael S. Tsirkin" wrote:
>
> > On Sun, Oct 13, 2013 at 07:33:19PM +0200, Igor Mammedov wrote:
> > > On Sun, 13 Oct 2013 19:46:09 +0300
> > > "Michael S. Tsirkin" wrote:
> > >
> > > > On Sun,
On Mon, 14 Oct 2013 10:28:08 +0200
Gerd Hoffmann wrote:
> Check the e820 entries we get from qemu for ram entries and handle them
> accordingly:
>
> (1) Entries overlapping with the lowmem range will be ignored.
> At least initially qemu will not send such entries for
> compatibility
On Sun, 13 Oct 2013 23:28:47 +0300
"Michael S. Tsirkin" wrote:
> On Sun, Oct 13, 2013 at 07:33:19PM +0200, Igor Mammedov wrote:
> > On Sun, 13 Oct 2013 19:46:09 +0300
> > "Michael S. Tsirkin" wrote:
> >
> > > On Sun, Oct 13, 2013 at 06:23:28PM +0200, Igor Mammedov wrote:
> > > > On Sun, 13 Oct
On Mo, 2013-10-14 at 10:28 +0200, Gerd Hoffmann wrote:
> Check the e820 entries we get from qemu for ram entries and handle
> them
> accordingly:
>
> (1) Entries overlapping with the lowmem range will be ignored.
> At least initially qemu will not send such entries for
> compatibility r
Check the e820 entries we get from qemu for ram entries and handle them
accordingly:
(1) Entries overlapping with the lowmem range will be ignored.
At least initially qemu will not send such entries for
compatibility reasons. That may change in the future though
if qemu needs a mo
Hi,
> > > But RamSizeOver4G still doesn't allow correctly place PCI window if large
> > > amount of memory present/reserved.
> > BTW: I don't think it's good practice to change semantics of an old
> > interface
> > in general. It's less confusing to leave old interface as is (obsoleting it
> >
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