On Thu, Jan 26, 2017 at 04:48:14PM +0100, Paul Menzel wrote:
> Dear SeaBIOS folks,
>
> coreboot allows to prefix images to add different romstage, ramstage, and
> payloads, and depending on the behavior during boot, choose a certain one.
>
> Commonly *normal* and *fallback* are used as prefixes,
On Thu, Jan 26, 2017 at 04:30:12PM +0100, Paul Menzel wrote:
> Dear SeaBIOS folks,
>
>
> On the ASRock E350M1 with coreboot and SeaBIOS, setting the runtime config
> option `threads` to 2, I am unable to press the boot menu key (ESC). [1]
>
> > By default, SeaBIOS will parallelize hardware initi
On Thu, Jan 26, 2017 at 06:47:10PM +0100, Paul Menzel wrote:
> Date: Fri, 20 Jan 2017 16:52:44 +0100
>
> You only want this information for debugging. As it also slows down the boot
> considerably, as, for example, for every character of the GRUB
> menu, something is sent over the serial console.
On Sun, Jan 29, 2017 at 10:08:10AM +0100, Paul Menzel wrote:
> Dear SeaBIOS folks,
>
>
> coreboots board status repository has some SeaBIOS warnings, and I
> believe the keyboard doesn’t work in that case.
>
> ```
> $ git grep 'Timeout at i8042_flush' origin/master --
> origin/master:amd/lamar/4
Dear SeaBIOS folks,
coreboots board status repository has some SeaBIOS warnings, and I
believe the keyboard doesn’t work in that case.
```
$ git grep 'Timeout at i8042_flush' origin/master --
origin/master:amd/lamar/4.0-9540-gae5ab60/2015-04-30T02:12:19Z/coreboot_console.txt:WARNING
- Timeout a