Hi
On 9/3/21 3:02 PM, Marek Vasut wrote:
> On 9/1/21 11:51 AM, Patrice Chotard wrote:
>> DM_GPIO_HOG flag has been replaced by GPIO_HOG flag since a while in
>> commit 49b10cb49262 ("gpio: fixes for gpio-hog support").
>>
>> And furthermore, gpio_hog_probe_all() is already called in board_r.c.
>>
Hi
On 9/3/21 10:31 AM, Patrick DELAUNAY wrote:
> Hi Patrice,
>
> On 9/1/21 11:51 AM, Patrice Chotard wrote:
>> DM_GPIO_HOG flag has been replaced by GPIO_HOG flag since a while in
>> commit 49b10cb49262 ("gpio: fixes for gpio-hog support").
>>
>> And furthermore, gpio_hog_probe_all() is already c
HI
On 10/8/21 8:44 AM, Patrice CHOTARD wrote:
> Hi
>
> On 8/3/21 12:05 PM, Patrice Chotard wrote:
>> From: Patrick Delaunay
>>
>> Add the support for the i2c-digital-filter binding, allowing to enable
>> the digital filter via the device-tree and indicate its value in the DT
>>
>> Signed-off-by:
Hi
On 8/3/21 12:05 PM, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Add the support for the i2c-digital-filter binding, allowing to enable
> the digital filter via the device-tree and indicate its value in the DT
>
> Signed-off-by: Patrick Delaunay
> Signed-off-by: Patrice Chotard
> --
HI
On 8/3/21 12:05 PM, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> The digital filter related computation are present in the driver
> however the programming of the filter within the IP is missing.
> The maximum value for the DNF is wrong and should be 15 instead of 16.
>
> Signed-off-b
Hi
On 8/3/21 12:05 PM, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Replace driver internally coded enabling/disabling of the
> analog-filter with the DT binding "i2c-analog-filter".
>
> Signed-off-by: Patrick Delaunay
> Signed-off-by: Patrice Chotard
> ---
>
> drivers/i2c/stm32f7_i2
Hi
On 8/3/21 12:05 PM, Patrice Chotard wrote:
> Add i2c-analog-filter property in I2C nodes to enable analog
> filter feature.
>
> Signed-off-by: Patrice Chotard
> ---
>
> arch/arm/dts/stm32h743.dtsi | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/dts/stm32h743.dtsi b/ar
Hi
On 8/3/21 12:05 PM, Patrice Chotard wrote:
> Add i2c-analog-filter property in I2C nodes to enable analog
> filter feature.
>
> Signed-off-by: Patrice Chotard
> ---
>
> arch/arm/dts/stm32f746.dtsi | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/dts/stm32f746.dtsi b/ar
Hi Patrick
On 8/3/21 12:05 PM, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Today all the I2C instance point on the same global
> variable stm32_i2c_setup according the compatible: i2c_priv->setup =
> pointer to the same driver data.
>
> This patch changes this driver data (stm32f7_setup
Hi
On 8/3/21 11:16 AM, Patrice Chotard wrote:
> Parse DT in ofdata_to_platdata() callback instead of probe().
>
> Signed-off-by: Patrice Chotard
> ---
>
> drivers/spi/stm32_spi.c | 224 +++-
> 1 file changed, 132 insertions(+), 92 deletions(-)
>
> diff --gi
Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone,
for China \ Hong Kong markets.
Has unlockable bootloader, unlike SM-G960U (American market version),
which allows running u-boot as a chain-loaded bootloader.
Signed-off-by: Dzmitry Sankouski
Cc: Ramon Fried
Cc: Tom Rini
---
Changes
Generic Interface (GENI) Serial Engine (SE) based uart
can be found on newer qualcomm SOCs, starting from SDM845.
Tested on Samsung SM-G9600(starqltechn)
by chain-loading u-boot with stock bootloader.
Signed-off-by: Dzmitry Sankouski
Cc: Ramon Fried
Cc: Tom Rini
---
Changes for v2:
- change fun
Currently driver supports only version 1 and 2.
Version 5 has slightly different registers structure
Signed-off-by: Dzmitry Sankouski
Cc: Ramon Fried
Cc: Tom Rini
---
Changes for v2:
- change string formats in debug statements
Changes for v3:
- remove if else braces where possible
Changes for v
Hi Patrick
On 10/6/21 5:16 PM, Patrick Delaunay wrote:
> Move CONFIG_BOOTCOMMAND defined in Kconfig in the board defconfig.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> configs/stm32f429-discovery_defconfig | 1 +
> include/configs/stm32f429-discovery.h | 3 ---
> 2 files changed, 1 insertion
Hi Patrick
On 10/4/21 11:05 AM, Patrick Delaunay wrote:
> This converts the CONFIG_STM32_FLASH to Kconfig by using
> tools/moveconfig.py
>
> Signed-off-by: Patrick Delaunay
> ---
>
> configs/stm32f429-discovery_defconfig | 1 +
> configs/stm32f429-evaluation_defconfig | 1 +
> configs/stm32f4
Hi Patrick
On 10/7/21 8:18 AM, Patrice CHOTARD wrote:
> Hi Patrick
>
> On 10/6/21 5:16 PM, Patrick Delaunay wrote:
>> Move CONFIG_BOOTCOMMAND defined in Kconfig in the board defconfig.
>>
>> Signed-off-by: Patrick Delaunay
>> ---
>>
>> configs/stm32f429-discovery_defconfig | 1 +
>> include/con
Hi Patrick
On 10/8/21 8:09 AM, Patrice CHOTARD wrote:
> Hi Patrick
>
> On 10/6/21 6:10 PM, Patrick Delaunay wrote:
>> Remove the following STV0991 specific configs:
>> - CONFIG_STV0991 (never used, only defined in CONFIG_SYS_EXTRA_OPTIONS)
>> - CONFIG_STV0991_HZ (replaced by generic CONFIG_SYS_HZ
Hi Patrick
On 10/8/21 8:10 AM, Patrice CHOTARD wrote:
> HI Patrick
>
> On 10/6/21 6:49 PM, Patrick Delaunay wrote:
>> Remove the latest reference of CONFIG_USER_LOWLEVEL_INIT in code
>>
>> Signed-off-by: Patrick Delaunay
>> ---
>>
>> include/configs/pm9263.h | 1 -
>> scripts/config_whiteli
Hi Pali & Marek,
On 24.09.21 22:59, Marek Behún wrote:
Hi Stefan,
this series by Pali cleans unneeded code in
arch/arm/mach-mvebu/serdes/a38x.
Pali studied the code, added comments about what the code does, and
then removed unneeded parts, wich explanations in commits.
Many thanks for this i
On 24.09.21 22:59, Marek Behún wrote:
From: Pali Rohár
These are part of SOC_CONTROL_REG1 register, not PEX_CAPABILITIES_REG.
Signed-off-by: Pali Rohár
Reviewed-by: Marek Behún
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h | 2 +-
1 file cha
On 24.09.21 22:59, Marek Behún wrote:
From: Pali Rohár
Remove unused PCIe functions from SerDes code. They are unused and are
duplicated either from generic PCIe code or from pci_mvebu.c.
Remove also unused PCIe macros from SerDes code. They are just obfuscated
variants of standards macros in
On 24.09.21 22:59, Marek Behún wrote:
From: Pali Rohár
This code is trying to parse PCIe config space of PCIe card connected on
the other end of link and then is trying to force 5.0 GT/s speed via Target
Link Speed bits in PCIe Root Port Link Control 2 Register on the local part
of link if it s
On 24.09.21 22:59, Marek Behún wrote:
From: Pali Rohár
PCI device ID is part of the PCIe controller SoC / revision. For Root
Complex mode (which is the default and the only mode supported currently
by U-Boot and Linux kernel), it is PCI device ID of PCIe Root Port device.
If there is some issu
On 24.09.21 22:59, Marek Behún wrote:
From: Pali Rohár
Enabling Common Clock Configuration bit in PCIe Root Port Link Control
Register should not be done unconditionally. It is enabled by operating
system as part of ASPM. Also after enabling Common Clock Configuration it
is required to do more
On 24.09.21 22:59, Marek Behún wrote:
From: Pali Rohár
Device/Port Type bits of PCIe Root Port PCI Express Capabilities Register
are read-only SAR registers and are initialized according to current mode
configured by PCIe controller. Changing PCIe controller mode (from Root
Complex mode to Endp
On 24.09.21 22:59, Marek Behún wrote:
From: Pali Rohár
Add comments to understand what this magic code is doing.
Signed-off-by: Pali Rohár
Reviewed-by: Marek Behún
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c | 14 +-
1 file cha
On 24.09.21 22:59, Marek Behún wrote:
From: Pali Rohár
SoC Control 1 Register (offset 0x18204) is already defined by macro
SOC_CONTROL_REG1.
Use macro SOC_CONTROL_REG1 instead of macro SOC_CTRL_REG in ctrl_pex.c
code and remove the other definition.
Signed-off-by: Pali Rohár
Reviewed-by: Mar
On 24.09.21 22:59, Marek Behún wrote:
From: Pali Rohár
Replace magic register offsets by macros to make code more readable.
Add comments about what this code is doing.
Signed-off-by: Pali Rohár
Reviewed-by: Marek Behún
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
.../serdes/a38x/high
On 26.09.21 00:54, Marek Behún wrote:
From: Marek Behún
There were several changes for this structure but the documentation was
not changed at the time. Fix this.
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
drivers/pci/pci-aardvark.c | 17 +
Hi Marek
On 10/4/21 1:48 PM, Marek Vasut wrote:
> This reverts commit d5d726d3cc47691ace3c68fa31147ad104aaf579,
> which breaks boards which ship with multiple SD/eMMC sockets.
>
> This stm32mp1.h config is not used only by the ST reference
> boards, but all the other STM32MP1 based boards in U-Bo
On 26.09.21 00:54, Marek Behún wrote:
From: Marek Behún
Update indentation in driver's private structure.
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
drivers/pci/pci-aardvark.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --gi
On 26.09.21 00:54, Marek Behún wrote:
From: Pali Rohár
Now that PCI Bridge (PCIe Root Port) for Aardvark is emulated in U-Boot,
add support for handling and propagation of CRSSVE bit.
When CRSSVE bit is unset (default), driver has to reissue config
read/write request on CRS response.
CRSSVE b
Hi Patrick
On 9/14/21 2:31 PM, Patrick Delaunay wrote:
> The vbus-supply is an optional property of sub-node connector node.
> and no more in the usb phyc node (in first proposed binding).
>
> This regulator for USB VBUS may be needed for host mode.
>
> See the latest kernel binding for details
On 26.09.21 00:54, Marek Behún wrote:
From: Pali Rohár
Now that PCI Bridge is working for the PCIe Root Port, U-Boot's PCI_PNP
code automatically enables memory access and bus mastering when needed.
We do not need to enable it when setting the HW up.
Signed-off-by: Pali Rohár
Reviewed-by: Ma
Hi Patrick
On 9/14/21 2:31 PM, Patrick Delaunay wrote:
> The vbus-supply is an optional property of sub-node connector node.
> and no more in the usb phyc node (in first proposed binding).
>
> This regulator for USB VBUS may be needed for host mode.
>
> See the latest kernel binding for details
On 26.09.21 00:54, Marek Behún wrote:
From: Pali Rohár
Aardvark does not have a real PCIe Root Port device on the root bus.
Instead it has PCIe registers of PCIe Root Port device mapped in
internal Aardvark memory space starting at offset 0xc0.
The PCIe Root Port itself is normally available a
On 26.09.21 00:54, Marek Behún wrote:
From: Pali Rohár
Aardvark reports Disabled and Hot Reset LTSSM states as values >= 0x20.
Link is not up in these states, so fix pcie_advk_link_up() function.
Signed-off-by: Pali Rohár
Reviewed-by: Marek Behún
Reviewed-by: Stefan Roese
Thanks,
Stefan
On 05.10.21 23:55, Pali Rohár wrote:
On Sunday 26 September 2021 00:54:42 Marek Behún wrote:
@@ -355,20 +369,55 @@ static int pcie_advk_read_config(const struct udevice
*bus, pci_dev_t bdf,
enum pci_size_t size)
{
struct pcie_advk *pcie = dev_get_priv(
Hi Patrick
On 9/2/21 12:02 PM, Patrick Delaunay wrote:
> These platforms never had to support an ATAGs-based Linux Kernel, so
> remove the options.
>
> Cc: Marek Vasut
> Signed-off-by: Tom Rini
> Signed-off-by: Patrick Delaunay
> ---
> Hi,
>
> this patch is a rebased version of the STM32 part
Hi
If anybody has objection, i will add this series to the next STM32 pull request
as this series is still not
merged since April.
Thanks
Patrice
On 9/10/21 4:16 PM, Patrice Chotard wrote:
>
> This series is fixing issues reported by Herbert Poetzl when trying to
> bind Ethernet gadget over
On 04.10.21 15:12, Robert Marko wrote:
Since the CP1 pinctrl is not properly set in the DTS, there is no
need for setting the pinctrl by writing hardcoded values to the MPP
registers.
So, drop the code relating to that.
Fixes: 87c220d0 ("arm: mvebu: mvebu_armada-8k: Add support for initializing
On 04.10.21 15:12, Robert Marko wrote:
Current CP1 pinctrl that is set on the Puzzle M801 is incorrect.
CP1 pins are only used for the SMI bus and the MSS I2C, all other
pins are just GPIO-s.
Due to this being set completely wrong, the pinctrl was actually
ended up being hardcoded in the board_e
HI Patrick
On 10/6/21 6:49 PM, Patrick Delaunay wrote:
> Remove the latest reference of CONFIG_USER_LOWLEVEL_INIT in code
>
> Signed-off-by: Patrick Delaunay
> ---
>
> include/configs/pm9263.h | 1 -
> scripts/config_whitelist.txt | 1 -
> 2 files changed, 2 deletions(-)
>
> diff --git a/
Hi Patrick
On 10/6/21 6:10 PM, Patrick Delaunay wrote:
> Remove the following STV0991 specific configs:
> - CONFIG_STV0991 (never used, only defined in CONFIG_SYS_EXTRA_OPTIONS)
> - CONFIG_STV0991_HZ (replaced by generic CONFIG_SYS_HZ)
> - CONFIG_STV0991_HZ_CLOCK (replaced by generic CONFIG_SYS_HZ
On 07.10.21 14:51, Pali Rohár wrote:
Header type is 7-bit number so use all 7 bits when detecting header type
and not only 2 bits.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
cmd/pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/pc
On 07.10.21 14:51, Pali Rohár wrote:
Header type is 7-bit number so properly clear upper 8th bit which
indicates multifunction device.
And do not try to show bars for unsupported header types.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
cmd/pci.c | 5 +
On 07.10.21 14:50, Pali Rohár wrote:
Number of BARs is defined by header type, not by class code.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
drivers/pci/pci_auto.c | 31 +--
1 file changed, 25 insertions(+), 6 deletions(-)
diff -
On 07.10.21 14:50, Pali Rohár wrote:
Function dm_pci_hose_probe_bus() expects that bus is valid PCI device with
Bridge header type (0x01). So add check before touching PCI config space to
prevent misconfiguring some non-standard device.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Th
On 07.10.21 14:50, Pali Rohár wrote:
PCI Rom Address is currently supported only for Normal (0x00) and
Bridge (0x01) header types. Fix code accordingly.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
drivers/pci/pci_auto.c | 3 ++-
1 file changed, 2 insertions(+
On 07.10.21 10:39, Chris Packham wrote:
Commit ca1a4c863232 ("mvebu: select boot device at SoC level") made it
unnecessary for the A385 boards to have their own kwbimage.cfg but as
the x530 was in flight at the time it was added with it's own
kwbimage.cfg. Remove the custom kwbimage.cfg as the So
[...]
> > > + ret = device_probe(bdev);
> > > + if (ret < 0) {
> > > + debug("Can't probe\n");
> > > + /* TODO: undo create */
> > > +
> > > + device_unbind(bdev);
> > > +
> > > + return ret;
> > > + }
> > > +
> >
> > Patches 2-6 seem to do the same thi
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C drive
AXP_PMIC_BUS enables communication with a specific AXP PMIC at a
PMIC-dependent I2C/P2WI/RSB bus address. It is automatically selected
as a dependency of the PMIC driver. It should not be selectable by the
user when no PMIC is chosen.
AXP_GPIO uses the pmic_bus functions, and also depends on a spe
Instead of using the SoC symbols to decide the bus type, use whichever
bus driver is actually enabled. This allows collapsing all of the AXP2xx
and AXP8xx variants into one "else" case. It also has the advantage of
falling back to I2C when the other bus drivers are disabled; this works
because all
Two displays supported by the sunxi display driver (each one used by a
single board) require initialization over I2C. Both previously used
i2c_soft; replace this with the i2c-gpio instance that already exists in
those boards' device trees (sun5i-a13-utoo-p66 and sun6i-a31-colombus).
Since the i2c-
The pmic_bus functions are used in both SPL (for regulator setup) and
U-Boot proper (for regulator setup, SID access, GPIO, and poweroff).
Currently, pmic_bus conflicts with DM_I2C because it uses the legacy I2C
interface. This commit makes pmic_bus dual-compatible with either the
legacy I2C funct
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C drive
Now that the last users of legacy I2C (outside of SPL) have been
resolved, we can enable DM_I2C at the sunxi architecture level.
Reviewed-by: Heiko Schocher
Signed-off-by: Samuel Holland
---
Changes in v2:
- No changes
arch/arm/Kconfig| 1 +
arch/arm/mach-sunxi/Kconfig | 3 ---
2
These PMICs provide some combination of battery charger, fuel gauge,
GPIOs, regulators, and VBUS routing. These functions are represented
as child nodes in the device tree. Add the minimal driver needed to
probe these child devices and provide the DM_PMIC ops.
Enable the driver by default for SoCs
SUN8I_RSB should not be selected by MACH_SUN8I, because the hardware
is not present in half of those SoCs (H3/H5, R40, and V3s). Move the
selection to the SoCs where the hardware actually exists.
Reviewed-by: Andre Przywara
Signed-off-by: Samuel Holland
---
Changes in v2:
- No changes
arch/ar
CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level
Kconfig symbol (not specific to either legacy or DM I2C), whereas the
i2c_init() function is specific to legacy I2C. This change fixes a
build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY.
Signed-off-by: Samuel Holland
Now that there is a separate symbol to enable DM_PMIC in SPL, update the
the SPL-specific driver symbols to depend on this new option.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Rebase to pick up 7abf178b ("power: Tidy up #undef of CONFIG_DM_PMIC")
drivers/power/pmic/Kconfig | 11 +
This series does the initial work to migrate sunxi boards to DM_I2C.
Version 1 of this series bitrotted quite a bit, so there is some
reorganization in version 2.
First it takes care of the PMIC:
- Patches 1-2 clean up the PMIC Kconfig, though they are not strictly
necessary after 7abf178b, an
Kconfig symbols for two PMIC drivers (PMIC_AS3722 and DM_PMIC_MC34708)
were missing a dependency on DM_PMIC. To fix this inconsistency, and to
keep it from happening again, wrap the driver section with "if DM_PMIC"
instead of using a "depends on DM_PMIC" clause for each driver.
Reviewed-by: Igor O
From: Peng Fan
Update doc after using binman to pack images
Signed-off-by: Peng Fan
---
doc/board/nxp/imx8mq_evk.rst | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/doc/board/nxp/imx8mq_evk.rst b/doc/board/nxp/imx8mq_evk.rst
index c269fdebe3..92eeda79aa 100644
--- a/doc/b
From: Peng Fan
After all these board switch to binman, we could use common imximage.cfg
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/imximage.cfg | 12 +++-
board/freescale/imx8mq_evk/imximage.cfg | 11 ---
board/google/imx8mq_phanbell/imximage.cfg | 11 --
From: Peng Fan
After switch to use binman, no need to use the bash script
to check file exsiting or not. And there is bug that
the script will be executed everytime Makefile is used which is
confusing people.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/Makefile | 13 +++--
1 file cha
From: Peng Fan
Switch to binman to pack images
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mq-phanbell-u-boot.dtsi | 2 ++
arch/arm/mach-imx/imx8m/Kconfig | 7 ---
board/google/imx8mq_phanbell/imximage.cfg | 11 +++
configs/imx8mq_phanbell_defconfig | 3 ++-
From: Peng Fan
Switch to use binman to pack images
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mq-pico-pi.dts | 1 +
arch/arm/mach-imx/imx8m/Kconfig | 1 +
board/technexion/pico-imx8mq/imximage.cfg | 11 +++
configs/pico-imx8mq_defconfig | 3 ++-
4 f
From: Peng Fan
When creating flash.bin, the hdmi firmware might not be
copied to U-Boot source tree. Then mkimage will fail.
However we are switching to binman, binman will show the
message if the file not there, and create empty file per
i.MX8MQ binman node. So we not fail mkimage here othersize
From: Peng Fan
Switch to use binman to pack images
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mq-evk-u-boot.dtsi | 2 +
arch/arm/dts/imx8mq-u-boot.dtsi | 122
arch/arm/mach-imx/imx8m/Kconfig | 1 +
board/freescale/imx8mq_evk/imximage.cfg | 11
From: Peng Fan
V2:
Add cover-letter
Rebased to latest master to avoid apply failure.
Peng Fan (7):
tools: imx8mimage: not abort when mmap fail
imx: imx8mq_evk: switch to binman
imx: imx8mq_phanbell: switch to binman
imx: pico-imx8mq: switch to use binman
imx: makefile: drop the use o
We configured the drive strength and security of EMMC in
arch_cpu_init().
Signed-off-by: Nico Cheng
---
arch/arm/mach-rockchip/rk3568/rk3568.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c
b/arch/arm/mach-rockchip/rk3568/rk3568.
Enable sdhci and sdmmc0 node in rk3568-u-boot.dtsi
Signed-off-by: Nico Cheng
---
arch/arm/dts/rk3568-u-boot.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 1570f13fc7..5a80dda275 100644
--- a/arc
Enable SPL support in Kconfig and add some related option in
rk3568_common.h
Signed-off-by: Nico Cheng
Signed-off-by: Jason Zhu
---
arch/arm/mach-rockchip/Kconfig | 2 ++
configs/evb-rk3568_defconfig| 25 -
include/configs/rk3568_common.h | 4
3 files change
This series adds support for the rk3568 SOC, SPL load next-stage image from
eMMC will be supported after this series of patches.
Nico Cheng (3):
rockchip: Kconfig: Enable SPL support for rk3568
arm: dts: rockchip: rk3568: Enable sdhci and sdmmc0 node
rockchip: rk3568: add arch_cpu_init()
On Mon, Oct 04, 2021 at 12:27:59PM +0900, AKASHI Takahiro wrote:
> On Fri, Oct 01, 2021 at 11:30:37AM +0200, Heinrich Schuchardt wrote:
> >
> >
> > On 10/1/21 07:01, AKASHI Takahiro wrote:
> > > UCLASS_PARTITION device will be created as a child node of
> > > UCLASS_BLK device.
> > >
> > > Signe
From: Oleksandr Suvorov
Variable "kernel_image" is used in boot.scr script only, that sets its
own default value to the constant string @@KERNEL_IMAGETYPE@@ in case
"kernel_image" is not set.
The default name of the kernel image shipped with BSP 5.x is "Image.gz".
Setting kernel_image="Image" as
From: Marcel Ziswiler
An assortment of fixes and improvements like an Ethernet PHY
configuration fix, DEK blob encapsulation preparation, migration to
using binman to pack images, SLEEP_MOCI# enablement, dropping of V1.0
hardware support [1], renaming kernel image variable, using preboot
for fdt
From: Marcel Ziswiler
Finally, found the root cause of the issue already once mentioned back
here [2] which caused the following error message during boot:
imx_wdt watchdog@3028:
pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Turns out while the watchdog node itself wa
From: Marcel Ziswiler
Use binman to pack images.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Heiko Thiery
Reviewed-by: Fabio Estevam
Reviewed-by: Heiko Schocher
---
(no changes since v4)
Changes in v4:
- Add Heiko Schocher's reviewed-by tag.
- Fix copyright periods.
Changes in v3:
- Case
From: Igor Opaniuk
Enable and set preboot var with fdtfile evaluation.
It will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.
This provides possibility to use different boot cmds in interactive m
From: Max Krummenacher
This powers some peripherals on the carrier board e.g. the USB hub.
Related-to: ELB-3206
Signed-off-by: Max Krummenacher
Signed-off-by: Marcel Ziswiler
Reviewed-by: Fabio Estevam
---
(no changes since v1)
arch/arm/dts/imx8mm-verdin.dts | 18 ++
confi
From: Max Krummenacher
We drop support for Verdin iMX8M Mini V1.0B.
Related-to: ELB-3551
Signed-off-by: Max Krummenacher
Signed-off-by: Marcel Ziswiler
Reviewed-by: Fabio Estevam
---
Changes in v5:
- Re-based on top of u-boot-imx, master yet again.
Changes in v4:
- Re-based.
Changes in v3
From: Marcel Ziswiler
Replace spurious spaces with proper tabs.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Fabio Estevam
---
(no changes since v1)
arch/arm/mach-imx/imx8m/Kconfig | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-imx/im
From: Marcel Ziswiler
Alphabetically order includes.
While at it also update copyright year resp. period.
Signed-off-by: Marcel Ziswiler
---
(no changes since v3)
Changes in v3:
- New patch cleaning up include order.
board/toradex/verdin-imx8mm/verdin-imx8mm.c | 4 ++--
1 file changed, 2 in
From: Marcel Ziswiler
Prepare for DEK blob encapsulation support through "dek_blob" command.
On ARMv8, u-boot runs in non-secure, thus cannot encapsulate a DEK blob
for encrypted boot.
The DEK blob is encapsulated by OP-TEE through a trusted application
call. U-boot sends and receives the DEK and
From: Marcel Ziswiler
Turns out Microship (formerly Micrel) meanwhile integrated proper
support for the DLL setup on their KSZ9131. Unfortunately, this
conflicts with our previous board code doing that.
Fix this by getting rid of our board code and just relying on the
generic implementation relyi
On 10/8/21 2:13 AM, Marcel Ziswiler wrote:
On Thu, 2021-10-07 at 23:56 +, Marcel Ziswiler wrote:
On Thu, 2021-10-07 at 16:12 +0200, sba...@denx.de wrote:
Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131")
the Micrel PHY driver correctly configures the delay registe
On Thu, 2021-10-07 at 23:56 +, Marcel Ziswiler wrote:
> On Thu, 2021-10-07 at 16:12 +0200, sba...@denx.de wrote:
> > > Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on
> > > ksz9131")
> > > the Micrel PHY driver correctly configures the delay register. The Verdin
> > > PHY
>
On Thu, 2021-10-07 at 16:12 +0200, sba...@denx.de wrote:
> > Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131")
> > the Micrel PHY driver correctly configures the delay register. The Verdin
> > PHY
> > is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer w
Hi Simon
On Wed, 2021-10-06 at 20:18 -0600, Simon Glass wrote:
> ...
> Nice clean-up!
Thanks!
> Reviewed-by: Simon Glass
>
> Option below.
>
> >
> > diff --git a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi
> > b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi
> > index a97626fa0c1..0c65070cd5f 100644
> >
On Thu, 7 Oct 2021 12:50:04 -0700
Tim Harvey thar...@gateworks.com wrote:
...
> > then vidconsole should be enabled.
>
> Anatolij,
>
> That is my configuration yet vidconsole does not enable until I
> 'setenv stdout serial,vidconsole':
> Ventana > print stdout
> stdout=serial,vidconsole
> ^^^ s
On 10/7/21 4:04 PM, Tom Rini wrote:
On Thu, Oct 07, 2021 at 03:33:32PM -0500, Alex G. wrote:
On 10/7/21 2:39 PM, Tom Rini wrote:
On Thu, Oct 07, 2021 at 02:32:42PM -0500, Alex G. wrote:
On 10/7/21 1:50 PM, Simon Glass wrote:
Hi Tom,
On Thu, 7 Oct 2021 at 12:30, Tom Rini wrote:
On T
Greetings,
I'm working on some features for the imx8mm-venice boards I support
which depend on making small changes to the dt before booting Linux.
The purpose is not to have any of this apply to the U-Boot controlling
dt but instead to the Linux kernel dt applied within ft_board_setup. I
could a
On Thu, Oct 07, 2021 at 03:33:32PM -0500, Alex G. wrote:
>
>
> On 10/7/21 2:39 PM, Tom Rini wrote:
> > On Thu, Oct 07, 2021 at 02:32:42PM -0500, Alex G. wrote:
> > >
> > >
> > > On 10/7/21 1:50 PM, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On Thu, 7 Oct 2021 at 12:30, Tom Rini wrote:
On 10/7/21 2:39 PM, Tom Rini wrote:
On Thu, Oct 07, 2021 at 02:32:42PM -0500, Alex G. wrote:
On 10/7/21 1:50 PM, Simon Glass wrote:
Hi Tom,
On Thu, 7 Oct 2021 at 12:30, Tom Rini wrote:
On Thu, Oct 07, 2021 at 12:02:24PM -0600, Simon Glass wrote:
Hi Tom,
On Thu, 7 Oct 2021 at 07:42, T
On Mon, Oct 4, 2021 at 6:48 AM Anatolij Gustschin wrote:
>
> On Wed, 29 Sep 2021 09:33:18 -0700
> Tim Harvey thar...@gateworks.com wrote:
> ...
> > One last question on this. I have never used U-Boot vidconsole before.
> > It does work if I 'setenv stdout serial,videconsole' but if I saveenv
> > a
On Wed, Oct 06, 2021 at 11:27:43PM +0200, Jernej Škrabec wrote:
> Hi everyone!
>
> Commit cb9faa6f98ae ("tools: Use a single target-independent config to enable
> OpenSSL") recently introduced option to disable usage of OpenSSL via
> CONFIG_TOOLS_LIBCRYPTO. However, just a bit later, another co
On Thu, Oct 07, 2021 at 02:32:42PM -0500, Alex G. wrote:
>
>
> On 10/7/21 1:50 PM, Simon Glass wrote:
> > Hi Tom,
> >
> > On Thu, 7 Oct 2021 at 12:30, Tom Rini wrote:
> > >
> > > On Thu, Oct 07, 2021 at 12:02:24PM -0600, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On Thu, 7 Oct 2021 at
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