Hi Amarendra,
On Fri, Jan 11, 2013 at 5:23 AM, Amarendra Reddy
wrote:
> Hi Jaehoon / Simon,
>
> Thanks for review comments.
> Please find my responses below.
>
> Thanks & Regards
> Amarendra Reddy
>
> On 11 January 2013 09:22, Jaehoon Chung wrote:
>>
>> On 01/11/2013 12:35 AM, Simon Glass wrote:
Hi Jaehoon / Simon,
Thanks for review comments.
Please find my responses below.
Thanks & Regards
Amarendra Reddy
On 11 January 2013 09:22, Jaehoon Chung wrote:
> On 01/11/2013 12:35 AM, Simon Glass wrote:
> > Hi Amar,
> >
> > On Fri, Jan 4, 2013 at 1:34 AM, Amar wrote:
> >> This API computes
On 01/11/2013 12:35 AM, Simon Glass wrote:
> Hi Amar,
>
> On Fri, Jan 4, 2013 at 1:34 AM, Amar wrote:
>> This API computes the divisor value based on MPLL clock and
>> writes it into the FSYS1 register.
>>
>> Changes from V1:
>> 1)Updated the function exynos5_mmc_set_clk_div() to receive
Hi Amar,
On Fri, Jan 4, 2013 at 1:34 AM, Amar wrote:
> This API computes the divisor value based on MPLL clock and
> writes it into the FSYS1 register.
>
> Changes from V1:
> 1)Updated the function exynos5_mmc_set_clk_div() to receive
> 'device_i'd as input parameter instead of 'i
This API computes the divisor value based on MPLL clock and
writes it into the FSYS1 register.
Changes from V1:
1)Updated the function exynos5_mmc_set_clk_div() to receive
'device_i'd as input parameter instead of 'index'.
Changes from V2:
1)Updation of commit message and
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