[clang] Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format", second try (PR #88245)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/88245 >From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 15:38:49 +0800 Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format" (#87987)", second try This reverts commit 299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6. --- clang/lib/Driver/ToolChains/MSVC.h | 5 ++--- clang/test/Driver/gcodeview-command-line.c | 1 + clang/test/Misc/win32-elf.c| 5 + 3 files changed, 8 insertions(+), 3 deletions(-) create mode 100644 clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 48369e030aade2..3950a8ed38e8b4 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,9 +61,8 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatMachO() - ? llvm::codegenoptions::DIF_DWARF - : llvm::codegenoptions::DIF_CodeView; +return getTriple().isOSBinFormatCOFF() ? llvm::codegenoptions::DIF_CodeView + : llvm::codegenoptions::DIF_DWARF; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Driver/gcodeview-command-line.c b/clang/test/Driver/gcodeview-command-line.c index da8708af322480..83542fc71aece4 100644 --- a/clang/test/Driver/gcodeview-command-line.c +++ b/clang/test/Driver/gcodeview-command-line.c @@ -1,5 +1,6 @@ // Note: %s must be preceded by --, otherwise it may be interpreted as a // command-line option, e.g. on Mac where %s is commonly under /Users. +// REQUIRES: aarch64-registered-target,arm-registered-target,x86-registered-target // ON-NOT: "-gno-codview-commandline" // OFF: "-gno-codeview-command-line" diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c new file mode 100644 index 00..f75281dc418727 --- /dev/null +++ b/clang/test/Misc/win32-elf.c @@ -0,0 +1,5 @@ +// Check that basic use of win32-elf targets works. +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s + +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO +// DEBUG-INFO: -dwarf-version={{.*}} >From e6a326dc4b21f8180e03d9f2157fd63792a1dc14 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 17:02:23 +0800 Subject: [PATCH 2/3] Move codeview related tests to gcodeview-command-line.c --- clang/test/Driver/cl-options.c | 12 -- clang/test/Driver/cl-outputs.c | 12 -- clang/test/Driver/gcodeview-command-line.c | 26 +- clang/test/Driver/gcodeview-ghash.c| 1 + clang/test/lit.cfg.py | 2 ++ 5 files changed, 28 insertions(+), 25 deletions(-) diff --git a/clang/test/Driver/cl-options.c b/clang/test/Driver/cl-options.c index 5b6dfe308a76ea..202f7a50e618fe 100644 --- a/clang/test/Driver/cl-options.c +++ b/clang/test/Driver/cl-options.c @@ -545,18 +545,6 @@ // RTTI-NOT: "-fno-rtti-data" // RTTI-NOT: "-fno-rtti" -// RUN: %clang_cl /Zi /c -### -- %s 2>&1 | FileCheck -check-prefix=Zi %s -// Zi: "-gcodeview" -// Zi: "-debug-info-kind=constructor" - -// RUN: %clang_cl /Z7 /c -### -- %s 2>&1 | FileCheck -check-prefix=Z7 %s -// Z7: "-gcodeview" -// Z7: "-debug-info-kind=constructor" - -// RUN: %clang_cl -gline-tables-only /c -### -- %s 2>&1 | FileCheck -check-prefix=ZGMLT %s -// ZGMLT: "-gcodeview" -// ZGMLT: "-debug-info-kind=line-tables-only" - // RUN: %clang_cl /c -### -- %s 2>&1 | FileCheck -check-prefix=BreproDefault %s // BreproDefault: "-mincremental-linker-compatible" diff --git a/clang/test/Driver/cl-outputs.c b/clang/test/Driver/cl-outputs.c index 4d58f0fb548b57..10bd0c97dcdca8 100644 --- a/clang/test/Driver/cl-outputs.c +++ b/clang/test/Driver/cl-outputs.c @@ -294,15 +294,3 @@ // RUN: %clang_cl /P /Fifoo.x /obar.x -### -- %s 2>&1 | FileCheck -check-prefix=FioRACE2 %s // FioRACE2: "-E" // FioRACE2: "-o" "foo.x" - -// RUN: %clang_cl /Z7 /Foa.obj -### -- %s 2>&1 | FileCheck -check-prefix=ABSOLUTE_OBJPATH %s -// ABSOLUTE_OBJPATH: "-object-file-name={{.*}}a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Foa.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH1 %s -// RELATIVE_OBJPATH1: "-object-file-name=a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Fo:a.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH1_COLON %s -// RELATIVE_OBJPATH1_COLON: "-object-file-name=a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Fofoo/a.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH2 %s -// RELATIVE_OBJPAT
[clang] Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format", second try (PR #88245)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/88245 >From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 15:38:49 +0800 Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format" (#87987)", second try This reverts commit 299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6. --- clang/lib/Driver/ToolChains/MSVC.h | 5 ++--- clang/test/Driver/gcodeview-command-line.c | 1 + clang/test/Misc/win32-elf.c| 5 + 3 files changed, 8 insertions(+), 3 deletions(-) create mode 100644 clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 48369e030aade2..3950a8ed38e8b4 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,9 +61,8 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatMachO() - ? llvm::codegenoptions::DIF_DWARF - : llvm::codegenoptions::DIF_CodeView; +return getTriple().isOSBinFormatCOFF() ? llvm::codegenoptions::DIF_CodeView + : llvm::codegenoptions::DIF_DWARF; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Driver/gcodeview-command-line.c b/clang/test/Driver/gcodeview-command-line.c index da8708af322480..83542fc71aece4 100644 --- a/clang/test/Driver/gcodeview-command-line.c +++ b/clang/test/Driver/gcodeview-command-line.c @@ -1,5 +1,6 @@ // Note: %s must be preceded by --, otherwise it may be interpreted as a // command-line option, e.g. on Mac where %s is commonly under /Users. +// REQUIRES: aarch64-registered-target,arm-registered-target,x86-registered-target // ON-NOT: "-gno-codview-commandline" // OFF: "-gno-codeview-command-line" diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c new file mode 100644 index 00..f75281dc418727 --- /dev/null +++ b/clang/test/Misc/win32-elf.c @@ -0,0 +1,5 @@ +// Check that basic use of win32-elf targets works. +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s + +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO +// DEBUG-INFO: -dwarf-version={{.*}} >From e6a326dc4b21f8180e03d9f2157fd63792a1dc14 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 17:02:23 +0800 Subject: [PATCH 2/3] Move codeview related tests to gcodeview-command-line.c --- clang/test/Driver/cl-options.c | 12 -- clang/test/Driver/cl-outputs.c | 12 -- clang/test/Driver/gcodeview-command-line.c | 26 +- clang/test/Driver/gcodeview-ghash.c| 1 + clang/test/lit.cfg.py | 2 ++ 5 files changed, 28 insertions(+), 25 deletions(-) diff --git a/clang/test/Driver/cl-options.c b/clang/test/Driver/cl-options.c index 5b6dfe308a76ea..202f7a50e618fe 100644 --- a/clang/test/Driver/cl-options.c +++ b/clang/test/Driver/cl-options.c @@ -545,18 +545,6 @@ // RTTI-NOT: "-fno-rtti-data" // RTTI-NOT: "-fno-rtti" -// RUN: %clang_cl /Zi /c -### -- %s 2>&1 | FileCheck -check-prefix=Zi %s -// Zi: "-gcodeview" -// Zi: "-debug-info-kind=constructor" - -// RUN: %clang_cl /Z7 /c -### -- %s 2>&1 | FileCheck -check-prefix=Z7 %s -// Z7: "-gcodeview" -// Z7: "-debug-info-kind=constructor" - -// RUN: %clang_cl -gline-tables-only /c -### -- %s 2>&1 | FileCheck -check-prefix=ZGMLT %s -// ZGMLT: "-gcodeview" -// ZGMLT: "-debug-info-kind=line-tables-only" - // RUN: %clang_cl /c -### -- %s 2>&1 | FileCheck -check-prefix=BreproDefault %s // BreproDefault: "-mincremental-linker-compatible" diff --git a/clang/test/Driver/cl-outputs.c b/clang/test/Driver/cl-outputs.c index 4d58f0fb548b57..10bd0c97dcdca8 100644 --- a/clang/test/Driver/cl-outputs.c +++ b/clang/test/Driver/cl-outputs.c @@ -294,15 +294,3 @@ // RUN: %clang_cl /P /Fifoo.x /obar.x -### -- %s 2>&1 | FileCheck -check-prefix=FioRACE2 %s // FioRACE2: "-E" // FioRACE2: "-o" "foo.x" - -// RUN: %clang_cl /Z7 /Foa.obj -### -- %s 2>&1 | FileCheck -check-prefix=ABSOLUTE_OBJPATH %s -// ABSOLUTE_OBJPATH: "-object-file-name={{.*}}a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Foa.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH1 %s -// RELATIVE_OBJPATH1: "-object-file-name=a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Fo:a.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH1_COLON %s -// RELATIVE_OBJPATH1_COLON: "-object-file-name=a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Fofoo/a.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH2 %s -// RELATIVE_OBJPAT
[clang] Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format", second try (PR #88245)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/88245 >From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 15:38:49 +0800 Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format" (#87987)", second try This reverts commit 299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6. --- clang/lib/Driver/ToolChains/MSVC.h | 5 ++--- clang/test/Driver/gcodeview-command-line.c | 1 + clang/test/Misc/win32-elf.c| 5 + 3 files changed, 8 insertions(+), 3 deletions(-) create mode 100644 clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 48369e030aade2..3950a8ed38e8b4 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,9 +61,8 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatMachO() - ? llvm::codegenoptions::DIF_DWARF - : llvm::codegenoptions::DIF_CodeView; +return getTriple().isOSBinFormatCOFF() ? llvm::codegenoptions::DIF_CodeView + : llvm::codegenoptions::DIF_DWARF; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Driver/gcodeview-command-line.c b/clang/test/Driver/gcodeview-command-line.c index da8708af322480..83542fc71aece4 100644 --- a/clang/test/Driver/gcodeview-command-line.c +++ b/clang/test/Driver/gcodeview-command-line.c @@ -1,5 +1,6 @@ // Note: %s must be preceded by --, otherwise it may be interpreted as a // command-line option, e.g. on Mac where %s is commonly under /Users. +// REQUIRES: aarch64-registered-target,arm-registered-target,x86-registered-target // ON-NOT: "-gno-codview-commandline" // OFF: "-gno-codeview-command-line" diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c new file mode 100644 index 00..f75281dc418727 --- /dev/null +++ b/clang/test/Misc/win32-elf.c @@ -0,0 +1,5 @@ +// Check that basic use of win32-elf targets works. +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s + +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO +// DEBUG-INFO: -dwarf-version={{.*}} >From e6a326dc4b21f8180e03d9f2157fd63792a1dc14 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 17:02:23 +0800 Subject: [PATCH 2/3] Move codeview related tests to gcodeview-command-line.c --- clang/test/Driver/cl-options.c | 12 -- clang/test/Driver/cl-outputs.c | 12 -- clang/test/Driver/gcodeview-command-line.c | 26 +- clang/test/Driver/gcodeview-ghash.c| 1 + clang/test/lit.cfg.py | 2 ++ 5 files changed, 28 insertions(+), 25 deletions(-) diff --git a/clang/test/Driver/cl-options.c b/clang/test/Driver/cl-options.c index 5b6dfe308a76ea..202f7a50e618fe 100644 --- a/clang/test/Driver/cl-options.c +++ b/clang/test/Driver/cl-options.c @@ -545,18 +545,6 @@ // RTTI-NOT: "-fno-rtti-data" // RTTI-NOT: "-fno-rtti" -// RUN: %clang_cl /Zi /c -### -- %s 2>&1 | FileCheck -check-prefix=Zi %s -// Zi: "-gcodeview" -// Zi: "-debug-info-kind=constructor" - -// RUN: %clang_cl /Z7 /c -### -- %s 2>&1 | FileCheck -check-prefix=Z7 %s -// Z7: "-gcodeview" -// Z7: "-debug-info-kind=constructor" - -// RUN: %clang_cl -gline-tables-only /c -### -- %s 2>&1 | FileCheck -check-prefix=ZGMLT %s -// ZGMLT: "-gcodeview" -// ZGMLT: "-debug-info-kind=line-tables-only" - // RUN: %clang_cl /c -### -- %s 2>&1 | FileCheck -check-prefix=BreproDefault %s // BreproDefault: "-mincremental-linker-compatible" diff --git a/clang/test/Driver/cl-outputs.c b/clang/test/Driver/cl-outputs.c index 4d58f0fb548b57..10bd0c97dcdca8 100644 --- a/clang/test/Driver/cl-outputs.c +++ b/clang/test/Driver/cl-outputs.c @@ -294,15 +294,3 @@ // RUN: %clang_cl /P /Fifoo.x /obar.x -### -- %s 2>&1 | FileCheck -check-prefix=FioRACE2 %s // FioRACE2: "-E" // FioRACE2: "-o" "foo.x" - -// RUN: %clang_cl /Z7 /Foa.obj -### -- %s 2>&1 | FileCheck -check-prefix=ABSOLUTE_OBJPATH %s -// ABSOLUTE_OBJPATH: "-object-file-name={{.*}}a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Foa.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH1 %s -// RELATIVE_OBJPATH1: "-object-file-name=a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Fo:a.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH1_COLON %s -// RELATIVE_OBJPATH1_COLON: "-object-file-name=a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Fofoo/a.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH2 %s -// RELATIVE_OBJPAT
[clang] Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format", second try (PR #88245)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/88245 >From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 15:38:49 +0800 Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format" (#87987)", second try This reverts commit 299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6. --- clang/lib/Driver/ToolChains/MSVC.h | 5 ++--- clang/test/Driver/gcodeview-command-line.c | 1 + clang/test/Misc/win32-elf.c| 5 + 3 files changed, 8 insertions(+), 3 deletions(-) create mode 100644 clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 48369e030aade2..3950a8ed38e8b4 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,9 +61,8 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatMachO() - ? llvm::codegenoptions::DIF_DWARF - : llvm::codegenoptions::DIF_CodeView; +return getTriple().isOSBinFormatCOFF() ? llvm::codegenoptions::DIF_CodeView + : llvm::codegenoptions::DIF_DWARF; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Driver/gcodeview-command-line.c b/clang/test/Driver/gcodeview-command-line.c index da8708af322480..83542fc71aece4 100644 --- a/clang/test/Driver/gcodeview-command-line.c +++ b/clang/test/Driver/gcodeview-command-line.c @@ -1,5 +1,6 @@ // Note: %s must be preceded by --, otherwise it may be interpreted as a // command-line option, e.g. on Mac where %s is commonly under /Users. +// REQUIRES: aarch64-registered-target,arm-registered-target,x86-registered-target // ON-NOT: "-gno-codview-commandline" // OFF: "-gno-codeview-command-line" diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c new file mode 100644 index 00..f75281dc418727 --- /dev/null +++ b/clang/test/Misc/win32-elf.c @@ -0,0 +1,5 @@ +// Check that basic use of win32-elf targets works. +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s + +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO +// DEBUG-INFO: -dwarf-version={{.*}} >From e6a326dc4b21f8180e03d9f2157fd63792a1dc14 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 17:02:23 +0800 Subject: [PATCH 2/3] Move codeview related tests to gcodeview-command-line.c --- clang/test/Driver/cl-options.c | 12 -- clang/test/Driver/cl-outputs.c | 12 -- clang/test/Driver/gcodeview-command-line.c | 26 +- clang/test/Driver/gcodeview-ghash.c| 1 + clang/test/lit.cfg.py | 2 ++ 5 files changed, 28 insertions(+), 25 deletions(-) diff --git a/clang/test/Driver/cl-options.c b/clang/test/Driver/cl-options.c index 5b6dfe308a76ea..202f7a50e618fe 100644 --- a/clang/test/Driver/cl-options.c +++ b/clang/test/Driver/cl-options.c @@ -545,18 +545,6 @@ // RTTI-NOT: "-fno-rtti-data" // RTTI-NOT: "-fno-rtti" -// RUN: %clang_cl /Zi /c -### -- %s 2>&1 | FileCheck -check-prefix=Zi %s -// Zi: "-gcodeview" -// Zi: "-debug-info-kind=constructor" - -// RUN: %clang_cl /Z7 /c -### -- %s 2>&1 | FileCheck -check-prefix=Z7 %s -// Z7: "-gcodeview" -// Z7: "-debug-info-kind=constructor" - -// RUN: %clang_cl -gline-tables-only /c -### -- %s 2>&1 | FileCheck -check-prefix=ZGMLT %s -// ZGMLT: "-gcodeview" -// ZGMLT: "-debug-info-kind=line-tables-only" - // RUN: %clang_cl /c -### -- %s 2>&1 | FileCheck -check-prefix=BreproDefault %s // BreproDefault: "-mincremental-linker-compatible" diff --git a/clang/test/Driver/cl-outputs.c b/clang/test/Driver/cl-outputs.c index 4d58f0fb548b57..10bd0c97dcdca8 100644 --- a/clang/test/Driver/cl-outputs.c +++ b/clang/test/Driver/cl-outputs.c @@ -294,15 +294,3 @@ // RUN: %clang_cl /P /Fifoo.x /obar.x -### -- %s 2>&1 | FileCheck -check-prefix=FioRACE2 %s // FioRACE2: "-E" // FioRACE2: "-o" "foo.x" - -// RUN: %clang_cl /Z7 /Foa.obj -### -- %s 2>&1 | FileCheck -check-prefix=ABSOLUTE_OBJPATH %s -// ABSOLUTE_OBJPATH: "-object-file-name={{.*}}a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Foa.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH1 %s -// RELATIVE_OBJPATH1: "-object-file-name=a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Fo:a.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH1_COLON %s -// RELATIVE_OBJPATH1_COLON: "-object-file-name=a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Fofoo/a.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH2 %s -// RELATIVE_OBJPAT
[clang] Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format", second try (PR #88245)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/88245 >From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 15:38:49 +0800 Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format" (#87987)", second try This reverts commit 299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6. --- clang/lib/Driver/ToolChains/MSVC.h | 5 ++--- clang/test/Driver/gcodeview-command-line.c | 1 + clang/test/Misc/win32-elf.c| 5 + 3 files changed, 8 insertions(+), 3 deletions(-) create mode 100644 clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 48369e030aade2..3950a8ed38e8b4 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,9 +61,8 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatMachO() - ? llvm::codegenoptions::DIF_DWARF - : llvm::codegenoptions::DIF_CodeView; +return getTriple().isOSBinFormatCOFF() ? llvm::codegenoptions::DIF_CodeView + : llvm::codegenoptions::DIF_DWARF; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Driver/gcodeview-command-line.c b/clang/test/Driver/gcodeview-command-line.c index da8708af322480..83542fc71aece4 100644 --- a/clang/test/Driver/gcodeview-command-line.c +++ b/clang/test/Driver/gcodeview-command-line.c @@ -1,5 +1,6 @@ // Note: %s must be preceded by --, otherwise it may be interpreted as a // command-line option, e.g. on Mac where %s is commonly under /Users. +// REQUIRES: aarch64-registered-target,arm-registered-target,x86-registered-target // ON-NOT: "-gno-codview-commandline" // OFF: "-gno-codeview-command-line" diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c new file mode 100644 index 00..f75281dc418727 --- /dev/null +++ b/clang/test/Misc/win32-elf.c @@ -0,0 +1,5 @@ +// Check that basic use of win32-elf targets works. +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s + +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO +// DEBUG-INFO: -dwarf-version={{.*}} >From e6a326dc4b21f8180e03d9f2157fd63792a1dc14 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 17:02:23 +0800 Subject: [PATCH 2/3] Move codeview related tests to gcodeview-command-line.c --- clang/test/Driver/cl-options.c | 12 -- clang/test/Driver/cl-outputs.c | 12 -- clang/test/Driver/gcodeview-command-line.c | 26 +- clang/test/Driver/gcodeview-ghash.c| 1 + clang/test/lit.cfg.py | 2 ++ 5 files changed, 28 insertions(+), 25 deletions(-) diff --git a/clang/test/Driver/cl-options.c b/clang/test/Driver/cl-options.c index 5b6dfe308a76ea..202f7a50e618fe 100644 --- a/clang/test/Driver/cl-options.c +++ b/clang/test/Driver/cl-options.c @@ -545,18 +545,6 @@ // RTTI-NOT: "-fno-rtti-data" // RTTI-NOT: "-fno-rtti" -// RUN: %clang_cl /Zi /c -### -- %s 2>&1 | FileCheck -check-prefix=Zi %s -// Zi: "-gcodeview" -// Zi: "-debug-info-kind=constructor" - -// RUN: %clang_cl /Z7 /c -### -- %s 2>&1 | FileCheck -check-prefix=Z7 %s -// Z7: "-gcodeview" -// Z7: "-debug-info-kind=constructor" - -// RUN: %clang_cl -gline-tables-only /c -### -- %s 2>&1 | FileCheck -check-prefix=ZGMLT %s -// ZGMLT: "-gcodeview" -// ZGMLT: "-debug-info-kind=line-tables-only" - // RUN: %clang_cl /c -### -- %s 2>&1 | FileCheck -check-prefix=BreproDefault %s // BreproDefault: "-mincremental-linker-compatible" diff --git a/clang/test/Driver/cl-outputs.c b/clang/test/Driver/cl-outputs.c index 4d58f0fb548b57..10bd0c97dcdca8 100644 --- a/clang/test/Driver/cl-outputs.c +++ b/clang/test/Driver/cl-outputs.c @@ -294,15 +294,3 @@ // RUN: %clang_cl /P /Fifoo.x /obar.x -### -- %s 2>&1 | FileCheck -check-prefix=FioRACE2 %s // FioRACE2: "-E" // FioRACE2: "-o" "foo.x" - -// RUN: %clang_cl /Z7 /Foa.obj -### -- %s 2>&1 | FileCheck -check-prefix=ABSOLUTE_OBJPATH %s -// ABSOLUTE_OBJPATH: "-object-file-name={{.*}}a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Foa.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH1 %s -// RELATIVE_OBJPATH1: "-object-file-name=a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Fo:a.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH1_COLON %s -// RELATIVE_OBJPATH1_COLON: "-object-file-name=a.obj" - -// RUN: %clang_cl -fdebug-compilation-dir=. /Z7 /Fofoo/a.obj -### -- %s 2>&1 | FileCheck -check-prefix=RELATIVE_OBJPATH2 %s -// RELATIVE_OBJPAT
[clang] [Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format (PR #87149)
phoebewang wrote: > I am curious what a `win32-elf` triple is. Does MSVC support generating ELF > object files? No idea, but https://github.com/llvm/llvm-project/issues/87140 doesn't look like from fuzzing. Consider Windows has WSL now, I'd not surprise it's supported or will be supported someday, see https://learn.microsoft.com/en-us/cpp/build/walkthrough-build-debug-wsl2?view=msvc-170 https://github.com/llvm/llvm-project/pull/87149 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [C++17] Support __GCC_[CON|DE]STRUCTIVE_SIZE (PR #89446)
phoebewang wrote: Sorry, I know nothing about it. But it looks to me it's to match with GCC, why don't borrow the value from GCC as a beginning? https://github.com/llvm/llvm-project/pull/89446 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][test] Added extra cet tests, NFC (PR #88736)
https://github.com/phoebewang closed https://github.com/llvm/llvm-project/pull/88736 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][test] Added extra cet tests, NFC (PR #88736)
https://github.com/phoebewang edited https://github.com/llvm/llvm-project/pull/88736 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][test] Added extra cet tests (PR #88736)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/88736 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][test] Added extra cet tests (PR #88736)
@@ -1,13 +1,22 @@ // RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=return %s | FileCheck %s --check-prefix=RETURN // RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=branch %s | FileCheck %s --check-prefix=BRANCH // RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=full %s | FileCheck %s --check-prefix=FULL +// RUN: %clang_cc1 -E -triple=x86_64 -dM -o - -fcf-protection=none %s | FileCheck %s --check-prefix=NOTCET // RUN: not %clang_cc1 -emit-llvm-only -triple i386 -target-cpu pentium-mmx -fcf-protection=branch %s 2>&1 | FileCheck %s --check-prefix=NOCFPROT +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=return %s -emit-llvm | FileCheck %s --check-prefix=CFPROTR +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=branch %s -emit-llvm | FileCheck %s --check-prefix=CFPROTB +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=full %s -emit-llvm | FileCheck %s --check-prefix=CFPROTF phoebewang wrote: ```suggestion // RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=return %s -emit-llvm | FileCheck %s --check-prefixes=CFPROTR,CFPROTNONE // RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=branch %s -emit-llvm | FileCheck %s --check-prefixes=CFPROTB,CFPROTNONE // RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=full %s -emit-llvm | FileCheck %s --check-prefixes=CFPROTR,CFPROTB,CFPROTNONE ``` https://github.com/llvm/llvm-project/pull/88736 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][test] Added extra cet tests (PR #88736)
@@ -1,13 +1,22 @@ // RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=return %s | FileCheck %s --check-prefix=RETURN // RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=branch %s | FileCheck %s --check-prefix=BRANCH // RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=full %s | FileCheck %s --check-prefix=FULL +// RUN: %clang_cc1 -E -triple=x86_64 -dM -o - -fcf-protection=none %s | FileCheck %s --check-prefix=NOTCET // RUN: not %clang_cc1 -emit-llvm-only -triple i386 -target-cpu pentium-mmx -fcf-protection=branch %s 2>&1 | FileCheck %s --check-prefix=NOCFPROT +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=return %s -emit-llvm | FileCheck %s --check-prefix=CFPROTR +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=branch %s -emit-llvm | FileCheck %s --check-prefix=CFPROTB +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=full %s -emit-llvm | FileCheck %s --check-prefix=CFPROTF +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=none %s -emit-llvm | FileCheck %s --check-prefix=CFPROTNONE // RETURN: #define __CET__ 2 // BRANCH: #define __CET__ 1 // FULL: #define __CET__ 3 -// CFPROT: !{i32 8, !"cf-protection-branch", i32 1} - +// NOTCET-NOT: #define __CET__ // NOCFPROT: error: option 'cf-protection=branch' cannot be specified on this target +// CFPROTR: !{i32 8, !"cf-protection-return", i32 1} +// CFPROTB: !{i32 8, !"cf-protection-branch", i32 1} +// CFPROTF: !{i32 8, !"cf-protection-return", i32 1} +// CFPROTF-NEXT: !{i32 8, !"cf-protection-branch", i32 1} phoebewang wrote: ```suggestion // CFPROTNONE-NOT: cf-protection- // CFPROTR: !{i32 8, !"cf-protection-return", i32 1} // CFPROTB: !{i32 8, !"cf-protection-branch", i32 1} // CFPROTNONE-NOT: cf-protection- ``` https://github.com/llvm/llvm-project/pull/88736 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [SEH] Ignore async exception flag when the environment is not MSVC (PR #88101)
phoebewang wrote: Thanks a lot @nico! I see the bot is still red, but not failed on this test any more. https://github.com/llvm/llvm-project/pull/88101 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [SEH] Ignore async exception flag when the environment is not MSVC (PR #88101)
https://github.com/phoebewang closed https://github.com/llvm/llvm-project/pull/88101 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][test] Added extra cet tests (PR #88736)
https://github.com/phoebewang edited https://github.com/llvm/llvm-project/pull/88736 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][test] Added extra cet tests (PR #88736)
https://github.com/phoebewang edited https://github.com/llvm/llvm-project/pull/88736 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][test] Added extra cet tests (PR #88736)
@@ -2,12 +2,20 @@ // RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=branch %s | FileCheck %s --check-prefix=BRANCH // RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=full %s | FileCheck %s --check-prefix=FULL // RUN: not %clang_cc1 -emit-llvm-only -triple i386 -target-cpu pentium-mmx -fcf-protection=branch %s 2>&1 | FileCheck %s --check-prefix=NOCFPROT +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=branch %s -emit-llvm | FileCheck %s --check-prefix=CFPROT +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=full %s -emit-llvm | FileCheck %s --check-prefix=CFPROTF +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=none %s -emit-llvm | FileCheck %s --check-prefix=CFPROTNONE +// RUN: %clang_cc1 -E -triple=x86_64 -dM -o - -fcf-protection=none %s | FileCheck %s --check-prefix=NOTCET // RETURN: #define __CET__ 2 // BRANCH: #define __CET__ 1 // FULL: #define __CET__ 3 // CFPROT: !{i32 8, !"cf-protection-branch", i32 1} // NOCFPROT: error: option 'cf-protection=branch' cannot be specified on this target +// CFPROTF: !{i32 8, !"cf-protection-return", i32 1} +// CFPROTF-NEXT: !{i32 8, !"cf-protection-branch", i32 1} +// CFPROTNONE-NOT: cf-protection-branch phoebewang wrote: Change to `cf-protection-` to cover both. https://github.com/llvm/llvm-project/pull/88736 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][test] Added extra cet tests (PR #88736)
@@ -2,12 +2,20 @@ // RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=branch %s | FileCheck %s --check-prefix=BRANCH // RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=full %s | FileCheck %s --check-prefix=FULL // RUN: not %clang_cc1 -emit-llvm-only -triple i386 -target-cpu pentium-mmx -fcf-protection=branch %s 2>&1 | FileCheck %s --check-prefix=NOCFPROT +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=branch %s -emit-llvm | FileCheck %s --check-prefix=CFPROT +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=full %s -emit-llvm | FileCheck %s --check-prefix=CFPROTF +// RUN: %clang_cc1 -triple=x86_64 -o - -fcf-protection=none %s -emit-llvm | FileCheck %s --check-prefix=CFPROTNONE +// RUN: %clang_cc1 -E -triple=x86_64 -dM -o - -fcf-protection=none %s | FileCheck %s --check-prefix=NOTCET // RETURN: #define __CET__ 2 // BRANCH: #define __CET__ 1 // FULL: #define __CET__ 3 // CFPROT: !{i32 8, !"cf-protection-branch", i32 1} phoebewang wrote: Add a `// CFPROT-NOT: cf-protection-branch` https://github.com/llvm/llvm-project/pull/88736 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format", second try (PR #88245)
https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/88245 This is a second try to reland https://github.com/llvm/llvm-project/pull/87149. The previous commit exposed failures on some targets. The reason is only a few targets support COFF ObjectFormatType on Windows: https://github.com/llvm/llvm-project/blob/main/llvm/lib/TargetParser/Triple.cpp#L835-L842 With https://github.com/llvm/llvm-project/pull/87149, the targets don't support COFF will report "warning: argument unused during compilation: '-gcodeview-command-line' [-Wunused-command-line-argument]" in the test gcodeview-command-line.c I was thinking `REQUIRES: *-registered-target` could solve the problem, but it didn't. We need to check the actual triple instead of just `*-registered-target`. >From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 15:38:49 +0800 Subject: [PATCH 1/2] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format" (#87987)", second try This reverts commit 299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6. --- clang/lib/Driver/ToolChains/MSVC.h | 5 ++--- clang/test/Driver/gcodeview-command-line.c | 1 + clang/test/Misc/win32-elf.c| 5 + 3 files changed, 8 insertions(+), 3 deletions(-) create mode 100644 clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 48369e030aade2..3950a8ed38e8b4 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,9 +61,8 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatMachO() - ? llvm::codegenoptions::DIF_DWARF - : llvm::codegenoptions::DIF_CodeView; +return getTriple().isOSBinFormatCOFF() ? llvm::codegenoptions::DIF_CodeView + : llvm::codegenoptions::DIF_DWARF; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Driver/gcodeview-command-line.c b/clang/test/Driver/gcodeview-command-line.c index da8708af322480..83542fc71aece4 100644 --- a/clang/test/Driver/gcodeview-command-line.c +++ b/clang/test/Driver/gcodeview-command-line.c @@ -1,5 +1,6 @@ // Note: %s must be preceded by --, otherwise it may be interpreted as a // command-line option, e.g. on Mac where %s is commonly under /Users. +// REQUIRES: aarch64-registered-target,arm-registered-target,x86-registered-target // ON-NOT: "-gno-codview-commandline" // OFF: "-gno-codeview-command-line" diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c new file mode 100644 index 00..f75281dc418727 --- /dev/null +++ b/clang/test/Misc/win32-elf.c @@ -0,0 +1,5 @@ +// Check that basic use of win32-elf targets works. +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s + +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO +// DEBUG-INFO: -dwarf-version={{.*}} >From e6a326dc4b21f8180e03d9f2157fd63792a1dc14 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Wed, 10 Apr 2024 17:02:23 +0800 Subject: [PATCH 2/2] Move codeview related tests to gcodeview-command-line.c --- clang/test/Driver/cl-options.c | 12 -- clang/test/Driver/cl-outputs.c | 12 -- clang/test/Driver/gcodeview-command-line.c | 26 +- clang/test/Driver/gcodeview-ghash.c| 1 + clang/test/lit.cfg.py | 2 ++ 5 files changed, 28 insertions(+), 25 deletions(-) diff --git a/clang/test/Driver/cl-options.c b/clang/test/Driver/cl-options.c index 5b6dfe308a76ea..202f7a50e618fe 100644 --- a/clang/test/Driver/cl-options.c +++ b/clang/test/Driver/cl-options.c @@ -545,18 +545,6 @@ // RTTI-NOT: "-fno-rtti-data" // RTTI-NOT: "-fno-rtti" -// RUN: %clang_cl /Zi /c -### -- %s 2>&1 | FileCheck -check-prefix=Zi %s -// Zi: "-gcodeview" -// Zi: "-debug-info-kind=constructor" - -// RUN: %clang_cl /Z7 /c -### -- %s 2>&1 | FileCheck -check-prefix=Z7 %s -// Z7: "-gcodeview" -// Z7: "-debug-info-kind=constructor" - -// RUN: %clang_cl -gline-tables-only /c -### -- %s 2>&1 | FileCheck -check-prefix=ZGMLT %s -// ZGMLT: "-gcodeview" -// ZGMLT: "-debug-info-kind=line-tables-only" - // RUN: %clang_cl /c -### -- %s 2>&1 | FileCheck -check-prefix=BreproDefault %s // BreproDefault: "-mincremental-linker-compatible" diff --git a/clang/test/Driver/cl-outputs.c b/clang/test/Driver/cl-outputs.c index 4d58f0fb548b57..10bd0c97dcdca8 100644 --- a/clang/test/Driver/cl-outputs.c +++ b/clang/test/Driver/cl-outputs.c @@ -294,15 +294,3 @@ // RUN: %clang_cl /P /Fifoo.x /obar.x -### -- %s 2>&1 | FileCheck -check-prefix=FioR
[clang] 299b636 - Revert "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format" (#87987)"
Author: Phoebe Wang Date: 2024-04-10T14:40:07+08:00 New Revision: 299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6 URL: https://github.com/llvm/llvm-project/commit/299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6 DIFF: https://github.com/llvm/llvm-project/commit/299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6.diff LOG: Revert "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format" (#87987)" This reverts commit 4a93872a4f57d2f205826052150fadc36490445f. Sorry, there're still buildbot failures. Added: Modified: clang/lib/Driver/ToolChains/MSVC.h clang/test/Driver/gcodeview-command-line.c Removed: clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 3950a8ed38e8b4..48369e030aade2 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,8 +61,9 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatCOFF() ? llvm::codegenoptions::DIF_CodeView - : llvm::codegenoptions::DIF_DWARF; +return getTriple().isOSBinFormatMachO() + ? llvm::codegenoptions::DIF_DWARF + : llvm::codegenoptions::DIF_CodeView; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Driver/gcodeview-command-line.c b/clang/test/Driver/gcodeview-command-line.c index 83542fc71aece4..da8708af322480 100644 --- a/clang/test/Driver/gcodeview-command-line.c +++ b/clang/test/Driver/gcodeview-command-line.c @@ -1,6 +1,5 @@ // Note: %s must be preceded by --, otherwise it may be interpreted as a // command-line option, e.g. on Mac where %s is commonly under /Users. -// REQUIRES: aarch64-registered-target,arm-registered-target,x86-registered-target // ON-NOT: "-gno-codview-commandline" // OFF: "-gno-codeview-command-line" diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c deleted file mode 100644 index f75281dc418727..00 --- a/clang/test/Misc/win32-elf.c +++ /dev/null @@ -1,5 +0,0 @@ -// Check that basic use of win32-elf targets works. -// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s - -// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO -// DEBUG-INFO: -dwarf-version={{.*}} ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format" (PR #87987)
https://github.com/phoebewang closed https://github.com/llvm/llvm-project/pull/87987 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [SEH] Ignore async exception flag when the environment is not MSVC (PR #88101)
https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/88101 Fixes #62449 >From 66c4383e58cab7cf893edfa3f3507be166116fa6 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 9 Apr 2024 16:08:55 +0800 Subject: [PATCH] [SEH] Ignore async exception flag when the environment is not MSVC Fixes #62449 --- clang/lib/Driver/ToolChains/Clang.cpp | 28 +-- .../test/Driver/windows-seh-async-verify.cpp | 24 2 files changed, 44 insertions(+), 8 deletions(-) create mode 100644 clang/test/Driver/windows-seh-async-verify.cpp diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 766a9b91e3c0ad..c1ed4bd2dcda06 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -346,11 +346,14 @@ static bool addExceptionArgs(const ArgList &Args, types::ID InputType, bool EH = Args.hasFlag(options::OPT_fexceptions, options::OPT_fno_exceptions, false); - bool EHa = Args.hasFlag(options::OPT_fasync_exceptions, - options::OPT_fno_async_exceptions, false); - if (EHa) { -CmdArgs.push_back("-fasync-exceptions"); -EH = true; + // Async exceptions are Windows MSVC only. + if (Triple.isWindowsMSVCEnvironment()) { +bool EHa = Args.hasFlag(options::OPT_fasync_exceptions, +options::OPT_fno_async_exceptions, false); +if (EHa) { + CmdArgs.push_back("-fasync-exceptions"); + EH = true; +} } // Obj-C exceptions are enabled by default, regardless of -fexceptions. This @@ -8084,7 +8087,8 @@ struct EHFlags { /// The 'a' modifier is unimplemented and fundamentally hard in LLVM IR. /// - c: Assume that extern "C" functions are implicitly nounwind. /// The default is /EHs-c-, meaning cleanups are disabled. -static EHFlags parseClangCLEHFlags(const Driver &D, const ArgList &Args) { +static EHFlags parseClangCLEHFlags(const Driver &D, const ArgList &Args, + bool isWindowsMSVC) { EHFlags EH; std::vector EHArgs = @@ -8094,8 +8098,15 @@ static EHFlags parseClangCLEHFlags(const Driver &D, const ArgList &Args) { switch (EHVal[I]) { case 'a': EH.Asynch = maybeConsumeDash(EHVal, I); -if (EH.Asynch) +if (EH.Asynch) { + // Async exceptions are Windows MSVC only. + if (!isWindowsMSVC) { +EH.Asynch = false; +D.Diag(clang::diag::warn_drv_unused_argument) << "/EHa" << EHVal; +continue; + } EH.Synch = false; +} continue; case 'c': EH.NoUnwindC = maybeConsumeDash(EHVal, I); @@ -8159,7 +8170,8 @@ void Clang::AddClangCLArgs(const ArgList &Args, types::ID InputType, const Driver &D = getToolChain().getDriver(); - EHFlags EH = parseClangCLEHFlags(D, Args); + bool IsWindowsMSVC = getToolChain().getTriple().isWindowsMSVCEnvironment(); + EHFlags EH = parseClangCLEHFlags(D, Args, IsWindowsMSVC); if (!isNVPTX && (EH.Synch || EH.Asynch)) { if (types::isCXX(InputType)) CmdArgs.push_back("-fcxx-exceptions"); diff --git a/clang/test/Driver/windows-seh-async-verify.cpp b/clang/test/Driver/windows-seh-async-verify.cpp new file mode 100644 index 00..5fda6a77dba049 --- /dev/null +++ b/clang/test/Driver/windows-seh-async-verify.cpp @@ -0,0 +1,24 @@ +// RUN: %clang --target=x86_64-pc-windows -fasync-exceptions -fsyntax-only %s -### 2>&1 | FileCheck %s +// RUN: %clang_cl --target=x86_64-pc-windows /EHa -fsyntax-only %s -### 2>&1 | FileCheck %s +// RUN: %clang --target=x86_64-pc-windows-gnu -fasync-exceptions -fsyntax-only %s -### 2>&1 | FileCheck %s --check-prefixes=GNU-ALL,GNU +// RUN: %clang_cl --target=x86_64-pc-windows-gnu /EHa -fsyntax-only %s -### 2>&1 | FileCheck %s --check-prefixes=GNU-ALL,CL-GNU + +// CHECK-NOT: warning +// GNU: warning: argument unused during compilation: '-fasync-exceptions' [-Wunused-command-line-argument] +// CL-GNU: warning: argument unused during compilation: '/EHa' [-Wunused-command-line-argument] + +// CHECK: -fasync-exceptions +// GNU-ALL-NOT: -fasync-exceptions +struct S { +union _Un { +~_Un() {} +char _Buf[12]; +}; +_Un _un; +}; + +struct Embed { +S v2; +}; + +void PR62449() { Embed v{}; } ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format" (PR #87987)
https://github.com/phoebewang edited https://github.com/llvm/llvm-project/pull/87987 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format (PR #87987)
https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/87987 This relands #87149. The previous commit exposed failures on some targets. The reason is only a few targets support COFF ObjectFormatType on Windows: https://github.com/llvm/llvm-project/blob/main/llvm/lib/TargetParser/Triple.cpp#L835-L842 With #87149, the targets don't support COFF will report "warning: argument unused during compilation: '-gcodeview-command-line' [-Wunused-command-line-argument]" in the test gcodeview-command-line.c This patch limits gcodeview-command-line.c only run on targets support COFF. >From 6d3dbfaa7c5fb6acb5e6cae70455567030c50cf8 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Mon, 8 Apr 2024 11:10:58 +0800 Subject: [PATCH 1/2] Reland "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format (#87149)" This reverts commit cd7517859eef14d8b38cec2d52c0625a58c645a2. --- clang/lib/Driver/ToolChains/MSVC.h | 5 ++--- clang/test/Misc/win32-elf.c| 5 + 2 files changed, 7 insertions(+), 3 deletions(-) create mode 100644 clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 48369e030aade2..3950a8ed38e8b4 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,9 +61,8 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatMachO() - ? llvm::codegenoptions::DIF_DWARF - : llvm::codegenoptions::DIF_CodeView; +return getTriple().isOSBinFormatCOFF() ? llvm::codegenoptions::DIF_CodeView + : llvm::codegenoptions::DIF_DWARF; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c new file mode 100644 index 00..f75281dc418727 --- /dev/null +++ b/clang/test/Misc/win32-elf.c @@ -0,0 +1,5 @@ +// Check that basic use of win32-elf targets works. +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s + +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO +// DEBUG-INFO: -dwarf-version={{.*}} >From a716712ee5fd797c47fecbe7a608675889917c77 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Mon, 8 Apr 2024 21:00:33 +0800 Subject: [PATCH 2/2] Linux gcodeview test for a few targets --- clang/test/Driver/gcodeview-command-line.c | 1 + 1 file changed, 1 insertion(+) diff --git a/clang/test/Driver/gcodeview-command-line.c b/clang/test/Driver/gcodeview-command-line.c index da8708af322480..83542fc71aece4 100644 --- a/clang/test/Driver/gcodeview-command-line.c +++ b/clang/test/Driver/gcodeview-command-line.c @@ -1,5 +1,6 @@ // Note: %s must be preceded by --, otherwise it may be interpreted as a // command-line option, e.g. on Mac where %s is commonly under /Users. +// REQUIRES: aarch64-registered-target,arm-registered-target,x86-registered-target // ON-NOT: "-gno-codview-commandline" // OFF: "-gno-codeview-command-line" ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] cd75178 - Revert "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format (#87149)"
Author: Phoebe Wang Date: 2024-04-03T16:10:19+08:00 New Revision: cd7517859eef14d8b38cec2d52c0625a58c645a2 URL: https://github.com/llvm/llvm-project/commit/cd7517859eef14d8b38cec2d52c0625a58c645a2 DIFF: https://github.com/llvm/llvm-project/commit/cd7517859eef14d8b38cec2d52c0625a58c645a2.diff LOG: Revert "[Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format (#87149)" This reverts commit 4b25053ae47f50095371a663391baadfd2694eb0. There're failures in some target. Added: Modified: clang/lib/Driver/ToolChains/MSVC.h Removed: clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 3950a8ed38e8b4..48369e030aade2 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,8 +61,9 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatCOFF() ? llvm::codegenoptions::DIF_CodeView - : llvm::codegenoptions::DIF_DWARF; +return getTriple().isOSBinFormatMachO() + ? llvm::codegenoptions::DIF_DWARF + : llvm::codegenoptions::DIF_CodeView; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c deleted file mode 100644 index f75281dc418727..00 --- a/clang/test/Misc/win32-elf.c +++ /dev/null @@ -1,5 +0,0 @@ -// Check that basic use of win32-elf targets works. -// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s - -// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO -// DEBUG-INFO: -dwarf-version={{.*}} ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format (PR #87149)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/87149 >From 16fea4659909423319f0107b2a4d5bcc31185299 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Sat, 30 Mar 2024 17:29:06 +0800 Subject: [PATCH] [Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format We have many problems to use CodeView for a win32-elf target, e.g., #87140 and `error: .seh_* directives are not supported on this target`. Fixes: #87140 --- clang/lib/Driver/ToolChains/MSVC.h | 5 ++--- clang/test/Misc/win32-elf.c| 5 + 2 files changed, 7 insertions(+), 3 deletions(-) create mode 100644 clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 48369e030aade2..3950a8ed38e8b4 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,9 +61,8 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatMachO() - ? llvm::codegenoptions::DIF_DWARF - : llvm::codegenoptions::DIF_CodeView; +return getTriple().isOSBinFormatCOFF() ? llvm::codegenoptions::DIF_CodeView + : llvm::codegenoptions::DIF_DWARF; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c new file mode 100644 index 00..f75281dc418727 --- /dev/null +++ b/clang/test/Misc/win32-elf.c @@ -0,0 +1,5 @@ +// Check that basic use of win32-elf targets works. +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s + +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO +// DEBUG-INFO: -dwarf-version={{.*}} ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format (PR #87149)
https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/87149 We have many problems to use CodeView for a win32-elf target, e.g., #87140 and `error: .seh_* directives are not supported on this target`. Fixes: #87140 >From 745b2acb9dafbb54b00353f71dee464b3617c13a Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Sat, 30 Mar 2024 17:29:06 +0800 Subject: [PATCH] [Win32][ELF] Make CodeView a DebugInfoFormat only for COFF format We have many problems to use CodeView for a win32-elf target, e.g., #87140 and `error: .seh_* directives are not supported on this target`. Fixes: #87140 --- clang/lib/Driver/ToolChains/MSVC.h | 6 +++--- clang/test/Misc/win32-elf.c| 5 + 2 files changed, 8 insertions(+), 3 deletions(-) create mode 100644 clang/test/Misc/win32-elf.c diff --git a/clang/lib/Driver/ToolChains/MSVC.h b/clang/lib/Driver/ToolChains/MSVC.h index 48369e030aade2..3a5975272c570f 100644 --- a/clang/lib/Driver/ToolChains/MSVC.h +++ b/clang/lib/Driver/ToolChains/MSVC.h @@ -61,9 +61,9 @@ class LLVM_LIBRARY_VISIBILITY MSVCToolChain : public ToolChain { /// formats, and to DWARF otherwise. Users can use -gcodeview and -gdwarf to /// override the default. llvm::codegenoptions::DebugInfoFormat getDefaultDebugFormat() const override { -return getTriple().isOSBinFormatMachO() - ? llvm::codegenoptions::DIF_DWARF - : llvm::codegenoptions::DIF_CodeView; +return getTriple().isOSBinFormatCOFF() + ? llvm::codegenoptions::DIF_CodeView + : llvm::codegenoptions::DIF_DWARF; } /// Set the debugger tuning to "default", since we're definitely not tuning diff --git a/clang/test/Misc/win32-elf.c b/clang/test/Misc/win32-elf.c new file mode 100644 index 00..f75281dc418727 --- /dev/null +++ b/clang/test/Misc/win32-elf.c @@ -0,0 +1,5 @@ +// Check that basic use of win32-elf targets works. +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf %s + +// RUN: %clang -fsyntax-only -target x86_64-pc-win32-elf -g %s -### 2>&1 | FileCheck %s -check-prefix=DEBUG-INFO +// DEBUG-INFO: -dwarf-version={{.*}} ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][Headers] Specify result of NaN comparisons (PR #85862)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/85862 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][Headers] Specify result of NaN comparisons (PR #85862)
@@ -207,6 +207,8 @@ _mm256_div_ps(__m256 __a, __m256 __b) /// Compares two 256-bit vectors of [4 x double] and returns the greater ///of each pair of values. /// +///If either value in a comparison is NaN, returns the value from \a __b. phoebewang wrote: Is it worth to mention the ±0 comparison? https://github.com/llvm/llvm-project/pull/85862 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86_64] fix empty structure vaarg in c++ (PR #77907)
phoebewang wrote: Checked both pr77036.cpp and pr77036.c get the same result, so looks like a right fix. But I want to wait @efriedma-quic to sign off. https://github.com/llvm/llvm-project/pull/77907 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86_64] fix empty structure vaarg in c++ (PR #77907)
@@ -3014,6 +3014,11 @@ Address X86_64ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE, /*isNamedArg*/false); + // Empty records are ignored for parameter passing purposes. + if (AI.isIgnore()) { +return CGF.CreateMemTemp(Ty); + } phoebewang wrote: Does it behave differently between C and C++? Maybe adding a C test for it? Besides, do not use parentheses for single line code. https://github.com/llvm/llvm-project/pull/77907 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang closed https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/83136 >From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH 1/8] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) con
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/83136 >From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH 1/8] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) con
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -0,0 +1,247 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=i686 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X64 + +@x = thread_local global i32 0, align 4 +@y = internal thread_local global i32 0, align 4 +@z = internal thread_local global i32 1, align 4 +@t = external hidden thread_local global i32, align 4 + +define ptr @f1() nounwind { +; X86-LABEL: f1: +; X86: # %bb.0: +; X86-NEXT:pushl %ebp +; X86-NEXT:pushl %ebx +; X86-NEXT:pushl %edi +; X86-NEXT:pushl %esi +; X86-NEXT:pushl %eax +; X86-NEXT:calll .L0$pb +; X86-NEXT: .L0$pb: +; X86-NEXT:popl %ebx +; X86-NEXT: .Ltmp0: +; X86-NEXT:addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L0$pb), %ebx +; X86-NEXT:#APP +; X86-NEXT:#NO_APP +; X86-NEXT:movl %eax, (%esp) # 4-byte Spill +; X86-NEXT:leal x@tlsdesc(%ebx), %eax +; X86-NEXT:calll *x@tlscall(%eax) +; X86-NEXT:addl %gs:0, %eax +; X86-NEXT:movl (%esp), %ebx # 4-byte Reload +; X86-NEXT:#APP +; X86-NEXT:#NO_APP +; X86-NEXT:addl $4, %esp +; X86-NEXT:popl %esi +; X86-NEXT:popl %edi +; X86-NEXT:popl %ebx +; X86-NEXT:popl %ebp +; X86-NEXT:retl +; +; X32-LABEL: f1: +; X32: # %bb.0: +; X32-NEXT:pushq %rax +; X32-NEXT:#APP +; X32-NEXT:#NO_APP +; X32-NEXT:leal x@tlsdesc(%rip), %eax +; X32-NEXT:callq *x@tlscall(%eax) +; X32-NEXT:# kill: def $eax killed $eax def $rax +; X32-NEXT:addl %fs:0, %eax +; X32-NEXT:#APP +; X32-NEXT:#NO_APP +; X32-NEXT:popq %rcx +; X32-NEXT:retq +; +; X64-LABEL: f1: +; X64: # %bb.0: +; X64-NEXT:pushq %rax +; X64-NEXT:#APP +; X64-NEXT:#NO_APP +; X64-NEXT:leaq x@tlsdesc(%rip), %rax +; X64-NEXT:callq *x@tlscall(%rax) +; X64-NEXT:addq %fs:0, %rax +; X64-NEXT:#APP +; X64-NEXT:#NO_APP +; X64-NEXT:popq %rcx +; X64-NEXT:retq + %a = call { i32, i32, i32, i32, i32, i32 } asm sideeffect "", "=r,=r,=r,=r,=r,=r,~{dirflag},~{fpsr},~{flags}"() + %b = call ptr @llvm.threadlocal.address.p0(ptr @x) + %a.0 = extractvalue { i32, i32, i32, i32, i32, i32 } %a, 0 + %a.1 = extractvalue { i32, i32, i32, i32, i32, i32 } %a, 1 + %a.2 = extractvalue { i32, i32, i32, i32, i32, i32 } %a, 2 + %a.3 = extractvalue { i32, i32, i32, i32, i32, i32 } %a, 3 + %a.4 = extractvalue { i32, i32, i32, i32, i32, i32 } %a, 4 + %a.5 = extractvalue { i32, i32, i32, i32, i32, i32 } %a, 5 + call void asm sideeffect "", "r,r,r,r,r,r,~{dirflag},~{fpsr},~{flags}"(i32 %a.0, i32 %a.1, i32 %a.2, i32 %a.3, i32 %a.4, i32 %a.5) + ret ptr %b +} + +define i32 @f2() nounwind { +; X86-LABEL: f2: +; X86: # %bb.0: +; X86-NEXT:pushl %ebx +; X86-NEXT:calll .L1$pb +; X86-NEXT: .L1$pb: +; X86-NEXT:popl %ebx +; X86-NEXT: .Ltmp1: +; X86-NEXT:addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp1-.L1$pb), %ebx +; X86-NEXT:movl %gs:0, %ecx +; X86-NEXT:leal x@tlsdesc(%ebx), %eax +; X86-NEXT:calll *x@tlscall(%eax) +; X86-NEXT:movl (%eax,%ecx), %eax +; X86-NEXT:popl %ebx +; X86-NEXT:retl +; +; X32-LABEL: f2: +; X32: # %bb.0: +; X32-NEXT:pushq %rax +; X32-NEXT:movl %fs:0, %ecx +; X32-NEXT:leal x@tlsdesc(%rip), %eax +; X32-NEXT:callq *x@tlscall(%eax) +; X32-NEXT:movl (%eax,%ecx), %eax +; X32-NEXT:popq %rcx +; X32-NEXT:retq +; +; X64-LABEL: f2: +; X64: # %bb.0: +; X64-NEXT:pushq %rax +; X64-NEXT:movq %fs:0, %rcx +; X64-NEXT:leaq x@tlsdesc(%rip), %rax +; X64-NEXT:callq *x@tlscall(%rax) +; X64-NEXT:movl (%rax,%rcx), %eax +; X64-NEXT:popq %rcx +; X64-NEXT:retq + %1 = tail call ptr @llvm.threadlocal.address.p0(ptr @x) + %2 = load i32, ptr %1 + ret i32 %2 +} + +define ptr @f3() nounwind { +; X86-LABEL: f3: +; X86: # %bb.0: +; X86-NEXT:pushl %ebx +; X86-NEXT:calll .L2$pb +; X86-NEXT: .L2$pb: +; X86-NEXT:popl %ebx +; X86-NEXT: .Ltmp2: +; X86-NEXT:addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp2-.L2$pb), %ebx +; X86-NEXT:leal x@tlsdesc(%ebx), %eax +; X86-NEXT:calll *x@tlscall(%eax) +; X86-NEXT:addl %gs:0, %eax +; X86-NEXT:popl %ebx +; X86-NEXT:retl +; +; X32-LABEL: f3: +; X32: # %bb.0: +; X32-NEXT:pushq %rax +; X32-NEXT:leal x@tlsdesc(%rip), %eax +; X32-NEXT:callq *x@tlscall(%eax) +; X32-NEXT:# kill: def $eax killed $eax def $rax +; X32-NEXT:addl %fs:0, %eax +; X32-NEXT:popq %rcx +; X32-NEXT:retq +; +; X64-LABEL: f3: +; X64: # %bb.0: +; X64-NEXT:pushq %rax +; X64-NEXT:leaq x@tlsdesc(%rip), %rax +; X64-NEXT:callq *x@tlscall(%rax) +; X64-NEXT:addq %fs:0, %rax +; X64-NEXT:popq %rcx +; X64-NEXT:retq + %1 = tail call ptr @llvm.threadlocal.address
[clang] [Headers][X86] Add rounding and exception notes to conversions (PR #83447)
https://github.com/phoebewang approved this pull request. Looks great, thanks! https://github.com/llvm/llvm-project/pull/83447 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
phoebewang wrote: Gentle ping~ https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Headers][X86] Add rounding and exception notes to conversions (PR #83447)
@@ -1405,11 +1413,12 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtss_sd(__m128d __a, /// Converts the two double-precision floating-point elements of a ///128-bit vector of [2 x double] into two signed 32-bit integer values, -///returned in the lower 64 bits of a 128-bit vector of [4 x i32]. +///returned in the lower 64 bits of a 128-bit vector of [4 x i32], +///truncating inexact results. phoebewang wrote: Oh, I took that simply as wrong infromation. > Do you have a different suggestion for how to organize this information? Not ideal, something like ``` /// Converts the two double-precision floating-point elements of a ///128-bit vector of [2 x double] into two signed truncated ///(rounded towards zero) 32-bit integer values,returned in the ///most negative integer. ``` https://github.com/llvm/llvm-project/pull/83447 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Headers][X86] Add rounding and exception notes to conversions (PR #83447)
@@ -1405,11 +1413,12 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtss_sd(__m128d __a, /// Converts the two double-precision floating-point elements of a ///128-bit vector of [2 x double] into two signed 32-bit integer values, -///returned in the lower 64 bits of a 128-bit vector of [4 x i32]. +///returned in the lower 64 bits of a 128-bit vector of [4 x i32], +///truncating inexact results. phoebewang wrote: The last sentence is not necessary and has ambiguity in truncating the fractional part or truncating higher bits to 32-bit. https://github.com/llvm/llvm-project/pull/83447 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86] Finally handle target of __builtin_ia32_cmp[p|s][s|d] from avx into sse/sse2/avx (PR #84136)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/84136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -18543,7 +18552,19 @@ GetTLSADDR(SelectionDAG &DAG, SDValue Chain, GlobalAddressSDNode *GA, MFI.setHasCalls(true); SDValue Glue = Chain.getValue(1); - return DAG.getCopyFromReg(Chain, dl, ReturnReg, PtrVT, Glue); + SDValue Ret = DAG.getCopyFromReg(Chain, dl, ReturnReg, PtrVT, Glue); + + if (!UseTLSDESC) +return Ret; + + const X86Subtarget &Subtarget = DAG.getSubtarget(); + unsigned Seg = Subtarget.is64Bit() ? X86AS::FS : X86AS::GS; + + Value *Ptr = Constant::getNullValue(PointerType::get(*DAG.getContext(), Seg)); + SDValue Offset = + DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), DAG.getIntPtrConstant(0, dl), phoebewang wrote: Quote from https://www.fsfla.org/~lxoliva/writeups/TLS/RFC-TLSDESC-x86.txt > An alternate design in which the function called through the TLS descriptor returns not the TP offset, but rather the address of the variable of interest, could refrain from adding %gs:0 to the value returned by the call to compute the address of a symbol, and from using the %gs: prefix when accessing the variable, but it would require the use of a longer call instruction to enable proper relaxation. The call instruction would have to be 7, instead of 2 bytes long, such that the linker could relax it to `addl %gs:0, %eax'. This would make code that accesses the variable 4 bytes longer on average (5 bytes minus one used by the %gs prefix), whereas code that computes its address would be shorter by only two bytes. It's not clear such a change would be profitable. https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -18522,13 +18522,21 @@ GetTLSADDR(SelectionDAG &DAG, SDValue Chain, GlobalAddressSDNode *GA, MachineFrameInfo &MFI = DAG.getMachineFunction().getFrameInfo(); SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); SDLoc dl(GA); - SDValue TGA = DAG.getTargetGlobalAddress(GA->getGlobal(), dl, - GA->getValueType(0), - GA->getOffset(), - OperandFlags); + SDValue TGA; + bool UseTLSDESC = DAG.getTarget().useTLSDESC(); + if (LocalDynamic && UseTLSDESC) { +TGA = DAG.getTargetExternalSymbol("_TLS_MODULE_BASE_", PtrVT, OperandFlags); +auto UI = TGA->use_begin(); +if (UI != TGA->use_end()) + return SDValue(*UI->use_begin()->use_begin(), 0); phoebewang wrote: Done. https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -0,0 +1,165 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X64 + +@x = thread_local global i32 0, align 4 +@y = internal thread_local global i32 0, align 4 phoebewang wrote: Added in `f5`. > The ideal thing is probably not to use `_TLS_MODULE_BASE_` when its result is > used only once in the function I think it is demonstrated by `f3`? https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/83136 >From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH 1/7] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) con
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
phoebewang wrote: > I assume that's what you're doing in the place I asked for a comment is > trying to avoid redundantly generating TLSDESC accesses for > _TLS_MODULE_BASE_. I see that we don't generate multiple accesses for > _TLS_MODULE_BASE_ in the test cases, but I thought that was only safe to do > when an earlier access dominates a later access. > > Is my understanding here correct, or is there an interaction with > > https://github.com/llvm/llvm-project/blob/04a271ebe4c2421f34a4fbf34c328df9f111/llvm/lib/Target/X86/X86InstrInfo.cpp#L10245 > > ? Yes, you are correct. I think SelectionDAG takes care of it. I checked it locally, it will generate two pairs of `_TLS_MODULE_BASE_` in `if ... else ...` branches respectively and one `_TLS_MODULE_BASE_` otherwise. I admit I didn't know the code here when adding it to GetTLSADDR. But I think not to create the nodes at the beginning is slightly better than to remove it later if they have the same output. Not to mention dominator iteration is expensive. https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86] Finely handle target of __builtin_ia32_cmp[p|s][s|d] from avx into sse/sse2/avx (PR #84136)
@@ -34,6 +34,60 @@ __m128 test_mm_andnot_ps(__m128 A, __m128 B) { return _mm_andnot_ps(A, B); } +__m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) { + // CHECK-LABEL: test_mm_cmp_ps_eq_oq + // CHECK: fcmp oeq <4 x float> %{{.*}}, %{{.*}} + return _mm_cmp_ps(a, b, _CMP_EQ_OQ); phoebewang wrote: I don't understand why moving them here. Shouldn't they emit error without avx? https://github.com/llvm/llvm-project/pull/84136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -18515,20 +18515,20 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const { return LowerGlobalOrExternal(Op, DAG, /*ForCall=*/false); } -static SDValue -GetTLSADDR(SelectionDAG &DAG, SDValue Chain, GlobalAddressSDNode *GA, - SDValue *InGlue, const EVT PtrVT, unsigned ReturnReg, - unsigned char OperandFlags, bool LocalDynamic = false) { +static SDValue getTLSADDR(SelectionDAG &DAG, SDValue Chain, + GlobalAddressSDNode *GA, SDValue *InGlue, + const EVT PtrVT, unsigned ReturnReg, + unsigned char OperandFlags, bool UseTLSDESC = false, phoebewang wrote: Done. We don't need this arg now. https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -0,0 +1,165 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X64 + +@x = thread_local global i32 0, align 4 +@y = internal thread_local global i32 0, align 4 phoebewang wrote: Done. https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/83136 >From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH 1/6] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) con
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/83136 >From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH 1/6] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) con
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/83136 >From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH 1/5] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) con
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang deleted https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -0,0 +1,165 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X64 + +@x = thread_local global i32 0, align 4 +@y = internal thread_local global i32 0, align 4 phoebewang wrote: Thanks @frobtech for the explanation. IIUC, GCC will use `_TLS_MODULE_BASE_` if there are more than 1 local TLS variables, right? I have no idea how to do it smartly in codegen in LLVM since we lower it statelessly. Maybe let's land this first? @MaskRay @frobtech https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/83136 >From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH 1/4] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) con
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
phoebewang wrote: Ping~ https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [lld] [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)
phoebewang wrote: This is a turbulent change to both upstream and downstream tests without any profit as far as I can tell. I did a similar change for 64-bit a few years ago: https://reviews.llvm.org/D129647 In comparison, this patch is not to solve a specific problem. It should not show any value because we don't care about 32-bit performance. Not to mention, we need to keep the test not changed as many as possible. The way we used in D129647 is to add an explicit "tune-cpu". We cannot blindly update tests in case distort the original intention. https://github.com/llvm/llvm-project/pull/83631 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Headers][X86] Add rounding and exception notes to conversions (PR #83447)
@@ -2211,7 +2213,12 @@ _mm256_cvtpd_ps(__m256d __a) return (__m128)__builtin_ia32_cvtpd2ps256((__v4df) __a); } -/// Converts a vector of [8 x float] into a vector of [8 x i32]. +/// Converts a vector of [8 x float] into a vector of [8 x i32]. Rounds inexact +///results according to the rounding control bits in the MXCSR register. +/// +///If a converted value is larger than the maximum possible result, phoebewang wrote: Not only larger than, considering the negative number. https://github.com/llvm/llvm-project/pull/83447 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Headers][X86] Add rounding and exception notes to conversions (PR #83447)
@@ -2180,7 +2180,8 @@ _mm256_cvtepi32_pd(__m128i __a) return (__m256d)__builtin_convertvector((__v4si)__a, __v4df); } -/// Converts a vector of [8 x i32] into a vector of [8 x float]. +/// Converts a vector of [8 x i32] into a vector of [8 x float]. Rounds inexact +///results according to the rounding control bits in the MXCSR register. phoebewang wrote: I think we don't need to mention it. This is the default behavior if not mentioned otherwise. https://github.com/llvm/llvm-project/pull/83447 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -0,0 +1,165 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X64 + +@x = thread_local global i32 0, align 4 +@y = internal thread_local global i32 0, align 4 phoebewang wrote: Done. https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/83136 >From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH 1/3] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) con
[clang] [Headers][X86] Add specific results to comparisons (PR #83316)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/83316 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -0,0 +1,165 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X64 + +@x = thread_local global i32 0, align 4 +@y = internal thread_local global i32 0, align 4 phoebewang wrote: Thanks for the info! In that way, we need to define a new pseudo instruction that only clobbers the two register. I'll try to do it in the next reversion. https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -0,0 +1,165 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X86 phoebewang wrote: Done. https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
@@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const { return LowerGlobalOrExternal(Op, DAG, /*ForCall=*/false); } -static SDValue -GetTLSADDR(SelectionDAG &DAG, SDValue Chain, GlobalAddressSDNode *GA, - SDValue *InGlue, const EVT PtrVT, unsigned ReturnReg, - unsigned char OperandFlags, bool LocalDynamic = false) { +static SDValue GetTLSADDR(SelectionDAG &DAG, SDValue Chain, phoebewang wrote: Done. https://github.com/llvm/llvm-project/pull/83136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/83136 >From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH 1/2] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) con
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/83136 >From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {
[clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)
https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/83136 None >From 421a5e4c0a6d7beda71118a36650e72c3d6f2377 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Tue, 27 Feb 2024 22:16:38 +0800 Subject: [PATCH] [X86] Add Support for X86 TLSDESC Relocations --- clang/lib/Driver/ToolChains/CommonArgs.cpp| 3 +- clang/test/Driver/tls-dialect.c | 2 +- .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 14 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 98 +++ llvm/lib/Target/X86/X86MCInstLower.cpp| 30 +++- llvm/test/CodeGen/X86/tls-desc.ll | 165 ++ 7 files changed, 273 insertions(+), 41 deletions(-) create mode 100644 llvm/test/CodeGen/X86/tls-desc.ll diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index faceee85a2f8dc..c66e3ee12e50c4 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -740,7 +740,8 @@ bool tools::isTLSDESCEnabled(const ToolChain &TC, SupportedArgument = V == "desc" || V == "trad"; EnableTLSDESC = V == "desc"; } else if (Triple.isX86()) { -SupportedArgument = V == "gnu"; +SupportedArgument = V == "gnu" || V == "gnu2"; +EnableTLSDESC = V == "gnu2"; } else { Unsupported = true; } diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c index f73915b28ec2a3..a808dd81531ce7 100644 --- a/clang/test/Driver/tls-dialect.c +++ b/clang/test/Driver/tls-dialect.c @@ -2,6 +2,7 @@ // RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck --check-prefix=NODESC %s // RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu %s 2>&1 | FileCheck --check-prefix=NODESC %s +// RUN: %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=DESC %s /// Android supports TLSDESC by default on RISC-V /// TLSDESC is not on by default in Linux, even on RISC-V, and is covered above @@ -18,7 +19,6 @@ /// Unsupported argument // RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s -// RUN: not %clang -### --target=x86_64-linux -mtls-dialect=gnu2 %s 2>&1 | FileCheck --check-prefix=UNSUPPORTED-ARG %s // DESC: "-cc1" {{.*}}"-enable-tlsdesc" // NODESC-NOT: "-enable-tlsdesc" diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 4442b80861b61a..1877550f8c40bb 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -431,6 +431,20 @@ enum TOF { /// See 'ELF Handling for Thread-Local Storage' for more details. ///SYMBOL_LABEL @TLSLDM MO_TLSLDM, + /// MO_TLSCALL - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor function for the symbol. Used in both + /// the IA32 and x86-64 local dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSCALL + MO_TLSCALL, + /// MO_TLSDESC - On a symbol operand this indicates that the immediate is + /// the index of the TLS descriptor argument for the symbol. When this + /// argument is passed to a call getting from index@TLSCALL, the function will + /// return the offset for the symbol. Used in both the IA32 and x86-64 local + /// dynamic TLS access model. + /// See 'RFC-TLSDESC-x86' for more details. + ///SYMBOL_LABEL @TLSDESC + MO_TLSDESC, /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is /// the offset of the GOT entry with the thread-pointer offset for the /// symbol. Used in the x86-64 initial exec TLS access model. diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp index 3395a13545e454..d8e111db1cec42 100644 --- a/llvm/lib/Target/X86/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp @@ -271,6 +271,8 @@ void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_TLSLD: O << "@TLSLD"; break; case X86II::MO_TLSLDM:O << "@TLSLDM";break; + case X86II::MO_TLSDESC: O << "@TLSDESC"; break; + case X86II::MO_TLSCALL: O << "@TLSCALL"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a86f13135173b0..88314bcf510e9a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18515,17 +18515,17 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) c
[clang] [Headers][X86] Make brief descriptions briefer (PR #82422)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/82422 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Headers][X86] Make brief descriptions briefer (PR #82422)
@@ -2099,9 +2099,11 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi64(__m128i __a, } /// Adds, with saturation, the corresponding elements of two 128-bit -///signed [16 x i8] vectors, saving each sum in the corresponding element of -///a 128-bit result vector of [16 x i8]. Positive sums greater than 0x7F are -///saturated to 0x7F. Negative sums less than 0x80 are saturated to 0x80. +///signed [16 x i8] vectors, saving each sum in the corresponding element +///of a 128-bit result vector of [16 x i8]. +/// phoebewang wrote: > Are you saying the detail about saturation belongs in the brief description? Yes. I though otherwise the full description may turn into the second paragraph only. I'm not a doxygen user, so the explanation sounds good to me. https://github.com/llvm/llvm-project/pull/82422 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [compiler-rt] [llvm] [X86] Support APXF to enable __builtin_cpu_supports. (PR #80636)
phoebewang wrote: You may also need to transfer "apxf" feature into subfeatures here https://github.com/llvm/llvm-project/blob/main/clang/lib/Basic/Targets/X86.cpp#L106 https://github.com/llvm/llvm-project/pull/80636 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [compiler-rt] [llvm] [X86] Support APXF to enable __builtin_cpu_supports. (PR #80636)
@@ -1845,6 +1845,12 @@ bool sys::getHostCPUFeatures(StringMap &Features) { Features["prefetchi"] = HasLeaf7Subleaf1 && ((EDX >> 14) & 1); Features["usermsr"] = HasLeaf7Subleaf1 && ((EDX >> 15) & 1); Features["avx10.1-256"] = HasLeaf7Subleaf1 && ((EDX >> 19) & 1); + Features["egpr"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1); + Features["push2pop2"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1); + Features["ppx"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1); + Features["ndd"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1); + Features["ccmp"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1); + Features["cf"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1); phoebewang wrote: You should use a variable like `bool HasAPXF = HasLeaf7Subleaf1 && ((EDX >> 21) & 1);` https://github.com/llvm/llvm-project/pull/80636 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Headers][X86] Make brief descriptions briefer (PR #82422)
@@ -2099,9 +2099,11 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi64(__m128i __a, } /// Adds, with saturation, the corresponding elements of two 128-bit -///signed [16 x i8] vectors, saving each sum in the corresponding element of -///a 128-bit result vector of [16 x i8]. Positive sums greater than 0x7F are -///saturated to 0x7F. Negative sums less than 0x80 are saturated to 0x80. +///signed [16 x i8] vectors, saving each sum in the corresponding element +///of a 128-bit result vector of [16 x i8]. +/// phoebewang wrote: That's exactly the reason for my suggestion. By making it more compact, I actually mean we should make them one brief description instead of two. The second paragraph is not another \brief or \details. It's jsut supplement to the first paragraph. https://github.com/llvm/llvm-project/pull/82422 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Headers][X86] Make brief descriptions briefer (PR #82422)
https://github.com/phoebewang edited https://github.com/llvm/llvm-project/pull/82422 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Headers][X86] Make brief descriptions briefer (PR #82422)
@@ -2099,9 +2099,11 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi64(__m128i __a, } /// Adds, with saturation, the corresponding elements of two 128-bit -///signed [16 x i8] vectors, saving each sum in the corresponding element of -///a 128-bit result vector of [16 x i8]. Positive sums greater than 0x7F are -///saturated to 0x7F. Negative sums less than 0x80 are saturated to 0x80. +///signed [16 x i8] vectors, saving each sum in the corresponding element +///of a 128-bit result vector of [16 x i8]. +/// phoebewang wrote: Can we remove the blank line to make to more compact? https://github.com/llvm/llvm-project/pull/82422 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [compiler-rt] [llvm] [X86] Support APXF to enable __builtin_cpu_supports. (PR #80636)
@@ -1845,6 +1845,7 @@ bool sys::getHostCPUFeatures(StringMap &Features) { Features["prefetchi"] = HasLeaf7Subleaf1 && ((EDX >> 14) & 1); Features["usermsr"] = HasLeaf7Subleaf1 && ((EDX >> 15) & 1); Features["avx10.1-256"] = HasLeaf7Subleaf1 && ((EDX >> 19) & 1); + Features["apxf"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1); phoebewang wrote: I think you cannot actually enable APX features when using `__attribute__((__target__("apxf")))` either. https://github.com/llvm/llvm-project/pull/80636 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86] Add missing MACROs in cpuid.h (PR #80815)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/80815 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [compiler-rt] [llvm] [X86] Support APXF to enable __builtin_cpu_supports. (PR #80636)
@@ -1845,6 +1845,7 @@ bool sys::getHostCPUFeatures(StringMap &Features) { Features["prefetchi"] = HasLeaf7Subleaf1 && ((EDX >> 14) & 1); Features["usermsr"] = HasLeaf7Subleaf1 && ((EDX >> 15) & 1); Features["avx10.1-256"] = HasLeaf7Subleaf1 && ((EDX >> 19) & 1); + Features["apxf"] = HasLeaf7Subleaf1 && ((EDX >> 21) & 1); phoebewang wrote: I don't think we have a `apxf` feature in LLVM, should it be `egpr`? https://github.com/llvm/llvm-project/pull/80636 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86] Add missing MACROs in cpuid.h (PR #80815)
@@ -211,7 +214,11 @@ /* Features in %edx for leaf 7 sub-leaf 1 */ #define bit_AVXVNNIINT8 0x0010 #define bit_AVXNECONVERT 0x0020 +#define bit_AMXCOMPLEX0x0100 +#define bit_AVXVNNIINT16 0x0400 #define bit_PREFETCHI 0x4000 +#define bit_USERMSR 0x8000 +#define bit_AVX10_256 0x0008 phoebewang wrote: They are identical to check this bit or another in Host.cpp. They are different to user who check the bit through cpuid, because they have different sub leaf and different value. https://github.com/llvm/llvm-project/pull/80815 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86] Add missing MACROs in cpuid.h (PR #80815)
@@ -211,7 +214,11 @@ /* Features in %edx for leaf 7 sub-leaf 1 */ #define bit_AVXVNNIINT8 0x0010 #define bit_AVXNECONVERT 0x0020 +#define bit_AMXCOMPLEX0x0100 +#define bit_AVXVNNIINT16 0x0400 #define bit_PREFETCHI 0x4000 +#define bit_USERMSR 0x8000 +#define bit_AVX10_256 0x0008 phoebewang wrote: This is different with GCC. https://github.com/llvm/llvm-project/pull/80815 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[compiler-rt] [clang-tools-extra] [llvm] [clang] [X86] Support more ISAs to enable __builtin_cpu_supports (PR #79086)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/79086 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[compiler-rt] [clang-tools-extra] [llvm] [clang] [X86] Support more ISAs to enable __builtin_cpu_supports (PR #79086)
@@ -217,8 +217,7 @@ enum ProcessorFeatures { FEATURE_SM3, FEATURE_SHA512, FEATURE_SM4, - //FIXME: gcc used string "apxf" instead of "egpr" - FEATURE_EGPR, + // FEATURE_APXF, FEATURE_USERMSR, phoebewang wrote: You need to change the number then. https://github.com/llvm/llvm-project/pull/79086 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [compiler-rt] [clang-tools-extra] [llvm] [X86] Support more ISAs to enable __builtin_cpu_supports (PR #79086)
@@ -217,10 +217,11 @@ enum ProcessorFeatures { FEATURE_SM3, FEATURE_SHA512, FEATURE_SM4, - // FEATURE_APX_F, - FEATURE_USERMSR = 112, - // FEATURE_AVX10_1_256, - // FEATURE_AVX10_1_512, + //FIXME: gcc used string "apxf" instead of "egpr" phoebewang wrote: The internal name is not important, so do not need a FIXME if we won't fix it. I'm more concerning about the name in `(void)__builtin_cpu_supports("egpr");` Does GCC use `egpr` too? Or we should change to "apxf"? https://github.com/llvm/llvm-project/pull/79086 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang-tools-extra] [compiler-rt] [clang] [X86] Support more ISAs to enable __builtin_cpu_supports (PR #79086)
@@ -139,20 +139,88 @@ enum ProcessorFeatures { FEATURE_AVX512BITALG, FEATURE_AVX512BF16, FEATURE_AVX512VP2INTERSECT, - - FEATURE_CMPXCHG16B = 46, - FEATURE_F16C = 49, + // FIXME: Below Features has some missings comparing to gcc, it's because gcc + // has some not one-to-one mapped in llvm. + FEATURE_3DNOW, + // FEATURE_3DNOWP, + FEATURE_ADX = 40, + // FEATURE_ABM, + FEATURE_CLDEMOTE = 42, + FEATURE_CLFLUSHOPT, + FEATURE_CLWB, + FEATURE_CLZERO, + FEATURE_CMPXCHG16B, + // FIXME: Not adding FEATURE_CMPXCHG8B is a workaround to make 'generic' as + // a cpu string with no X86_FEATURE_COMPAT features, which is required in + // current implementantion of cpu_specific/cpu_dispatch FMV feature. + // FEATURE_CMPXCHG8B, + FEATURE_ENQCMD = 48, + FEATURE_F16C, + FEATURE_FSGSBASE, + // FEATURE_FXSAVE, + // FEATURE_HLE, + // FEATURE_IBT, FEATURE_LAHF_LM = 54, FEATURE_LM, - FEATURE_WP, + FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, - - FEATURE_AVX512FP16 = 94, + FEATURE_MOVDIR64B, + FEATURE_MOVDIRI, + FEATURE_MWAITX, + // FEATURE_OSXSAVE, + FEATURE_PCONFIG = 63, + FEATURE_PKU, + FEATURE_PREFETCHWT1, + FEATURE_PRFCHW, + FEATURE_PTWRITE, + FEATURE_RDPID, + FEATURE_RDRND, + FEATURE_RDSEED, + FEATURE_RTM, + FEATURE_SERIALIZE, + FEATURE_SGX, + FEATURE_SHA, + FEATURE_SHSTK, + FEATURE_TBM, + FEATURE_TSXLDTRK, + FEATURE_VAES, + FEATURE_WAITPKG, + FEATURE_WBNOINVD, + FEATURE_XSAVE, + FEATURE_XSAVEC, + FEATURE_XSAVEOPT, + FEATURE_XSAVES, + FEATURE_AMX_TILE, + FEATURE_AMX_INT8, + FEATURE_AMX_BF16, + FEATURE_UINTR, + FEATURE_HRESET, + FEATURE_KL, + // FEATURE_AESKLE, + FEATURE_WIDEKL = 92, + FEATURE_AVXVNNI, + FEATURE_AVX512FP16, FEATURE_X86_64_BASELINE, FEATURE_X86_64_V2, FEATURE_X86_64_V3, FEATURE_X86_64_V4, + FEATURE_AVXIFMA, + FEATURE_AVXVNNIINT8, + FEATURE_AVXNECONVERT, + FEATURE_CMPCCXADD, + FEATURE_AMX_FP16, + FEATURE_PREFETCHI, + FEATURE_RAOINT, + FEATURE_AMX_COMPLEX, + FEATURE_AVXVNNIINT16, + FEATURE_SM3, + FEATURE_SHA512, + FEATURE_SM4, + // FEATURE_APX_F, + FEATURE_USERMSR = 112, + // FEATURE_AVX10_1_256, + // FEATURE_AVX10_1_512, phoebewang wrote: Why comments them? We have APX and AVX10 support. https://github.com/llvm/llvm-project/pull/79086 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang-tools-extra] [compiler-rt] [clang] [X86] Support more ISAs to enable __builtin_cpu_supports (PR #79086)
@@ -139,20 +139,79 @@ enum ProcessorFeatures { FEATURE_AVX512BITALG, FEATURE_AVX512BF16, FEATURE_AVX512VP2INTERSECT, + // Below Features has many missings comparing to gcc, it's because gcc has + // some LLVM doesn't include, e.g. FEATURE_ABM, FEATURE_HLE, ... + FEATURE_3DNOW, + FEATURE_ADX = 40, + FEATURE_CLDEMOTE = 42, + FEATURE_CLFLUSHOPT, + FEATURE_CLWB, + FEATURE_CLZERO, + FEATURE_CMPXCHG16B, + + FEATURE_ENQCMD = 48, + FEATURE_F16C, + FEATURE_FSGSBASE, phoebewang wrote: Oh, you are right. The 2 features map to two CPUID bits in SDM > Bit 07: CET_SS. Supports CET shadow stack features if 1. Processors that set > this bit define bits 1:0 > of the IA32_U_CET and IA32_S_CET MSRs. Enumerates support for the following > MSRs: IA32_INTERRUPT_SPP_TABLE_ADDR, IA32_PL3_SSP, IA32_PL2_SSP, > IA32_PL1_SSP, and IA32_PL0_SSP. > Bit 20: CET_IBT. Supports CET indirect branch tracking features if 1. > Processors that set this bit > define bits 5:2 and bits 63:10 of the IA32_U_CET and IA32_S_CET MSRs. https://github.com/llvm/llvm-project/pull/79086 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86] [iamcu] Fix wrong alignment value for attr (aligned) with -miamcu (PR #80401)
@@ -1,4 +1,12 @@ // RUN: %clang_cc1 -triple x86_64-apple-darwin9 -fsyntax-only -verify %s +// RUN: %clang_cc1 -triple i586-intel-elfiamcu -fsyntax-only -verify %s + +#ifdef __iamcu +// expected-no-diagnostics +struct dummy { int x __attribute__((aligned)); }; +int m0[__alignof__(struct dummy) == 4 ? 1 : -1]; + +#else phoebewang wrote: Maybe only change line 15 and keep others test for iamcu too, e.g., ``` short g0[3] __attribute__((aligned)); + #ifdef __iamcu + short g0_chk[__alignof__(g0) == 4 ? 1 : -1]; + #else short g0_chk[__alignof__(g0) == 16 ? 1 : -1]; + #endif ``` https://github.com/llvm/llvm-project/pull/80401 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86] [iamcu] Fix wrong alignment value for attr (aligned) with -miamcu (PR #80401)
https://github.com/phoebewang approved this pull request. LGTM with one nit. https://github.com/llvm/llvm-project/pull/80401 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86] [iamcu] Fix wrong alignment value for attr (aligned) with -miamcu (PR #80401)
https://github.com/phoebewang edited https://github.com/llvm/llvm-project/pull/80401 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[compiler-rt] [llvm] [clang] [X86] Support more ISAs to enable __builtin_cpu_supports (PR #79086)
@@ -139,20 +139,77 @@ enum ProcessorFeatures { FEATURE_AVX512BITALG, FEATURE_AVX512BF16, FEATURE_AVX512VP2INTERSECT, + FEATURE_3DNOW, + FEATURE_ADX = 40, + FEATURE_CLDEMOTE = 42, phoebewang wrote: ABM is a AMD specific feature https://en.wikipedia.org/wiki/X86_Bit_manipulation_instruction_set Maybe LLVM doesn't support it. But we should be able to map it to its corresponding [CPUID bit](https://github.com/gcc-mirror/gcc/blob/02948ced062b730e2859f718dd46bfcaa3c16c6b/gcc/config/i386/cpuid.h#L56). Maybe not in this patch. I'd expect we can list the missing parts with comments like ``` FEATURE_3DNOW, FEATURE_ADX = 40, // FEATURE_ABM, FEATURE_CLDEMOTE = 42, ``` https://github.com/llvm/llvm-project/pull/79086 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [compiler-rt] [X86] Support more ISAs to enable __builtin_cpu_supports (PR #79086)
@@ -139,20 +139,79 @@ enum ProcessorFeatures { FEATURE_AVX512BITALG, FEATURE_AVX512BF16, FEATURE_AVX512VP2INTERSECT, + // Below Features has many missings comparing to gcc, it's because gcc has + // some LLVM doesn't include, e.g. FEATURE_ABM, FEATURE_HLE, ... + FEATURE_3DNOW, + FEATURE_ADX = 40, + FEATURE_CLDEMOTE = 42, + FEATURE_CLFLUSHOPT, + FEATURE_CLWB, + FEATURE_CLZERO, + FEATURE_CMPXCHG16B, + + FEATURE_ENQCMD = 48, + FEATURE_F16C, + FEATURE_FSGSBASE, phoebewang wrote: I didn't check others, but think `FEATURE_IBT` should map tp `FeatureSHSTK` in LLVM. https://github.com/llvm/llvm-project/pull/79086 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[compiler-rt] [clang] [llvm] [X86] Support more ISAs to enable __builtin_cpu_supports (PR #79086)
@@ -139,20 +139,77 @@ enum ProcessorFeatures { FEATURE_AVX512BITALG, FEATURE_AVX512BF16, FEATURE_AVX512VP2INTERSECT, + FEATURE_3DNOW, + FEATURE_ADX = 40, + FEATURE_CLDEMOTE = 42, phoebewang wrote: Why do we skip some of features? https://github.com/llvm/llvm-project/pull/79086 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[mlir] [clang] [llvm] [X86] Stop custom-widening v2f32 = fpext v2bf16 (PR #80106)
@@ -32815,10 +32815,10 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N, // No other ValueType for FP_EXTEND should reach this point. assert(N->getValueType(0) == MVT::v2f32 && "Do not know how to legalize this Node"); -if (!Subtarget.hasFP16() || !Subtarget.hasVLX()) - return; phoebewang wrote: I mean these lines should not be changed. https://github.com/llvm/llvm-project/pull/80106 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Adding support of AMDLIBM vector library (PR #78560)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/78560 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [compiler-rt] [X86] Support more ISAs to enable __builtin_cpu_supports (PR #79086)
@@ -173,85 +173,84 @@ X86_FEATURE_COMPAT(AVX512VNNI, "avx512vnni", 34) X86_FEATURE_COMPAT(AVX512BITALG,"avx512bitalg", 35) X86_FEATURE_COMPAT(AVX512BF16, "avx512bf16",36) X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect", 37) -// Features below here are not in libgcc/compiler-rt. -X86_FEATURE (3DNOW, "3dnow") +X86_FEATURE_COMPAT(3DNOW, "3dnow", 0) X86_FEATURE (3DNOWA, "3dnowa") +X86_FEATURE_COMPAT(ADX, "adx",0) X86_FEATURE (64BIT, "64bit") -X86_FEATURE (ADX, "adx") -X86_FEATURE (AMX_BF16,"amx-bf16") -X86_FEATURE (AMX_COMPLEX, "amx-complex") -X86_FEATURE (AMX_INT8,"amx-int8") -X86_FEATURE (AMX_TILE,"amx-tile") -X86_FEATURE (CLDEMOTE,"cldemote") -X86_FEATURE (CLFLUSHOPT, "clflushopt") -X86_FEATURE (CLWB,"clwb") -X86_FEATURE_COMPAT(F16C,"f16c", 38) -X86_FEATURE (CLZERO, "clzero") -X86_FEATURE (CMPXCHG16B, "cx16") -X86_FEATURE (CMPXCHG8B, "cx8") +X86_FEATURE_COMPAT(CLDEMOTE,"cldemote", 0) +X86_FEATURE_COMPAT(CLFLUSHOPT, "clflushopt", 0) +X86_FEATURE_COMPAT(CLWB,"clwb", 0) +X86_FEATURE_COMPAT(CLZERO, "clzero", 0) +X86_FEATURE_COMPAT(CMPXCHG16B, "cx16", 0) +X86_FEATURE_COMPAT(CMPXCHG8B, "cx8",0) +X86_FEATURE_COMPAT(ENQCMD, "enqcmd", 0) +X86_FEATURE_COMPAT(F16C,"f16c", 0) +X86_FEATURE_COMPAT(FSGSBASE,"fsgsbase", 0) X86_FEATURE (CRC32, "crc32") -X86_FEATURE (ENQCMD, "enqcmd") -X86_FEATURE (FSGSBASE,"fsgsbase") -X86_FEATURE (FXSR,"fxsr") X86_FEATURE (INVPCID, "invpcid") -X86_FEATURE (KL, "kl") -X86_FEATURE (WIDEKL, "widekl") -X86_FEATURE (LWP, "lwp") -X86_FEATURE (LZCNT, "lzcnt") -X86_FEATURE (MOVBE, "movbe") -X86_FEATURE (MOVDIR64B, "movdir64b") -X86_FEATURE (MOVDIRI, "movdiri") -X86_FEATURE (MWAITX, "mwaitx") -X86_FEATURE (PCONFIG, "pconfig") -X86_FEATURE (PKU, "pku") -X86_FEATURE (PREFETCHI, "prefetchi") -X86_FEATURE (PREFETCHWT1, "prefetchwt1") -X86_FEATURE (PRFCHW, "prfchw") -X86_FEATURE (PTWRITE, "ptwrite") -X86_FEATURE (RDPID, "rdpid") X86_FEATURE (RDPRU, "rdpru") -X86_FEATURE (RDRND, "rdrnd") -X86_FEATURE (RDSEED, "rdseed") -X86_FEATURE (RTM, "rtm") X86_FEATURE (SAHF,"sahf") -X86_FEATURE (SERIALIZE, "serialize") -X86_FEATURE (SGX, "sgx") -X86_FEATURE (SHA, "sha") -X86_FEATURE (SHSTK, "shstk") -X86_FEATURE (TBM, "tbm") -X86_FEATURE (TSXLDTRK,"tsxldtrk") -X86_FEATURE (UINTR, "uintr") -X86_FEATURE (VAES,"vaes") X86_FEATURE (VZEROUPPER, "vzeroupper") -X86_FEATURE (WAITPKG, "waitpkg") -X86_FEATURE (WBNOINVD,"wbnoinvd") +X86_FEATURE_COMPAT(LWP, "lwp",0) +X86_FEATURE_COMPAT(LZCNT, "lzcnt", 0) +X86_FEATURE_COMPAT(MOVBE, "movbe", 0) +X86_FEATURE_COMPAT(MOVDIR64B, "movdir64b", 0) +X86_FEATURE_COMPAT(MOVDIRI, "movdiri",0) +X86_FEATURE_COMPAT(MWAITX, "mwaitx", 0) X86_FEATURE (X87, "x87") -X86_FEATURE (XSAVE, "xsave") -X86_FEATURE (XSAVEC, "xsavec") -X86_FEATURE (XSAVEOPT,"xsaveopt") -X86_FEATURE (XSAVES, "xsaves") -X86_FEATURE_COMPAT(AVX512FP16, "avx512fp16",39) -X86_FEATURE (HRESET, "hreset") -X86_FEATURE (RAOINT, "raoint") -X86_FEATURE (AMX_FP16,"amx-fp16") -X86_FEATURE (CMPCCXADD, "cmpccxadd") -X86_FEATURE (AVXNECONVERT,"avxneconvert") -X86_FEATURE (AVXVNNI, "avxvnni") -X86_FEATURE (AVXIFMA, "avxifma") -X86_FEATURE (AVXVNNIINT8, "avxvnniint8") -X86_FEATURE (SHA512, "sha512") -X86_FEATURE (SM3, "sm3") -X86_FEATURE (SM4, "sm4") -X86_FEATURE (AVXVNNIINT16,"avxvnniint16") -X86_FEATURE (EVEX512, "evex512") -X86_FEATURE (AVX10_1, "avx10.1-256") -X86_FEATURE (AVX10_1_512, "avx10.1-512") -X86_FEATURE (USERMSR, "usermsr") -X86_FEATURE (EGP
[clang] [llvm] [compiler-rt] [X86] Support more ISAs to enable __builtin_cpu_supports (PR #79086)
@@ -173,85 +173,84 @@ X86_FEATURE_COMPAT(AVX512VNNI, "avx512vnni", 34) X86_FEATURE_COMPAT(AVX512BITALG,"avx512bitalg", 35) X86_FEATURE_COMPAT(AVX512BF16, "avx512bf16",36) X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect", 37) -// Features below here are not in libgcc/compiler-rt. -X86_FEATURE (3DNOW, "3dnow") +X86_FEATURE_COMPAT(3DNOW, "3dnow", 0) X86_FEATURE (3DNOWA, "3dnowa") +X86_FEATURE_COMPAT(ADX, "adx",0) X86_FEATURE (64BIT, "64bit") -X86_FEATURE (ADX, "adx") -X86_FEATURE (AMX_BF16,"amx-bf16") -X86_FEATURE (AMX_COMPLEX, "amx-complex") -X86_FEATURE (AMX_INT8,"amx-int8") -X86_FEATURE (AMX_TILE,"amx-tile") -X86_FEATURE (CLDEMOTE,"cldemote") -X86_FEATURE (CLFLUSHOPT, "clflushopt") -X86_FEATURE (CLWB,"clwb") -X86_FEATURE_COMPAT(F16C,"f16c", 38) -X86_FEATURE (CLZERO, "clzero") -X86_FEATURE (CMPXCHG16B, "cx16") -X86_FEATURE (CMPXCHG8B, "cx8") +X86_FEATURE_COMPAT(CLDEMOTE,"cldemote", 0) +X86_FEATURE_COMPAT(CLFLUSHOPT, "clflushopt", 0) +X86_FEATURE_COMPAT(CLWB,"clwb", 0) +X86_FEATURE_COMPAT(CLZERO, "clzero", 0) +X86_FEATURE_COMPAT(CMPXCHG16B, "cx16", 0) +X86_FEATURE_COMPAT(CMPXCHG8B, "cx8",0) +X86_FEATURE_COMPAT(ENQCMD, "enqcmd", 0) +X86_FEATURE_COMPAT(F16C,"f16c", 0) phoebewang wrote: Why clear the previous number? https://github.com/llvm/llvm-project/pull/79086 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Headers][X86] Add macro descriptions to bmiintrin.h (PR #79048)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/79048 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][Driver] Enable feature ndd for -mapxf (PR #78901)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/78901 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][Driver] Enable feature ndd for -mapxf (PR #78901)
@@ -803,10 +803,10 @@ // RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapx-features=ndd -x c -E -dM -o - %s | FileCheck --check-prefix=NDD %s // RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapx-features=ccmp -x c -E -dM -o - %s | FileCheck --check-prefix=CCMP %s // RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapx-features=cf -x c -E -dM -o - %s | FileCheck --check-prefix=CF %s -// RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapxf -x c -E -dM -o - %s | FileCheck --check-prefixes=EGPR,PUSH2POP2,PPX %s +// RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapxf -x c -E -dM -o - %s | FileCheck --check-prefixes=EGPR,PUSH2POP2,PPX,NDD %s +// CCMP: #define __CCMP__ 1 +// CF: #define __CF__ 1 // EGPR: #define __EGPR__ 1 +// NDD: #define __NDD__ 1 // PPX: #define __PPX__ 1 // PUSH2POP2: #define __PUSH2POP2__ 1 phoebewang wrote: Doesn't line 803 check for NDD? If the feature was enabled before, the check of NDD macro should fail. https://github.com/llvm/llvm-project/pull/78901 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [X86][Driver] Enable feature ndd for -mapxf (PR #78901)
@@ -803,10 +803,10 @@ // RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapx-features=ndd -x c -E -dM -o - %s | FileCheck --check-prefix=NDD %s // RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapx-features=ccmp -x c -E -dM -o - %s | FileCheck --check-prefix=CCMP %s // RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapx-features=cf -x c -E -dM -o - %s | FileCheck --check-prefix=CF %s -// RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapxf -x c -E -dM -o - %s | FileCheck --check-prefixes=EGPR,PUSH2POP2,PPX %s +// RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapxf -x c -E -dM -o - %s | FileCheck --check-prefixes=EGPR,PUSH2POP2,PPX,NDD %s +// CCMP: #define __CCMP__ 1 +// CF: #define __CF__ 1 // EGPR: #define __EGPR__ 1 +// NDD: #define __NDD__ 1 // PPX: #define __PPX__ 1 // PUSH2POP2: #define __PUSH2POP2__ 1 phoebewang wrote: Why it wasn't failed before? https://github.com/llvm/llvm-project/pull/78901 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Headers][X86] Add macro descriptions to ia32intrin.h (PR #78613)
https://github.com/phoebewang approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/78613 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Adding support of AMDLIBM vector library (PR #78560)
@@ -3190,10 +3190,10 @@ def fno_experimental_isel : Flag<["-"], "fno-experimental-isel">, Group, - Values<"Accelerate,libmvec,MASSV,SVML,SLEEF,Darwin_libsystem_m,ArmPL,none">, + Values<"Accelerate,libmvec,MASSV,SVML,SLEEF,Darwin_libsystem_m,ArmPL,AMDLIBM,none">, phoebewang wrote: Sorry, it's some display problem in my side. I took it adding one more blank during the review. https://github.com/llvm/llvm-project/pull/78560 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits