Re: AMD and free and open source software

2016-08-31 Thread Michel Dänzer
On 01/09/16 11:25 AM, Bridgman, John wrote:
> One suggestion that was made recently was for AMD to supply packages
> containing only HW microcode images for AMD GPUs...

The microcode images for AMD GPUs have already been split out into a
separate firmware-amd-graphics package in Debian sid (and presumably
testing). If this isn't already in the current Ubuntu release, it should
be in the next one.


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RE: AMD and free and open source software

2016-08-31 Thread Bridgman, John
Right... the microcode is part of the HW design; some vendors build the 
microcode images into the chip, while others have the BIOS or driver load them 
at start-up. 

The industry is generally moving to driver-loaded microcode, but I don't 
believe any vendor is planning to start opening up their hardware designs.

Thanks,
John

>-Original Message-
>From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
>Of Huang Rui
>Sent: Wednesday, August 31, 2016 10:15 PM
>To: Frederique
>Cc: amd-gfx@lists.freedesktop.org
>Subject: Re: AMD and free and open source software
>
>We don't have the plan to open up firmware source.
>
>Thanks,
>Rui
>
>On Thu, Sep 01, 2016 at 04:16:59AM +0800, Frederique wrote:
>> Dear Huang Rui,
>>
>> I recently swapped my NVIDIA Geforce 980 Ti for an AMD R9 Fury because
>> of the devoted efforts that are being made towards a free and open
>> source software driver.
>>
>> I will be sticking with AMD for as long as this effort continues and
>> extends.
>>
>> I have one question however. I use Debian, and right now I am only one
>> non-free package away from being free, this is the AMD Graphics
>> Firmware package. Will AMD make an effort to open up the firmware bits
>> too? If not, is there any particular reason why this is being held back?
>>
>> Thank you for your time.
>>
>> Sincerely yours,
>> Frederique
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RE: AMD and free and open source software

2016-08-31 Thread Bridgman, John
One suggestion that was made recently was for AMD to supply packages containing 
only HW microcode images for AMD GPUs... you would still be using a non-free 
package but you would not have to enable the entire non-free Debian package 
that contains both real "firmware" and HW microcode for a number of different 
vendors. 

Some people felt that would be a big help while others felt it would not make 
any difference - how do you feel about that ?

>-Original Message-
>From: Bridgman, John
>Sent: Wednesday, August 31, 2016 10:22 PM
>To: Huang, Ray; Frederique
>Cc: amd-gfx@lists.freedesktop.org
>Subject: RE: AMD and free and open source software
>
>Right... the microcode is part of the HW design; some vendors build the
>microcode images into the chip, while others have the BIOS or driver load
>them at start-up.
>
>The industry is generally moving to driver-loaded microcode, but I don't
>believe any vendor is planning to start opening up their hardware designs.
>
>Thanks,
>John
>
>>-Original Message-
>>From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
>>Of Huang Rui
>>Sent: Wednesday, August 31, 2016 10:15 PM
>>To: Frederique
>>Cc: amd-gfx@lists.freedesktop.org
>>Subject: Re: AMD and free and open source software
>>
>>We don't have the plan to open up firmware source.
>>
>>Thanks,
>>Rui
>>
>>On Thu, Sep 01, 2016 at 04:16:59AM +0800, Frederique wrote:
>>> Dear Huang Rui,
>>>
>>> I recently swapped my NVIDIA Geforce 980 Ti for an AMD R9 Fury
>>> because of the devoted efforts that are being made towards a free and
>>> open source software driver.
>>>
>>> I will be sticking with AMD for as long as this effort continues and
>>> extends.
>>>
>>> I have one question however. I use Debian, and right now I am only
>>> one non-free package away from being free, this is the AMD Graphics
>>> Firmware package. Will AMD make an effort to open up the firmware
>>> bits too? If not, is there any particular reason why this is being held 
>>> back?
>>>
>>> Thank you for your time.
>>>
>>> Sincerely yours,
>>> Frederique
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Re: AMD and free and open source software

2016-08-31 Thread Huang Rui
We don't have the plan to open up firmware source.

Thanks,
Rui

On Thu, Sep 01, 2016 at 04:16:59AM +0800, Frederique wrote:
> Dear Huang Rui,
> 
> I recently swapped my NVIDIA Geforce 980 Ti for an AMD R9 Fury because 
> of the devoted efforts that are being made towards a free and open 
> source software driver.
> 
> I will be sticking with AMD for as long as this effort continues and 
> extends.
> 
> I have one question however. I use Debian, and right now I am only one 
> non-free package away from being free, this is the AMD Graphics Firmware 
> package. Will AMD make an effort to open up the firmware bits too? If 
> not, is there any particular reason why this is being held back?
> 
> Thank you for your time.
> 
> Sincerely yours,
> Frederique
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Re: [PATCH 04/10] drm/amdgpu: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF

2016-08-31 Thread Michel Dänzer
On 01/09/16 07:08 AM, Alex Deucher wrote:
> Missed this case previously. No need to do anything if the
> device is already off.  runtime pm will handle it.
> 
> Signed-off-by: Alex Deucher 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 2f96334..e6b34dc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1842,7 +1842,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool 
> suspend, bool fbcon,
>  
>   adev = dev->dev_private;
>  
> - if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
> + if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
> + dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
>   return 0;
>  
>   drm_kms_helper_poll_disable(dev);
> @@ -1926,7 +1927,8 @@ int amdgpu_device_resume(struct drm_device *dev, bool 
> resume, bool fbcon,
>   struct drm_crtc *crtc;
>   int r;
>  
> - if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
> + if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
> + dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
>   return 0;
>  
>   if (fbcon) {
> 

This patch and patches 5, 9 & 10 are

Acked-by: Michel Dänzer 


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Re: [PATCH 03/10] drm/amdgpu: handle runtime pm in fbcon

2016-08-31 Thread Michel Dänzer
On 01/09/16 07:08 AM, Alex Deucher wrote:
> Ported from nouveau.
> 
> Signed-off-by: Alex Deucher 

[...]

> +static int
> +amdgpufb_open(struct fb_info *info, int user)
> +{
> + struct amdgpu_fbdev *rfbdev = info->par;
> + struct amdgpu_device *adev = rfbdev->adev;
> + int ret = pm_runtime_get_sync(adev->ddev->dev);
> + if (ret < 0 && ret != -EACCES)
> + return ret;
> + return 0;
> +}
> +
> +static int
> +amdgpufb_release(struct fb_info *info, int user)
> +{
> + struct amdgpu_fbdev *rfbdev = info->par;
> + struct amdgpu_device *adev = rfbdev->adev;
> +
> + pm_runtime_mark_last_busy(adev->ddev->dev);
> + pm_runtime_put_autosuspend(adev->ddev->dev);
> + return 0;
> +}

If pm_runtime_get_sync returns -EACCES, won't there be an imbalance with
the pm_runtime_put_autosuspend call, which might result in the GPU
powering off even when there's something else which is supposed to keep
it on?

Same for patch 8.


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Re: [PATCH 01/10] drm/amdgpu: handle runtime pm in drm pre/post close

2016-08-31 Thread Michel Dänzer
On 01/09/16 07:08 AM, Alex Deucher wrote:
> Close was not handled correctly.
> 
> Signed-off-by: Alex Deucher 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index f1b9e0f..45f98b4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -600,6 +600,9 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
>  
>   kfree(fpriv);
>   file_priv->driver_priv = NULL;
> +
> + pm_runtime_mark_last_busy(dev->dev);
> + pm_runtime_put_autosuspend(dev->dev);
>  }
>  
>  /**
> @@ -614,6 +617,7 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
>  void amdgpu_driver_preclose_kms(struct drm_device *dev,
>   struct drm_file *file_priv)
>  {
> + pm_runtime_get_sync(dev->dev);
>  }

What if pm_runtime_get_sync returns an error?

Same for patch 6.


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[PATCH 07/10] drm/radeon: handle runtime pm correctly in amdgpu_driver_open_kms

2016-08-31 Thread Alex Deucher
Need to fix the error paths.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/radeon_kms.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_kms.c 
b/drivers/gpu/drm/radeon/radeon_kms.c
index 0252527..4388dde 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -641,11 +641,11 @@ int radeon_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
if (rdev->family >= CHIP_CAYMAN) {
struct radeon_fpriv *fpriv;
struct radeon_vm *vm;
-   int r;
 
fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
if (unlikely(!fpriv)) {
-   return -ENOMEM;
+   r = -ENOMEM;
+   goto out_suspend;
}
 
if (rdev->accel_working) {
@@ -653,14 +653,14 @@ int radeon_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
r = radeon_vm_init(rdev, vm);
if (r) {
kfree(fpriv);
-   return r;
+   goto out_suspend;
}
 
r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);
if (r) {
radeon_vm_fini(rdev, vm);
kfree(fpriv);
-   return r;
+   goto out_suspend;
}
 
/* map the ib pool buffer read only into
@@ -674,15 +674,16 @@ int radeon_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
if (r) {
radeon_vm_fini(rdev, vm);
kfree(fpriv);
-   return r;
+   goto out_suspend;
}
}
file_priv->driver_priv = fpriv;
}
 
+out_suspend:
pm_runtime_mark_last_busy(dev->dev);
pm_runtime_put_autosuspend(dev->dev);
-   return 0;
+   return r;
 }
 
 /**
-- 
2.5.5

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[PATCH 04/10] drm/amdgpu: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF

2016-08-31 Thread Alex Deucher
Missed this case previously. No need to do anything if the
device is already off.  runtime pm will handle it.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 2f96334..e6b34dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1842,7 +1842,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool 
suspend, bool fbcon,
 
adev = dev->dev_private;
 
-   if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
+   if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
+   dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
return 0;
 
drm_kms_helper_poll_disable(dev);
@@ -1926,7 +1927,8 @@ int amdgpu_device_resume(struct drm_device *dev, bool 
resume, bool fbcon,
struct drm_crtc *crtc;
int r;
 
-   if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
+   if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
+   dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
return 0;
 
if (fbcon) {
-- 
2.5.5

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[PATCH 08/10] drm/radeon: handle runtime pm in fbcon

2016-08-31 Thread Alex Deucher
Ported from nouveau.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/radeon_fb.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_fb.c 
b/drivers/gpu/drm/radeon/radeon_fb.c
index 0e3143a..1ae32c9 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -26,6 +26,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -47,8 +48,32 @@ struct radeon_fbdev {
struct radeon_device *rdev;
 };
 
+static int
+radeonfb_open(struct fb_info *info, int user)
+{
+   struct radeon_fbdev *rfbdev = info->par;
+   struct radeon_device *rdev = rfbdev->rdev;
+   int ret = pm_runtime_get_sync(rdev->ddev->dev);
+   if (ret < 0 && ret != -EACCES)
+   return ret;
+   return 0;
+}
+
+static int
+radeonfb_release(struct fb_info *info, int user)
+{
+   struct radeon_fbdev *rfbdev = info->par;
+   struct radeon_device *rdev = rfbdev->rdev;
+
+   pm_runtime_mark_last_busy(rdev->ddev->dev);
+   pm_runtime_put_autosuspend(rdev->ddev->dev);
+   return 0;
+}
+
 static struct fb_ops radeonfb_ops = {
.owner = THIS_MODULE,
+   .fb_open = radeonfb_open,
+   .fb_release = radeonfb_release,
.fb_check_var = drm_fb_helper_check_var,
.fb_set_par = drm_fb_helper_set_par,
.fb_fillrect = drm_fb_helper_cfb_fillrect,
-- 
2.5.5

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[PATCH 10/10] drm/radeon: set runtime pm state to active on resume

2016-08-31 Thread Alex Deucher
The sbios always powers up the dGPU on resume.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/radeon_drv.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_drv.c 
b/drivers/gpu/drm/radeon/radeon_drv.c
index 081e95e..5fdd48c 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -386,6 +386,14 @@ static int radeon_pmops_resume(struct device *dev)
 {
struct pci_dev *pdev = to_pci_dev(dev);
struct drm_device *drm_dev = pci_get_drvdata(pdev);
+
+   /* GPU comes up enabled by the bios on resume */
+   if (radeon_is_px(drm_dev)) {
+   pm_runtime_disable(dev);
+   pm_runtime_set_active(dev);
+   pm_runtime_enable(dev);
+   }
+
return radeon_resume_kms(drm_dev, true, true);
 }
 
-- 
2.5.5

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[PATCH 09/10] drm/radeon: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF

2016-08-31 Thread Alex Deucher
Missed this case previously. No need to do anything if the
device is already off.  runtime pm will handle it.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/radeon_device.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_device.c 
b/drivers/gpu/drm/radeon/radeon_device.c
index 6b0d26f..8425b12 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1594,7 +1594,8 @@ int radeon_suspend_kms(struct drm_device *dev, bool 
suspend,
 
rdev = dev->dev_private;
 
-   if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
+   if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
+   dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
return 0;
 
drm_kms_helper_poll_disable(dev);
@@ -1689,7 +1690,8 @@ int radeon_resume_kms(struct drm_device *dev, bool 
resume, bool fbcon)
struct drm_crtc *crtc;
int r;
 
-   if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
+   if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
+   dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
return 0;
 
if (fbcon) {
-- 
2.5.5

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[PATCH 02/10] drm/amdgpu: handle runtime pm correctly in amdgpu_driver_open_kms

2016-08-31 Thread Alex Deucher
Need to fix the error pathes.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 45f98b4..c2c7fb1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -542,12 +542,16 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
return r;
 
fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
-   if (unlikely(!fpriv))
-   return -ENOMEM;
+   if (unlikely(!fpriv)) {
+   r = -ENOMEM;
+   goto out_suspend;
+   }
 
r = amdgpu_vm_init(adev, >vm);
-   if (r)
-   goto error_free;
+   if (r) {
+   kfree(fpriv);
+   goto out_suspend;
+   }
 
mutex_init(>bo_list_lock);
idr_init(>bo_list_handles);
@@ -556,12 +560,9 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
 
file_priv->driver_priv = fpriv;
 
+out_suspend:
pm_runtime_mark_last_busy(dev->dev);
pm_runtime_put_autosuspend(dev->dev);
-   return 0;
-
-error_free:
-   kfree(fpriv);
 
return r;
 }
-- 
2.5.5

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RE: GPU lockup with amdgpu driver

2016-08-31 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Luya Tshimbalanga
> Sent: Wednesday, August 31, 2016 5:46 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: Re: GPU lockup with amdgpu driver
> 
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA256
> 
> To reproduce the bug, grab the latest snapshot of linux-firmware
> 20160816 (git7c3dfc0b).
> Install latest kernel 4.8.0+ and also staging kernels.
> GPU lockup happens on boot on both amdgpu and radeon drivers.

Please open a bug (https://bugs.freedesktop.org) and attach your xorg log and 
dmesg output from the failing case.

Alex

> 
> - --
> Luya Tshimbalanga
> Graphic & Web Designer
> E: l...@fedoraproject.org
> W: http://www.coolest-storm.net
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> Version: GnuPG v2
> 
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> +3
> esO5oy+3Yt+KJIeWhNXHnrJiQdHDksN5uGup/XzEjFlrTQ74PgFt5yqLFAWR7Hs
> r
> tJB1HjF+C0ktQZXLOktN/0zE8SY+u0YwNec68Qj9oV5t1pYdA377HS/I63ZuMe5L
> XWhx/qtiLpFcQrXcT3409I7bWj4rc1Hp3Uw/VDA6paDFefXdVdkmhbp+t0VzfO
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Re: GPU lockup with amdgpu driver

2016-08-31 Thread Luya Tshimbalanga
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

To reproduce the bug, grab the latest snapshot of linux-firmware
20160816 (git7c3dfc0b).
Install latest kernel 4.8.0+ and also staging kernels.
GPU lockup happens on boot on both amdgpu and radeon drivers.

- -- 
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[PATCH 3/4] drm/amd/powerplay: refine struct name for coding style reason.

2016-08-31 Thread Rex Zhu
delete useless member.

Change-Id: I03585fc3476f2954735f487c17dffa668287ad45
Signed-off-by: Rex Zhu 
---
 drivers/gpu/drm/amd/powerplay/inc/power_state.h | 20 +---
 1 file changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/inc/power_state.h 
b/drivers/gpu/drm/amd/powerplay/inc/power_state.h
index 08b4b9f..9ceaed9 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/power_state.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/power_state.h
@@ -171,30 +171,28 @@ enum PP_MMProfilingState {
PP_MMProfilingState_Stopped
 };
 
-struct PP_Clock_Engine_Request {
-   unsigned long clientType;
-   unsigned long ctxid;
+struct pp_clock_engine_request {
+   unsigned long client_type;
+   unsigned long ctx_id;
uint64_t  context_handle;
unsigned long sclk;
-   unsigned long sclkHardMin;
+   unsigned long sclk_hard_min;
unsigned long mclk;
unsigned long iclk;
unsigned long evclk;
unsigned long ecclk;
-   unsigned long ecclkHardMin;
+   unsigned long ecclk_hard_min;
unsigned long vclk;
unsigned long dclk;
-   unsigned long samclk;
-   unsigned long acpclk;
-   unsigned long sclkOverdrive;
-   unsigned long mclkOverdrive;
+   unsigned long sclk_over_drive;
+   unsigned long mclk_over_drive;
unsigned long sclk_threshold;
unsigned long flag;
unsigned long vclk_ceiling;
unsigned long dclk_ceiling;
unsigned long num_cus;
-   unsigned long pmflag;
-   enum PP_MMProfilingState MMProfilingState;
+   unsigned long pm_flag;
+   enum PP_MMProfilingState mm_profiling_state;
 };
 
 #endif
-- 
1.9.1

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[PATCH 4/4] drm/amd/powerplay: read power state table from vbios and can't be changed. so allocate memory for request ps and current ps.

2016-08-31 Thread Rex Zhu
Signed-off-by: Rex Zhu 
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c |  2 +-
 drivers/gpu/drm/amd/powerplay/eventmgr/psm.c  |  5 +++--
 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c   | 15 +--
 3 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index 2de34a5..a4b0f41 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -538,7 +538,7 @@ int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event 
event_id, void *input,
ret = pem_handle_event(pp_handle->eventmgr, event_id, );
break;
case AMD_PP_EVENT_READJUST_POWER_STATE:
-   pp_handle->hwmgr->current_ps = pp_handle->hwmgr->boot_ps;
+   memcpy(pp_handle->hwmgr->current_ps, pp_handle->hwmgr->boot_ps, 
pp_handle->hwmgr->ps_size);
ret = pem_handle_event(pp_handle->eventmgr, event_id, );
break;
default:
diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/psm.c 
b/drivers/gpu/drm/amd/powerplay/eventmgr/psm.c
index a46225c..1d1875a 100644
--- a/drivers/gpu/drm/amd/powerplay/eventmgr/psm.c
+++ b/drivers/gpu/drm/amd/powerplay/eventmgr/psm.c
@@ -70,11 +70,12 @@ int psm_set_states(struct pp_eventmgr *eventmgr, unsigned 
long *state_id)
int i;
 
table_entries = hwmgr->num_ps;
+
state = hwmgr->ps;
 
for (i = 0; i < table_entries; i++) {
if (state->id == *state_id) {
-   hwmgr->request_ps = state;
+   memcpy(hwmgr->request_ps, state, hwmgr->ps_size);
return 0;
}
state = (struct pp_power_state *)((unsigned long)state + 
hwmgr->ps_size);
@@ -106,7 +107,7 @@ int psm_adjust_power_state_dynamic(struct pp_eventmgr 
*eventmgr, bool skip)
if (!equal || 
phm_check_smc_update_required_for_display_configuration(hwmgr)) {
phm_apply_state_adjust_rules(hwmgr, requested, pcurrent);
phm_set_power_state(hwmgr, >hardware, 
>hardware);
-   hwmgr->current_ps = requested;
+   memcpy(hwmgr->current_ps, hwmgr->request_ps, hwmgr->ps_size);
}
return 0;
 }
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
index 50d465d..9794f10 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
@@ -128,6 +128,8 @@ int hwmgr_fini(struct pp_hwmgr *hwmgr)
kfree(hwmgr->set_temperature_range.function_list);
 
kfree(hwmgr->ps);
+   kfree(hwmgr->current_ps);
+   kfree(hwmgr->request_ps);
kfree(hwmgr);
return 0;
 }
@@ -152,10 +154,17 @@ int hw_init_power_state_table(struct pp_hwmgr *hwmgr)
  sizeof(struct pp_power_state);
 
hwmgr->ps = kzalloc(size * table_entries, GFP_KERNEL);
-
if (hwmgr->ps == NULL)
return -ENOMEM;
 
+   hwmgr->request_ps = kzalloc(size, GFP_KERNEL);
+   if (hwmgr->request_ps == NULL)
+   return -ENOMEM;
+
+   hwmgr->current_ps = kzalloc(size, GFP_KERNEL);
+   if (hwmgr->current_ps == NULL)
+   return -ENOMEM;
+
state = hwmgr->ps;
 
for (i = 0; i < table_entries; i++) {
@@ -163,7 +172,8 @@ int hw_init_power_state_table(struct pp_hwmgr *hwmgr)
 
if (state->classification.flags & 
PP_StateClassificationFlag_Boot) {
hwmgr->boot_ps = state;
-   hwmgr->current_ps = hwmgr->request_ps = state;
+   memcpy(hwmgr->current_ps, state, size);
+   memcpy(hwmgr->request_ps, state, size);
}
 
state->id = i + 1; /* assigned unique num for every power state 
id */
@@ -173,6 +183,7 @@ int hw_init_power_state_table(struct pp_hwmgr *hwmgr)
state = (struct pp_power_state *)((unsigned long)state + size);
}
 
+
return 0;
 }
 
-- 
1.9.1

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[PATCH 1/4] drm/amd/powerplay: refine struct name for code style reason.

2016-08-31 Thread Rex Zhu
Change-Id: I491a1de273f350a14576c45b2ec986365797dcc0
Signed-off-by: Rex Zhu 
---
 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c | 2 +-
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 4 ++--
 drivers/gpu/drm/amd/powerplay/inc/power_state.h   | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
index 6c321b0..ccf7ebe 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
@@ -1523,7 +1523,7 @@ int get_number_of_vce_state_table_entries(
 
 int get_vce_state_table_entry(struct pp_hwmgr *hwmgr,
unsigned long i,
-   struct PP_VCEState 
*vce_state,
+   struct pp_vce_state 
*vce_state,
void **clock_info,
unsigned long *flag)
 {
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 
b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index aca94e0..25f4b42 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -36,7 +36,7 @@ struct pp_instance;
 struct pp_hwmgr;
 struct pp_hw_power_state;
 struct pp_power_state;
-struct PP_VCEState;
+struct pp_vce_state;
 struct phm_fan_speed_info;
 struct pp_atomctrl_voltage_table;
 
@@ -354,7 +354,7 @@ struct pp_table_func {
int (*pptable_get_vce_state_table_entry)(
struct pp_hwmgr *hwmgr,
unsigned long i,
-   struct PP_VCEState *vce_state,
+   struct pp_vce_state *vce_state,
void **clock_info,
unsigned long *flag);
 };
diff --git a/drivers/gpu/drm/amd/powerplay/inc/power_state.h 
b/drivers/gpu/drm/amd/powerplay/inc/power_state.h
index a3f0ce4..08b4b9f 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/power_state.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/power_state.h
@@ -158,7 +158,7 @@ struct pp_power_state {
 
 
 /*Structure to hold a VCE state entry*/
-struct PP_VCEState {
+struct pp_vce_state {
uint32_t evclk;
uint32_t ecclk;
uint32_t sclk;
-- 
1.9.1

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[PATCH 2/4] drm/amd/powerplay: add vce state tables initialize for ppt v1.

2016-08-31 Thread Rex Zhu
Change-Id: Ib44bf1c7c1cb71ce619cc4589608e4c049f9db7e
Signed-off-by: Rex Zhu 
---
 .../amd/powerplay/hwmgr/tonga_processpptables.c| 58 ++
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h  | 22 ++--
 2 files changed, 75 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
index cfb647f..940487c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
@@ -1164,6 +1164,54 @@ static uint32_t make_classification_flags(struct 
pp_hwmgr *hwmgr,
return result;
 }
 
+static int ppt_get_num_of_vce_state_table_entries_v1_0(struct pp_hwmgr *hwmgr)
+{
+   const ATOM_Tonga_POWERPLAYTABLE *pp_table = get_powerplay_table(hwmgr);
+   const ATOM_Tonga_VCE_State_Table *vce_state_table =
+   (ATOM_Tonga_VCE_State_Table *)(((unsigned 
long)pp_table) + le16_to_cpu(pp_table->usVCEStateTableOffset));
+
+   if (vce_state_table == NULL)
+   return 0;
+
+   return vce_state_table->ucNumEntries;
+}
+
+
+static int ppt_get_vce_state_table_entry_v1_0(struct pp_hwmgr *hwmgr, uint32_t 
i,
+   struct pp_vce_state *vce_state, void **clock_info, uint32_t 
*flag)
+{
+   const ATOM_Tonga_VCE_State_Record *vce_state_record;
+   const ATOM_Tonga_POWERPLAYTABLE *pptable = get_powerplay_table(hwmgr);
+   const ATOM_Tonga_VCE_State_Table *vce_state_table = 
(ATOM_Tonga_VCE_State_Table *)(((unsigned long)pptable)
+ + 
le16_to_cpu(pptable->usVCEStateTableOffset));
+   const ATOM_Tonga_SCLK_Dependency_Table *sclk_dep_table = 
(ATOM_Tonga_SCLK_Dependency_Table *)(((unsigned long)pptable)
+ + 
le16_to_cpu(pptable->usSclkDependencyTableOffset));
+   const ATOM_Tonga_MCLK_Dependency_Table *mclk_dep_table = 
(ATOM_Tonga_MCLK_Dependency_Table *)(((unsigned long)pptable)
+ + 
le16_to_cpu(pptable->usMclkDependencyTableOffset));
+   const ATOM_Tonga_MM_Dependency_Table *mm_dep_table = 
(ATOM_Tonga_MM_Dependency_Table *)(((unsigned long)pptable)
+ + 
le16_to_cpu(pptable->usMMDependencyTableOffset));
+
+   PP_ASSERT_WITH_CODE((i <= vce_state_table->ucNumEntries),
+"Requested state entry ID is out of range!",
+return -EINVAL);
+
+   vce_state_record = (ATOM_Tonga_VCE_State_Record *)((char 
*)_state_table->entries[1]
+   + (sizeof(ATOM_Tonga_VCE_State_Record) * i));
+
+   *flag = vce_state_record->ucFlag;
+
+   vce_state->evclk = 
mm_dep_table->entries[vce_state_record->ucVCEClockIndex].ulEClk;
+   vce_state->ecclk = 
mm_dep_table->entries[vce_state_record->ucVCEClockIndex].ulEClk;
+   vce_state->sclk = 
sclk_dep_table->entries[vce_state_record->ucSCLKIndex].ulSclk;
+
+   if (vce_state_record->ucMCLKIndex >= mclk_dep_table->ucNumEntries)
+   vce_state->mclk = 
mclk_dep_table->entries[mclk_dep_table->ucNumEntries - 1].ulMclk;
+   else
+   vce_state->mclk = 
mclk_dep_table->entries[vce_state_record->ucMCLKIndex].ulMclk;
+
+   return 0;
+}
+
 /**
 * Create a Power State out of an entry in the PowerPlay table.
 * This function is called by the hardware back-end.
@@ -1181,6 +1229,8 @@ int tonga_get_powerplay_table_entry(struct pp_hwmgr 
*hwmgr,
const ATOM_Tonga_State_Array * state_arrays;
const ATOM_Tonga_State *state_entry;
const ATOM_Tonga_POWERPLAYTABLE *pp_table = get_powerplay_table(hwmgr);
+   int i, j;
+   uint32_t flags = 0;
 
PP_ASSERT_WITH_CODE((NULL != pp_table), "Missing PowerPlay Table!", 
return -1;);
power_state->classification.bios_index = entry_index;
@@ -1210,5 +1260,13 @@ int tonga_get_powerplay_table_entry(struct pp_hwmgr 
*hwmgr,
PP_StateClassificationFlag_Boot))
result = hwmgr->hwmgr_func->patch_boot_state(hwmgr, 
&(power_state->hardware));
 
+   hwmgr->num_vce_state_tables = i = 
ppt_get_num_of_vce_state_table_entries_v1_0(hwmgr);
+
+   if ((i != 0) && (i <= PP_MAX_VCE_LEVELS)) {
+   for (j = 0; j < i; j++)
+   ppt_get_vce_state_table_entry_v1_0(hwmgr, j, 
&(hwmgr->vce_states[j]), NULL, );
+   }
+
return result;
 }
+
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 
b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index 25f4b42..1456565 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -31,16 +31,13 @@
 #include "hwmgr_ppt.h"
 #include "ppatomctrl.h"
 #include "hwmgr_ppt.h"
+#include "power_state.h"
 
 struct pp_instance;
 struct pp_hwmgr;
-struct 

[pull] amdgpu drm-fixes-4.8

2016-08-31 Thread Alex Deucher
Hi Dave,

Fixes for 4.8:
- 2 CI S4 fixes
- error handling fix

I have additional features for 4.9, but I'll be out of
the office next week, so I probably won't get to send them out
until the following week.

The following changes since commit 279cf3f23870f7eb8ca071115e06d3d5ca0a2b9e:

  drm/nouveau/acpi: use DSM if bridge does not support D3cold (2016-08-31 
16:54:05 +1000)

are available in the git repository at:

  git://people.freedesktop.org/~agd5f/linux drm-fixes-4.8

for you to fetch changes up to 1f703e6679f373f5bba4efe7093aa82e91af4037:

  drm/amdgpu: record error code when ring test failed (2016-08-31 12:45:56 
-0400)


Chunming Zhou (1):
  drm/amdgpu: record error code when ring test failed

jimqu (2):
  drm/amd/amdgpu: sdma resume fail during S4 on CI
  drm/amd/amdgpu: compute ring test fail during S4 on CI

 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c |  5 +++--
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c  |  3 +++
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c  | 12 +---
 3 files changed, 15 insertions(+), 5 deletions(-)
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GPU lockup with amdgpu driver

2016-08-31 Thread Luya Tshimbalanga
Upon recommendation from Phoronix comment, here is the bug report.[1]

Updating linux-firmware snapshot from 20160609 (gita4bbc811) to 20160816
(git7c3dfc0b) caused a GPU lockup on enabled amdgpu driver  for CIK (Sea
Island) card  affecting kernel 4.8+ and the staging kernel branches. An
example below during the boot process:

radeon :00:01.0: GPU lockup (current fence id 0x0003 last fence 
id 0x0004 on ring 0)
Aug 29 16:51:37 kernel: radeon :00:01.0: ring 0 stalled for more than 
10581msec

Reverting the linux-firmware snapshot to 20160609 fixed the issue. Will
it possible to fix? What will be the step to provide the traceback ?

Test is done with ASUS X550ZE powered by AMD A10 7400P featuring Radeon
R7 M265DX

Ref:

[1]
https://www.phoronix.com/forums/forum/linux-graphics-x-org-drivers/open-source-amd-linux/889794-amd-staging-4-6-for-fedora-24-amdgpu/page6?_=1472604363785


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