AMD WX7100 screen display problem on AArch64 architecture server.
Hi, We met a problem on ubuntu17.10 for arm server with amdgpu(AMD RADEON PRO WX7100), we use open source driver which are integrated in ubuntu17.10. And the architecture is AArch64-linux-gnu. we install : apt-get install xserver-xorg xinit xfce4 and mesa-utils glmark2 we start x server : startx and then the monitor shows the screen and the screen is blurred( something wrong). [cid:image001.jpg@01D37422.3B3670D0] And I have tried some opengl applications, the output has same problem.(something is missing or in the wrong place.) But in a x86_64 architecture server, with same OS. The screen output is normal. (I check xorg\DDX\mesa\libdrm etc.all the versions are the same with aarch64 server.) What I have done: 1、I upgrade kernel to 4.15-rc2 ,upgrade DRM to 3.23,upgrade DDX to 1.40,upgrade mesa to 17.2.6, but the problem still exist. 2、I enable ‘shadowprimary’ option, the screen output became normal, but the performance drop quickly――glxgears drop from 4800fps to 600fps, glmark drop from 4300 score to 730 score. I doubt there are something different in aarch64 and x86_64 but I don’t know. Any Advice or trial suggestion are welcome. Thanks. Rejohn. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 28/37] drm/amdkfd: Add support for displaying VRAM usage
On Tue, Dec 12, 2017 at 1:11 PM, Russell, Kent wrote:
> That's alright. I admit that it was a bit self-serving in that I was asked to
> get something somewhere to get the information out, and it was the simplest
> solution. I can see if I can come up with a more acceptable option in a
> future patch set, but for now I think Felix is right in that we can just drop
> this one for now, it's definitely not worth holding up the rest of the
> patches over.
>
> Kent
Sure, np. I'll drop this for now.
Oded
>
> -Original Message-
> From: Kuehling, Felix
> Sent: Monday, December 11, 2017 2:52 PM
> To: Koenig, Christian; Oded Gabbay
> Cc: Russell, Kent; amd-gfx list
> Subject: Re: [PATCH 28/37] drm/amdkfd: Add support for displaying VRAM usage
>
> On 2017-12-11 12:28 PM, Christian König wrote:
>> Am 11.12.2017 um 17:40 schrieb Oded Gabbay:
>>> On Mon, Dec 11, 2017 at 5:32 PM, Oded Gabbay
>>> wrote:
On Sat, Dec 9, 2017 at 6:09 AM, Felix Kuehling
wrote:
> From: Kent Russell
>
> Add a sysfs file in topology (node/x/memory_banks/X/used_memory)
> that reports the current VRAM usage for that node. Only works for
> GPU nodes at this time.
>
As with patch 22 (perf counters), I would not expect this
information to be included in the topology. It doesn't describe the
properties of the device, but a current state.
Oded
>>> For example, in amdgpu, the VRAM usage is reported in the INFO IOCTL
>>> (AMDGPU_INFO_VRAM_USAGE). See function amdgpu_info_ioctl()
>>
>> Yep, completely agree.
>>
>> That stuff is runtime properties and not static attribute nor
>> configuration or setup.
>>
>> So either debugfs or IOCTL are the two best options as far as I can see.
>
> Right. I admit, this feature was a bit of a hack to quickly enable the HIP
> team without having to change a bunch of interfaces (ioctls, Thunk, and
> Runtime).
>
> This patch isn't critical for enabling dGPU support. I'll drop it for now and
> we can reimplement it properly later.
>
> Regards,
> Felix
>
>>
>> Christian.
>>
>>>
>>> Thanks,
>>>
>>> Oded
>>>
>>>
> Signed-off-by: Kent Russell
> Signed-off-by: Felix Kuehling
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 49
> +++
> drivers/gpu/drm/amd/amdkfd/kfd_topology.h | 4 ++-
> 2 files changed, 46 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> index 7f0d41e..7f04038 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> @@ -186,6 +186,8 @@ struct kfd_topology_device
> *kfd_create_topology_device(
> sysfs_show_gen_prop(buffer, "%s %llu\n", name,
> value)
> #define sysfs_show_32bit_val(buffer, value) \
> sysfs_show_gen_prop(buffer, "%u\n", value)
> +#define sysfs_show_64bit_val(buffer, value) \
> + sysfs_show_gen_prop(buffer, "%llu\n", value)
> #define sysfs_show_str_val(buffer, value) \
> sysfs_show_gen_prop(buffer, "%s\n", value)
>
> @@ -268,11 +270,23 @@ static ssize_t mem_show(struct kobject *kobj,
> struct attribute *attr,
> {
> ssize_t ret;
> struct kfd_mem_properties *mem;
> + uint64_t used_mem;
>
> /* Making sure that the buffer is an empty string */
> buffer[0] = 0;
>
> - mem = container_of(attr, struct kfd_mem_properties, attr);
> + if (strcmp(attr->name, "used_memory") == 0) {
> + mem = container_of(attr, struct kfd_mem_properties,
> attr_used);
> + if (mem->gpu) {
> + used_mem =
> +mem->gpu->kfd2kgd->get_vram_usage(
> +
> mem->gpu->kgd);
> + return sysfs_show_64bit_val(buffer,
> +used_mem);
> + }
> + /* TODO: Report APU/CPU-allocated memory; For now
> return 0 */
> + return 0;
> + }
> +
> + mem = container_of(attr, struct kfd_mem_properties,
> attr_props);
> sysfs_show_32bit_prop(buffer, "heap_type",
> mem->heap_type);
> sysfs_show_64bit_prop(buffer, "size_in_bytes",
> mem->size_in_bytes);
> sysfs_show_32bit_prop(buffer, "flags", mem->flags); @@
> -527,7 +541,12 @@ static void kfd_remove_sysfs_node_entry(struct
> kfd_topology_device *dev)
> if (dev->kobj_mem) {
> list_for_each_entry(mem, &dev->mem_props, list)
> if (mem->kobj) {
> - kfd_remove_sysfs_file(mem->kobj,
> &mem->attr);
> + /* TODO: Remove when CPU/APU
> supported */
> + if (dev->node_props.cpu_cores_count
> == 0)
Re: [PATCH 29/37] PCI: Add pci_enable_atomic_ops_to_root
On Wed, Dec 13, 2017 at 1:42 AM, Jason Gunthorpe wrote: > On Tue, Dec 12, 2017 at 05:27:07PM -0600, Bjorn Helgaas wrote: >> [+cc Ram, Michal, Ariel, Doug, Jason] >> >> The [29/37] in the subject makes it look like this is part of a larger >> series, but I can't find the rest of it on linux-pci or linux-kernel. > > Didn't find the cover letter, but the AMD patchworks captured the series.. > > https://patchwork.freedesktop.org/project/amd-xorg-ddx/patches/ Hi, This patchset is mainly for the amdkfd driver, which is used for running HSA Framework on AMD's APUs and in the near future, dGPUs. This driver has been in the kernel since 3.19. PCIe atomics were not required for APUs because there GPU part is integrated with the CPU and they have atomic accesses between them. For enabling HSA on dGPUs (such as Fiji, Vega, Polaris) which connect through PCIe, we need to have PCIe atomics support. The patchset starts to upstream the dGPU support and one of the pre-requisites is the patch in discussion. > >> I don't want to merge a new interface unless there's an in-tree user >> of it. I assume the rest of the series includes a user. > > Looks like it. So, yes, there is a user in the kernel and there is an entire open-source userspace framework around it, called ROCm (https://github.com/RadeonOpenCompute/ROCm) Oded > > I would also guess we will see users in drivers/infiniband emerge as > CPU coherent atomics are also a topic our hardware drivers will be > interested in. But I am not aware of any pending patches. > > Jason ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/amdgpu: add enumerate for PDB/PTB
Change-Id: Ic1f39d3bc853e9e4259d3e03a22920eda822eec5
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 69 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 14 +++
2 files changed, 66 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 709587d8a77f..fc858ddf9319 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -148,12 +148,29 @@ struct amdgpu_prt_cb {
static unsigned amdgpu_vm_level_shift(struct amdgpu_device *adev,
unsigned level)
{
- if (level != adev->vm_manager.num_level)
- return 9 * (adev->vm_manager.num_level - level - 1) +
+ unsigned shift = 0xff;
+
+ switch (level) {
+ case AMDGPU_VM_PDB2:
+ case AMDGPU_VM_PDB1:
+ case AMDGPU_VM_PDB0:
+ shift = 9 * (adev->vm_manager.last_level - level - 1) +
adev->vm_manager.block_size;
- else
- /* For the page tables on the leaves */
- return 0;
+ break;
+ case AMDGPU_VM_PTB:
+ if (adev->vm_manager.last_level == AMDGPU_VM_PTB)
+ shift = 0;
+ else
+ shift = adev->vm_manager.block_size;
+ break;
+ case AMDGPU_VM_SUBPTB:
+ shift = 0;
+ break;
+ default:
+ dev_err(adev->dev, "the level%d isn't supported.\n", level);
+ }
+
+ return shift;
}
/**
@@ -166,12 +183,13 @@ static unsigned amdgpu_vm_level_shift(struct
amdgpu_device *adev,
static unsigned amdgpu_vm_num_entries(struct amdgpu_device *adev,
unsigned level)
{
- unsigned shift = amdgpu_vm_level_shift(adev, 0);
+ unsigned shift = amdgpu_vm_level_shift(adev,
+ adev->vm_manager.root_level);
- if (level == 0)
+ if (level == adev->vm_manager.root_level)
/* For the root directory */
return round_up(adev->vm_manager.max_pfn, 1 << shift) >> shift;
- else if (level != adev->vm_manager.num_level)
+ else if (level != adev->vm_manager.last_level)
/* Everything in between */
return 512;
else
@@ -385,7 +403,7 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device
*adev,
spin_unlock(&vm->status_lock);
}
- if (level < adev->vm_manager.num_level) {
+ if (level < adev->vm_manager.last_level) {
uint64_t sub_saddr = (pt_idx == from) ? saddr : 0;
uint64_t sub_eaddr = (pt_idx == to) ? eaddr :
((1 << shift) - 1);
@@ -431,7 +449,8 @@ int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
saddr /= AMDGPU_GPU_PAGE_SIZE;
eaddr /= AMDGPU_GPU_PAGE_SIZE;
- return amdgpu_vm_alloc_levels(adev, vm, &vm->root, saddr, eaddr, 0);
+ return amdgpu_vm_alloc_levels(adev, vm, &vm->root, saddr, eaddr,
+ adev->vm_manager.root_level);
}
/**
@@ -1247,7 +1266,8 @@ int amdgpu_vm_update_directories(struct amdgpu_device
*adev,
return 0;
error:
- amdgpu_vm_invalidate_level(adev, vm, &vm->root, 0);
+ amdgpu_vm_invalidate_level(adev, vm, &vm->root,
+ adev->vm_manager.root_level);
amdgpu_job_free(job);
return r;
}
@@ -1266,7 +1286,7 @@ void amdgpu_vm_get_entry(struct amdgpu_pte_update_params
*p, uint64_t addr,
struct amdgpu_vm_pt **entry,
struct amdgpu_vm_pt **parent)
{
- unsigned level = 0;
+ unsigned level = p->adev->vm_manager.root_level;
*parent = NULL;
*entry = &p->vm->root;
@@ -1278,7 +1298,7 @@ void amdgpu_vm_get_entry(struct amdgpu_pte_update_params
*p, uint64_t addr,
addr &= (1ULL << shift) - 1;
}
- if (level != p->adev->vm_manager.num_level)
+ if (level != p->adev->vm_manager.last_level)
*entry = NULL;
}
@@ -1320,7 +1340,7 @@ static void amdgpu_vm_handle_huge_pages(struct
amdgpu_pte_update_params *p,
return;
entry->huge = !!(flags & AMDGPU_PDE_PTE);
- amdgpu_gart_get_vm_pde(p->adev, p->adev->vm_manager.num_level - 1,
+ amdgpu_gart_get_vm_pde(p->adev, p->adev->vm_manager.last_level - 1,
&dst, &flags);
if (use_cpu_update) {
@@ -1636,7 +1656,8 @@ static int amdgpu_vm_bo_update_mapping(struct
amdgpu_device *adev,
error_free:
amdgpu_job_free(job);
- amdgpu_vm_invalidate_level(adev, vm, &vm->root, 0);
+ amdgpu_vm_invalidate_level(adev, vm, &vm->root,
+ adev->vm_manager.root_level);
retu
[PATCH] drm/amdgpu: Fix no irq process when evict vram
When unload amdgpu driver we use sdma to evict vram but there is no
irq process after sdma completed work which raises that waiting for the
fence costs 2s which will trigger VFLR under SRIOV and at last make
unload driver failed.The reason is that the shutdown varible in adev
is set to true before evict vram, it cause ISR directly return without
processing.Therefore, we need set the varible after evict vram.
Change-Id: I7bf75481aa0744b99c41672b49670adc70b478bd
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a269bbc..80934ee 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2458,7 +2458,6 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
int r;
DRM_INFO("amdgpu: finishing device.\n");
- adev->shutdown = true;
if (adev->mode_info.mode_config_initialized)
drm_crtc_force_disable_all(adev->ddev);
@@ -2466,6 +2465,7 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
amdgpu_fence_driver_fini(adev);
amdgpu_fbdev_fini(adev);
r = amdgpu_fini(adev);
+ adev->shutdown = true;
if (adev->firmware.gpu_info_fw) {
release_firmware(adev->firmware.gpu_info_fw);
adev->firmware.gpu_info_fw = NULL;
--
2.7.4
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[PATCH 3/3] drm/ttm: enable eviction for Per-VM-BO
Change-Id: I0c6ece0decd18d30ccc94e5c7ca106d351941c62
Signed-off-by: Roger He
---
drivers/gpu/drm/ttm/ttm_bo.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 098b22e..e7438b0 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -707,7 +707,6 @@ bool ttm_bo_eviction_valuable(struct ttm_buffer_object *bo,
EXPORT_SYMBOL(ttm_bo_eviction_valuable);
static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
- struct reservation_object *resv,
uint32_t mem_type,
const struct ttm_place *place,
struct ttm_operation_ctx *ctx)
@@ -722,10 +721,8 @@ static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
spin_lock(&glob->lru_lock);
for (i = 0; i < TTM_MAX_BO_PRIORITY; ++i) {
list_for_each_entry(bo, &man->lru[i], lru) {
- if (bo->resv == resv) {
- if (list_empty(&bo->ddestroy))
- continue;
- } else {
+ if (!ctx->allow_reserved_eviction ||
+ bo->resv != ctx->resv) {
locked = reservation_object_trylock(bo->resv);
if (!locked)
continue;
@@ -835,7 +832,7 @@ static int ttm_bo_mem_force_space(struct ttm_buffer_object
*bo,
return ret;
if (mem->mm_node)
break;
- ret = ttm_mem_evict_first(bdev, bo->resv, mem_type, place, ctx);
+ ret = ttm_mem_evict_first(bdev, mem_type, place, ctx);
if (unlikely(ret != 0))
return ret;
} while (1);
@@ -1332,8 +1329,7 @@ static int ttm_bo_force_list_clean(struct ttm_bo_device
*bdev,
for (i = 0; i < TTM_MAX_BO_PRIORITY; ++i) {
while (!list_empty(&man->lru[i])) {
spin_unlock(&glob->lru_lock);
- ret = ttm_mem_evict_first(bdev, NULL, mem_type,
- NULL, &ctx);
+ ret = ttm_mem_evict_first(bdev, mem_type, NULL, &ctx);
if (ret)
return ret;
spin_lock(&glob->lru_lock);
--
2.7.4
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[PATCH 2/3] drm/amd/amdgpu: init allow_reserved_eviction and resv when create a new bo
Change-Id: I0c6571c2a64e6c5bdad80ccbcccb40eba1c20b4e
Signed-off-by: Roger He
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index dc0a8be..7c7f56f5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -327,7 +327,7 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
uint64_t init_value,
struct amdgpu_bo **bo_ptr)
{
- struct ttm_operation_ctx ctx = { !kernel, false };
+ struct ttm_operation_ctx ctx = { !kernel, false, true, resv };
struct amdgpu_bo *bo;
enum ttm_bo_type type;
unsigned long page_align;
--
2.7.4
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[PATCH 1/3] drm/ttm: add allow_reserved_eviction and resv into ttm_operation_ctx
allow_reserved_eviction: Allow eviction of reserved BOs
resv: Reservation object to allow reserved evictions with
Change-Id: I01ea482e8c7470014196eb218e2ff8913306eef0
Signed-off-by: Roger He
---
include/drm/ttm/ttm_bo_api.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h
index 368eb02..c126330 100644
--- a/include/drm/ttm/ttm_bo_api.h
+++ b/include/drm/ttm/ttm_bo_api.h
@@ -263,6 +263,8 @@ struct ttm_bo_kmap_obj {
*
* @interruptible: Sleep interruptible if sleeping.
* @no_wait_gpu: Return immediately if the GPU is busy.
+ * @allow_reserved_eviction: Allow eviction of reserved BOs.
+ * @resv: Reservation object to allow reserved evictions with.
*
* Context for TTM operations like changing buffer placement or general memory
* allocation.
@@ -270,6 +272,8 @@ struct ttm_bo_kmap_obj {
struct ttm_operation_ctx {
bool interruptible;
bool no_wait_gpu;
+ bool allow_reserved_eviction;
+ struct reservation_object *resv;
uint64_t bytes_moved;
};
--
2.7.4
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RE: [PATCH 5/6] drm/ttm: enable eviction for Per-VM-BO
-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
Sent: Tuesday, December 12, 2017 6:40 PM
To: He, Roger ; amd-gfx@lists.freedesktop.org;
dri-de...@lists.freedesktop.org
Subject: Re: [PATCH 5/6] drm/ttm: enable eviction for Per-VM-BO
Am 12.12.2017 um 10:33 schrieb Roger He:
> Change-Id: I491d4ceb8c98bb3d8e6e0ddef2330284ce2fe5f6
> Signed-off-by: Roger He
I would squash this one with patch #6.
> ---
> drivers/gpu/drm/ttm/ttm_bo.c | 7 +++
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_bo.c
> b/drivers/gpu/drm/ttm/ttm_bo.c index eb8c568..22b6ca5 100644
> --- a/drivers/gpu/drm/ttm/ttm_bo.c
> +++ b/drivers/gpu/drm/ttm/ttm_bo.c
> @@ -722,10 +722,9 @@ static int ttm_mem_evict_first(struct ttm_bo_device
> *bdev,
> spin_lock(&glob->lru_lock);
> for (i = 0; i < TTM_MAX_BO_PRIORITY; ++i) {
> list_for_each_entry(bo, &man->lru[i], lru) {
> - if (bo->resv == resv) {
> - if (list_empty(&bo->ddestroy))
> - continue;
> - } else {
> + if (!ctx ||
> + !(ctx->on_alloc_stage &&
> + bo->resv == ctx->resv)) {
Coding style: The lines stating with "!(ctx" and "bo->resv" are to far
to the right.
Additional to that I think ctx is mandatory and doesn't need a check
(but might be wrong). If it isn't it's probably time to make itmandatory.
And I would use (ctx->on_alloc_stage || list_empty(&bo->ddestroy)) as
check, we probably still want to be able to handledeleted BOs here
during CS.
Change that as below, I think it can cover the case you described. No matter
the Bo is in deleted list or not.
if (!ctx->allow_reserved_eviction || bo->resv != ctx->resv) {
locked =
kcl_reservation_object_trylock(bo->resv);
if (!locked)
continue;
}
Thanks
Roger(Hongbo.He)
Christian.
> locked = reservation_object_trylock(bo->resv);
> if (!locked)
> continue;
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[PATCH 2/2] drm/amdgpu:impl virt_gart_flush_tlbs
a new gart flush tlb function implemented for SRIOV,
and invoke it during RUNTIME for gart flush TLBs
this could avoid the issue that gart flush (via CPU MMIO)
being interrupted by word switch which lead to DMAR error
on Host/IOMMU side, with this function the gart flush
tlbs always run on KIQ with single PM4 package so it won't
get interrupted before the flushing finished.
Change-Id: I0849658d7945c3874b3cc0d9369a50e1aedb8312
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 27 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 1 +
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c| 3 +++
3 files changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index e7dfb7b..7a6ef64 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -172,6 +172,33 @@ void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev,
uint32_t reg, uint32_t v)
DRM_ERROR("wait for kiq fence error: %ld\n", r);
}
+int amdgpu_virt_gart_flush_tlbs(struct amdgpu_device *adev)
+{
+ struct amdgpu_kiq *kiq = &adev->gfx.kiq;
+ struct amdgpu_ring *ring = &kiq->ring;
+ unsigned long flags;
+ signed long r;
+ uint32_t seq;
+
+ if(!ring->funcs->emit_invalidate_tlbs)
+ return -ENOENT;
+
+ spin_lock_irqsave(&kiq->ring_lock, flags);
+ amdgpu_ring_alloc(ring, 16);
+ amdgpu_ring_emit_invalidate_tlbs(ring);
+ amdgpu_fence_emit_polling(ring, &seq);
+ amdgpu_ring_commit(ring);
+ spin_unlock_irqrestore(&kiq->ring_lock, flags);
+
+ r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT);
+ if (r < 1) {
+ DRM_ERROR("wait for kiq invalidate tlbs error: %ld\n", r);
+ return -ETIME;
+ }
+
+ return 0;
+}
+
/**
* amdgpu_virt_request_full_gpu() - request full gpu access
* @amdgpu:amdgpu device.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index 6a83425..935fed3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -297,5 +297,6 @@ int amdgpu_virt_fw_reserve_get_checksum(void *obj, unsigned
long obj_size,
unsigned int key,
unsigned int chksum);
void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev);
+int amdgpu_virt_gart_flush_tlbs(struct amdgpu_device *adev);
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 1b5dfcc..a195039 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -332,6 +332,9 @@ static void gmc_v9_0_gart_flush_gpu_tlb(struct
amdgpu_device *adev,
/* flush hdp cache */
adev->nbio_funcs->hdp_flush(adev);
+ if (amdgpu_sriov_runtime(adev) && !amdgpu_virt_gart_flush_tlbs(adev))
+ return;
+
spin_lock(&adev->mc.invalidate_lock);
for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
--
2.7.4
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[PATCH 1/2] drm/amdgpu:implement invalid tlbs with kiq
Implement gart flush gpu tlbs with INVALIDATE_TLBS
package on gfx9/gmc9
Change-Id: I851fb93db17e04d19959768c01ba6c677cbb777c
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c| 7 +++
drivers/gpu/drm/amd/amdgpu/soc15d.h | 6 +-
4 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 0cb2235..b3292cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1885,6 +1885,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
#define amdgpu_ring_emit_cntxcntl(r, d) (r)->funcs->emit_cntxcntl((r), (d))
#define amdgpu_ring_emit_rreg(r, d) (r)->funcs->emit_rreg((r), (d))
#define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v))
+#define amdgpu_ring_emit_invalidate_tlbs(r)
(r)->funcs->emit_invalidate_tlbs((r))
#define amdgpu_ring_emit_tmz(r, b) (r)->funcs->emit_tmz((r), (b))
#define amdgpu_ring_pad_ib(r, ib) ((r)->funcs->pad_ib((r), (ib)))
#define amdgpu_ring_init_cond_exec(r) (r)->funcs->init_cond_exec((r))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 010f690..6ad314e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -152,6 +152,7 @@ struct amdgpu_ring_funcs {
void (*emit_rreg)(struct amdgpu_ring *ring, uint32_t reg);
void (*emit_wreg)(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
void (*emit_tmz)(struct amdgpu_ring *ring, bool start);
+ void (*emit_invalidate_tlbs)(struct amdgpu_ring *ring);
/* priority functions */
void (*set_priority) (struct amdgpu_ring *ring,
enum drm_sched_priority priority);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index e9a668b..1a48a92 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3905,6 +3905,12 @@ static void gfx_v9_0_ring_emit_wreg(struct amdgpu_ring
*ring, uint32_t reg,
amdgpu_ring_write(ring, val);
}
+static void gfx_v9_ring_emit_invalidate_tlbs(struct amdgpu_ring *ring) {
+ amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));
+ amdgpu_ring_write(ring, PACKET3_INVALIDATE_TLBS_DST_SEL(0) |
+
PACKET3_INVALIDATE_TLBS_ALL_HUB(1));
+}
+
static void gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,
enum amdgpu_interrupt_state
state)
{
@@ -4280,6 +4286,7 @@ static const struct amdgpu_ring_funcs
gfx_v9_0_ring_funcs_kiq = {
.pad_ib = amdgpu_ring_generic_pad_ib,
.emit_rreg = gfx_v9_0_ring_emit_rreg,
.emit_wreg = gfx_v9_0_ring_emit_wreg,
+ .emit_invalidate_tlbs = gfx_v9_ring_emit_invalidate_tlbs,
};
static void gfx_v9_0_set_ring_funcs(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15d.h
b/drivers/gpu/drm/amd/amdgpu/soc15d.h
index 7f408f8..f0d0b91 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15d.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15d.h
@@ -267,7 +267,11 @@
* x=0: tmz_begin
* x=1: tmz_end
*/
-
+#definePACKET3_INVALIDATE_TLBS 0x98
+# define PACKET3_INVALIDATE_TLBS_DST_SEL(x) ((x) << 0)
+# define PACKET3_INVALIDATE_TLBS_ALL_HUB(x) ((x) << 4)
+# define PACKET3_INVALIDATE_TLBS_PASID(x) ((x) << 5)
+# define PACKET3_INVALIDATE_TLBS_FLUSH_TYPE(x) ((x) << 29)
#define PACKET3_SET_RESOURCES 0xA0
/* 1. header
* 2. CONTROL
--
2.7.4
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RE: [PATCH 4/6] drm/ttm: init locked again to prevent incorrect unlock
That is a bug fix, isn't it? If yes maybe add CC:stable and commit it
first before all other patches.
Fortunately so far there is no issue directly resulted from that.
Thanks
Roger(Hongbo.He)
-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
Sent: Tuesday, December 12, 2017 6:37 PM
To: He, Roger ; amd-gfx@lists.freedesktop.org;
dri-de...@lists.freedesktop.org
Subject: Re: [PATCH 4/6] drm/ttm: init locked again to prevent incorrect unlock
Am 12.12.2017 um 10:33 schrieb Roger He:
> Change-Id: I8db51d843955f5db14bb4bbff892eaedbd9f0abe
> Signed-off-by: Roger He
Reviewed-by: Christian König
That is a bug fix, isn't it? If yes maybe add CC:stable and commit it first
before all other patches.
Christian.
> ---
> drivers/gpu/drm/ttm/ttm_bo.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_bo.c
> b/drivers/gpu/drm/ttm/ttm_bo.c index 17fe8be..eb8c568 100644
> --- a/drivers/gpu/drm/ttm/ttm_bo.c
> +++ b/drivers/gpu/drm/ttm/ttm_bo.c
> @@ -735,6 +735,7 @@ static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
> place)) {
> if (locked)
> reservation_object_unlock(bo->resv);
> + locked = false;
> continue;
> }
> break;
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RE: [PATCH 3/6] drm/ttm: use an ttm operation ctx for ttm_bo_move_xxx
-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
Sent: Tuesday, December 12, 2017 6:34 PM
To: He, Roger ; amd-gfx@lists.freedesktop.org;
dri-de...@lists.freedesktop.org
Subject: Re: [PATCH 3/6] drm/ttm: use an ttm operation ctx for ttm_bo_move_xxx
Am 12.12.2017 um 10:33 schrieb Roger He:
> include ttm_bo_move_memcpy and ttm_bo_move_ttm
>
> Change-Id: I160b2fe1da3200405810d0215c4521b5f0d3615a
> Signed-off-by: Roger He
Reviewed-by: Christian König
But please separate that out and wait for a few days before
committing, maybe some nouveau devs have objections.
Ok.
Thanks
Roger(Hongbo.He)
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +++
> drivers/gpu/drm/nouveau/nouveau_bo.c| 7 +++
> drivers/gpu/drm/qxl/qxl_ttm.c | 3 +--
> drivers/gpu/drm/radeon/radeon_ttm.c | 7 +++
> drivers/gpu/drm/ttm/ttm_bo.c| 6 ++
> drivers/gpu/drm/ttm/ttm_bo_util.c | 8
> include/drm/ttm/ttm_bo_driver.h | 4 ++--
> 7 files changed, 18 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 7db9556..c307a7d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -505,7 +505,7 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object
> *bo, bool evict,
> if (unlikely(r)) {
> goto out_cleanup;
> }
> - r = ttm_bo_move_ttm(bo, ctx->interruptible, ctx->no_wait_gpu, new_mem);
> + r = ttm_bo_move_ttm(bo, ctx, new_mem);
> out_cleanup:
> ttm_bo_mem_put(bo, &tmp_mem);
> return r;
> @@ -536,7 +536,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object
> *bo, bool evict,
> if (unlikely(r)) {
> return r;
> }
> - r = ttm_bo_move_ttm(bo, ctx->interruptible, ctx->no_wait_gpu, &tmp_mem);
> + r = ttm_bo_move_ttm(bo, ctx, &tmp_mem);
> if (unlikely(r)) {
> goto out_cleanup;
> }
> @@ -597,8 +597,7 @@ static int amdgpu_bo_move(struct ttm_buffer_object
> *bo, bool evict,
>
> if (r) {
> memcpy:
> - r = ttm_bo_move_memcpy(bo, ctx->interruptible,
> -ctx->no_wait_gpu, new_mem);
> + r = ttm_bo_move_memcpy(bo, ctx, new_mem);
> if (r) {
> return r;
> }
> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
> b/drivers/gpu/drm/nouveau/nouveau_bo.c
> index 949bf6b..6b6fb20 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_bo.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
> @@ -1226,7 +1226,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo,
> bool evict, bool intr,
> if (ret)
> goto out;
>
> - ret = ttm_bo_move_ttm(bo, intr, no_wait_gpu, new_reg);
> + ret = ttm_bo_move_ttm(bo, &ctx, new_reg);
> out:
> ttm_bo_mem_put(bo, &tmp_reg);
> return ret;
> @@ -1255,7 +1255,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo,
> bool evict, bool intr,
> if (ret)
> return ret;
>
> - ret = ttm_bo_move_ttm(bo, intr, no_wait_gpu, &tmp_reg);
> + ret = ttm_bo_move_ttm(bo, &ctx, &tmp_reg);
> if (ret)
> goto out;
>
> @@ -1380,8 +1380,7 @@ nouveau_bo_move(struct ttm_buffer_object *bo, bool
> evict,
> /* Fallback to software copy. */
> ret = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
> if (ret == 0)
> - ret = ttm_bo_move_memcpy(bo, ctx->interruptible,
> - ctx->no_wait_gpu, new_reg);
> + ret = ttm_bo_move_memcpy(bo, ctx, new_reg);
>
> out:
> if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
> diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c
> b/drivers/gpu/drm/qxl/qxl_ttm.c index d866f32..78ce118 100644
> --- a/drivers/gpu/drm/qxl/qxl_ttm.c
> +++ b/drivers/gpu/drm/qxl/qxl_ttm.c
> @@ -357,8 +357,7 @@ static int qxl_bo_move(struct ttm_buffer_object *bo, bool
> evict,
> qxl_move_null(bo, new_mem);
> return 0;
> }
> - return ttm_bo_move_memcpy(bo, ctx->interruptible, ctx->no_wait_gpu,
> - new_mem);
> + return ttm_bo_move_memcpy(bo, ctx, new_mem);
> }
>
> static void qxl_bo_move_notify(struct ttm_buffer_object *bo, diff
> --git a/drivers/gpu/drm/radeon/radeon_ttm.c
> b/drivers/gpu/drm/radeon/radeon_ttm.c
> index 98e30d7..557fd79 100644
> --- a/drivers/gpu/drm/radeon/radeon_ttm.c
> +++ b/drivers/gpu/drm/radeon/radeon_ttm.c
> @@ -347,7 +347,7 @@ static int radeon_move_vram_ram(struct ttm_buffer_object
> *bo,
> if (unlikely(r)) {
> goto out_cleanup;
> }
> - r = ttm_bo_move_ttm(bo, interruptible, no_wait_gpu, new_mem);
> + r = ttm_bo_move_ttm(bo, &ctx, new_mem);
> out_cleanup:
> ttm_bo_mem_put(bo, &tmp_mem);
> return r;
> @@ -
Re: [PATCH 1/3] drm/amdgpu: drop scratch regs save and restore from S3/S4 handling
On 2017-12-12 03:27 PM, Alex Deucher wrote:
> The expectation is that the base driver doesn't mess with these.
> Some components interact with these directly so let the components
> handle these directly.
>
> Signed-off-by: Alex Deucher
Series is Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 98d62a991b67..ca1cf8a71dda 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2577,7 +2577,6 @@ int amdgpu_device_suspend(struct drm_device *dev, bool
> suspend, bool fbcon)
>*/
> amdgpu_bo_evict_vram(adev);
>
> - amdgpu_atombios_scratch_regs_save(adev);
> pci_save_state(dev->pdev);
> if (suspend) {
> /* Shut down the device */
> @@ -2626,7 +2625,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool
> resume, bool fbcon)
> if (r)
> goto unlock;
> }
> - amdgpu_atombios_scratch_regs_restore(adev);
>
> /* post card */
> if (amdgpu_need_post(adev)) {
>
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[PATCH 2/3] drm/amdgpu: drop scratch regs save and restore from GPU reset handling
The expectation is that the base driver doesn't mess with these. Some components interact with these directly so let the components handle these directly. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index ca1cf8a71dda..046b9d5bc14d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -2896,9 +2896,7 @@ static int amdgpu_reset(struct amdgpu_device *adev, uint64_t* reset_flags) r = amdgpu_suspend(adev); retry: - amdgpu_atombios_scratch_regs_save(adev); r = amdgpu_asic_reset(adev); - amdgpu_atombios_scratch_regs_restore(adev); /* post card */ amdgpu_atom_asic_init(adev->mode_info.atom_context); -- 2.13.6 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 1/3] drm/amdgpu: drop scratch regs save and restore from S3/S4 handling
The expectation is that the base driver doesn't mess with these.
Some components interact with these directly so let the components
handle these directly.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 98d62a991b67..ca1cf8a71dda 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2577,7 +2577,6 @@ int amdgpu_device_suspend(struct drm_device *dev, bool
suspend, bool fbcon)
*/
amdgpu_bo_evict_vram(adev);
- amdgpu_atombios_scratch_regs_save(adev);
pci_save_state(dev->pdev);
if (suspend) {
/* Shut down the device */
@@ -2626,7 +2625,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
if (r)
goto unlock;
}
- amdgpu_atombios_scratch_regs_restore(adev);
/* post card */
if (amdgpu_need_post(adev)) {
--
2.13.6
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[PATCH 3/3] drm/amdgpu: drop amdgpu_atombios_scratch_regs_save/restore
No longer used.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 22 --
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h | 2 --
2 files changed, 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index 39f4d0df1ada..ffaf0534e33c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
@@ -1721,28 +1721,6 @@ void amdgpu_atombios_scratch_regs_init(struct
amdgpu_device *adev)
WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch);
}
-void amdgpu_atombios_scratch_regs_save(struct amdgpu_device *adev)
-{
- int i;
-
- for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
- adev->bios_scratch[i] = RREG32(adev->bios_scratch_reg_offset +
i);
-}
-
-void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev)
-{
- int i;
-
- /*
-* VBIOS will check ASIC_INIT_COMPLETE bit to decide if
-* execute ASIC_Init posting via driver
-*/
- adev->bios_scratch[7] &= ~ATOM_S7_ASIC_INIT_COMPLETE_MASK;
-
- for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
- WREG32(adev->bios_scratch_reg_offset + i,
adev->bios_scratch[i]);
-}
-
void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
bool hung)
{
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
index b0d5d1d7fdba..58507f9ff856 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
@@ -196,8 +196,6 @@ bool amdgpu_atombios_has_gpu_virtualization_table(struct
amdgpu_device *adev);
void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock);
void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev);
-void amdgpu_atombios_scratch_regs_save(struct amdgpu_device *adev);
-void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev);
void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
bool hung);
bool amdgpu_atombios_scratch_need_asic_init(struct amdgpu_device *adev);
--
2.13.6
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[PATCH] drm/amdgpu: remove some old gc 9.x registers
Leftover from bring up.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/clearstate_gfx9.h | 8 ++--
.../drm/amd/include/asic_reg/gc/gc_9_0_default.h | 7
.../drm/amd/include/asic_reg/gc/gc_9_0_offset.h| 14 ---
.../drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h | 45 --
.../drm/amd/include/asic_reg/gc/gc_9_1_offset.h| 14 ---
5 files changed, 4 insertions(+), 84 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/clearstate_gfx9.h
b/drivers/gpu/drm/amd/amdgpu/clearstate_gfx9.h
index 003a131bad47..567a904804bc 100644
--- a/drivers/gpu/drm/amd/amdgpu/clearstate_gfx9.h
+++ b/drivers/gpu/drm/amd/amdgpu/clearstate_gfx9.h
@@ -48,7 +48,7 @@ static const unsigned int gfx9_SECT_CONTEXT_def_1[] =
0x, // DB_STENCIL_WRITE_BASE
0x, // DB_STENCIL_WRITE_BASE_HI
0x, // DB_DFSM_CONTROL
-0x, // DB_RENDER_FILTER
+0, // HOLE
0x, // DB_Z_INFO2
0x, // DB_STENCIL_INFO2
0, // HOLE
@@ -259,8 +259,8 @@ static const unsigned int gfx9_SECT_CONTEXT_def_2[] =
0x, // PA_SC_RIGHT_VERT_GRID
0x, // PA_SC_LEFT_VERT_GRID
0x, // PA_SC_HORIZ_GRID
-0x, // PA_SC_FOV_WINDOW_LR
-0x, // PA_SC_FOV_WINDOW_TB
+0, // HOLE
+0, // HOLE
0, // HOLE
0, // HOLE
0, // HOLE
@@ -701,7 +701,7 @@ static const unsigned int gfx9_SECT_CONTEXT_def_7[] =
{
0x, // VGT_GS_MAX_PRIMS_PER_SUBGROUP
0x, // VGT_DRAW_PAYLOAD_CNTL
-0x, // VGT_INDEX_PAYLOAD_CNTL
+0, // HOLE
0x, // VGT_INSTANCE_STEP_RATE_0
0x, // VGT_INSTANCE_STEP_RATE_1
0, // HOLE
diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_default.h
b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_default.h
index 663d3af35baf..5bf84c6d0ec3 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_default.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_default.h
@@ -436,7 +436,6 @@
#define mmTA_CNTL_DEFAULT
0x8004d850
#define mmTA_CNTL_AUX_DEFAULT
0x
#define mmTA_RESERVED_010C_DEFAULT
0x
-#define mmTA_GRAD_ADJ_DEFAULT
0x4040
#define mmTA_STATUS_DEFAULT
0x
#define mmTA_SCRATCH_DEFAULT
0x
@@ -1700,7 +1699,6 @@
#define mmDB_STENCIL_WRITE_BASE_DEFAULT
0x
#define mmDB_STENCIL_WRITE_BASE_HI_DEFAULT
0x
#define mmDB_DFSM_CONTROL_DEFAULT
0x
-#define mmDB_RENDER_FILTER_DEFAULT
0x
#define mmDB_Z_INFO2_DEFAULT
0x
#define mmDB_STENCIL_INFO2_DEFAULT
0x
#define mmTA_BC_BASE_ADDR_DEFAULT
0x
@@ -1806,8 +1804,6 @@
#define mmPA_SC_RIGHT_VERT_GRID_DEFAULT
0x
#define mmPA_SC_LEFT_VERT_GRID_DEFAULT
0x
#define mmPA_SC_HORIZ_GRID_DEFAULT
0x
-#define mmPA_SC_FOV_WINDOW_LR_DEFAULT
0x
-#define mmPA_SC_FOV_WINDOW_TB_DEFAULT
0x
#define mmVGT_MULTI_PRIM_IB_RESET_INDX_DEFAULT
0x
#define mmCB_BLEND_RED_DEFAULT
0x
#define mmCB_BLEND_GREEN_DEFAULT
0x
@@ -2072,7 +2068,6 @@
#define mmVGT_EVENT_INITIATOR_DEFAULT
0x
#define mmVGT_GS_MAX_PRIMS_PER_SUBGROUP_DEFAULT
0x
#define mmVGT_DRAW_PAYLOAD_CNTL_DEFAULT
0x
-#define mmVGT_INDEX_PAYLOAD_CNTL_DEFAULT
0x
#define mmVGT_INSTANCE_STEP_RATE_0_DEFAULT
0x
#define mmVGT_INSTANCE_STEP_RATE_1_DEFAULT
0x
#define mmVGT_ESGS_RING_ITEMSIZE_DEFAULT
0x
@@ -2490,7 +2485,6 @@
#define mmWD_INDEX_BUF_BASE_DEFAULT
0x
#define mmWD_INDEX_BUF_BASE_HI_DEFAULT
0x
#define mmIA_MULTI_VGT_PARAM_DEFAULT
Re: [PATCH] amdgpu: disable GPU reset if amdgpu.lockup_timeout=0
On Tue, Dec 12, 2017 at 5:36 PM, Christian König wrote: > Am 12.12.2017 um 15:57 schrieb Marek Olšák: >> >> On Tue, Dec 12, 2017 at 10:01 AM, Christian König >> wrote: >>> >>> Am 11.12.2017 um 22:29 schrieb Marek Olšák: From: Marek Olšák Signed-off-by: Marek Olšák --- Is this really correct? I have no easy way to test it. >>> >>> >>> It's a step in the right direction, but I would rather vote for something >>> else: >>> >>> Instead of disabling the timeout by default we only disable the GPU >>> reset/recovery. >>> >>> The idea is to add a new parameter amdgpu_gpu_recovery which makes >>> amdgpu_gpu_recover only prints out an error and doesn't touch the GPU at >>> all >>> (on bare metal systems). >>> >>> Then we finally set the amdgpu_lockup_timeout to a non zero value by >>> default. >>> >>> Andrey could you take care of this when you have time? >> >> I don't understand this. >> >> Why can't we keep the previous behavior where amdgpu.lockup_timeout=0 >> disabled GPU reset? Why do we have to add another option for the same >> thing? > > > lockup_timeout=0 never disabled the GPU reset, it just disabled the timeout. It disabled the automatic reset before we had those interrupt callbacks. > > You could still manually trigger a reset and also invalid commands, invalid > register writes and requests from the SRIOV hypervisor could trigger this. That's OK. Manual resets should always be allowed. > > And as Monk explained GPU resets are mandatory for SRIOV, you can't disable > them at all in this case. What is preventing Monk from setting amdgpu.lockup_timeout > 0, which should be the default state anyway? Let's just say lockup_timeout=0 has undefined behavior with SRIOV. > > Additional to that we probably want the error message that something timed > out, but not touching the hardware in any way. Yes that is a fair point. Marek ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] drm/amdgpu: Add gpu_recovery parameter
On Tue, Dec 12, 2017 at 2:16 PM, Andrey Grodzovsky
wrote:
> Add new parameter to control GPU recovery procedure.
> Retire old way of disabling GPU recovery by setting lockup_timeout == 0 and
> set default for lockup_timeout to 10s.
>
> Signed-off-by: Andrey Grodzovsky
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 8 ++--
> 3 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 3735500..26abe03 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -126,6 +126,7 @@ extern int amdgpu_param_buf_per_se;
> extern int amdgpu_job_hang_limit;
> extern int amdgpu_lbpw;
> extern int amdgpu_compute_multipipe;
> +extern int amdgpu_gpu_recovery;
>
> #ifdef CONFIG_DRM_AMDGPU_SI
> extern int amdgpu_si_support;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 8d03baa..d84b57a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -3030,6 +3030,11 @@ int amdgpu_gpu_recover(struct amdgpu_device *adev,
> struct amdgpu_job *job)
> return 0;
> }
>
> + if (!amdgpu_gpu_recovery) {
> + DRM_INFO("GPU recovery disabled.\n");
> + return 0;
> + }
Probably need and else here for the -1 (auto) case so we can disable
by default for non-SR-IOV and always keep it enabled for SR-IOV.
> +
> dev_info(adev->dev, "GPU reset begin!\n");
>
> mutex_lock(&adev->lock_reset);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 0b039bd..5c612e9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -90,7 +90,7 @@ int amdgpu_disp_priority = 0;
> int amdgpu_hw_i2c = 0;
> int amdgpu_pcie_gen2 = -1;
> int amdgpu_msi = -1;
> -int amdgpu_lockup_timeout = 0;
> +int amdgpu_lockup_timeout = 1;
> int amdgpu_dpm = -1;
> int amdgpu_fw_load_type = -1;
> int amdgpu_aspm = -1;
> @@ -128,6 +128,7 @@ int amdgpu_param_buf_per_se = 0;
> int amdgpu_job_hang_limit = 0;
> int amdgpu_lbpw = -1;
> int amdgpu_compute_multipipe = -1;
> +int amdgpu_gpu_recovery = 1;
>
> MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
> module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
> @@ -165,7 +166,7 @@ module_param_named(pcie_gen2, amdgpu_pcie_gen2, int,
> 0444);
> MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
> module_param_named(msi, amdgpu_msi, int, 0444);
>
> -MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 0 =
> disable)");
> +MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 1)");
Make this a separate change.
> module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444);
>
> MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
> @@ -280,6 +281,9 @@ module_param_named(lbpw, amdgpu_lbpw, int, 0444);
> MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread
> across pipes (1 = enable, 0 = disable, -1 = auto)");
> module_param_named(compute_multipipe, amdgpu_compute_multipipe, int, 0444);
>
> +MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable
> (default) , 0 = disable");
> +module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444);
> +
set the default to -1 so we can have different default behavior in
different cases, e.g., different asics or environments (like SR-IOV).
Alex
> #ifdef CONFIG_DRM_AMDGPU_SI
>
> #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
> --
> 2.7.4
>
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[PATCH] drm/amdgpu: Add gpu_recovery parameter
Add new parameter to control GPU recovery procedure.
Retire old way of disabling GPU recovery by setting lockup_timeout == 0 and
set default for lockup_timeout to 10s.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 8 ++--
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 3735500..26abe03 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -126,6 +126,7 @@ extern int amdgpu_param_buf_per_se;
extern int amdgpu_job_hang_limit;
extern int amdgpu_lbpw;
extern int amdgpu_compute_multipipe;
+extern int amdgpu_gpu_recovery;
#ifdef CONFIG_DRM_AMDGPU_SI
extern int amdgpu_si_support;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 8d03baa..d84b57a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3030,6 +3030,11 @@ int amdgpu_gpu_recover(struct amdgpu_device *adev,
struct amdgpu_job *job)
return 0;
}
+ if (!amdgpu_gpu_recovery) {
+ DRM_INFO("GPU recovery disabled.\n");
+ return 0;
+ }
+
dev_info(adev->dev, "GPU reset begin!\n");
mutex_lock(&adev->lock_reset);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0b039bd..5c612e9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -90,7 +90,7 @@ int amdgpu_disp_priority = 0;
int amdgpu_hw_i2c = 0;
int amdgpu_pcie_gen2 = -1;
int amdgpu_msi = -1;
-int amdgpu_lockup_timeout = 0;
+int amdgpu_lockup_timeout = 1;
int amdgpu_dpm = -1;
int amdgpu_fw_load_type = -1;
int amdgpu_aspm = -1;
@@ -128,6 +128,7 @@ int amdgpu_param_buf_per_se = 0;
int amdgpu_job_hang_limit = 0;
int amdgpu_lbpw = -1;
int amdgpu_compute_multipipe = -1;
+int amdgpu_gpu_recovery = 1;
MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
@@ -165,7 +166,7 @@ module_param_named(pcie_gen2, amdgpu_pcie_gen2, int, 0444);
MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
module_param_named(msi, amdgpu_msi, int, 0444);
-MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 0 =
disable)");
+MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 1)");
module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444);
MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
@@ -280,6 +281,9 @@ module_param_named(lbpw, amdgpu_lbpw, int, 0444);
MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread across
pipes (1 = enable, 0 = disable, -1 = auto)");
module_param_named(compute_multipipe, amdgpu_compute_multipipe, int, 0444);
+MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable
(default) , 0 = disable");
+module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444);
+
#ifdef CONFIG_DRM_AMDGPU_SI
#if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
--
2.7.4
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Re: [PATCH libdrm] amdgpu: Remove dummy CU_ASSERT_EQUAL.
Reviewed-by: Qiang Yu Regards, Qiang From: Andrey Grodzovsky Sent: Tuesday, December 12, 2017 9:36:53 PM To: dri-de...@lists.freedesktop.org Cc: amd-gfx@lists.freedesktop.org; Yu, Qiang; Ma, Le; Huan, Alvin; Jin, Anna; Grodzovsky, Andrey Subject: [PATCH libdrm] amdgpu: Remove dummy CU_ASSERT_EQUAL. Fixes test failure on rhel. Signed-off-by: Andrey Grodzovsky --- tests/amdgpu/basic_tests.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index a78cf52..474a679 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -1459,8 +1459,6 @@ static void amdgpu_sync_dependency_test(void) static uint32_t *ptr; uint64_t seq_no; - CU_ASSERT_EQUAL(r, 0); - r = amdgpu_cs_ctx_create(device_handle, &context_handle[0]); CU_ASSERT_EQUAL(r, 0); r = amdgpu_cs_ctx_create(device_handle, &context_handle[1]); -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] amdgpu: disable GPU reset if amdgpu.lockup_timeout=0
Am 12.12.2017 um 15:57 schrieb Marek Olšák: On Tue, Dec 12, 2017 at 10:01 AM, Christian König wrote: Am 11.12.2017 um 22:29 schrieb Marek Olšák: From: Marek Olšák Signed-off-by: Marek Olšák --- Is this really correct? I have no easy way to test it. It's a step in the right direction, but I would rather vote for something else: Instead of disabling the timeout by default we only disable the GPU reset/recovery. The idea is to add a new parameter amdgpu_gpu_recovery which makes amdgpu_gpu_recover only prints out an error and doesn't touch the GPU at all (on bare metal systems). Then we finally set the amdgpu_lockup_timeout to a non zero value by default. Andrey could you take care of this when you have time? I don't understand this. Why can't we keep the previous behavior where amdgpu.lockup_timeout=0 disabled GPU reset? Why do we have to add another option for the same thing? lockup_timeout=0 never disabled the GPU reset, it just disabled the timeout. You could still manually trigger a reset and also invalid commands, invalid register writes and requests from the SRIOV hypervisor could trigger this. And as Monk explained GPU resets are mandatory for SRIOV, you can't disable them at all in this case. Additional to that we probably want the error message that something timed out, but not touching the hardware in any way. Regards, Christian. Marek ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] drm/amd/pp: implement dpm_get_sclk/mclk for RV
From: amd-gfx on behalf of Rex Zhu
Sent: Tuesday, December 12, 2017 2:24 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH] drm/amd/pp: implement dpm_get_sclk/mclk for RV
Change-Id: I3abf5bde8c64ccab8e842a7c22aee011fc34e69f
Reviewed-by: Evan Quan
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
index 3e0b267..027fd63 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
@@ -523,12 +523,33 @@ static int rv_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
static uint32_t rv_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low)
{
- return 0;
+ struct rv_hwmgr *data;
+
+ if (hwmgr == NULL)
+ return -EINVAL;
+
+ data = (struct rv_hwmgr *)(hwmgr->backend);
+
+ if (low)
+ return data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk;
+ else
+ return data->clock_vol_info.vdd_dep_on_fclk->entries[
+ data->clock_vol_info.vdd_dep_on_fclk->count - 1].clk;
}
static uint32_t rv_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low)
{
- return 0;
+ struct rv_hwmgr *data;
+
+ if (hwmgr == NULL)
+ return -EINVAL;
+
+ data = (struct rv_hwmgr *)(hwmgr->backend);
+
+ if (low)
+ return data->gfx_min_freq_limit;
+ else
+ return data->gfx_max_freq_limit;
}
static int rv_dpm_patch_boot_state(struct pp_hwmgr *hwmgr,
--
1.9.1
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Re: [PATCH] amdgpu: disable GPU reset if amdgpu.lockup_timeout=0
On Tue, Dec 12, 2017 at 4:18 AM, Liu, Monk wrote: > NAK, you change break SRIOV logic: > > Without lockup_timeout set, this gpu_recover() won't get called at all , > unless your IB triggered invalid instruct and that IRQ invoked > Amdgpu_gpu_recover(), by this cause you should disable the logic that in that > IRQ instead of change gpu_recover() itself because > For SRIOV we need gpu_recover() even lockup_timeout is zero The default value of 0 indicates that GPU reset isn't ready to be enabled by default. That's what it means. Once the GPU reset works, the default should be non-zero (e.g. 1) and amdgpu.lockup_timeout=0 should be used to disable all GPU resets in order to be able do scandumps and debug GPU hangs. Marek ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] amdgpu: disable GPU reset if amdgpu.lockup_timeout=0
On Tue, Dec 12, 2017 at 10:01 AM, Christian König wrote: > Am 11.12.2017 um 22:29 schrieb Marek Olšák: >> >> From: Marek Olšák >> >> Signed-off-by: Marek Olšák >> --- >> >> Is this really correct? I have no easy way to test it. > > > It's a step in the right direction, but I would rather vote for something > else: > > Instead of disabling the timeout by default we only disable the GPU > reset/recovery. > > The idea is to add a new parameter amdgpu_gpu_recovery which makes > amdgpu_gpu_recover only prints out an error and doesn't touch the GPU at all > (on bare metal systems). > > Then we finally set the amdgpu_lockup_timeout to a non zero value by > default. > > Andrey could you take care of this when you have time? I don't understand this. Why can't we keep the previous behavior where amdgpu.lockup_timeout=0 disabled GPU reset? Why do we have to add another option for the same thing? Marek ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 02/10] drm/amdgpu: reverse PDBs order v2
Am 11.12.2017 um 11:28 schrieb Christian König:
Am 11.12.2017 um 09:16 schrieb Chunming Zhou:
The hiberachy of page table is as below, which aligns hw names.
PDB2->PDB1->PDB0->PTB, accordingly:
level3 --- PDB2
level2 --- PDB1
level1 --- PDB0
level0 --- PTB
v2:
previous the root pdb is level0, not only me, also many people
thought the root PDB is PDB0, but our many hw documents assume
PDB0 is pointing to PTB, that is said, which bring us unnecessary
trouble on
understanding our VM hiberachy implementation, especially for ramp up
beginner.
For last Christian BLOCK_SIZE patch example, the spec said it only
effects
the PTB pointed by PDB0, but we initially thought it effects all levels,
which mainly because of confuse 'PDB0'.
I'm still not very keen about this.
How about we additional to this add an enum for the PDB2..PTB values?
Please rebase on top of the changes I've just submitted, add the enum
and resend.
Thanks,
Christian.
Regards,
Christian.
Change-Id: I2d748e5e96cffe18294c104c4b192d910b2f8e6b
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 36
++
1 file changed, 23 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index bb191fca60f3..bdb7bdfee0fb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -148,8 +148,8 @@ struct amdgpu_prt_cb {
static unsigned amdgpu_vm_level_shift(struct amdgpu_device *adev,
unsigned level)
{
- if (level != adev->vm_manager.num_level)
- return 9 * (adev->vm_manager.num_level - level - 1) +
+ if (level != 0)
+ return 9 * (level - 1) +
adev->vm_manager.block_size;
else
/* For the page tables on the leaves */
@@ -162,20 +162,27 @@ static unsigned amdgpu_vm_level_shift(struct
amdgpu_device *adev,
* @adev: amdgpu_device pointer
*
* Calculate the number of entries in a page directory or page table.
+ * The hiberachy of page table is as below, which aligns hw names.
+ * PDB2->PDB1->PDB0->PTB, accordingly:
+ * level3 --- PDB2
+ * level2 --- PDB1
+ * level1 --- PDB0
+ * level0 --- PTB
*/
static unsigned amdgpu_vm_num_entries(struct amdgpu_device *adev,
unsigned level)
{
- unsigned shift = amdgpu_vm_level_shift(adev, 0);
+ unsigned shift = amdgpu_vm_level_shift(adev,
+ adev->vm_manager.num_level);
- if (level == 0)
+ if (level == adev->vm_manager.num_level)
/* For the root directory */
return round_up(adev->vm_manager.max_pfn, 1 << shift) >>
shift;
- else if (level != adev->vm_manager.num_level)
+ else if (level != 0)
/* Everything in between */
return 512;
else
- /* For the page tables on the leaves */
+ /* For the page tables on the leaves(PTB) */
return AMDGPU_VM_PTE_COUNT(adev);
}
@@ -312,6 +319,8 @@ static int amdgpu_vm_alloc_levels(struct
amdgpu_device *adev,
u64 flags;
uint64_t init_value = 0;
+ BUG_ON(level > adev->vm_manager.num_level);
+
if (!parent->entries) {
unsigned num_entries = amdgpu_vm_num_entries(adev, level);
@@ -332,7 +341,7 @@ static int amdgpu_vm_alloc_levels(struct
amdgpu_device *adev,
if (to > parent->last_entry_used)
parent->last_entry_used = to;
- ++level;
+ --level;
saddr = saddr & ((1 << shift) - 1);
eaddr = eaddr & ((1 << shift) - 1);
@@ -346,7 +355,7 @@ static int amdgpu_vm_alloc_levels(struct
amdgpu_device *adev,
if (vm->pte_support_ats) {
init_value = AMDGPU_PTE_DEFAULT_ATC;
- if (level != adev->vm_manager.num_level)
+ if (level != 0)
init_value |= AMDGPU_PDE_PTE;
}
@@ -389,7 +398,7 @@ static int amdgpu_vm_alloc_levels(struct
amdgpu_device *adev,
entry->addr = 0;
}
- if (level < adev->vm_manager.num_level) {
+ if (level > 0) {
uint64_t sub_saddr = (pt_idx == from) ? saddr : 0;
uint64_t sub_eaddr = (pt_idx == to) ? eaddr :
((1 << shift) - 1);
@@ -435,7 +444,8 @@ int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
saddr /= AMDGPU_GPU_PAGE_SIZE;
eaddr /= AMDGPU_GPU_PAGE_SIZE;
- return amdgpu_vm_alloc_levels(adev, vm, &vm->root, saddr,
eaddr, 0);
+ return amdgpu_vm_alloc_levels(adev, vm, &vm->root, saddr, eaddr,
+ adev->vm_manager.num_level);
}
/**
@@ -1319,19 +1329,19 @@ void amdgpu_vm_get_entry(struct
amdgpu_pte_update_params *p, uint64_t addr,
struct amdgpu_vm_pt **entry,
struct amdgpu_vm_pt **parent)
{
- unsigned level = 0;
+ unsigned level = p->adev->vm_manager.num_level;
*parent = NULL;
*entry = &p->vm->root;
while ((*entry)->entries) {
- unsigned idx = addr >> amdgpu_vm_level
[PATCH libdrm] amdgpu: Remove dummy CU_ASSERT_EQUAL.
Fixes test failure on rhel. Signed-off-by: Andrey Grodzovsky --- tests/amdgpu/basic_tests.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index a78cf52..474a679 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -1459,8 +1459,6 @@ static void amdgpu_sync_dependency_test(void) static uint32_t *ptr; uint64_t seq_no; - CU_ASSERT_EQUAL(r, 0); - r = amdgpu_cs_ctx_create(device_handle, &context_handle[0]); CU_ASSERT_EQUAL(r, 0); r = amdgpu_cs_ctx_create(device_handle, &context_handle[1]); -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] amdgpu: disable GPU reset if amdgpu.lockup_timeout=0
On 12/12/2017 04:01 AM, Christian König wrote:
Am 11.12.2017 um 22:29 schrieb Marek Olšák:
From: Marek Olšák
Signed-off-by: Marek Olšák
---
Is this really correct? I have no easy way to test it.
It's a step in the right direction, but I would rather vote for
something else:
Instead of disabling the timeout by default we only disable the GPU
reset/recovery.
The idea is to add a new parameter amdgpu_gpu_recovery which makes
amdgpu_gpu_recover only prints out an error and doesn't touch the GPU
at all (on bare metal systems).
Then we finally set the amdgpu_lockup_timeout to a non zero value by
default.
Andrey could you take care of this when you have time?
Thanks,
Christian.
Sure.
Thanks,
Andrey
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 8d03baa..56c41cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3018,20 +3018,24 @@ static int amdgpu_reset_sriov(struct
amdgpu_device *adev, uint64_t *reset_flags,
*
* Attempt to reset the GPU if it has hung (all asics).
* Returns 0 for success or an error on failure.
*/
int amdgpu_gpu_recover(struct amdgpu_device *adev, struct
amdgpu_job *job)
{
struct drm_atomic_state *state = NULL;
uint64_t reset_flags = 0;
int i, r, resched;
+ /* amdgpu.lockup_timeout=0 disables GPU reset. */
+ if (amdgpu_lockup_timeout == 0)
+ return 0;
+
if (!amdgpu_check_soft_reset(adev)) {
DRM_INFO("No hardware hang detected. Did some blocks
stall?\n");
return 0;
}
dev_info(adev->dev, "GPU reset begin!\n");
mutex_lock(&adev->lock_reset);
atomic_inc(&adev->gpu_reset_counter);
adev->in_gpu_reset = 1;
___
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RE: [PATCH 28/37] drm/amdkfd: Add support for displaying VRAM usage
That's alright. I admit that it was a bit self-serving in that I was asked to
get something somewhere to get the information out, and it was the simplest
solution. I can see if I can come up with a more acceptable option in a future
patch set, but for now I think Felix is right in that we can just drop this one
for now, it's definitely not worth holding up the rest of the patches over.
Kent
-Original Message-
From: Kuehling, Felix
Sent: Monday, December 11, 2017 2:52 PM
To: Koenig, Christian; Oded Gabbay
Cc: Russell, Kent; amd-gfx list
Subject: Re: [PATCH 28/37] drm/amdkfd: Add support for displaying VRAM usage
On 2017-12-11 12:28 PM, Christian König wrote:
> Am 11.12.2017 um 17:40 schrieb Oded Gabbay:
>> On Mon, Dec 11, 2017 at 5:32 PM, Oded Gabbay
>> wrote:
>>> On Sat, Dec 9, 2017 at 6:09 AM, Felix Kuehling
>>> wrote:
From: Kent Russell
Add a sysfs file in topology (node/x/memory_banks/X/used_memory)
that reports the current VRAM usage for that node. Only works for
GPU nodes at this time.
>>> As with patch 22 (perf counters), I would not expect this
>>> information to be included in the topology. It doesn't describe the
>>> properties of the device, but a current state.
>>> Oded
>> For example, in amdgpu, the VRAM usage is reported in the INFO IOCTL
>> (AMDGPU_INFO_VRAM_USAGE). See function amdgpu_info_ioctl()
>
> Yep, completely agree.
>
> That stuff is runtime properties and not static attribute nor
> configuration or setup.
>
> So either debugfs or IOCTL are the two best options as far as I can see.
Right. I admit, this feature was a bit of a hack to quickly enable the HIP team
without having to change a bunch of interfaces (ioctls, Thunk, and Runtime).
This patch isn't critical for enabling dGPU support. I'll drop it for now and
we can reimplement it properly later.
Regards,
Felix
>
> Christian.
>
>>
>> Thanks,
>>
>> Oded
>>
>>
Signed-off-by: Kent Russell
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 49
+++
drivers/gpu/drm/amd/amdkfd/kfd_topology.h | 4 ++-
2 files changed, 46 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index 7f0d41e..7f04038 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
@@ -186,6 +186,8 @@ struct kfd_topology_device
*kfd_create_topology_device(
sysfs_show_gen_prop(buffer, "%s %llu\n", name,
value)
#define sysfs_show_32bit_val(buffer, value) \
sysfs_show_gen_prop(buffer, "%u\n", value)
+#define sysfs_show_64bit_val(buffer, value) \
+ sysfs_show_gen_prop(buffer, "%llu\n", value)
#define sysfs_show_str_val(buffer, value) \
sysfs_show_gen_prop(buffer, "%s\n", value)
@@ -268,11 +270,23 @@ static ssize_t mem_show(struct kobject *kobj,
struct attribute *attr,
{
ssize_t ret;
struct kfd_mem_properties *mem;
+ uint64_t used_mem;
/* Making sure that the buffer is an empty string */
buffer[0] = 0;
- mem = container_of(attr, struct kfd_mem_properties, attr);
+ if (strcmp(attr->name, "used_memory") == 0) {
+ mem = container_of(attr, struct kfd_mem_properties,
attr_used);
+ if (mem->gpu) {
+ used_mem =
+mem->gpu->kfd2kgd->get_vram_usage(
+
mem->gpu->kgd);
+ return sysfs_show_64bit_val(buffer,
+used_mem);
+ }
+ /* TODO: Report APU/CPU-allocated memory; For now
return 0 */
+ return 0;
+ }
+
+ mem = container_of(attr, struct kfd_mem_properties,
attr_props);
sysfs_show_32bit_prop(buffer, "heap_type",
mem->heap_type);
sysfs_show_64bit_prop(buffer, "size_in_bytes",
mem->size_in_bytes);
sysfs_show_32bit_prop(buffer, "flags", mem->flags); @@
-527,7 +541,12 @@ static void kfd_remove_sysfs_node_entry(struct
kfd_topology_device *dev)
if (dev->kobj_mem) {
list_for_each_entry(mem, &dev->mem_props, list)
if (mem->kobj) {
- kfd_remove_sysfs_file(mem->kobj,
&mem->attr);
+ /* TODO: Remove when CPU/APU
supported */
+ if (dev->node_props.cpu_cores_count
== 0)
+
+sysfs_remove_file(mem->kobj,
+
&mem->attr_used);
RE: [PATCH 4/7] drm/amdgpu:return ETIME if really time out
Okay -Original Message- From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] Sent: 2017年12月12日 18:44 To: Liu, Monk ; Koenig, Christian ; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 4/7] drm/amdgpu:return ETIME if really time out dma_fence_wait_any_timeout() return 1 when some fences was signaled even when the timeout parameter is 0. And later on we check for "wait->out.status = (r > 0);". So the logic should actually work correct. If it doesn't we need to fix something else. Christian. Am 12.12.2017 um 11:23 schrieb Liu, Monk: > Without this patch a timed out submit will never be caught, is it really good > ? > > For the backward compatible why it's applied on incorrect logic ? > > -Original Message- > From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] > Sent: 2017年12月12日 18:20 > To: Liu, Monk ; amd-gfx@lists.freedesktop.org > Subject: Re: [PATCH 4/7] drm/amdgpu:return ETIME if really time out > > NAK, it does make sense but that would change the user space interface in a > non backward compatible way, wouldn't it? > > Christian. > > Am 12.12.2017 um 10:46 schrieb Monk Liu: >> Change-Id: I7304577a500fc2d41482f2fe3f1692ae3797f576 >> Signed-off-by: Monk Liu >> --- >>drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 ++-- >>1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c >> index 44523a8..f62b07a 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c >> @@ -1506,8 +1506,8 @@ static int amdgpu_cs_wait_any_fence(struct >> amdgpu_device *adev, >> >> if (first < fence_count && array[first]) >> r = array[first]->error; >> -else >> -r = 0; >> +else if (r == 0) >> +r = -ETIME; >> >>err_free_fence_array: >> for (i = 0; i < fence_count; i++) > ___ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 4/7] drm/amdgpu:return ETIME if really time out
dma_fence_wait_any_timeout() return 1 when some fences was signaled even when the timeout parameter is 0. And later on we check for "wait->out.status = (r > 0);". So the logic should actually work correct. If it doesn't we need to fix something else. Christian. Am 12.12.2017 um 11:23 schrieb Liu, Monk: Without this patch a timed out submit will never be caught, is it really good ? For the backward compatible why it's applied on incorrect logic ? -Original Message- From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] Sent: 2017年12月12日 18:20 To: Liu, Monk ; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 4/7] drm/amdgpu:return ETIME if really time out NAK, it does make sense but that would change the user space interface in a non backward compatible way, wouldn't it? Christian. Am 12.12.2017 um 10:46 schrieb Monk Liu: Change-Id: I7304577a500fc2d41482f2fe3f1692ae3797f576 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index 44523a8..f62b07a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -1506,8 +1506,8 @@ static int amdgpu_cs_wait_any_fence(struct amdgpu_device *adev, if (first < fence_count && array[first]) r = array[first]->error; - else - r = 0; + else if (r == 0) + r = -ETIME; err_free_fence_array: for (i = 0; i < fence_count; i++) ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 5/6] drm/ttm: enable eviction for Per-VM-BO
Am 12.12.2017 um 10:33 schrieb Roger He:
Change-Id: I491d4ceb8c98bb3d8e6e0ddef2330284ce2fe5f6
Signed-off-by: Roger He
I would squash this one with patch #6.
---
drivers/gpu/drm/ttm/ttm_bo.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index eb8c568..22b6ca5 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -722,10 +722,9 @@ static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
spin_lock(&glob->lru_lock);
for (i = 0; i < TTM_MAX_BO_PRIORITY; ++i) {
list_for_each_entry(bo, &man->lru[i], lru) {
- if (bo->resv == resv) {
- if (list_empty(&bo->ddestroy))
- continue;
- } else {
+ if (!ctx ||
+ !(ctx->on_alloc_stage &&
+ bo->resv == ctx->resv)) {
Coding style: The lines stating with "!(ctx" and "bo->resv" are to far
to the right.
Additional to that I think ctx is mandatory and doesn't need a check
(but might be wrong). If it isn't it's probably time to make it mandatory.
And I would use (ctx->on_alloc_stage || list_empty(&bo->ddestroy)) as
check, we probably still want to be able to handle deleted BOs here
during CS.
Christian.
locked = reservation_object_trylock(bo->resv);
if (!locked)
continue;
___
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Re: [PATCH 4/6] drm/ttm: init locked again to prevent incorrect unlock
Am 12.12.2017 um 10:33 schrieb Roger He:
Change-Id: I8db51d843955f5db14bb4bbff892eaedbd9f0abe
Signed-off-by: Roger He
Reviewed-by: Christian König
That is a bug fix, isn't it? If yes maybe add CC:stable and commit it
first before all other patches.
Christian.
---
drivers/gpu/drm/ttm/ttm_bo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 17fe8be..eb8c568 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -735,6 +735,7 @@ static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
place)) {
if (locked)
reservation_object_unlock(bo->resv);
+ locked = false;
continue;
}
break;
___
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Re: [PATCH 3/6] drm/ttm: use an ttm operation ctx for ttm_bo_move_xxx
Am 12.12.2017 um 10:33 schrieb Roger He:
include ttm_bo_move_memcpy and ttm_bo_move_ttm
Change-Id: I160b2fe1da3200405810d0215c4521b5f0d3615a
Signed-off-by: Roger He
Reviewed-by: Christian König
But please separate that out and wait for a few days before committing,
maybe some nouveau devs have objections.
Christian.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +++
drivers/gpu/drm/nouveau/nouveau_bo.c| 7 +++
drivers/gpu/drm/qxl/qxl_ttm.c | 3 +--
drivers/gpu/drm/radeon/radeon_ttm.c | 7 +++
drivers/gpu/drm/ttm/ttm_bo.c| 6 ++
drivers/gpu/drm/ttm/ttm_bo_util.c | 8
include/drm/ttm/ttm_bo_driver.h | 4 ++--
7 files changed, 18 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 7db9556..c307a7d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -505,7 +505,7 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object
*bo, bool evict,
if (unlikely(r)) {
goto out_cleanup;
}
- r = ttm_bo_move_ttm(bo, ctx->interruptible, ctx->no_wait_gpu, new_mem);
+ r = ttm_bo_move_ttm(bo, ctx, new_mem);
out_cleanup:
ttm_bo_mem_put(bo, &tmp_mem);
return r;
@@ -536,7 +536,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object
*bo, bool evict,
if (unlikely(r)) {
return r;
}
- r = ttm_bo_move_ttm(bo, ctx->interruptible, ctx->no_wait_gpu, &tmp_mem);
+ r = ttm_bo_move_ttm(bo, ctx, &tmp_mem);
if (unlikely(r)) {
goto out_cleanup;
}
@@ -597,8 +597,7 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo,
bool evict,
if (r) {
memcpy:
- r = ttm_bo_move_memcpy(bo, ctx->interruptible,
- ctx->no_wait_gpu, new_mem);
+ r = ttm_bo_move_memcpy(bo, ctx, new_mem);
if (r) {
return r;
}
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 949bf6b..6b6fb20 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -1226,7 +1226,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool
evict, bool intr,
if (ret)
goto out;
- ret = ttm_bo_move_ttm(bo, intr, no_wait_gpu, new_reg);
+ ret = ttm_bo_move_ttm(bo, &ctx, new_reg);
out:
ttm_bo_mem_put(bo, &tmp_reg);
return ret;
@@ -1255,7 +1255,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool
evict, bool intr,
if (ret)
return ret;
- ret = ttm_bo_move_ttm(bo, intr, no_wait_gpu, &tmp_reg);
+ ret = ttm_bo_move_ttm(bo, &ctx, &tmp_reg);
if (ret)
goto out;
@@ -1380,8 +1380,7 @@ nouveau_bo_move(struct ttm_buffer_object *bo, bool evict,
/* Fallback to software copy. */
ret = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
if (ret == 0)
- ret = ttm_bo_move_memcpy(bo, ctx->interruptible,
-ctx->no_wait_gpu, new_reg);
+ ret = ttm_bo_move_memcpy(bo, ctx, new_reg);
out:
if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c
index d866f32..78ce118 100644
--- a/drivers/gpu/drm/qxl/qxl_ttm.c
+++ b/drivers/gpu/drm/qxl/qxl_ttm.c
@@ -357,8 +357,7 @@ static int qxl_bo_move(struct ttm_buffer_object *bo, bool
evict,
qxl_move_null(bo, new_mem);
return 0;
}
- return ttm_bo_move_memcpy(bo, ctx->interruptible, ctx->no_wait_gpu,
- new_mem);
+ return ttm_bo_move_memcpy(bo, ctx, new_mem);
}
static void qxl_bo_move_notify(struct ttm_buffer_object *bo,
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c
b/drivers/gpu/drm/radeon/radeon_ttm.c
index 98e30d7..557fd79 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -347,7 +347,7 @@ static int radeon_move_vram_ram(struct ttm_buffer_object
*bo,
if (unlikely(r)) {
goto out_cleanup;
}
- r = ttm_bo_move_ttm(bo, interruptible, no_wait_gpu, new_mem);
+ r = ttm_bo_move_ttm(bo, &ctx, new_mem);
out_cleanup:
ttm_bo_mem_put(bo, &tmp_mem);
return r;
@@ -380,7 +380,7 @@ static int radeon_move_ram_vram(struct ttm_buffer_object
*bo,
if (unlikely(r)) {
return r;
}
- r = ttm_bo_move_ttm(bo, interruptible, no_wait_gpu, &tmp_mem);
+ r = ttm_bo_move_ttm(bo, &ctx, &tmp_mem);
if (unlikely(r)) {
goto out_cleanup;
}
@@ -445,8 +445,7 @@ static int radeon_bo_move(struct ttm_buffer_object *bo,
bool evict,
if (r) {
memcpy:
- r =
Re: [PATCH 2/6] drm/ttm: when create a new ttm bo init on_alloc_stage and resv for ttm_operation_ctx
Am 12.12.2017 um 10:33 schrieb Roger He:
Change-Id: I0c6571c2a64e6c5bdad80ccbcccb40eba1c20b4e
Signed-off-by: Roger He
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +-
drivers/gpu/drm/ttm/ttm_bo.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index dc0a8be..eb42782 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -327,7 +327,7 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
uint64_t init_value,
struct amdgpu_bo **bo_ptr)
{
- struct ttm_operation_ctx ctx = { !kernel, false };
+ struct ttm_operation_ctx ctx = { !kernel, false, true };
struct amdgpu_bo *bo;
enum ttm_bo_type type;
unsigned long page_align;
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 97c3da6..70b2673 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -1208,6 +1208,7 @@ int ttm_bo_init_reserved(struct ttm_bo_device *bdev,
WARN_ON(!locked);
}
+ ctx->resv = resv;
That is something amdgpu specific, don't put that into TTM code.
Christian.
if (likely(!ret))
ret = ttm_bo_validate(bo, placement, ctx);
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Re: [PATCH 1/6] drm/ttm: add on_alloc_stage and reservation into ttm_operation_ctx
Am 12.12.2017 um 10:33 schrieb Roger He:
on_alloc_stage: is this operation on allocation stage
resv: reservation bo used of this operation
Change-Id: I01ea482e8c7470014196eb218e2ff8913306eef0
Signed-off-by: Roger He
---
include/drm/ttm/ttm_bo_api.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h
index 368eb02..25de597 100644
--- a/include/drm/ttm/ttm_bo_api.h
+++ b/include/drm/ttm/ttm_bo_api.h
@@ -263,6 +263,8 @@ struct ttm_bo_kmap_obj {
*
* @interruptible: Sleep interruptible if sleeping.
* @no_wait_gpu: Return immediately if the GPU is busy.
+ * @on_alloc_stage: is this operation on allocation stage
+ * @resv: resvation bo used
*
* Context for TTM operations like changing buffer placement or general memory
* allocation.
@@ -270,6 +272,8 @@ struct ttm_bo_kmap_obj {
struct ttm_operation_ctx {
bool interruptible;
bool no_wait_gpu;
+ bool on_alloc_stage;
The name describes how amdgpu want to use the flag and not what effect
it has.
How about "allow_reserved_eviction"?
And also please update the documentation with something like:
* @allow_reserved_eviction: Allow eviction of reserved BOs.
* @resv: Reservation object to allow reserved evictions with.
Alternative we could put the ww_mutex context in here as Daniel
suggested, but I think we should stick with what we have for now and
make that change when we find another use case for this.
Christian.
+ struct reservation_object *resv;
uint64_t bytes_moved;
};
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RE: [PATCH 4/7] drm/amdgpu:return ETIME if really time out
Without this patch a timed out submit will never be caught, is it really good ? For the backward compatible why it's applied on incorrect logic ? -Original Message- From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] Sent: 2017年12月12日 18:20 To: Liu, Monk ; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 4/7] drm/amdgpu:return ETIME if really time out NAK, it does make sense but that would change the user space interface in a non backward compatible way, wouldn't it? Christian. Am 12.12.2017 um 10:46 schrieb Monk Liu: > Change-Id: I7304577a500fc2d41482f2fe3f1692ae3797f576 > Signed-off-by: Monk Liu > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > index 44523a8..f62b07a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > @@ -1506,8 +1506,8 @@ static int amdgpu_cs_wait_any_fence(struct > amdgpu_device *adev, > > if (first < fence_count && array[first]) > r = array[first]->error; > - else > - r = 0; > + else if (r == 0) > + r = -ETIME; > > err_free_fence_array: > for (i = 0; i < fence_count; i++) ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 1/7] drm/ttm:fix incorrect calculate on shrink_pages
BTW, in the shortlog (subject) there should always be a space after the prefix's ":". On 2017-12-12 10:46 AM, Monk Liu wrote: > shrink_pages is in unit of Order after ttm_page_pool_free, > but it is used by nr_free in next round so need change > it into native page unit > > Change-Id: I33b77ac1616e24b1b881eee54c3bd7342cfa9ab8 > Signed-off-by: Monk Liu > --- > drivers/gpu/drm/ttm/ttm_page_alloc.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c > b/drivers/gpu/drm/ttm/ttm_page_alloc.c > index 44343a2..71945cc 100644 > --- a/drivers/gpu/drm/ttm/ttm_page_alloc.c > +++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c > @@ -455,6 +455,7 @@ ttm_pool_shrink_scan(struct shrinker *shrink, struct > shrink_control *sc) > freed += (nr_free_pool - shrink_pages) << pool->order; > if (freed >= sc->nr_to_scan) > break; > + shrink_pages <<= pool->order; > } > mutex_unlock(&lock); > return freed; > TTM patches need to be sent to the dri-devel list as well for review. It's better not to mix TTM and amdgpu patches in the same series unless absolutely necessary. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 1/7] drm/ttm:fix incorrect calculate on shrink_pages
Patch #1-#3 and #5 are Reviewed-by: Christian König . Patch #6 and #7 are Acked-by: Christian König . Regards, Christian. Am 12.12.2017 um 10:46 schrieb Monk Liu: shrink_pages is in unit of Order after ttm_page_pool_free, but it is used by nr_free in next round so need change it into native page unit Change-Id: I33b77ac1616e24b1b881eee54c3bd7342cfa9ab8 Signed-off-by: Monk Liu --- drivers/gpu/drm/ttm/ttm_page_alloc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c index 44343a2..71945cc 100644 --- a/drivers/gpu/drm/ttm/ttm_page_alloc.c +++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c @@ -455,6 +455,7 @@ ttm_pool_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) freed += (nr_free_pool - shrink_pages) << pool->order; if (freed >= sc->nr_to_scan) break; + shrink_pages <<= pool->order; } mutex_unlock(&lock); return freed; ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 4/7] drm/amdgpu:return ETIME if really time out
NAK, it does make sense but that would change the user space interface in a non backward compatible way, wouldn't it? Christian. Am 12.12.2017 um 10:46 schrieb Monk Liu: Change-Id: I7304577a500fc2d41482f2fe3f1692ae3797f576 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index 44523a8..f62b07a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -1506,8 +1506,8 @@ static int amdgpu_cs_wait_any_fence(struct amdgpu_device *adev, if (first < fence_count && array[first]) r = array[first]->error; - else - r = 0; + else if (r == 0) + r = -ETIME; err_free_fence_array: for (i = 0; i < fence_count; i++) ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
RE: [PATCH 1/7] drm/ttm:fix incorrect calculate on shrink_pages
Reviewed-by: Roger He Thanks Roger(Hongbo.He) -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Monk Liu Sent: Tuesday, December 12, 2017 5:47 PM To: amd-gfx@lists.freedesktop.org Cc: Liu, Monk Subject: [PATCH 1/7] drm/ttm:fix incorrect calculate on shrink_pages shrink_pages is in unit of Order after ttm_page_pool_free, but it is used by nr_free in next round so need change it into native page unit Change-Id: I33b77ac1616e24b1b881eee54c3bd7342cfa9ab8 Signed-off-by: Monk Liu --- drivers/gpu/drm/ttm/ttm_page_alloc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c index 44343a2..71945cc 100644 --- a/drivers/gpu/drm/ttm/ttm_page_alloc.c +++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c @@ -455,6 +455,7 @@ ttm_pool_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) freed += (nr_free_pool - shrink_pages) << pool->order; if (freed >= sc->nr_to_scan) break; + shrink_pages <<= pool->order; } mutex_unlock(&lock); return freed; -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 7/7] drm/amdgpu:correct vce fw data and stack size config
From: Frank Min Change-Id: Ic1bc49c21d3a90c477d11162f9d6d9e2073fbbd3 Signed-off-by: Frank Min --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c index 55f0186..e98f548 100755 --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c @@ -423,7 +423,7 @@ static int vce_v4_0_sw_init(void *handle) if (r) return r; - size = (VCE_V4_0_STACK_SIZE + VCE_V4_0_DATA_SIZE) * 2; + size = VCE_V4_0_STACK_SIZE + VCE_V4_0_DATA_SIZE; if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) size += VCE_V4_0_FW_SIZE; -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 6/7] drm/amdgpu:fix MAP_QUEUES paramter
Change-Id: I03fbf3ffb67f40a88769fac1b66fa1707479a3ea Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 50a1edb..468aed5 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -2405,7 +2405,7 @@ static int gfx_v9_0_kiq_kcq_enable(struct amdgpu_device *adev) PACKET3_MAP_QUEUES_PIPE(ring->pipe) | PACKET3_MAP_QUEUES_ME((ring->me == 1 ? 0 : 1)) | PACKET3_MAP_QUEUES_QUEUE_TYPE(0) | /*queue_type: normal compute queue */ - PACKET3_MAP_QUEUES_ALLOC_FORMAT(1) | /* alloc format: all_on_one_pipe */ + PACKET3_MAP_QUEUES_ALLOC_FORMAT(0) | /* alloc format: all_on_one_pipe */ PACKET3_MAP_QUEUES_ENGINE_SEL(0) | /* engine_sel: compute */ PACKET3_MAP_QUEUES_NUM_QUEUES(1)); /* num_queues: must be 1 */ amdgpu_ring_write(kiq_ring, PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->doorbell_index)); -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 5/7] drm/amdgpu:no need with INT for fence polling
Change-Id: Ia13f12207d2e563f1f0c5d62cee74e0ae7d62e83 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c index 1469963..7cb71a8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c @@ -187,7 +187,7 @@ int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s) seq = ++ring->fence_drv.sync_seq; amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, - seq, AMDGPU_FENCE_FLAG_INT); + seq, 0); *s = seq; -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 4/7] drm/amdgpu:return ETIME if really time out
Change-Id: I7304577a500fc2d41482f2fe3f1692ae3797f576 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index 44523a8..f62b07a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -1506,8 +1506,8 @@ static int amdgpu_cs_wait_any_fence(struct amdgpu_device *adev, if (first < fence_count && array[first]) r = array[first]->error; - else - r = 0; + else if (r == 0) + r = -ETIME; err_free_fence_array: for (i = 0; i < fence_count; i++) -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 3/7] drm/amdgpu:no need to evict VRAM in device_fini
Change-Id: I6d6004b8f84e4654b5c4da53b4ebdf3936602883 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 8d03baa..a269bbc 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -2461,8 +2461,7 @@ void amdgpu_device_fini(struct amdgpu_device *adev) adev->shutdown = true; if (adev->mode_info.mode_config_initialized) drm_crtc_force_disable_all(adev->ddev); - /* evict vram memory */ - amdgpu_bo_evict_vram(adev); + amdgpu_ib_pool_fini(adev); amdgpu_fence_driver_fini(adev); amdgpu_fbdev_fini(adev); -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/7] drm/ttm:max_cpages is in unit of native page
Change-Id: I7093791939fc1cccf2a13d8cc7ef7a6cca95351d Signed-off-by: Monk Liu --- drivers/gpu/drm/ttm/ttm_page_alloc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c index 71945cc..b5ba644 100644 --- a/drivers/gpu/drm/ttm/ttm_page_alloc.c +++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c @@ -544,7 +544,7 @@ static int ttm_alloc_new_pages(struct list_head *pages, gfp_t gfp_flags, int r = 0; unsigned i, j, cpages; unsigned npages = 1 << order; - unsigned max_cpages = min(count, (unsigned)NUM_PAGES_TO_ALLOC); + unsigned max_cpages = min(count << order, (unsigned)NUM_PAGES_TO_ALLOC); /* allocate array for page caching change */ caching_array = kmalloc(max_cpages*sizeof(struct page *), GFP_KERNEL); -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 1/7] drm/ttm:fix incorrect calculate on shrink_pages
shrink_pages is in unit of Order after ttm_page_pool_free, but it is used by nr_free in next round so need change it into native page unit Change-Id: I33b77ac1616e24b1b881eee54c3bd7342cfa9ab8 Signed-off-by: Monk Liu --- drivers/gpu/drm/ttm/ttm_page_alloc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c index 44343a2..71945cc 100644 --- a/drivers/gpu/drm/ttm/ttm_page_alloc.c +++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c @@ -455,6 +455,7 @@ ttm_pool_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) freed += (nr_free_pool - shrink_pages) << pool->order; if (freed >= sc->nr_to_scan) break; + shrink_pages <<= pool->order; } mutex_unlock(&lock); return freed; -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 6/6] drm/ttm: remove parameter reservation since it is moved into ttm context
Change-Id: I83ac6a77f24e14698aa386a497a262e24c5bbdb6
Signed-off-by: Roger He
---
drivers/gpu/drm/ttm/ttm_bo.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 22b6ca5..f138e95 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -707,7 +707,6 @@ bool ttm_bo_eviction_valuable(struct ttm_buffer_object *bo,
EXPORT_SYMBOL(ttm_bo_eviction_valuable);
static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
- struct reservation_object *resv,
uint32_t mem_type,
const struct ttm_place *place,
struct ttm_operation_ctx *ctx)
@@ -834,7 +833,7 @@ static int ttm_bo_mem_force_space(struct ttm_buffer_object
*bo,
return ret;
if (mem->mm_node)
break;
- ret = ttm_mem_evict_first(bdev, bo->resv, mem_type, place, ctx);
+ ret = ttm_mem_evict_first(bdev, mem_type, place, ctx);
if (unlikely(ret != 0))
return ret;
} while (1);
@@ -1332,8 +1331,7 @@ static int ttm_bo_force_list_clean(struct ttm_bo_device
*bdev,
for (i = 0; i < TTM_MAX_BO_PRIORITY; ++i) {
while (!list_empty(&man->lru[i])) {
spin_unlock(&glob->lru_lock);
- ret = ttm_mem_evict_first(bdev, NULL, mem_type,
- NULL, &ctx);
+ ret = ttm_mem_evict_first(bdev, mem_type, NULL, &ctx);
if (ret)
return ret;
spin_lock(&glob->lru_lock);
--
2.7.4
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[PATCH 5/6] drm/ttm: enable eviction for Per-VM-BO
Change-Id: I491d4ceb8c98bb3d8e6e0ddef2330284ce2fe5f6
Signed-off-by: Roger He
---
drivers/gpu/drm/ttm/ttm_bo.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index eb8c568..22b6ca5 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -722,10 +722,9 @@ static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
spin_lock(&glob->lru_lock);
for (i = 0; i < TTM_MAX_BO_PRIORITY; ++i) {
list_for_each_entry(bo, &man->lru[i], lru) {
- if (bo->resv == resv) {
- if (list_empty(&bo->ddestroy))
- continue;
- } else {
+ if (!ctx ||
+ !(ctx->on_alloc_stage &&
+ bo->resv == ctx->resv)) {
locked = reservation_object_trylock(bo->resv);
if (!locked)
continue;
--
2.7.4
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[PATCH 4/6] drm/ttm: init locked again to prevent incorrect unlock
Change-Id: I8db51d843955f5db14bb4bbff892eaedbd9f0abe
Signed-off-by: Roger He
---
drivers/gpu/drm/ttm/ttm_bo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 17fe8be..eb8c568 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -735,6 +735,7 @@ static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
place)) {
if (locked)
reservation_object_unlock(bo->resv);
+ locked = false;
continue;
}
break;
--
2.7.4
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[PATCH 3/6] drm/ttm: use an ttm operation ctx for ttm_bo_move_xxx
include ttm_bo_move_memcpy and ttm_bo_move_ttm
Change-Id: I160b2fe1da3200405810d0215c4521b5f0d3615a
Signed-off-by: Roger He
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +++
drivers/gpu/drm/nouveau/nouveau_bo.c| 7 +++
drivers/gpu/drm/qxl/qxl_ttm.c | 3 +--
drivers/gpu/drm/radeon/radeon_ttm.c | 7 +++
drivers/gpu/drm/ttm/ttm_bo.c| 6 ++
drivers/gpu/drm/ttm/ttm_bo_util.c | 8
include/drm/ttm/ttm_bo_driver.h | 4 ++--
7 files changed, 18 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 7db9556..c307a7d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -505,7 +505,7 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object
*bo, bool evict,
if (unlikely(r)) {
goto out_cleanup;
}
- r = ttm_bo_move_ttm(bo, ctx->interruptible, ctx->no_wait_gpu, new_mem);
+ r = ttm_bo_move_ttm(bo, ctx, new_mem);
out_cleanup:
ttm_bo_mem_put(bo, &tmp_mem);
return r;
@@ -536,7 +536,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object
*bo, bool evict,
if (unlikely(r)) {
return r;
}
- r = ttm_bo_move_ttm(bo, ctx->interruptible, ctx->no_wait_gpu, &tmp_mem);
+ r = ttm_bo_move_ttm(bo, ctx, &tmp_mem);
if (unlikely(r)) {
goto out_cleanup;
}
@@ -597,8 +597,7 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo,
bool evict,
if (r) {
memcpy:
- r = ttm_bo_move_memcpy(bo, ctx->interruptible,
- ctx->no_wait_gpu, new_mem);
+ r = ttm_bo_move_memcpy(bo, ctx, new_mem);
if (r) {
return r;
}
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 949bf6b..6b6fb20 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -1226,7 +1226,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool
evict, bool intr,
if (ret)
goto out;
- ret = ttm_bo_move_ttm(bo, intr, no_wait_gpu, new_reg);
+ ret = ttm_bo_move_ttm(bo, &ctx, new_reg);
out:
ttm_bo_mem_put(bo, &tmp_reg);
return ret;
@@ -1255,7 +1255,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool
evict, bool intr,
if (ret)
return ret;
- ret = ttm_bo_move_ttm(bo, intr, no_wait_gpu, &tmp_reg);
+ ret = ttm_bo_move_ttm(bo, &ctx, &tmp_reg);
if (ret)
goto out;
@@ -1380,8 +1380,7 @@ nouveau_bo_move(struct ttm_buffer_object *bo, bool evict,
/* Fallback to software copy. */
ret = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
if (ret == 0)
- ret = ttm_bo_move_memcpy(bo, ctx->interruptible,
-ctx->no_wait_gpu, new_reg);
+ ret = ttm_bo_move_memcpy(bo, ctx, new_reg);
out:
if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c
index d866f32..78ce118 100644
--- a/drivers/gpu/drm/qxl/qxl_ttm.c
+++ b/drivers/gpu/drm/qxl/qxl_ttm.c
@@ -357,8 +357,7 @@ static int qxl_bo_move(struct ttm_buffer_object *bo, bool
evict,
qxl_move_null(bo, new_mem);
return 0;
}
- return ttm_bo_move_memcpy(bo, ctx->interruptible, ctx->no_wait_gpu,
- new_mem);
+ return ttm_bo_move_memcpy(bo, ctx, new_mem);
}
static void qxl_bo_move_notify(struct ttm_buffer_object *bo,
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c
b/drivers/gpu/drm/radeon/radeon_ttm.c
index 98e30d7..557fd79 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -347,7 +347,7 @@ static int radeon_move_vram_ram(struct ttm_buffer_object
*bo,
if (unlikely(r)) {
goto out_cleanup;
}
- r = ttm_bo_move_ttm(bo, interruptible, no_wait_gpu, new_mem);
+ r = ttm_bo_move_ttm(bo, &ctx, new_mem);
out_cleanup:
ttm_bo_mem_put(bo, &tmp_mem);
return r;
@@ -380,7 +380,7 @@ static int radeon_move_ram_vram(struct ttm_buffer_object
*bo,
if (unlikely(r)) {
return r;
}
- r = ttm_bo_move_ttm(bo, interruptible, no_wait_gpu, &tmp_mem);
+ r = ttm_bo_move_ttm(bo, &ctx, &tmp_mem);
if (unlikely(r)) {
goto out_cleanup;
}
@@ -445,8 +445,7 @@ static int radeon_bo_move(struct ttm_buffer_object *bo,
bool evict,
if (r) {
memcpy:
- r = ttm_bo_move_memcpy(bo, ctx->interruptible,
- ctx->no_wait_gpu, new_mem);
+ r = ttm_bo_move_memcpy(bo, ctx, new_mem);
if (r) {
[PATCH 1/6] drm/ttm: add on_alloc_stage and reservation into ttm_operation_ctx
on_alloc_stage: is this operation on allocation stage
resv: reservation bo used of this operation
Change-Id: I01ea482e8c7470014196eb218e2ff8913306eef0
Signed-off-by: Roger He
---
include/drm/ttm/ttm_bo_api.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h
index 368eb02..25de597 100644
--- a/include/drm/ttm/ttm_bo_api.h
+++ b/include/drm/ttm/ttm_bo_api.h
@@ -263,6 +263,8 @@ struct ttm_bo_kmap_obj {
*
* @interruptible: Sleep interruptible if sleeping.
* @no_wait_gpu: Return immediately if the GPU is busy.
+ * @on_alloc_stage: is this operation on allocation stage
+ * @resv: resvation bo used
*
* Context for TTM operations like changing buffer placement or general memory
* allocation.
@@ -270,6 +272,8 @@ struct ttm_bo_kmap_obj {
struct ttm_operation_ctx {
bool interruptible;
bool no_wait_gpu;
+ bool on_alloc_stage;
+ struct reservation_object *resv;
uint64_t bytes_moved;
};
--
2.7.4
___
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/6] drm/ttm: when create a new ttm bo init on_alloc_stage and resv for ttm_operation_ctx
Change-Id: I0c6571c2a64e6c5bdad80ccbcccb40eba1c20b4e
Signed-off-by: Roger He
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +-
drivers/gpu/drm/ttm/ttm_bo.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index dc0a8be..eb42782 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -327,7 +327,7 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
uint64_t init_value,
struct amdgpu_bo **bo_ptr)
{
- struct ttm_operation_ctx ctx = { !kernel, false };
+ struct ttm_operation_ctx ctx = { !kernel, false, true };
struct amdgpu_bo *bo;
enum ttm_bo_type type;
unsigned long page_align;
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 97c3da6..70b2673 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -1208,6 +1208,7 @@ int ttm_bo_init_reserved(struct ttm_bo_device *bdev,
WARN_ON(!locked);
}
+ ctx->resv = resv;
if (likely(!ret))
ret = ttm_bo_validate(bo, placement, ctx);
--
2.7.4
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Re: [PATCH 4/8] drm/amdgpu: remove last_entry_used from the VM code
On 2017年12月12日 17:23, Christian König wrote:
Am 11.12.2017 um 13:08 schrieb Christian König:
Am 11.12.2017 um 06:52 schrieb Chunming Zhou:
On 2017年12月09日 00:41, Christian König wrote:
Not needed any more.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 52
+++---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 1 -
2 files changed, 29 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 400a00fababd..ae5451bf5873 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -329,9 +329,6 @@ static int amdgpu_vm_alloc_levels(struct
amdgpu_device *adev,
to >= amdgpu_vm_num_entries(adev, level))
return -EINVAL;
- if (to > parent->last_entry_used)
- parent->last_entry_used = to;
-
++level;
saddr = saddr & ((1 << shift) - 1);
eaddr = eaddr & ((1 << shift) - 1);
@@ -1187,16 +1184,19 @@ static int amdgpu_vm_update_pde(struct
amdgpu_device *adev,
*
* Mark all PD level as invalid after an error.
*/
-static void amdgpu_vm_invalidate_level(struct amdgpu_vm *vm,
- struct amdgpu_vm_pt *parent)
+static void amdgpu_vm_invalidate_level(struct amdgpu_device *adev,
+ struct amdgpu_vm *vm,
+ struct amdgpu_vm_pt *parent,
+ unsigned level)
can we move level to struct amdgpu_vm_pt?
I considered this as well, but then abandoned the approach and moved
to using it as parameter again.
The general problem is that amdgpu_vm_pt is already *WAY* to big, we
use 60 bytes to manage 4K in the worst case.
Working on getting this down to something sane again, but adding the
level here just to save passing it as parameter during the
destruction would make it worse.
Ping? Any more objections to this patch or can I commit it?
Wanted to commit those up till patch #7,
feel free to add my RB on this one and patch#7.
Regards,
david Zhou
then add your work to reverse the level and then put patch #8 on top.
Christian.
Christian.
otherwise, it looks ok to me.
Regards,
David Zhou
{
- unsigned pt_idx;
+ unsigned pt_idx, num_entries;
/*
* Recurse into the subdirectories. This recursion is
harmless because
* we only have a maximum of 5 layers.
*/
- for (pt_idx = 0; pt_idx <= parent->last_entry_used; ++pt_idx) {
+ num_entries = amdgpu_vm_num_entries(adev, level);
+ for (pt_idx = 0; pt_idx < num_entries; ++pt_idx) {
struct amdgpu_vm_pt *entry = &parent->entries[pt_idx];
if (!entry->base.bo)
@@ -1207,7 +1207,7 @@ static void amdgpu_vm_invalidate_level(struct
amdgpu_vm *vm,
if (list_empty(&entry->base.vm_status))
list_add(&entry->base.vm_status, &vm->relocated);
spin_unlock(&vm->status_lock);
- amdgpu_vm_invalidate_level(vm, entry);
+ amdgpu_vm_invalidate_level(adev, vm, entry, level + 1);
}
}
@@ -1249,7 +1249,8 @@ int amdgpu_vm_update_directories(struct
amdgpu_device *adev,
r = amdgpu_vm_update_pde(adev, vm, pt, entry);
if (r) {
- amdgpu_vm_invalidate_level(vm, &vm->root);
+ amdgpu_vm_invalidate_level(adev, vm,
+ &vm->root, 0);
return r;
}
spin_lock(&vm->status_lock);
@@ -1652,7 +1653,7 @@ static int amdgpu_vm_bo_update_mapping(struct
amdgpu_device *adev,
error_free:
amdgpu_job_free(job);
- amdgpu_vm_invalidate_level(vm, &vm->root);
+ amdgpu_vm_invalidate_level(adev, vm, &vm->root, 0);
return r;
}
@@ -2716,26 +2717,31 @@ int amdgpu_vm_init(struct amdgpu_device
*adev, struct amdgpu_vm *vm,
/**
* amdgpu_vm_free_levels - free PD/PT levels
*
- * @level: PD/PT starting level to free
+ * @adev: amdgpu device structure
+ * @parent: PD/PT starting level to free
+ * @level: level of parent structure
*
* Free the page directory or page table level and all sub levels.
*/
-static void amdgpu_vm_free_levels(struct amdgpu_vm_pt *level)
+static void amdgpu_vm_free_levels(struct amdgpu_device *adev,
+ struct amdgpu_vm_pt *parent,
+ unsigned level)
{
- unsigned i;
+ unsigned i, num_entries = amdgpu_vm_num_entries(adev, level);
- if (level->base.bo) {
- list_del(&level->base.bo_list);
- list_del(&level->base.vm_status);
- amdgpu_bo_unref(&level->base.bo->shadow);
- amdgpu_bo_unref(&level->base.bo);
+ if (parent->base.bo) {
+ list_del(&parent->base.bo_list);
+ list_del(&parent->base.vm_status);
+ amdgpu_bo_unref(&parent->base.bo->shadow);
+ amdgpu_bo_unref(&parent->base.bo);
}
- if (level->entries)
- for (i = 0; i <= level->last_entry_used; i++)
- amdgpu_vm_free_levels(&level->entries[i]);
+ if
Re: [PATCH 8/8] drm/amdgpu: implement 2+1 PD support for Raven
Am 12.12.2017 um 08:58 schrieb Chunming Zhou:
On 2017年12月09日 00:41, Christian König wrote:
Instead of falling back to 2 level and very limited address space use
2+1 PD support and 128TB + 512GB of virtual address space.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 ++
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 42
++-
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 26 ++---
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 49
5 files changed, 86 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e5e0fbd43273..9517c0f76d27 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -541,6 +541,7 @@ struct amdgpu_mc {
u64 private_aperture_end;
/* protects concurrent invalidation */
spinlock_t invalidate_lock;
+ bool translate_further;
};
/*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 228f63e9ac5e..79134f0c26d9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -69,6 +69,9 @@ struct amdgpu_bo_list_entry;
/* PDE is handled as PTE for VEGA10 */
#define AMDGPU_PDE_PTE (1ULL << 54)
+/* PTE is handled as PDE for VEGA10 */
+#define AMDGPU_PTE_TRANSLATE_FURTHER (1ULL << 56)
+
/* VEGA10 only */
#define AMDGPU_PTE_MTYPE(a) ((uint64_t)a << 57)
#define AMDGPU_PTE_MTYPE_MASK AMDGPU_PTE_MTYPE(3ULL)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index f1effadfbaa6..a56f77259130 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -144,8 +144,15 @@ static void gfxhub_v1_0_init_cache_regs(struct
amdgpu_device *adev)
WREG32_SOC15(GC, 0, mmVM_L2_CNTL2, tmp);
tmp = mmVM_L2_CNTL3_DEFAULT;
- tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
- tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3,
L2_CACHE_BIGK_FRAGMENT_SIZE, 6);
+ if (adev->mc.translate_further) {
+ tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
+ tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3,
+ L2_CACHE_BIGK_FRAGMENT_SIZE, 6);
+ } else {
+ tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12);
+ tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3,
+ L2_CACHE_BIGK_FRAGMENT_SIZE, 9);
+ }
WREG32_SOC15(GC, 0, mmVM_L2_CNTL3, tmp);
tmp = mmVM_L2_CNTL4_DEFAULT;
@@ -183,31 +190,40 @@ static void
gfxhub_v1_0_disable_identity_aperture(struct amdgpu_device *adev)
static void gfxhub_v1_0_setup_vmid_config(struct amdgpu_device
*adev)
{
- int i;
+ unsigned num_level, block_size;
uint32_t tmp;
+ int i;
+
+ num_level = adev->vm_manager.num_level;
+ block_size = adev->vm_manager.block_size;
+ if (adev->mc.translate_further)
+ num_level -= 1;
+ else
+ block_size -= 9;
for (i = 0; i <= 14; i++) {
tmp = RREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, i);
tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1);
tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH,
- adev->vm_manager.num_level);
+ num_level);
tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
- RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
+ RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
- DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
+ DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT,
+ 1);
tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
- PDE0_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
+ PDE0_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
- VALID_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
+ VALID_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
- READ_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
+ READ_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
- WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
+ WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
- EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
+ EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
- PAGE_TABLE_BLOCK_SIZE,
- adev->vm_manager.block_size - 9);
+ PAGE_TABLE_BLOCK_SIZE,
+ block_size);
/* Send no-retry XNA
Re: [PATCH 4/8] drm/amdgpu: remove last_entry_used from the VM code
Am 11.12.2017 um 13:08 schrieb Christian König:
Am 11.12.2017 um 06:52 schrieb Chunming Zhou:
On 2017年12月09日 00:41, Christian König wrote:
Not needed any more.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 52
+++---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 1 -
2 files changed, 29 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 400a00fababd..ae5451bf5873 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -329,9 +329,6 @@ static int amdgpu_vm_alloc_levels(struct
amdgpu_device *adev,
to >= amdgpu_vm_num_entries(adev, level))
return -EINVAL;
- if (to > parent->last_entry_used)
- parent->last_entry_used = to;
-
++level;
saddr = saddr & ((1 << shift) - 1);
eaddr = eaddr & ((1 << shift) - 1);
@@ -1187,16 +1184,19 @@ static int amdgpu_vm_update_pde(struct
amdgpu_device *adev,
*
* Mark all PD level as invalid after an error.
*/
-static void amdgpu_vm_invalidate_level(struct amdgpu_vm *vm,
- struct amdgpu_vm_pt *parent)
+static void amdgpu_vm_invalidate_level(struct amdgpu_device *adev,
+ struct amdgpu_vm *vm,
+ struct amdgpu_vm_pt *parent,
+ unsigned level)
can we move level to struct amdgpu_vm_pt?
I considered this as well, but then abandoned the approach and moved
to using it as parameter again.
The general problem is that amdgpu_vm_pt is already *WAY* to big, we
use 60 bytes to manage 4K in the worst case.
Working on getting this down to something sane again, but adding the
level here just to save passing it as parameter during the destruction
would make it worse.
Ping? Any more objections to this patch or can I commit it?
Wanted to commit those up till patch #7, then add your work to reverse
the level and then put patch #8 on top.
Christian.
Christian.
otherwise, it looks ok to me.
Regards,
David Zhou
{
- unsigned pt_idx;
+ unsigned pt_idx, num_entries;
/*
* Recurse into the subdirectories. This recursion is harmless
because
* we only have a maximum of 5 layers.
*/
- for (pt_idx = 0; pt_idx <= parent->last_entry_used; ++pt_idx) {
+ num_entries = amdgpu_vm_num_entries(adev, level);
+ for (pt_idx = 0; pt_idx < num_entries; ++pt_idx) {
struct amdgpu_vm_pt *entry = &parent->entries[pt_idx];
if (!entry->base.bo)
@@ -1207,7 +1207,7 @@ static void amdgpu_vm_invalidate_level(struct
amdgpu_vm *vm,
if (list_empty(&entry->base.vm_status))
list_add(&entry->base.vm_status, &vm->relocated);
spin_unlock(&vm->status_lock);
- amdgpu_vm_invalidate_level(vm, entry);
+ amdgpu_vm_invalidate_level(adev, vm, entry, level + 1);
}
}
@@ -1249,7 +1249,8 @@ int amdgpu_vm_update_directories(struct
amdgpu_device *adev,
r = amdgpu_vm_update_pde(adev, vm, pt, entry);
if (r) {
- amdgpu_vm_invalidate_level(vm, &vm->root);
+ amdgpu_vm_invalidate_level(adev, vm,
+ &vm->root, 0);
return r;
}
spin_lock(&vm->status_lock);
@@ -1652,7 +1653,7 @@ static int amdgpu_vm_bo_update_mapping(struct
amdgpu_device *adev,
error_free:
amdgpu_job_free(job);
- amdgpu_vm_invalidate_level(vm, &vm->root);
+ amdgpu_vm_invalidate_level(adev, vm, &vm->root, 0);
return r;
}
@@ -2716,26 +2717,31 @@ int amdgpu_vm_init(struct amdgpu_device
*adev, struct amdgpu_vm *vm,
/**
* amdgpu_vm_free_levels - free PD/PT levels
*
- * @level: PD/PT starting level to free
+ * @adev: amdgpu device structure
+ * @parent: PD/PT starting level to free
+ * @level: level of parent structure
*
* Free the page directory or page table level and all sub levels.
*/
-static void amdgpu_vm_free_levels(struct amdgpu_vm_pt *level)
+static void amdgpu_vm_free_levels(struct amdgpu_device *adev,
+ struct amdgpu_vm_pt *parent,
+ unsigned level)
{
- unsigned i;
+ unsigned i, num_entries = amdgpu_vm_num_entries(adev, level);
- if (level->base.bo) {
- list_del(&level->base.bo_list);
- list_del(&level->base.vm_status);
- amdgpu_bo_unref(&level->base.bo->shadow);
- amdgpu_bo_unref(&level->base.bo);
+ if (parent->base.bo) {
+ list_del(&parent->base.bo_list);
+ list_del(&parent->base.vm_status);
+ amdgpu_bo_unref(&parent->base.bo->shadow);
+ amdgpu_bo_unref(&parent->base.bo);
}
- if (level->entries)
- for (i = 0; i <= level->last_entry_used; i++)
- amdgpu_vm_free_levels(&level->entries[i]);
+ if (parent->entries)
+ for (i = 0; i < num_entries; i++)
+ amdgpu_vm_free_levels(adev
Re: [PATCH] amdgpu: disable GPU reset if amdgpu.lockup_timeout=0
Am 11.12.2017 um 22:29 schrieb Marek Olšák:
From: Marek Olšák
Signed-off-by: Marek Olšák
---
Is this really correct? I have no easy way to test it.
It's a step in the right direction, but I would rather vote for
something else:
Instead of disabling the timeout by default we only disable the GPU
reset/recovery.
The idea is to add a new parameter amdgpu_gpu_recovery which makes
amdgpu_gpu_recover only prints out an error and doesn't touch the GPU at
all (on bare metal systems).
Then we finally set the amdgpu_lockup_timeout to a non zero value by
default.
Andrey could you take care of this when you have time?
Thanks,
Christian.
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 8d03baa..56c41cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3018,20 +3018,24 @@ static int amdgpu_reset_sriov(struct amdgpu_device
*adev, uint64_t *reset_flags,
*
* Attempt to reset the GPU if it has hung (all asics).
* Returns 0 for success or an error on failure.
*/
int amdgpu_gpu_recover(struct amdgpu_device *adev, struct amdgpu_job *job)
{
struct drm_atomic_state *state = NULL;
uint64_t reset_flags = 0;
int i, r, resched;
+ /* amdgpu.lockup_timeout=0 disables GPU reset. */
+ if (amdgpu_lockup_timeout == 0)
+ return 0;
+
if (!amdgpu_check_soft_reset(adev)) {
DRM_INFO("No hardware hang detected. Did some blocks stall?\n");
return 0;
}
dev_info(adev->dev, "GPU reset begin!\n");
mutex_lock(&adev->lock_reset);
atomic_inc(&adev->gpu_reset_counter);
adev->in_gpu_reset = 1;
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 02/13] fbdev: add remove_conflicting_pci_framebuffers()
Hi Emil, On Fri, Dec 01, 2017 at 02:40:11PM +, Emil Velikov wrote: > On 30 November 2017 at 23:49, Sudip Mukherjee > wrote: > > Hi Daniel, > > > > On Wed, Nov 29, 2017 at 10:56:34AM +0100, Daniel Vetter wrote: > > submit it to dri-devel. > > > A crazy idea, mostly towards Tedd and Sudip: > > Start small and build gradually. An example split for separate patch series: > > - one HW, basic setup + atomic KMS > - add second HW > - more KMS features > - fancy memory management > - 2D/3D/other acceleration > > The driver as seen above tries to do all of the above (almost, it's not > atomic) > at once - 40k loc. > > Someone familiar with the code can quickly split it up and while doing > so, feed it through checkpatch. I can try but will be very tough since I have to go through the code to get familiar with it and, as mentioned before, its not part of my dayjob, so time will be a problem. Developing from scratch takes much more time than fixing something. > Current code is _very_ far from kernel coding style, plus the > copyright blurp is very disturbing: I will fix the coding style before my first submission to dri-devel, which should be in January after I have setup my desktop with the hardware for testing. The copyright thing - I am sure Teddy can talk to his company and will confirm that we can change it to the way kernel code is done. -- Regards Sudip ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] drm/amdgpu: always use polling mem to update wptr v2
One minor style nit pick:
+ } else
+ ring->use_pollmem = true;
When the true part of an "if/else" uses {} the false part should use it
as well.
With that fixed and a Monks comment addressed the patch is Reviewed-by:
Christian König .
Christian.
Am 12.12.2017 um 08:33 schrieb Liu, Monk:
Please make description in your comments more detail, e.g. :
We have two sources to update wptr registers for sdma3: 1) wptr_poll and
2) is doorbell. When doorbell and wptr_poll are both enabled on sdma3,
there will be collision hit in occasion between those two sources when
ucode and h/w are doing the updating on wptr register in parallel.
With that addressed:
Reviewed-by: Monk Liu
-Original Message-
From: Pixel Ding [mailto:pixel.d...@amd.com]
Sent: 2017年12月12日 15:26
To: amd-gfx@lists.freedesktop.org; Liu, Monk
Cc: Ding, Pixel
Subject: [PATCH] drm/amdgpu: always use polling mem to update wptr v2
Both doorbell and polling mem are working on Tonga VF. SDMA issue happens
because SDMA engine accepts doorbell writes even if it's inactive, that
introduces conflict when world switch routine update wptr though polling
memory. Use polling mem in driver too.
v2:
- standalone pollmem code path
Signed-off-by: Pixel Ding
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 26 ++
2 files changed, 19 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index a405022..dcc7cf1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -188,6 +188,7 @@ struct amdgpu_ring {
uint64_teop_gpu_addr;
u32 doorbell_index;
booluse_doorbell;
+ booluse_pollmem;
unsignedwptr_offs;
unsignedfence_offs;
uint64_tcurrent_ctx;
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index c8c93f9..c506e2e 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -355,7 +355,7 @@ static uint64_t sdma_v3_0_ring_get_wptr(struct amdgpu_ring
*ring)
struct amdgpu_device *adev = ring->adev;
u32 wptr;
- if (ring->use_doorbell) {
+ if (ring->use_doorbell || ring->use_pollmem) {
/* XXX check if swapping is necessary on BE */
wptr = ring->adev->wb.wb[ring->wptr_offs] >> 2;
} else {
@@ -380,10 +380,13 @@ static void sdma_v3_0_ring_set_wptr(struct amdgpu_ring
*ring)
if (ring->use_doorbell) {
u32 *wb = (u32 *)&adev->wb.wb[ring->wptr_offs];
-
/* XXX check if swapping is necessary on BE */
WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2));
WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr) <<
2);
+ } else if (ring->use_pollmem) {
+ u32 *wb = (u32 *)&adev->wb.wb[ring->wptr_offs];
+
+ WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2));
} else {
int me = (ring == &ring->adev->sdma.instance[0].ring) ? 0 : 1;
@@ -718,10 +721,14 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev)
WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI + sdma_offsets[i],
upper_32_bits(wptr_gpu_addr));
wptr_poll_cntl = RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL +
sdma_offsets[i]);
- if (amdgpu_sriov_vf(adev))
- wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl,
SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 1);
+ if (ring->use_pollmem)
+ wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl,
+
SDMA0_GFX_RB_WPTR_POLL_CNTL,
+ ENABLE, 1);
else
- wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl,
SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 0);
+ wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl,
+
SDMA0_GFX_RB_WPTR_POLL_CNTL,
+ ENABLE, 0);
WREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i],
wptr_poll_cntl);
/* enable DMA RB */
@@ -1203,9 +1210,12 @@ static int sdma_v3_0_sw_init(void *handle)
for (i = 0; i < adev->sdma.num_instances; i++) {
ring = &adev->sdma.instance[i].ring;
ring->ring_obj = NULL;
- ring->use_doorbell = true;
- ring->doorbell_index = (i == 0) ?
- AMDGPU_DOORBELL_sDMA_ENGINE0 :
AMDGPU_DOORBELL_sDMA_ENGINE1;
+ if (!amdgpu_sriov_vf(adev)) {
+ ring->use
Re: [PATCH 22/37] drm/amdkfd: Add perf counters to topology
On Mon, Dec 11, 2017 at 9:54 PM, Felix Kuehling wrote:
> On 2017-12-11 10:23 AM, Oded Gabbay wrote:
>> On Sat, Dec 9, 2017 at 6:09 AM, Felix Kuehling
>> wrote:
>>> From: Amber Lin
>>>
>>> For hardware blocks whose performance counters are accessed via MMIO
>>> registers, KFD provides the support for those privileged blocks. IOMMU is
>>> one of those privileged blocks. Most performance counter properties
>>> required by Thunk are available at /sys/bus/event_source/devices/amd_iommu.
>>> This patch adds properties to topology in KFD sysfs for information not
>>> available in /sys/bus/event_source/devices/amd_iommu. They are shown at
>>> /sys/devices/virtual/kfd/kfd/topology/nodes/0/perf/iommu/ formatted as
>>> /sys/devices/virtual/kfd/kfd/topology/nodes/0/perf//, i.e.
>>> /sys/devices/virtual/kfd/kfd/topology/nodes/0/perf/iommu/max_concurrent.
>>> For dGPUs, who don't have IOMMU, nothing appears under
>>> /sys/devices/virtual/kfd/kfd/topology/nodes/0/perf.
>> I don't feel comfortable with this patch. It seems to me you didn't
>> have anywhere to put these counters so you just stuck them in a place
>> the thunk already reads because it was "convenient" for you to do it.
>> But, as you point out in a comment later, these counters have nothing
>> to do with topology.
>> So this just feels wrong and I would like to:
>>
>> a. get additional opinions on it. Christian ? Alex ? What do you think
>> ? How the GPU's GFX counters are exposed ?
>> b. Ask why not use IOCTL to get the counters ?
>
> I see the performance counter information similar to other information
> provided in the topology, such as memory, caches, CUs, etc. That's why
> it makes sense for me to report it in the topology.
>
> If this is controversial, I can drop the patch for now. It's not
> critically needed for enabling dGPU support.
>
> Regards,
> Felix
Felix,
Is the perf counter information part of the snapshot that the thunk
takes before opening the device, or is it constantly being sampled ?
If its a oneshot thing, than I think that's somehow acceptable.
Oded
>
>>
>> btw, I tried to search for other drivers that do this (expose perf
>> counters in sysfs) and didn't find any (it wasn't an exhaustive search
>> so I may have missed).
>>
>> Thanks,
>> Oded
>>
>>
>>
>>
>>> Signed-off-by: Amber Lin
>>> Signed-off-by: Kent Russell
>>> Signed-off-by: Felix Kuehling
>>> ---
>>> drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 116
>>> +-
>>> drivers/gpu/drm/amd/amdkfd/kfd_topology.h | 13
>>> 2 files changed, 127 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
>>> b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
>>> index 7fe7ee0..52d20f5 100644
>>> --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
>>> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
>>> @@ -104,6 +104,7 @@ static void kfd_release_topology_device(struct
>>> kfd_topology_device *dev)
>>> struct kfd_mem_properties *mem;
>>> struct kfd_cache_properties *cache;
>>> struct kfd_iolink_properties *iolink;
>>> + struct kfd_perf_properties *perf;
>>>
>>> list_del(&dev->list);
>>>
>>> @@ -128,6 +129,13 @@ static void kfd_release_topology_device(struct
>>> kfd_topology_device *dev)
>>> kfree(iolink);
>>> }
>>>
>>> + while (dev->perf_props.next != &dev->perf_props) {
>>> + perf = container_of(dev->perf_props.next,
>>> + struct kfd_perf_properties, list);
>>> + list_del(&perf->list);
>>> + kfree(perf);
>>> + }
>>> +
>>> kfree(dev);
>>> }
>>>
>>> @@ -162,6 +170,7 @@ struct kfd_topology_device *kfd_create_topology_device(
>>> INIT_LIST_HEAD(&dev->mem_props);
>>> INIT_LIST_HEAD(&dev->cache_props);
>>> INIT_LIST_HEAD(&dev->io_link_props);
>>> + INIT_LIST_HEAD(&dev->perf_props);
>>>
>>> list_add_tail(&dev->list, device_list);
>>>
>>> @@ -328,6 +337,39 @@ static struct kobj_type cache_type = {
>>> .sysfs_ops = &cache_ops,
>>> };
>>>
>>> +/** Sysfs of Performance Counters **/
>>> +
>>> +struct kfd_perf_attr {
>>> + struct kobj_attribute attr;
>>> + uint32_t data;
>>> +};
>>> +
>>> +static ssize_t perf_show(struct kobject *kobj, struct kobj_attribute
>>> *attrs,
>>> + char *buf)
>>> +{
>>> + struct kfd_perf_attr *attr;
>>> +
>>> + buf[0] = 0;
>>> + attr = container_of(attrs, struct kfd_perf_attr, attr);
>>> + if (!attr->data) /* invalid data for PMC */
>>> + return 0;
>>> + else
>>> + return sysfs_show_32bit_val(buf, attr->data);
>>> +}
>>> +
>>> +#define KFD_PERF_DESC(_name, _data)\
>>> +{ \
>>> + .attr = __ATTR(_name, 0444, perf_show, NULL), \
>>> + .data = _data, \
>>> +}
>>> +
>>> +static struct kfd_perf_a
