[PATCH 1/2] drm/amd/pp: Read vbios vddc limit before use them
Use the vddc limit before read them from vbios
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 1c97751..c483d11 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -289,7 +289,15 @@ static int vega10_odn_initial_default_setting(struct
pp_hwmgr *hwmgr)
struct phm_ppt_v1_voltage_lookup_table *vddc_lookup_table;
struct phm_ppt_v1_clock_voltage_dependency_table *dep_table[3];
struct phm_ppt_v1_clock_voltage_dependency_table *od_table[3];
+ struct pp_atomfwctrl_avfs_parameters avfs_params = {0};
uint32_t i;
+ int result;
+
+ result = pp_atomfwctrl_get_avfs_information(hwmgr, &avfs_params);
+ if (!result) {
+ data->odn_dpm_table.max_vddc = avfs_params.ulMaxVddc;
+ data->odn_dpm_table.min_vddc = avfs_params.ulMinVddc;
+ }
od_lookup_table = &odn_table->vddc_lookup_table;
vddc_lookup_table = table_info->vddc_lookup_table;
@@ -2072,9 +2080,6 @@ static int vega10_populate_avfs_parameters(struct
pp_hwmgr *hwmgr)
if (data->smu_features[GNLD_AVFS].supported) {
result = pp_atomfwctrl_get_avfs_information(hwmgr,
&avfs_params);
if (!result) {
- data->odn_dpm_table.max_vddc = avfs_params.ulMaxVddc;
- data->odn_dpm_table.min_vddc = avfs_params.ulMinVddc;
-
pp_table->MinVoltageVid = (uint8_t)
convert_to_vid((uint16_t)(avfs_params.ulMinVddc));
pp_table->MaxVoltageVid = (uint8_t)
--
1.9.1
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[PATCH 2/2] drm/amd/pp: Update clk with od setting when set power state
This can fix the issue resume from S3, the user's OD setting
were reverted to default.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index c483d11..7147e03 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -3259,10 +3259,25 @@ static int
vega10_populate_and_upload_sclk_mclk_dpm_levels(
{
int result = 0;
struct vega10_hwmgr *data = hwmgr->backend;
+ struct vega10_dpm_table *dpm_table = &data->dpm_table;
+ struct vega10_odn_dpm_table *odn_table = &(data->odn_dpm_table);
+ struct vega10_odn_clock_voltage_dependency_table *odn_clk_table =
&(odn_table->vdd_dep_on_sclk);
+ int count;
if (!data->need_update_dpm_table)
return 0;
+ if (hwmgr->od_enabled && data->need_update_dpm_table &
DPMTABLE_OD_UPDATE_SCLK) {
+ for (count = 0; count < dpm_table->gfx_table.count; count++)
+ dpm_table->gfx_table.dpm_levels[count].value =
odn_clk_table->entries[count].clk;
+ }
+
+ odn_clk_table = &(odn_table->vdd_dep_on_mclk);
+ if (hwmgr->od_enabled && data->need_update_dpm_table &
DPMTABLE_OD_UPDATE_MCLK) {
+ for (count = 0; count < dpm_table->mem_table.count; count++)
+ dpm_table->mem_table.dpm_levels[count].value =
odn_clk_table->entries[count].clk;
+ }
+
if (data->need_update_dpm_table &
(DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK +
DPMTABLE_UPDATE_SOCCLK)) {
result = vega10_populate_all_graphic_levels(hwmgr);
--
1.9.1
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[PATCH 1/2] drm/amd/pp: Add ACP PG support in SMU
when ACP block not enabled, we power off
acp block to save power.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c| 18 ++
drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 21 -
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h| 1 +
3 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index 7a646f9..da4ebff 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -1181,6 +1181,21 @@ static int pp_dpm_powergate_gfx(void *handle, bool gate)
return hwmgr->hwmgr_func->powergate_gfx(hwmgr, gate);
}
+static void pp_dpm_powergate_acp(void *handle, bool gate)
+{
+ struct pp_hwmgr *hwmgr = handle;
+
+ if (!hwmgr || !hwmgr->pm_en)
+ return;
+
+ if (hwmgr->hwmgr_func->powergate_acp == NULL) {
+ pr_info("%s was not implemented.\n", __func__);
+ return;
+ }
+
+ hwmgr->hwmgr_func->powergate_acp(hwmgr, gate);
+}
+
static int pp_set_powergating_by_smu(void *handle,
uint32_t block_type, bool gate)
{
@@ -1200,6 +1215,9 @@ static int pp_set_powergating_by_smu(void *handle,
case AMD_IP_BLOCK_TYPE_GFX:
ret = pp_dpm_powergate_gfx(handle, gate);
break;
+ case AMD_IP_BLOCK_TYPE_ACP:
+ pp_dpm_powergate_acp(handle, gate);
+ break;
default:
break;
}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
index 288802f..cafa822 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
@@ -663,8 +663,13 @@ static void smu8_init_power_gate_state(struct pp_hwmgr
*hwmgr)
data->uvd_power_gated = false;
data->vce_power_gated = false;
data->samu_power_gated = false;
+#ifdef CONFIG_DRM_AMD_ACP
data->acp_power_gated = false;
- data->pgacpinit = true;
+#else
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF);
+ data->acp_power_gated = true;
+#endif
+
}
static void smu8_init_sclk_threshold(struct pp_hwmgr *hwmgr)
@@ -1885,6 +1890,19 @@ static int smu8_enable_disable_vce_dpm(struct pp_hwmgr
*hwmgr, bool enable)
}
+static void smu8_dpm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate)
+{
+ struct smu8_hwmgr *data = hwmgr->backend;
+
+ if (data->acp_power_gated == bgate)
+ return;
+
+ if (bgate)
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF);
+ else
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerON);
+}
+
static void smu8_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
{
struct smu8_hwmgr *data = hwmgr->backend;
@@ -1950,6 +1968,7 @@ static void smu8_dpm_powergate_vce(struct pp_hwmgr
*hwmgr, bool bgate)
.powerdown_uvd = smu8_dpm_powerdown_uvd,
.powergate_uvd = smu8_dpm_powergate_uvd,
.powergate_vce = smu8_dpm_powergate_vce,
+ .powergate_acp = smu8_dpm_powergate_acp,
.get_mclk = smu8_dpm_get_mclk,
.get_sclk = smu8_dpm_get_sclk,
.patch_boot_state = smu8_dpm_patch_boot_state,
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index d3d9626..7e58a0d 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -247,6 +247,7 @@ struct pp_hwmgr_func {
int (*powerdown_uvd)(struct pp_hwmgr *hwmgr);
void (*powergate_vce)(struct pp_hwmgr *hwmgr, bool bgate);
void (*powergate_uvd)(struct pp_hwmgr *hwmgr, bool bgate);
+ void (*powergate_acp)(struct pp_hwmgr *hwmgr, bool bgate);
uint32_t (*get_mclk)(struct pp_hwmgr *hwmgr, bool low);
uint32_t (*get_sclk)(struct pp_hwmgr *hwmgr, bool low);
int (*power_state_set)(struct pp_hwmgr *hwmgr,
--
1.9.1
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[PATCH 2/2] drm/amdgpu: Power down acp if board uses AZ
if board uses AZ rather than ACP, we power down acp
through smu to save power.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index 71efcf3..4e18a88 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -35,6 +35,7 @@
#include "acp_gfx_if.h"
+
#define ACP_TILE_ON_MASK 0x03
#define ACP_TILE_OFF_MASK 0x02
#define ACP_TILE_ON_RETAIN_REG_MASK0x1f
@@ -289,11 +290,12 @@ static int acp_hw_init(void *handle)
r = amd_acp_hw_init(adev->acp.cgs_device,
ip_block->version->major, ip_block->version->minor);
/* -ENODEV means board uses AZ rather than ACP */
- if (r == -ENODEV)
+ if (r == -ENODEV) {
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP,
true);
return 0;
- else if (r)
+ } else if (r) {
return r;
-
+ }
if (adev->rmmio_size == 0 || adev->rmmio_size < 0x5289)
return -EINVAL;
--
1.9.1
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[PATCH] MAINTAINERS: add new TTM maintainers
Roger unfortunately doesn't work for AMD any longer. So add Rui and Jerry as co-maintainer as well. Signed-off-by: Christian König --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 9d5eeff51b5f..e613df455ae0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4884,7 +4884,8 @@ F:Documentation/gpu/xen-front.rst DRM TTM SUBSYSTEM M: Christian Koenig -M: Roger He +M: Huang Rui +M: Junwei Zhang T: git git://people.freedesktop.org/~agd5f/linux S: Maintained L: dri-de...@lists.freedesktop.org -- 2.14.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] mm, oom: distinguish blockable mode for mmu notifiers
Does anybody see any reasons why this should get into mmotm tree? I do not want to rush this in but if general feeling is to push it for the upcoming merge window then I will not object. -- Michal Hocko SUSE Labs ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] drm/amdgpu: lock and unlock console only for amdgpu_fbdev_set_suspend [V2]
On 2018-07-18 12:24 PM, Shirish S wrote: > [Why] > While the console_lock is held, console output will be buffered, till > its unlocked it wont be emitted, hence its ideal to unlock sooner to enable > debugging/detecting/fixing of any issue in the remaining sequence of events > in resume path. Maybe this could be clarified that the concern is about consoles other than fbcon on this device, e.g. a serial console. > @@ -2746,7 +2743,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool > resume, bool fbcon) > > amdgpu_fence_driver_resume(adev); > > - > r = amdgpu_device_ip_late_init(adev); > if (r) > goto unlock; Drop this hunk. With the above fixed, Reviewed-by: Michel Dänzer Possible follow-up work: * Move the console_(un)lock calls into amdgpu_fbdev_set_suspend, or maybe use drm_fb_helper_set_suspend_unlocked instead of locking ourselves * Move the amdgpu_fbdev_set_suspend call in amdgpu_device_suspend further up, at least before the pci_set_power_state call. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/amdgpu: lock and unlock console only for amdgpu_fbdev_set_suspend [V3]
[Why]
While the console_lock is held, console output will be buffered, till
its unlocked it wont be emitted, hence its ideal to unlock sooner to enable
debugging/detecting/fixing of any issue in the remaining sequence of events
in resume path.
The concern here is about consoles other than fbcon on the device,
e.g. a serial console
[How]
This patch restructures the console_lock, console_unlock around
amdgpu_fbdev_set_suspend() and moves this new block appropriately.
V2: Kept amdgpu_fbdev_set_suspend after pci_set_power_state
V3: Updated the commit message to clarify the real concern that this patch
addresses.
Signed-off-by: Shirish S
Reviewed-by: Michel Dänzer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..c1eed94 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2720,9 +2720,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
return 0;
- if (fbcon)
- console_lock();
-
if (resume) {
pci_set_power_state(dev->pdev, PCI_D0);
pci_restore_state(dev->pdev);
@@ -2784,6 +2781,9 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
}
drm_modeset_unlock_all(dev);
}
+ console_lock();
+ amdgpu_fbdev_set_suspend(adev, 0);
+ console_unlock();
}
drm_kms_helper_poll_enable(dev);
@@ -2808,13 +2808,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
dev->dev->power.disable_depth--;
#endif
- if (fbcon)
- amdgpu_fbdev_set_suspend(adev, 0);
-
unlock:
- if (fbcon)
- console_unlock();
-
return r;
}
--
2.7.4
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[PATCH xf86-video-amdgpu] Free previous xf86CrtcRec gamma LUT memory
From: Michel Dänzer
We were leaking it.
Also, don't bother allocating new memory if it's already the expected
size.
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 1aefd199b..e947ca979 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -3629,13 +3629,18 @@ Bool drmmode_setup_colormap(ScreenPtr pScreen,
ScrnInfoPtr pScrn)
for (i = 0; i < xf86_config->num_crtc; i++) {
xf86CrtcPtr crtc = xf86_config->crtc[i];
- void *gamma = malloc(1024 * 3 * sizeof(CARD16));
+ void *gamma;
+ if (crtc->gamma_size == 1024)
+ continue;
+
+ gamma = malloc(1024 * 3 * sizeof(CARD16));
if (!gamma) {
ErrorF("Failed to allocate gamma LUT
memory\n");
return FALSE;
}
+ free(crtc->gamma_red);
crtc->gamma_size = 1024;
crtc->gamma_red = gamma;
crtc->gamma_green = crtc->gamma_red +
crtc->gamma_size;
--
2.18.0
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Re: [PATCH] drm/amdgpu: lock and unlock console only for amdgpu_fbdev_set_suspend [V3]
On 2018-07-19 11:29 AM, Shirish S wrote: > [Why] > While the console_lock is held, console output will be buffered, till > its unlocked it wont be emitted, hence its ideal to unlock sooner to enable > debugging/detecting/fixing of any issue in the remaining sequence of events > in resume path. > The concern here is about consoles other than fbcon on the device, > e.g. a serial console > > [How] > This patch restructures the console_lock, console_unlock around > amdgpu_fbdev_set_suspend() and moves this new block appropriately. > > V2: Kept amdgpu_fbdev_set_suspend after pci_set_power_state > V3: Updated the commit message to clarify the real concern that this patch > addresses. > Signed-off-by: Shirish S > Reviewed-by: Michel Dänzer > > [...] > > drm_kms_helper_poll_enable(dev); > @@ -2808,13 +2808,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool > resume, bool fbcon) > dev->dev->power.disable_depth--; > #endif > > - if (fbcon) > - amdgpu_fbdev_set_suspend(adev, 0); > - > unlock: > - if (fbcon) > - console_unlock(); > - > return r; > } > > Oh, please remove the now useless unlock label as well. Sorry I missed that before. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/amdgpu: lock and unlock console only for amdgpu_fbdev_set_suspend [V4]
[Why]
While the console_lock is held, console output will be buffered, till
its unlocked it wont be emitted, hence its ideal to unlock sooner to enable
debugging/detecting/fixing of any issue in the remaining sequence of events
in resume path.
The concern here is about consoles other than fbcon on the device,
e.g. a serial console
[How]
This patch restructures the console_lock, console_unlock around
amdgpu_fbdev_set_suspend() and moves this new block appropriately.
V2: Kept amdgpu_fbdev_set_suspend after pci_set_power_state
V3: Updated the commit message to clarify the real concern that this patch
addresses.
V4: code clean-up.
Signed-off-by: Shirish S
Reviewed-by: Michel Dänzer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 21 ++---
1 file changed, 6 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..096ad09 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2720,15 +2720,12 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
return 0;
- if (fbcon)
- console_lock();
-
if (resume) {
pci_set_power_state(dev->pdev, PCI_D0);
pci_restore_state(dev->pdev);
r = pci_enable_device(dev->pdev);
if (r)
- goto unlock;
+ return r;
}
/* post card */
@@ -2741,7 +2738,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
r = amdgpu_device_ip_resume(adev);
if (r) {
DRM_ERROR("amdgpu_device_ip_resume failed (%d).\n", r);
- goto unlock;
+ return r;
}
amdgpu_fence_driver_resume(adev);
@@ -2749,7 +2746,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
r = amdgpu_device_ip_late_init(adev);
if (r)
- goto unlock;
+ return r;
/* pin cursors */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
@@ -2784,6 +2781,9 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
}
drm_modeset_unlock_all(dev);
}
+ console_lock();
+ amdgpu_fbdev_set_suspend(adev, 0);
+ console_unlock();
}
drm_kms_helper_poll_enable(dev);
@@ -2807,15 +2807,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
#ifdef CONFIG_PM
dev->dev->power.disable_depth--;
#endif
-
- if (fbcon)
- amdgpu_fbdev_set_suspend(adev, 0);
-
-unlock:
- if (fbcon)
- console_unlock();
-
- return r;
}
/**
--
2.7.4
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[PATCH] drm/amdgpu: lock and unlock console only for amdgpu_fbdev_set_suspend [V5]
[Why]
While the console_lock is held, console output will be buffered, till
its unlocked it wont be emitted, hence its ideal to unlock sooner to enable
debugging/detecting/fixing of any issue in the remaining sequence of events
in resume path.
The concern here is about consoles other than fbcon on the device,
e.g. a serial console
[How]
This patch restructures the console_lock, console_unlock around
amdgpu_fbdev_set_suspend() and moves this new block appropriately.
V2: Kept amdgpu_fbdev_set_suspend after pci_set_power_state
V3: Updated the commit message to clarify the real concern that this patch
addresses.
V4: code clean-up.
V5: fixed return value
Signed-off-by: Shirish S
Reviewed-by: Michel Dänzer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 +++---
1 file changed, 7 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..cf9af28 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2720,15 +2720,12 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
return 0;
- if (fbcon)
- console_lock();
-
if (resume) {
pci_set_power_state(dev->pdev, PCI_D0);
pci_restore_state(dev->pdev);
r = pci_enable_device(dev->pdev);
if (r)
- goto unlock;
+ return r;
}
/* post card */
@@ -2741,7 +2738,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
r = amdgpu_device_ip_resume(adev);
if (r) {
DRM_ERROR("amdgpu_device_ip_resume failed (%d).\n", r);
- goto unlock;
+ return r;
}
amdgpu_fence_driver_resume(adev);
@@ -2749,7 +2746,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
r = amdgpu_device_ip_late_init(adev);
if (r)
- goto unlock;
+ return r;
/* pin cursors */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
@@ -2784,6 +2781,9 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
}
drm_modeset_unlock_all(dev);
}
+ console_lock();
+ amdgpu_fbdev_set_suspend(adev, 0);
+ console_unlock();
}
drm_kms_helper_poll_enable(dev);
@@ -2807,15 +2807,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool
resume, bool fbcon)
#ifdef CONFIG_PM
dev->dev->power.disable_depth--;
#endif
-
- if (fbcon)
- amdgpu_fbdev_set_suspend(adev, 0);
-
-unlock:
- if (fbcon)
- console_unlock();
-
- return r;
+ return 0;
}
/**
--
2.7.4
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[PATCH xf86-video-amdgpu] Don't use DRM_IOCTL_GEM_FLINK in create_pixmap_for_fbcon
From: Michel Dänzer
We don't need it.
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 39 +++
1 file changed, 11 insertions(+), 28 deletions(-)
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index e947ca979..bf8b1a8b6 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -355,13 +355,11 @@ static PixmapPtr
create_pixmap_for_fbcon(drmmode_ptr drmmode,
ScrnInfoPtr pScrn, int fbcon_id)
{
+ ScreenPtr pScreen = pScrn->pScreen;
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
PixmapPtr pixmap = info->fbcon_pixmap;
- struct amdgpu_buffer *bo;
drmModeFBPtr fbcon;
- struct drm_gem_flink flink;
- struct amdgpu_bo_import_result import = {0};
if (pixmap)
return pixmap;
@@ -375,36 +373,21 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
fbcon->height != pScrn->virtualY)
goto out_free_fb;
- flink.handle = fbcon->handle;
- if (ioctl(pAMDGPUEnt->fd, DRM_IOCTL_GEM_FLINK, &flink) < 0) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Couldn't flink fbcon handle\n");
+ pixmap = fbCreatePixmap(pScreen, 0, 0, fbcon->depth, 0);
+ if (!pixmap)
goto out_free_fb;
- }
- bo = calloc(1, sizeof(struct amdgpu_buffer));
- if (!bo) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Couldn't allocate bo for fbcon handle\n");
- goto out_free_fb;
- }
- bo->ref_count = 1;
+ pScreen->ModifyPixmapHeader(pixmap, fbcon->width, fbcon->height, 0, 0,
+ fbcon->pitch, NULL);
+ pixmap->devPrivate.ptr = NULL;
- if (amdgpu_bo_import(pAMDGPUEnt->pDev,
-amdgpu_bo_handle_type_gem_flink_name, flink.name,
-&import) != 0) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Couldn't import BO for fbcon handle\n");
- goto out_free_bo;
+ if (!glamor_egl_create_textured_pixmap(pixmap, fbcon->handle,
+ pixmap->devKind)) {
+ pScreen->DestroyPixmap(pixmap);
+ pixmap = NULL;
}
- bo->bo.amdgpu = import.buf_handle;
-
- pixmap = drmmode_create_bo_pixmap(pScrn, fbcon->width, fbcon->height,
- fbcon->depth, fbcon->bpp,
- fbcon->pitch, bo);
+
info->fbcon_pixmap = pixmap;
-out_free_bo:
- amdgpu_bo_unref(&bo);
out_free_fb:
drmModeFreeFB(fbcon);
return pixmap;
--
2.18.0
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Re: [PATCH 1/2] drm/amdgpu: remove superflous UVD encode entity
On 07/18/2018 02:44 PM, Christian König wrote:
Not sure what that was every used for, but now it is completely unused.
UVD having it's own scheduler entity is inherited from UVD physical
mode, which need send session destroy ib when session is done to free
the handle in firmware.
Because we cannot call amdgpu_ib_schedule directly, so need the entity
to put this job to the scheduler.
The patch is:
Reviewed-by: Leo Liu
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 1 -
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 12
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 14 --
3 files changed, 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
index 8b23a1b00c76..cae3f526216b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
@@ -48,7 +48,6 @@ struct amdgpu_uvd_inst {
struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS];
struct amdgpu_irq_src irq;
struct drm_sched_entity entity;
- struct drm_sched_entity entity_enc;
uint32_tsrbm_soft_reset;
};
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index b796dc8375cd..598dbeaba636 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -418,16 +418,6 @@ static int uvd_v6_0_sw_init(void *handle)
adev->uvd.num_enc_rings = 0;
DRM_INFO("UVD ENC is disabled\n");
- } else {
- struct drm_sched_rq *rq;
- ring = &adev->uvd.inst->ring_enc[0];
- rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
- r = drm_sched_entity_init(&adev->uvd.inst->entity_enc,
- &rq, 1, NULL);
- if (r) {
- DRM_ERROR("Failed setting up UVD ENC run queue.\n");
- return r;
- }
}
r = amdgpu_uvd_resume(adev);
@@ -463,8 +453,6 @@ static int uvd_v6_0_sw_fini(void *handle)
return r;
if (uvd_v6_0_enc_support(adev)) {
- drm_sched_entity_destroy(&adev->uvd.inst->ring_enc[0].sched,
&adev->uvd.inst->entity_enc);
-
for (i = 0; i < adev->uvd.num_enc_rings; ++i)
amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index 89fe910e5c9a..2192f4536c24 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
@@ -389,7 +389,6 @@ static int uvd_v7_0_early_init(void *handle)
static int uvd_v7_0_sw_init(void *handle)
{
struct amdgpu_ring *ring;
- struct drm_sched_rq *rq;
int i, j, r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -421,17 +420,6 @@ static int uvd_v7_0_sw_init(void *handle)
DRM_INFO("PSP loading UVD firmware\n");
}
- for (j = 0; j < adev->uvd.num_uvd_inst; j++) {
- ring = &adev->uvd.inst[j].ring_enc[0];
- rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
- r = drm_sched_entity_init(&adev->uvd.inst[j].entity_enc,
- &rq, 1, NULL);
- if (r) {
- DRM_ERROR("(%d)Failed setting up UVD ENC run queue.\n",
j);
- return r;
- }
- }
-
r = amdgpu_uvd_resume(adev);
if (r)
return r;
@@ -484,8 +472,6 @@ static int uvd_v7_0_sw_fini(void *handle)
return r;
for (j = 0; j < adev->uvd.num_uvd_inst; ++j) {
- drm_sched_entity_destroy(&adev->uvd.inst[j].ring_enc[0].sched,
&adev->uvd.inst[j].entity_enc);
-
for (i = 0; i < adev->uvd.num_enc_rings; ++i)
amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]);
}
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Re: [PATCH 2/2] drm/amdgpu: clean up UVD instance handling v2
On 07/18/2018 02:44 PM, Christian König wrote:
The whole handle, filp and entity handling is superfluous here.
We should have reviewed that more thoughtfully. It looks like somebody
just made the code instance aware without knowing the background.
Yeah It's only required for UVD without VMID support.
Reviewed-by: Leo Liu
v2: fix one more missed case in amdgpu_uvd_suspend
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 121
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 10 +--
2 files changed, 64 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index d708970244eb..80b5c453f8c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -263,21 +263,20 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
dev_err(adev->dev, "(%d) failed to allocate UVD bo\n",
r);
return r;
}
+ }
- ring = &adev->uvd.inst[j].ring;
- rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
- r = drm_sched_entity_init(&adev->uvd.inst[j].entity, &rq,
- 1, NULL);
- if (r != 0) {
- DRM_ERROR("Failed setting up UVD(%d) run queue.\n", j);
- return r;
- }
-
- for (i = 0; i < adev->uvd.max_handles; ++i) {
- atomic_set(&adev->uvd.inst[j].handles[i], 0);
- adev->uvd.inst[j].filp[i] = NULL;
- }
+ ring = &adev->uvd.inst[0].ring;
+ rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
+ r = drm_sched_entity_init(&adev->uvd.entity, &rq, 1, NULL);
+ if (r) {
+ DRM_ERROR("Failed setting up UVD kernel entity.\n");
+ return r;
}
+ for (i = 0; i < adev->uvd.max_handles; ++i) {
+ atomic_set(&adev->uvd.handles[i], 0);
+ adev->uvd.filp[i] = NULL;
+ }
+
/* from uvd v5.0 HW addressing capacity increased to 64 bits */
if (!amdgpu_device_ip_block_version_cmp(adev, AMD_IP_BLOCK_TYPE_UVD, 5,
0))
adev->uvd.address_64_bit = true;
@@ -306,11 +305,12 @@ int amdgpu_uvd_sw_fini(struct amdgpu_device *adev)
{
int i, j;
+ drm_sched_entity_destroy(&adev->uvd.inst->ring.sched,
+&adev->uvd.entity);
+
for (j = 0; j < adev->uvd.num_uvd_inst; ++j) {
kfree(adev->uvd.inst[j].saved_bo);
- drm_sched_entity_destroy(&adev->uvd.inst[j].ring.sched, &adev->uvd.inst[j].entity);
-
amdgpu_bo_free_kernel(&adev->uvd.inst[j].vcpu_bo,
&adev->uvd.inst[j].gpu_addr,
(void **)&adev->uvd.inst[j].cpu_addr);
@@ -333,20 +333,20 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev)
cancel_delayed_work_sync(&adev->uvd.idle_work);
+ /* only valid for physical mode */
+ if (adev->asic_type < CHIP_POLARIS10) {
+ for (i = 0; i < adev->uvd.max_handles; ++i)
+ if (atomic_read(&adev->uvd.handles[i]))
+ break;
+
+ if (i == adev->uvd.max_handles)
+ return 0;
+ }
+
for (j = 0; j < adev->uvd.num_uvd_inst; ++j) {
if (adev->uvd.inst[j].vcpu_bo == NULL)
continue;
- /* only valid for physical mode */
- if (adev->asic_type < CHIP_POLARIS10) {
- for (i = 0; i < adev->uvd.max_handles; ++i)
- if (atomic_read(&adev->uvd.inst[j].handles[i]))
- break;
-
- if (i == adev->uvd.max_handles)
- continue;
- }
-
size = amdgpu_bo_size(adev->uvd.inst[j].vcpu_bo);
ptr = adev->uvd.inst[j].cpu_addr;
@@ -398,30 +398,27 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev)
void amdgpu_uvd_free_handles(struct amdgpu_device *adev, struct drm_file *filp)
{
- struct amdgpu_ring *ring;
- int i, j, r;
-
- for (j = 0; j < adev->uvd.num_uvd_inst; j++) {
- ring = &adev->uvd.inst[j].ring;
+ struct amdgpu_ring *ring = &adev->uvd.inst[0].ring;
+ int i, r;
- for (i = 0; i < adev->uvd.max_handles; ++i) {
- uint32_t handle =
atomic_read(&adev->uvd.inst[j].handles[i]);
- if (handle != 0 && adev->uvd.inst[j].filp[i] == filp) {
- struct dma_fence *fence;
-
- r = amdgpu_uvd_get_destroy_msg(ring, handle,
- false, &fence);
- if (r) {
-
Re: [PATCH] MAINTAINERS: add new TTM maintainers
On Thu, Jul 19, 2018 at 5:17 AM, Christian König wrote: > Roger unfortunately doesn't work for AMD any longer. So add Rui and > Jerry as co-maintainer as well. > > Signed-off-by: Christian König Acked-by: Alex Deucher David was also interested in helping out as a maintainer. I don't remember if he was more interested in ttm or amdgpu in general, but we should add him too. Alex > --- > MAINTAINERS | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 9d5eeff51b5f..e613df455ae0 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -4884,7 +4884,8 @@ F:Documentation/gpu/xen-front.rst > > DRM TTM SUBSYSTEM > M: Christian Koenig > -M: Roger He > +M: Huang Rui > +M: Junwei Zhang > T: git git://people.freedesktop.org/~agd5f/linux > S: Maintained > L: dri-de...@lists.freedesktop.org > -- > 2.14.1 > > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 2/2] drm/amdgpu: Power down acp if board uses AZ
On Thu, Jul 19, 2018 at 4:46 AM, Rex Zhu wrote:
> if board uses AZ rather than ACP, we power down acp
> through smu to save power.
>
We also need to power it back up in hw_fini and suspend and then power
it back down in resume.
Alex
> Signed-off-by: Rex Zhu
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> index 71efcf3..4e18a88 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> @@ -35,6 +35,7 @@
>
> #include "acp_gfx_if.h"
>
> +
> #define ACP_TILE_ON_MASK 0x03
> #define ACP_TILE_OFF_MASK 0x02
> #define ACP_TILE_ON_RETAIN_REG_MASK0x1f
> @@ -289,11 +290,12 @@ static int acp_hw_init(void *handle)
> r = amd_acp_hw_init(adev->acp.cgs_device,
> ip_block->version->major,
> ip_block->version->minor);
> /* -ENODEV means board uses AZ rather than ACP */
> - if (r == -ENODEV)
> + if (r == -ENODEV) {
> + amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_ACP, true);
> return 0;
> - else if (r)
> + } else if (r) {
> return r;
> -
> + }
> if (adev->rmmio_size == 0 || adev->rmmio_size < 0x5289)
> return -EINVAL;
>
> --
> 1.9.1
>
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Re: [PATCH 1/2] drm/amd/pp: Add ACP PG support in SMU
On Thu, Jul 19, 2018 at 4:46 AM, Rex Zhu wrote:
> when ACP block not enabled, we power off
> acp block to save power.
>
> Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c| 18 ++
> drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 21 -
> drivers/gpu/drm/amd/powerplay/inc/hwmgr.h| 1 +
> 3 files changed, 39 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index 7a646f9..da4ebff 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -1181,6 +1181,21 @@ static int pp_dpm_powergate_gfx(void *handle, bool
> gate)
> return hwmgr->hwmgr_func->powergate_gfx(hwmgr, gate);
> }
>
> +static void pp_dpm_powergate_acp(void *handle, bool gate)
> +{
> + struct pp_hwmgr *hwmgr = handle;
> +
> + if (!hwmgr || !hwmgr->pm_en)
> + return;
> +
> + if (hwmgr->hwmgr_func->powergate_acp == NULL) {
> + pr_info("%s was not implemented.\n", __func__);
> + return;
> + }
> +
> + hwmgr->hwmgr_func->powergate_acp(hwmgr, gate);
> +}
> +
> static int pp_set_powergating_by_smu(void *handle,
> uint32_t block_type, bool gate)
> {
> @@ -1200,6 +1215,9 @@ static int pp_set_powergating_by_smu(void *handle,
> case AMD_IP_BLOCK_TYPE_GFX:
> ret = pp_dpm_powergate_gfx(handle, gate);
> break;
> + case AMD_IP_BLOCK_TYPE_ACP:
> + pp_dpm_powergate_acp(handle, gate);
> + break;
> default:
> break;
> }
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
> index 288802f..cafa822 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
> @@ -663,8 +663,13 @@ static void smu8_init_power_gate_state(struct pp_hwmgr
> *hwmgr)
> data->uvd_power_gated = false;
> data->vce_power_gated = false;
> data->samu_power_gated = false;
> +#ifdef CONFIG_DRM_AMD_ACP
> data->acp_power_gated = false;
> - data->pgacpinit = true;
> +#else
> + smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF);
> + data->acp_power_gated = true;
> +#endif
> +
> }
>
> static void smu8_init_sclk_threshold(struct pp_hwmgr *hwmgr)
> @@ -1885,6 +1890,19 @@ static int smu8_enable_disable_vce_dpm(struct pp_hwmgr
> *hwmgr, bool enable)
> }
>
>
> +static void smu8_dpm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate)
> +{
> + struct smu8_hwmgr *data = hwmgr->backend;
> +
> + if (data->acp_power_gated == bgate)
> + return;
> +
> + if (bgate)
> + smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF);
> + else
> + smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerON);
> +}
> +
> static void smu8_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
> {
> struct smu8_hwmgr *data = hwmgr->backend;
> @@ -1950,6 +1968,7 @@ static void smu8_dpm_powergate_vce(struct pp_hwmgr
> *hwmgr, bool bgate)
> .powerdown_uvd = smu8_dpm_powerdown_uvd,
> .powergate_uvd = smu8_dpm_powergate_uvd,
> .powergate_vce = smu8_dpm_powergate_vce,
> + .powergate_acp = smu8_dpm_powergate_acp,
> .get_mclk = smu8_dpm_get_mclk,
> .get_sclk = smu8_dpm_get_sclk,
> .patch_boot_state = smu8_dpm_patch_boot_state,
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> index d3d9626..7e58a0d 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> @@ -247,6 +247,7 @@ struct pp_hwmgr_func {
> int (*powerdown_uvd)(struct pp_hwmgr *hwmgr);
> void (*powergate_vce)(struct pp_hwmgr *hwmgr, bool bgate);
> void (*powergate_uvd)(struct pp_hwmgr *hwmgr, bool bgate);
> + void (*powergate_acp)(struct pp_hwmgr *hwmgr, bool bgate);
> uint32_t (*get_mclk)(struct pp_hwmgr *hwmgr, bool low);
> uint32_t (*get_sclk)(struct pp_hwmgr *hwmgr, bool low);
> int (*power_state_set)(struct pp_hwmgr *hwmgr,
> --
> 1.9.1
>
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Re: [PATCH 2/2] drm/amd/pp: Update clk with od setting when set power state
On Thu, Jul 19, 2018 at 4:44 AM, Rex Zhu wrote:
> This can fix the issue resume from S3, the user's OD setting
> were reverted to default.
>
> Signed-off-by: Rex Zhu
Series is:
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index c483d11..7147e03 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -3259,10 +3259,25 @@ static int
> vega10_populate_and_upload_sclk_mclk_dpm_levels(
> {
> int result = 0;
> struct vega10_hwmgr *data = hwmgr->backend;
> + struct vega10_dpm_table *dpm_table = &data->dpm_table;
> + struct vega10_odn_dpm_table *odn_table = &(data->odn_dpm_table);
> + struct vega10_odn_clock_voltage_dependency_table *odn_clk_table =
> &(odn_table->vdd_dep_on_sclk);
> + int count;
>
> if (!data->need_update_dpm_table)
> return 0;
>
> + if (hwmgr->od_enabled && data->need_update_dpm_table &
> DPMTABLE_OD_UPDATE_SCLK) {
> + for (count = 0; count < dpm_table->gfx_table.count; count++)
> + dpm_table->gfx_table.dpm_levels[count].value =
> odn_clk_table->entries[count].clk;
> + }
> +
> + odn_clk_table = &(odn_table->vdd_dep_on_mclk);
> + if (hwmgr->od_enabled && data->need_update_dpm_table &
> DPMTABLE_OD_UPDATE_MCLK) {
> + for (count = 0; count < dpm_table->mem_table.count; count++)
> + dpm_table->mem_table.dpm_levels[count].value =
> odn_clk_table->entries[count].clk;
> + }
> +
> if (data->need_update_dpm_table &
> (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK +
> DPMTABLE_UPDATE_SOCCLK)) {
> result = vega10_populate_all_graphic_levels(hwmgr);
> --
> 1.9.1
>
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Re: [PATCH] drm/amdgpu: lock and unlock console only for amdgpu_fbdev_set_suspend [V5]
On 2018-07-19 12:02 PM, Shirish S wrote: > [Why] > While the console_lock is held, console output will be buffered, till > its unlocked it wont be emitted, hence its ideal to unlock sooner to enable > debugging/detecting/fixing of any issue in the remaining sequence of events > in resume path. > The concern here is about consoles other than fbcon on the device, > e.g. a serial console > > [How] > This patch restructures the console_lock, console_unlock around > amdgpu_fbdev_set_suspend() and moves this new block appropriately. > > V2: Kept amdgpu_fbdev_set_suspend after pci_set_power_state > V3: Updated the commit message to clarify the real concern that this patch > addresses. > V4: code clean-up. > V5: fixed return value > > Signed-off-by: Shirish S > Reviewed-by: Michel Dänzer In the future, please mark which revision a review was given for when making significant changes in later revisions. However, v5 looks good, so in this case, you can leave it as is. :) (BTW, this is also a bug fix: we would leave the console locked if amdgpu_amdkfd_resume returned an error) -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/2] drm/amdgpu/acpi: skip backlight events for DC
No change in behavior, just bail sooner.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index 455617813ec4..353993218f21 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -389,7 +389,9 @@ static int amdgpu_atif_handler(struct amdgpu_device *adev,
DRM_DEBUG_DRIVER("ATIF: %d pending SBIOS requests\n", count);
- if (req.pending & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST) {
+ /* todo: add DC handling */
+ if ((req.pending & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST) &&
+ !amdgpu_device_has_dc_support(adev)) {
struct amdgpu_encoder *enc = atif->encoder_for_bl;
if (enc) {
--
2.13.6
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[PATCH 1/2] drm/amdgpu/apci: don't call sbios request function if it's not supported
Check the supported functions mask before calling the bios
requests method.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 53 +---
1 file changed, 28 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index 0d8c3fc6eace..455617813ec4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -364,7 +364,6 @@ static int amdgpu_atif_handler(struct amdgpu_device *adev,
struct acpi_bus_event *event)
{
struct amdgpu_atif *atif = adev->atif;
- struct atif_sbios_requests req;
int count;
DRM_DEBUG_DRIVER("event, device_class = %s, type = %#x\n",
@@ -379,42 +378,46 @@ static int amdgpu_atif_handler(struct amdgpu_device *adev,
/* Not our event */
return NOTIFY_DONE;
- /* Check pending SBIOS requests */
- count = amdgpu_atif_get_sbios_requests(atif, &req);
+ if (atif->functions.sbios_requests) {
+ struct atif_sbios_requests req;
- if (count <= 0)
- return NOTIFY_DONE;
+ /* Check pending SBIOS requests */
+ count = amdgpu_atif_get_sbios_requests(atif, &req);
+
+ if (count <= 0)
+ return NOTIFY_DONE;
- DRM_DEBUG_DRIVER("ATIF: %d pending SBIOS requests\n", count);
+ DRM_DEBUG_DRIVER("ATIF: %d pending SBIOS requests\n", count);
- if (req.pending & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST) {
- struct amdgpu_encoder *enc = atif->encoder_for_bl;
+ if (req.pending & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST) {
+ struct amdgpu_encoder *enc = atif->encoder_for_bl;
- if (enc) {
- struct amdgpu_encoder_atom_dig *dig = enc->enc_priv;
+ if (enc) {
+ struct amdgpu_encoder_atom_dig *dig =
enc->enc_priv;
- DRM_DEBUG_DRIVER("Changing brightness to %d\n",
- req.backlight_level);
+ DRM_DEBUG_DRIVER("Changing brightness to %d\n",
+req.backlight_level);
- amdgpu_display_backlight_set_level(adev, enc,
req.backlight_level);
+ amdgpu_display_backlight_set_level(adev, enc,
req.backlight_level);
#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) ||
defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
- backlight_force_update(dig->bl_dev,
- BACKLIGHT_UPDATE_HOTKEY);
+ backlight_force_update(dig->bl_dev,
+ BACKLIGHT_UPDATE_HOTKEY);
#endif
+ }
}
- }
- if (req.pending & ATIF_DGPU_DISPLAY_EVENT) {
- if ((adev->flags & AMD_IS_PX) &&
- amdgpu_atpx_dgpu_req_power_for_displays()) {
- pm_runtime_get_sync(adev->ddev->dev);
- /* Just fire off a uevent and let userspace tell us
what to do */
- drm_helper_hpd_irq_event(adev->ddev);
- pm_runtime_mark_last_busy(adev->ddev->dev);
- pm_runtime_put_autosuspend(adev->ddev->dev);
+ if (req.pending & ATIF_DGPU_DISPLAY_EVENT) {
+ if ((adev->flags & AMD_IS_PX) &&
+ amdgpu_atpx_dgpu_req_power_for_displays()) {
+ pm_runtime_get_sync(adev->ddev->dev);
+ /* Just fire off a uevent and let userspace
tell us what to do */
+ drm_helper_hpd_irq_event(adev->ddev);
+ pm_runtime_mark_last_busy(adev->ddev->dev);
+ pm_runtime_put_autosuspend(adev->ddev->dev);
+ }
}
+ /* TODO: check other events */
}
- /* TODO: check other events */
/* We've handled the event, stop the notifier chain. The ACPI interface
* overloads ACPI_VIDEO_NOTIFY_PROBE, we don't want to send that to
--
2.13.6
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[PATCH] MAINTAINERS: Add separate section for DC
Note that Harry and Leo Li are maintainers for that stuff. Signed-off-by: Christian König --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index e613df455ae0..2e9111e65d64 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -728,6 +728,14 @@ S: Supported F: drivers/crypto/ccp/ F: include/linux/ccp.h +AMD DISPLAY CORE +M: Harry Wentland +M: Leo Li +L: amd-gfx@lists.freedesktop.org +T: git git://people.freedesktop.org/~agd5f/linux +S: Supported +F: drivers/gpu/drm/amd/display/ + AMD FAM15H PROCESSOR POWER MONITORING DRIVER M: Huang Rui L: linux-hw...@vger.kernel.org -- 2.14.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] MAINTAINERS: Add separate section for DC
On 2018-07-19 04:36 PM, Christian König wrote: > Note that Harry and Leo Li are maintainers for that stuff. > > Signed-off-by: Christian König > --- > MAINTAINERS | 8 > 1 file changed, 8 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index e613df455ae0..2e9111e65d64 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -728,6 +728,14 @@ S: Supported > F: drivers/crypto/ccp/ > F: include/linux/ccp.h > > +AMD DISPLAY CORE > +M: Harry Wentland > +M: Leo Li > +L: amd-gfx@lists.freedesktop.org > +T: git git://people.freedesktop.org/~agd5f/linux > +S: Supported > +F: drivers/gpu/drm/amd/display/ > + > AMD FAM15H PROCESSOR POWER MONITORING DRIVER > M: Huang Rui > L: linux-hw...@vger.kernel.org > Reviewed-by: Michel Dänzer -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH xf86-video-amdgpu] Remove AMDGPUInfoRec::fbcon_pixmap
From: Michel Dänzer
We always destroy the fbcon pixmap in drmmode_copy_fb anyway.
Signed-off-by: Michel Dänzer
---
src/amdgpu_drv.h | 1 -
src/amdgpu_kms.c | 3 ---
src/drmmode_display.c | 13 ++---
3 files changed, 2 insertions(+), 15 deletions(-)
diff --git a/src/amdgpu_drv.h b/src/amdgpu_drv.h
index 8a77b05fd..45bc394aa 100644
--- a/src/amdgpu_drv.h
+++ b/src/amdgpu_drv.h
@@ -264,7 +264,6 @@ typedef struct {
struct amdgpu_dri2 dri2;
/* accel */
- PixmapPtr fbcon_pixmap;
int callback_event_type;
uint_fast32_t gpu_flushed;
uint_fast32_t gpu_synced;
diff --git a/src/amdgpu_kms.c b/src/amdgpu_kms.c
index 39e047e29..c22b7975c 100644
--- a/src/amdgpu_kms.c
+++ b/src/amdgpu_kms.c
@@ -125,9 +125,6 @@ static void AMDGPUFreeRec(ScrnInfoPtr pScrn)
info = AMDGPUPTR(pScrn);
if (info) {
- if (info->fbcon_pixmap)
- pScrn->pScreen->DestroyPixmap(info->fbcon_pixmap);
-
pEnt = info->pEnt;
free(pScrn->driverPrivate);
pScrn->driverPrivate = NULL;
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 8407a4577..aa4915933 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -357,13 +357,9 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
{
ScreenPtr pScreen = pScrn->pScreen;
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
- AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
- PixmapPtr pixmap = info->fbcon_pixmap;
+ PixmapPtr pixmap = NULL;
drmModeFBPtr fbcon;
- if (pixmap)
- return pixmap;
-
fbcon = drmModeGetFB(pAMDGPUEnt->fd, fbcon_id);
if (!fbcon)
return NULL;
@@ -387,7 +383,6 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
pixmap = NULL;
}
- info->fbcon_pixmap = pixmap;
out_free_fb:
drmModeFreeFB(fbcon);
return pixmap;
@@ -396,7 +391,6 @@ out_free_fb:
void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode)
{
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
- AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
ScreenPtr pScreen = pScrn->pScreen;
PixmapPtr src, dst = pScreen->GetScreenPixmap(pScreen);
struct drmmode_fb *fb = amdgpu_pixmap_get_fb(dst);
@@ -436,10 +430,7 @@ void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr
drmmode)
FreeScratchGC(gc);
pScreen->canDoBGNoneRoot = TRUE;
-
- if (info->fbcon_pixmap)
- pScrn->pScreen->DestroyPixmap(info->fbcon_pixmap);
- info->fbcon_pixmap = NULL;
+ pScreen->DestroyPixmap(src);
return;
}
--
2.18.0
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Re: [PATCH 2/2] drm/amdgpu: Power down acp if board uses AZ
>We also need to power it back up in hw_fini and suspend and then power
>it back down in resume.
Yes, this logic will be added in acp block.
In this patch, we only power down acp when it was not used and have no inpact
wen s3.
Best Regards
Rex
From: Alex Deucher
Sent: Thursday, July 19, 2018 9:56 PM
To: Zhu, Rex
Cc: amd-gfx list
Subject: Re: [PATCH 2/2] drm/amdgpu: Power down acp if board uses AZ
On Thu, Jul 19, 2018 at 4:46 AM, Rex Zhu wrote:
> if board uses AZ rather than ACP, we power down acp
> through smu to save power.
>
We also need to power it back up in hw_fini and suspend and then power
it back down in resume.
Alex
> Signed-off-by: Rex Zhu
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> index 71efcf3..4e18a88 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> @@ -35,6 +35,7 @@
>
> #include "acp_gfx_if.h"
>
> +
> #define ACP_TILE_ON_MASK 0x03
> #define ACP_TILE_OFF_MASK 0x02
> #define ACP_TILE_ON_RETAIN_REG_MASK0x1f
> @@ -289,11 +290,12 @@ static int acp_hw_init(void *handle)
> r = amd_acp_hw_init(adev->acp.cgs_device,
> ip_block->version->major,
> ip_block->version->minor);
> /* -ENODEV means board uses AZ rather than ACP */
> - if (r == -ENODEV)
> + if (r == -ENODEV) {
> + amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_ACP, true);
> return 0;
> - else if (r)
> + } else if (r) {
> return r;
> -
> + }
> if (adev->rmmio_size == 0 || adev->rmmio_size < 0x5289)
> return -EINVAL;
>
> --
> 1.9.1
>
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Re: [PATCH] MAINTAINERS: Add separate section for DC
On 2018-07-19 10:36 AM, Christian König wrote: > Note that Harry and Leo Li are maintainers for that stuff. > > Signed-off-by: Christian König Reviewed-by: Harry Wentland Harry > --- > MAINTAINERS | 8 > 1 file changed, 8 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index e613df455ae0..2e9111e65d64 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -728,6 +728,14 @@ S: Supported > F: drivers/crypto/ccp/ > F: include/linux/ccp.h > > +AMD DISPLAY CORE > +M: Harry Wentland > +M: Leo Li > +L: amd-gfx@lists.freedesktop.org > +T: git git://people.freedesktop.org/~agd5f/linux > +S: Supported > +F: drivers/gpu/drm/amd/display/ > + > AMD FAM15H PROCESSOR POWER MONITORING DRIVER > M: Huang Rui > L: linux-hw...@vger.kernel.org > ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] MAINTAINERS: Add separate section for DC
On 2018-07-19 11:17 AM, Harry Wentland wrote: On 2018-07-19 10:36 AM, Christian König wrote: Note that Harry and Leo Li are maintainers for that stuff. Signed-off-by: Christian König Reviewed-by: Harry Wentland Reviewed-by: Leo Li Harry --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index e613df455ae0..2e9111e65d64 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -728,6 +728,14 @@ S: Supported F:drivers/crypto/ccp/ F:include/linux/ccp.h +AMD DISPLAY CORE +M: Harry Wentland +M: Leo Li +L: amd-gfx@lists.freedesktop.org +T: git git://people.freedesktop.org/~agd5f/linux +S: Supported +F: drivers/gpu/drm/amd/display/ + AMD FAM15H PROCESSOR POWER MONITORING DRIVER M:Huang Rui L:linux-hw...@vger.kernel.org ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/amdgpu: Fix S3 resume failre.
Problem:
FB is still not unpinned during the first run of amdgpu_bo_evict_vram
and so it's left for the second run, but during second run the SDMA for
moving buffer around already disabled and you have to do
it with CPU, but FB is not in visible VRAM and hence the eviction failure
leading later to resume failure.
Fix:
When DAL in use get a pointer to FB from crtc->primary->state rather
then from crtc->primary which is not set for DAL since it supports
atomic KMS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..dd9ebf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool
suspend, bool fbcon)
/* unpin the front buffers and cursors */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
- struct drm_framebuffer *fb = crtc->primary->fb;
+struct drm_framebuffer *fb =
amdgpu_device_has_dc_support(adev) ?
+crtc->primary->state->fb : crtc->primary->fb;
struct amdgpu_bo *robj;
if (amdgpu_crtc->cursor_bo) {
--
2.7.4
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
Am 19.07.2018 um 17:19 schrieb Andrey Grodzovsky:
Problem:
FB is still not unpinned during the first run of amdgpu_bo_evict_vram
and so it's left for the second run, but during second run the SDMA for
moving buffer around already disabled and you have to do
it with CPU, but FB is not in visible VRAM and hence the eviction failure
leading later to resume failure.
Fix:
When DAL in use get a pointer to FB from crtc->primary->state rather
then from crtc->primary which is not set for DAL since it supports
atomic KMS.
Nice catch, but could we add a helper for unpinning them and just unpin
both instead of checking if DC is enabled or not?
I think that would be a little bit cleaner.
Christian.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..dd9ebf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool
suspend, bool fbcon)
/* unpin the front buffers and cursors */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
- struct drm_framebuffer *fb = crtc->primary->fb;
+struct drm_framebuffer *fb =
amdgpu_device_has_dc_support(adev) ?
+crtc->primary->state->fb : crtc->primary->fb;
struct amdgpu_bo *robj;
if (amdgpu_crtc->cursor_bo) {
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On 2018-07-19 11:25 AM, Christian König wrote:
> Am 19.07.2018 um 17:19 schrieb Andrey Grodzovsky:
>> Problem:
>> FB is still not unpinned during the first run of amdgpu_bo_evict_vram
>> and so it's left for the second run, but during second run the SDMA for
>> moving buffer around already disabled and you have to do
>> it with CPU, but FB is not in visible VRAM and hence the eviction failure
>> leading later to resume failure.
>>
>> Fix:
>> When DAL in use get a pointer to FB from crtc->primary->state rather
>> then from crtc->primary which is not set for DAL since it supports
>> atomic KMS.
>
Good catch.
> Nice catch, but could we add a helper for unpinning them and just unpin both
> instead of checking if DC is enabled or not?
>
> I think that would be a little bit cleaner.
>
> Christian.
>
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
>> Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers
>> Signed-off-by: Andrey Grodzovsky
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> index 709e4a3..dd9ebf7 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> @@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool
>> suspend, bool fbcon)
>> /* unpin the front buffers and cursors */
>> list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
>> struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
>> - struct drm_framebuffer *fb = crtc->primary->fb;
>> + struct drm_framebuffer *fb = amdgpu_device_has_dc_support(adev) ?
>> + crtc->primary->state->fb : crtc->primary->fb;
Is that the only place or are there other places where DC is using fb from
crtc, rather than crtc_state?
Harry
>> struct amdgpu_bo *robj;
>> if (amdgpu_crtc->cursor_bo) {
>
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On Thu, Jul 19, 2018 at 11:19:56AM -0400, Andrey Grodzovsky wrote:
> Problem:
> FB is still not unpinned during the first run of amdgpu_bo_evict_vram
> and so it's left for the second run, but during second run the SDMA for
> moving buffer around already disabled and you have to do
> it with CPU, but FB is not in visible VRAM and hence the eviction failure
> leading later to resume failure.
>
> Fix:
> When DAL in use get a pointer to FB from crtc->primary->state rather
> then from crtc->primary which is not set for DAL since it supports
> atomic KMS.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
> Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers
> Signed-off-by: Andrey Grodzovsky
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 709e4a3..dd9ebf7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool
> suspend, bool fbcon)
> /* unpin the front buffers and cursors */
> list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
> struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
> - struct drm_framebuffer *fb = crtc->primary->fb;
> + struct drm_framebuffer *fb =
> amdgpu_device_has_dc_support(adev) ?
> + crtc->primary->state->fb : crtc->primary->fb;
So apparently you haven't yet turned off the planes here. If I'm
reading things right amdgpu_device_ip_suspend() should end up doing
that through drm_atomic_helper_suspend(). So it looks like like now
you'll end up unpinning the same bos twice. Doesn't that mess up
some kind of refcount or something?
To me it would seem better to susped the display before trying
to evict the bos.
> struct amdgpu_bo *robj;
>
> if (amdgpu_crtc->cursor_bo) {
> --
> 2.7.4
--
Ville Syrjälä
Intel
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[PATCH] drm/amdgpu: Don't warn on destroying a pinned BO
From: Michel Dänzer The warning turned out to be not so useful, as BO destruction tends to be deferred to a workqueue. Also, we should be preventing any damage from this now, so not really important anymore to fix code doing this. Signed-off-by: Michel Dänzer --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index b12526ce1a9d..3010f0136de9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -89,7 +89,7 @@ static void amdgpu_ttm_bo_destroy(struct ttm_buffer_object *tbo) struct amdgpu_device *adev = amdgpu_ttm_adev(tbo->bdev); struct amdgpu_bo *bo = ttm_to_amdgpu_bo(tbo); - if (WARN_ON_ONCE(bo->pin_count > 0)) + if (bo->pin_count > 0) amdgpu_bo_subtract_pin_size(bo); if (bo->kfd_bo) -- 2.18.0 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On 07/19/2018 11:39 AM, Ville Syrjälä wrote:
On Thu, Jul 19, 2018 at 11:19:56AM -0400, Andrey Grodzovsky wrote:
Problem:
FB is still not unpinned during the first run of amdgpu_bo_evict_vram
and so it's left for the second run, but during second run the SDMA for
moving buffer around already disabled and you have to do
it with CPU, but FB is not in visible VRAM and hence the eviction failure
leading later to resume failure.
Fix:
When DAL in use get a pointer to FB from crtc->primary->state rather
then from crtc->primary which is not set for DAL since it supports
atomic KMS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..dd9ebf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool
suspend, bool fbcon)
/* unpin the front buffers and cursors */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
- struct drm_framebuffer *fb = crtc->primary->fb;
+struct drm_framebuffer *fb =
amdgpu_device_has_dc_support(adev) ?
+crtc->primary->state->fb : crtc->primary->fb;
So apparently you haven't yet turned off the planes here. If I'm
reading things right amdgpu_device_ip_suspend() should end up doing
that through drm_atomic_helper_suspend(). So it looks like like now
you'll end up unpinning the same bos twice. Doesn't that mess up
some kind of refcount or something?
amdgpu_bo_unpin has a guard against that, amdgpu_bo_unreserve is less clear.
To me it would seem better to susped the display before trying
to evict the bos.
Yea, i was aware of that and indeed DAL shouldn't rely on the code in
amdgpu_device_suspend to unpin
front buffer and cursor since the atomic helper should do it. Problem is
that during amdgpu_device_ip_suspend
the SDMA engine gets suspended too, so you have to embed another
eviction in between, after display is suspended but before
SDMA and this forces ordering between them which kind of already in
place (amd_ip_block_type) but still it's an extra constrain.
Also I am not sure about side effects of another eviction call there -
Christian any ideas ?
Andrey
struct amdgpu_bo *robj;
if (amdgpu_crtc->cursor_bo) {
--
2.7.4
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On 07/19/2018 11:25 AM, Christian König wrote:
Am 19.07.2018 um 17:19 schrieb Andrey Grodzovsky:
Problem:
FB is still not unpinned during the first run of amdgpu_bo_evict_vram
and so it's left for the second run, but during second run the SDMA for
moving buffer around already disabled and you have to do
it with CPU, but FB is not in visible VRAM and hence the eviction
failure
leading later to resume failure.
Fix:
When DAL in use get a pointer to FB from crtc->primary->state rather
then from crtc->primary which is not set for DAL since it supports
atomic KMS.
Nice catch, but could we add a helper for unpinning them and just
unpin both instead of checking if DC is enabled or not?
They are mutually exclusive, once is only used in legacy drivers another
only in atomic KMS drivers.
Andrey
I think that would be a little bit cleaner.
Christian.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..dd9ebf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device
*dev, bool suspend, bool fbcon)
/* unpin the front buffers and cursors */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
- struct drm_framebuffer *fb = crtc->primary->fb;
+ struct drm_framebuffer *fb =
amdgpu_device_has_dc_support(adev) ?
+ crtc->primary->state->fb : crtc->primary->fb;
struct amdgpu_bo *robj;
if (amdgpu_crtc->cursor_bo) {
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On 2018-07-19 06:33 PM, Andrey Grodzovsky wrote:
> On 07/19/2018 11:39 AM, Ville Syrjälä wrote:
>> On Thu, Jul 19, 2018 at 11:19:56AM -0400, Andrey Grodzovsky wrote:
>>> Problem:
>>> FB is still not unpinned during the first run of amdgpu_bo_evict_vram
>>> and so it's left for the second run, but during second run the SDMA for
>>> moving buffer around already disabled and you have to do
>>> it with CPU, but FB is not in visible VRAM and hence the eviction
>>> failure
>>> leading later to resume failure.
>>>
>>> Fix:
>>> When DAL in use get a pointer to FB from crtc->primary->state rather
>>> then from crtc->primary which is not set for DAL since it supports
>>> atomic KMS.
>>>
>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
>>> Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers
>>> Signed-off-by: Andrey Grodzovsky
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
>>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> index 709e4a3..dd9ebf7 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> @@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device
>>> *dev, bool suspend, bool fbcon)
>>> /* unpin the front buffers and cursors */
>>> list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
>>> struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
>>> - struct drm_framebuffer *fb = crtc->primary->fb;
>>> + struct drm_framebuffer *fb =
>>> amdgpu_device_has_dc_support(adev) ?
>>> + crtc->primary->state->fb : crtc->primary->fb;
>> So apparently you haven't yet turned off the planes here. If I'm
>> reading things right amdgpu_device_ip_suspend() should end up doing
>> that through drm_atomic_helper_suspend(). So it looks like like now
>> you'll end up unpinning the same bos twice. Doesn't that mess up
>> some kind of refcount or something?
> amdgpu_bo_unpin has a guard against that, amdgpu_bo_unreserve is less
> clear.
BO reservation shouldn't an issue here, BOs are only reserved for a
short time around (un)pinning them.
>> To me it would seem better to susped the display before trying
>> to evict the bos.
>
> Yea, i was aware of that and indeed DAL shouldn't rely on the code in
> amdgpu_device_suspend to unpin
> front buffer and cursor since the atomic helper should do it. Problem is
> that during amdgpu_device_ip_suspend
> the SDMA engine gets suspended too, so you have to embed another
> eviction in between, after display is suspended but before
> SDMA and this forces ordering between them which kind of already in
> place (amd_ip_block_type) but still it's an extra constrain.
Ville's point (which I basically agree with) is that the display
hardware should be turned off before evicting VRAM the first time, in
which case no second eviction should be necessary (for this purpose).
--
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Libre software enthusiast | Mesa and X developer
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On 07/19/2018 12:47 PM, Michel Dänzer wrote:
On 2018-07-19 06:33 PM, Andrey Grodzovsky wrote:
On 07/19/2018 11:39 AM, Ville Syrjälä wrote:
On Thu, Jul 19, 2018 at 11:19:56AM -0400, Andrey Grodzovsky wrote:
Problem:
FB is still not unpinned during the first run of amdgpu_bo_evict_vram
and so it's left for the second run, but during second run the SDMA for
moving buffer around already disabled and you have to do
it with CPU, but FB is not in visible VRAM and hence the eviction
failure
leading later to resume failure.
Fix:
When DAL in use get a pointer to FB from crtc->primary->state rather
then from crtc->primary which is not set for DAL since it supports
atomic KMS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..dd9ebf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device
*dev, bool suspend, bool fbcon)
/* unpin the front buffers and cursors */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
- struct drm_framebuffer *fb = crtc->primary->fb;
+ struct drm_framebuffer *fb =
amdgpu_device_has_dc_support(adev) ?
+ crtc->primary->state->fb : crtc->primary->fb;
So apparently you haven't yet turned off the planes here. If I'm
reading things right amdgpu_device_ip_suspend() should end up doing
that through drm_atomic_helper_suspend(). So it looks like like now
you'll end up unpinning the same bos twice. Doesn't that mess up
some kind of refcount or something?
amdgpu_bo_unpin has a guard against that, amdgpu_bo_unreserve is less
clear.
BO reservation shouldn't an issue here, BOs are only reserved for a
short time around (un)pinning them.
To me it would seem better to susped the display before trying
to evict the bos.
Yea, i was aware of that and indeed DAL shouldn't rely on the code in
amdgpu_device_suspend to unpin
front buffer and cursor since the atomic helper should do it. Problem is
that during amdgpu_device_ip_suspend
the SDMA engine gets suspended too, so you have to embed another
eviction in between, after display is suspended but before
SDMA and this forces ordering between them which kind of already in
place (amd_ip_block_type) but still it's an extra constrain.
Ville's point (which I basically agree with) is that the display
hardware should be turned off before evicting VRAM the first time, in
which case no second eviction should be necessary (for this purpose).
Display HW is turned off as part of all IPs in a loop inside
amdgpu_device_ip_suspend.
Are you suggesting to extract the display HW turn off from inside
amdgpu_device_ip_suspend and place it
before the first call to amdgpu_bo_evict_vram ?
Andrey
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Re: [PATCH 2/2] drm/amdgpu: Power down acp if board uses AZ
On Thu, Jul 19, 2018 at 11:14 AM, Zhu, Rex wrote:
> >We also need to power it back up in hw_fini and suspend and then power
> >it back down in resume.
>
> Yes, this logic will be added in acp block.
> In this patch, we only power down acp when it was not used and have no
> inpact wen s3.
>
But I think when the asic comes out of S3/S4, the ACP block will be powered
up again so it will have to be powered down again to avoid using power
after resume. So if the platform uses AZ rather than ACP, we need to
handle that case and to power ACP back up on hw_fini() in case the driver
gets reloaded. S4 works similarly. Something like the attached patch.
Alex
>
> Best Regards
> Rex
>
> --
> *From:* Alex Deucher
> *Sent:* Thursday, July 19, 2018 9:56 PM
> *To:* Zhu, Rex
> *Cc:* amd-gfx list
> *Subject:* Re: [PATCH 2/2] drm/amdgpu: Power down acp if board uses AZ
>
> On Thu, Jul 19, 2018 at 4:46 AM, Rex Zhu wrote:
> > if board uses AZ rather than ACP, we power down acp
> > through smu to save power.
> >
>
> We also need to power it back up in hw_fini and suspend and then power
> it back down in resume.
>
> Alex
>
> > Signed-off-by: Rex Zhu
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 8 +---
> > 1 file changed, 5 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> > index 71efcf3..4e18a88 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> > @@ -35,6 +35,7 @@
> >
> > #include "acp_gfx_if.h"
> >
> > +
> > #define ACP_TILE_ON_MASK 0x03
> > #define ACP_TILE_OFF_MASK 0x02
> > #define ACP_TILE_ON_RETAIN_REG_MASK0x1f
> > @@ -289,11 +290,12 @@ static int acp_hw_init(void *handle)
> > r = amd_acp_hw_init(adev->acp.cgs_device,
> > ip_block->version->major,
> ip_block->version->minor);
> > /* -ENODEV means board uses AZ rather than ACP */
> > - if (r == -ENODEV)
> > + if (r == -ENODEV) {
> > + amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_ACP, true);
> > return 0;
> > - else if (r)
> > + } else if (r) {
> > return r;
> > -
> > + }
> > if (adev->rmmio_size == 0 || adev->rmmio_size < 0x5289)
> > return -EINVAL;
> >
> > --
> > 1.9.1
> >
> > ___
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>
>
From 73f4669a60f0def1c5dc61f99a201f88c6d0e528 Mon Sep 17 00:00:00 2001
From: Rex Zhu
Date: Thu, 19 Jul 2018 11:48:36 -0500
Subject: [PATCH] drm/amdgpu: Power down acp if board uses AZ (v2)
if board uses AZ rather than ACP, we power down acp
through smu to save power.
v2: handle S3/S4 and hw_fini (Alex)
Signed-off-by: Rex Zhu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index 71efcf38f11b..d4d1738da3b6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -289,10 +289,12 @@ static int acp_hw_init(void *handle)
r = amd_acp_hw_init(adev->acp.cgs_device,
ip_block->version->major, ip_block->version->minor);
/* -ENODEV means board uses AZ rather than ACP */
- if (r == -ENODEV)
+ if (r == -ENODEV) {
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);
return 0;
- else if (r)
+ } else if (r) {
return r;
+ }
if (adev->rmmio_size == 0 || adev->rmmio_size < 0x5289)
return -EINVAL;
@@ -497,8 +499,10 @@ static int acp_hw_fini(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
/* return early if no ACP */
- if (!adev->acp.acp_cell)
+ if (!adev->acp.acp_cell) {
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);
return 0;
+ }
/* Assert Soft reset of ACP */
val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);
@@ -556,11 +560,21 @@ static int acp_hw_fini(void *handle)
static int acp_suspend(void *handle)
{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ /* power up on suspend */
+ if (!adev->acp.acp_cell)
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);
return 0;
}
static int acp_resume(void *handle)
{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ /* power down again on resume */
+ if (!adev->acp.acp_cell)
+ amdgpu_dpm_set_powerga
Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On 2018-07-19 06:53 PM, Andrey Grodzovsky wrote:
>
>
> On 07/19/2018 12:47 PM, Michel Dänzer wrote:
>> On 2018-07-19 06:33 PM, Andrey Grodzovsky wrote:
>>> On 07/19/2018 11:39 AM, Ville Syrjälä wrote:
On Thu, Jul 19, 2018 at 11:19:56AM -0400, Andrey Grodzovsky wrote:
> Problem:
> FB is still not unpinned during the first run of amdgpu_bo_evict_vram
> and so it's left for the second run, but during second run the SDMA
> for
> moving buffer around already disabled and you have to do
> it with CPU, but FB is not in visible VRAM and hence the eviction
> failure
> leading later to resume failure.
>
> Fix:
> When DAL in use get a pointer to FB from crtc->primary->state rather
> then from crtc->primary which is not set for DAL since it supports
> atomic KMS.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
> Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic
> drivers
> Signed-off-by: Andrey Grodzovsky
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 709e4a3..dd9ebf7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device
> *dev, bool suspend, bool fbcon)
> /* unpin the front buffers and cursors */
> list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
> struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
> - struct drm_framebuffer *fb = crtc->primary->fb;
> + struct drm_framebuffer *fb =
> amdgpu_device_has_dc_support(adev) ?
> + crtc->primary->state->fb : crtc->primary->fb;
So apparently you haven't yet turned off the planes here. If I'm
reading things right amdgpu_device_ip_suspend() should end up doing
that through drm_atomic_helper_suspend(). So it looks like like now
you'll end up unpinning the same bos twice. Doesn't that mess up
some kind of refcount or something?
>>> amdgpu_bo_unpin has a guard against that, amdgpu_bo_unreserve is less
>>> clear.
>> BO reservation shouldn't an issue here, BOs are only reserved for a
>> short time around (un)pinning them.
>>
>>
To me it would seem better to susped the display before trying
to evict the bos.
>>> Yea, i was aware of that and indeed DAL shouldn't rely on the code in
>>> amdgpu_device_suspend to unpin
>>> front buffer and cursor since the atomic helper should do it. Problem is
>>> that during amdgpu_device_ip_suspend
>>> the SDMA engine gets suspended too, so you have to embed another
>>> eviction in between, after display is suspended but before
>>> SDMA and this forces ordering between them which kind of already in
>>> place (amd_ip_block_type) but still it's an extra constrain.
>> Ville's point (which I basically agree with) is that the display
>> hardware should be turned off before evicting VRAM the first time, in
>> which case no second eviction should be necessary (for this purpose).
>
> Display HW is turned off as part of all IPs in a loop inside
> amdgpu_device_ip_suspend.
> Are you suggesting to extract the display HW turn off from inside
> amdgpu_device_ip_suspend and place it
> before the first call to amdgpu_bo_evict_vram ?
In a nutshell, yes.
Or maybe it would be easier to move the amdgpu_bo_evict_vram call down
to somewhere called from amdgpu_device_ip_suspend?
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On 07/19/2018 12:59 PM, Michel Dänzer wrote:
On 2018-07-19 06:53 PM, Andrey Grodzovsky wrote:
On 07/19/2018 12:47 PM, Michel Dänzer wrote:
On 2018-07-19 06:33 PM, Andrey Grodzovsky wrote:
On 07/19/2018 11:39 AM, Ville Syrjälä wrote:
On Thu, Jul 19, 2018 at 11:19:56AM -0400, Andrey Grodzovsky wrote:
Problem:
FB is still not unpinned during the first run of amdgpu_bo_evict_vram
and so it's left for the second run, but during second run the SDMA
for
moving buffer around already disabled and you have to do
it with CPU, but FB is not in visible VRAM and hence the eviction
failure
leading later to resume failure.
Fix:
When DAL in use get a pointer to FB from crtc->primary->state rather
then from crtc->primary which is not set for DAL since it supports
atomic KMS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic
drivers
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..dd9ebf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device
*dev, bool suspend, bool fbcon)
/* unpin the front buffers and cursors */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
- struct drm_framebuffer *fb = crtc->primary->fb;
+ struct drm_framebuffer *fb =
amdgpu_device_has_dc_support(adev) ?
+ crtc->primary->state->fb : crtc->primary->fb;
So apparently you haven't yet turned off the planes here. If I'm
reading things right amdgpu_device_ip_suspend() should end up doing
that through drm_atomic_helper_suspend(). So it looks like like now
you'll end up unpinning the same bos twice. Doesn't that mess up
some kind of refcount or something?
amdgpu_bo_unpin has a guard against that, amdgpu_bo_unreserve is less
clear.
BO reservation shouldn't an issue here, BOs are only reserved for a
short time around (un)pinning them.
To me it would seem better to susped the display before trying
to evict the bos.
Yea, i was aware of that and indeed DAL shouldn't rely on the code in
amdgpu_device_suspend to unpin
front buffer and cursor since the atomic helper should do it. Problem is
that during amdgpu_device_ip_suspend
the SDMA engine gets suspended too, so you have to embed another
eviction in between, after display is suspended but before
SDMA and this forces ordering between them which kind of already in
place (amd_ip_block_type) but still it's an extra constrain.
Ville's point (which I basically agree with) is that the display
hardware should be turned off before evicting VRAM the first time, in
which case no second eviction should be necessary (for this purpose).
Display HW is turned off as part of all IPs in a loop inside
amdgpu_device_ip_suspend.
Are you suggesting to extract the display HW turn off from inside
amdgpu_device_ip_suspend and place it
before the first call to amdgpu_bo_evict_vram ?
In a nutshell, yes.
Or maybe it would be easier to move the amdgpu_bo_evict_vram call down
to somewhere called from amdgpu_device_ip_suspend?
I can move the BEFORE and AFTER calls to amdgpu_bo_evict_vram inside
amdgpu_device_ip_suspend
such that the first one is called AFTER display is shut off, while the
second in the very end of the function.
I am just not sure what's gonna be the side effect of evicting after
bunch of blocks (such as GMC) are already disabled.
Andrey
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Re: [PATCH v2] drm/amd/display/dc/dce: Fix multiple potential integer overflows
Hi Alex, Harry,
I wonder if this patch should have been tagged for stable.
Thanks
--
Gustavo
On 07/04/2018 08:22 AM, Gustavo A. R. Silva wrote:
> Add suffix ULL to constant 5 and cast variables target_pix_clk_khz and
> feedback_divider to uint64_t in order to avoid multiple potential integer
> overflows and give the compiler complete information about the proper
> arithmetic to use.
>
> Notice that such constant and variables are used in contexts that
> expect expressions of type uint64_t (64 bits, unsigned). The current
> casts to uint64_t effectively apply to each expression as a whole,
> but they do not prevent them from being evaluated using 32-bit
> arithmetic instead of 64-bit arithmetic.
>
> Also, once the expressions are properly evaluated using 64-bit
> arithmentic, there is no need for the parentheses that enclose
> them.
>
> Addresses-Coverity-ID: 1460245 ("Unintentional integer overflow")
> Addresses-Coverity-ID: 1460286 ("Unintentional integer overflow")
> Addresses-Coverity-ID: 1460401 ("Unintentional integer overflow")
> Fixes: 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
> Signed-off-by: Gustavo A. R. Silva
> ---
> Changes in v2:
> - Add suffix ULL to constant 5 instead of UL. Thanks to Michel Dänzer
>for pointing this out.
>
> drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> index 88b09dd..ca13775 100644
> --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> @@ -133,7 +133,7 @@ static bool calculate_fb_and_fractional_fb_divider(
> uint64_t feedback_divider;
>
> feedback_divider =
> - (uint64_t)(target_pix_clk_khz * ref_divider * post_divider);
> + (uint64_t)target_pix_clk_khz * ref_divider * post_divider;
> feedback_divider *= 10;
> /* additional factor, since we divide by 10 afterwards */
> feedback_divider *= (uint64_t)(calc_pll_cs->fract_fb_divider_factor);
> @@ -145,8 +145,8 @@ static bool calculate_fb_and_fractional_fb_divider(
> * of fractional feedback decimal point and the fractional FB Divider
> precision
> * is 2 then the equation becomes (ullfeedbackDivider + 5*100) / (10*100))*/
>
> - feedback_divider += (uint64_t)
> - (5 * calc_pll_cs->fract_fb_divider_precision_factor);
> + feedback_divider += 5ULL *
> + calc_pll_cs->fract_fb_divider_precision_factor;
> feedback_divider =
> div_u64(feedback_divider,
> calc_pll_cs->fract_fb_divider_precision_factor * 10);
> @@ -203,8 +203,8 @@ static bool calc_fb_divider_checking_tolerance(
> &fract_feedback_divider);
>
> /*Actual calculated value*/
> - actual_calc_clk_khz = (uint64_t)(feedback_divider *
> - calc_pll_cs->fract_fb_divider_factor) +
> + actual_calc_clk_khz = (uint64_t)feedback_divider *
> + calc_pll_cs->fract_fb_divider_factor +
> fract_feedback_divider;
> actual_calc_clk_khz *= calc_pll_cs->ref_freq_khz;
> actual_calc_clk_khz =
>
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Re: [PATCH 3/5] drm/amdgpu: enable system interrupt for jrbc
On 07/18/2018 04:39 PM, boyuan.zh...@amd.com wrote:
From: Boyuan Zhang
Enable system interrupt for jrbc during engine starting time.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 4fccb21..22c1588 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -595,6 +595,7 @@ static int vcn_v1_0_start(struct amdgpu_device *adev)
struct amdgpu_ring *ring = &adev->vcn.ring_dec;
uint32_t rb_bufsz, tmp;
uint32_t lmi_swap_cntl;
+ uint32_t reg_temp;
int i, j, r;
/* disable byte swapping */
@@ -700,6 +701,11 @@ static int vcn_v1_0_start(struct amdgpu_device *adev)
(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK),
~(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK));
+ /* enable system interrupt for JRBC*/
+ reg_temp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SYS_INT_EN));
+ reg_temp |= UVD_SYS_INT_EN__UVD_JRBC_EN_MASK;
+ WREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SYS_INT_EN), reg_temp);
Here you could use below instead.
WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SYS_INT_EN),
UVD_SYS_INT_EN__UVD_JRBC_EN_MASK,
~UVD_SYS_INT_EN__UVD_JRBC_EN_MASK);
Ether way, the whole series are
Acked-by: Leo Liu
+
/* clear the bit 4 of VCN_STATUS */
WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_STATUS), 0,
~(2 << UVD_STATUS__VCPU_REPORT__SHIFT));
@@ -1754,7 +1760,7 @@ static const struct amdgpu_irq_src_funcs
vcn_v1_0_irq_funcs = {
static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev)
{
- adev->vcn.irq.num_types = adev->vcn.num_enc_rings + 1;
+ adev->vcn.irq.num_types = adev->vcn.num_enc_rings + 2;
adev->vcn.irq.funcs = &vcn_v1_0_irq_funcs;
}
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[PATCH] drm/amd/display: Drop unused backlight functions in DM
These are only ever called for non-DC code.
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 004636ead29b..205c62903050 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1568,18 +1568,6 @@ static void dm_bandwidth_update(struct amdgpu_device
*adev)
/* TODO: implement later */
}
-static void dm_set_backlight_level(struct amdgpu_encoder *amdgpu_encoder,
-u8 level)
-{
- /* TODO: translate amdgpu_encoder to display_index and call DAL */
-}
-
-static u8 dm_get_backlight_level(struct amdgpu_encoder *amdgpu_encoder)
-{
- /* TODO: translate amdgpu_encoder to display_index and call DAL */
- return 0;
-}
-
static int amdgpu_notify_freesync(struct drm_device *dev, void *data,
struct drm_file *filp)
{
@@ -1654,10 +1642,8 @@ static int amdgpu_notify_freesync(struct drm_device
*dev, void *data,
static const struct amdgpu_display_funcs dm_display_funcs = {
.bandwidth_update = dm_bandwidth_update, /* called unconditionally */
.vblank_get_counter = dm_vblank_get_counter,/* called unconditionally */
- .backlight_set_level =
- dm_set_backlight_level,/* called unconditionally */
- .backlight_get_level =
- dm_get_backlight_level,/* called unconditionally */
+ .backlight_set_level = NULL, /* never called for DC */
+ .backlight_get_level = NULL, /* never called for DC */
.hpd_sense = NULL,/* called unconditionally */
.hpd_set_polarity = NULL, /* called unconditionally */
.hpd_get_gpio_reg = NULL, /* VBIOS parsing. DAL does it. */
--
2.17.1
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On Thu, Jul 19, 2018 at 1:07 PM, Andrey Grodzovsky
wrote:
>
>
> On 07/19/2018 12:59 PM, Michel Dänzer wrote:
>>
>> On 2018-07-19 06:53 PM, Andrey Grodzovsky wrote:
>>>
>>>
>>> On 07/19/2018 12:47 PM, Michel Dänzer wrote:
On 2018-07-19 06:33 PM, Andrey Grodzovsky wrote:
>
> On 07/19/2018 11:39 AM, Ville Syrjälä wrote:
>>
>> On Thu, Jul 19, 2018 at 11:19:56AM -0400, Andrey Grodzovsky wrote:
>>>
>>> Problem:
>>> FB is still not unpinned during the first run of amdgpu_bo_evict_vram
>>> and so it's left for the second run, but during second run the SDMA
>>> for
>>> moving buffer around already disabled and you have to do
>>> it with CPU, but FB is not in visible VRAM and hence the eviction
>>> failure
>>> leading later to resume failure.
>>>
>>> Fix:
>>> When DAL in use get a pointer to FB from crtc->primary->state rather
>>> then from crtc->primary which is not set for DAL since it supports
>>> atomic KMS.
>>>
>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
>>> Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic
>>> drivers
>>> Signed-off-by: Andrey Grodzovsky
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
>>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> index 709e4a3..dd9ebf7 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> @@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device
>>> *dev, bool suspend, bool fbcon)
>>> /* unpin the front buffers and cursors */
>>> list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
>>> {
>>> struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
>>> -struct drm_framebuffer *fb = crtc->primary->fb;
>>> + struct drm_framebuffer *fb =
>>> amdgpu_device_has_dc_support(adev) ?
>>> + crtc->primary->state->fb : crtc->primary->fb;
>>
>> So apparently you haven't yet turned off the planes here. If I'm
>> reading things right amdgpu_device_ip_suspend() should end up doing
>> that through drm_atomic_helper_suspend(). So it looks like like now
>> you'll end up unpinning the same bos twice. Doesn't that mess up
>> some kind of refcount or something?
>
> amdgpu_bo_unpin has a guard against that, amdgpu_bo_unreserve is less
> clear.
BO reservation shouldn't an issue here, BOs are only reserved for a
short time around (un)pinning them.
>> To me it would seem better to susped the display before trying
>> to evict the bos.
>
> Yea, i was aware of that and indeed DAL shouldn't rely on the code in
> amdgpu_device_suspend to unpin
> front buffer and cursor since the atomic helper should do it. Problem
> is
> that during amdgpu_device_ip_suspend
> the SDMA engine gets suspended too, so you have to embed another
> eviction in between, after display is suspended but before
> SDMA and this forces ordering between them which kind of already in
> place (amd_ip_block_type) but still it's an extra constrain.
Ville's point (which I basically agree with) is that the display
hardware should be turned off before evicting VRAM the first time, in
which case no second eviction should be necessary (for this purpose).
>>>
>>> Display HW is turned off as part of all IPs in a loop inside
>>> amdgpu_device_ip_suspend.
>>> Are you suggesting to extract the display HW turn off from inside
>>> amdgpu_device_ip_suspend and place it
>>> before the first call to amdgpu_bo_evict_vram ?
>>
>> In a nutshell, yes.
>>
>> Or maybe it would be easier to move the amdgpu_bo_evict_vram call down
>> to somewhere called from amdgpu_device_ip_suspend?
>
>
> I can move the BEFORE and AFTER calls to amdgpu_bo_evict_vram inside
> amdgpu_device_ip_suspend
> such that the first one is called AFTER display is shut off, while the
> second in the very end of the function.
> I am just not sure what's gonna be the side effect of evicting after bunch
> of blocks (such as GMC) are already disabled.
How about something like the attached patches? Basically split the ip
suspend sequence in two like we do for resume.
Alex
From 17389a607dc90e858c8e072800f7bfaca2c4db86 Mon Sep 17 00:00:00 2001
From: Alex Deucher
Date: Thu, 19 Jul 2018 13:24:33 -0500
Subject: [PATCH 2/2] drm/amdgpu: rework suspend and resume to deal with atomic
changes
Use the newly split ip suspend functions to do suspend displays
first (to deal with atomic so that FBs can be unpinned before
attempting to evict vram), then evict vram, then suspend the
other IPs. Also move the non-DC pinning code to only be
called in the non-DC cases since atomic should take ca
Re: [PATCH 3/5] drm/amdgpu: enable system interrupt for jrbc
Yes, agree! It's better to use that existing function. Will change it
accordingly.
Thanks,
Boyuan
From: Liu, Leo
Sent: July 19, 2018 2:13:50 PM
To: Zhang, Boyuan; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/5] drm/amdgpu: enable system interrupt for jrbc
On 07/18/2018 04:39 PM, boyuan.zh...@amd.com wrote:
> From: Boyuan Zhang
>
> Enable system interrupt for jrbc during engine starting time.
>
> Signed-off-by: Boyuan Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> index 4fccb21..22c1588 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> @@ -595,6 +595,7 @@ static int vcn_v1_0_start(struct amdgpu_device *adev)
>struct amdgpu_ring *ring = &adev->vcn.ring_dec;
>uint32_t rb_bufsz, tmp;
>uint32_t lmi_swap_cntl;
> + uint32_t reg_temp;
>int i, j, r;
>
>/* disable byte swapping */
> @@ -700,6 +701,11 @@ static int vcn_v1_0_start(struct amdgpu_device *adev)
>(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK),
>~(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK));
>
> + /* enable system interrupt for JRBC*/
> + reg_temp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SYS_INT_EN));
> + reg_temp |= UVD_SYS_INT_EN__UVD_JRBC_EN_MASK;
> + WREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SYS_INT_EN), reg_temp);
Here you could use below instead.
WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SYS_INT_EN),
UVD_SYS_INT_EN__UVD_JRBC_EN_MASK,
~UVD_SYS_INT_EN__UVD_JRBC_EN_MASK);
Ether way, the whole series are
Acked-by: Leo Liu
> +
>/* clear the bit 4 of VCN_STATUS */
>WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_STATUS), 0,
>~(2 << UVD_STATUS__VCPU_REPORT__SHIFT));
> @@ -1754,7 +1760,7 @@ static const struct amdgpu_irq_src_funcs
> vcn_v1_0_irq_funcs = {
>
> static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev)
> {
> - adev->vcn.irq.num_types = adev->vcn.num_enc_rings + 1;
> + adev->vcn.irq.num_types = adev->vcn.num_enc_rings + 2;
>adev->vcn.irq.funcs = &vcn_v1_0_irq_funcs;
> }
>
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Re: [PATCH 3/5] drm/amdgpu: enable system interrupt for jrbc
On Wed, Jul 18, 2018 at 4:39 PM, wrote:
> From: Boyuan Zhang
>
> Enable system interrupt for jrbc during engine starting time.
>
> Signed-off-by: Boyuan Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> index 4fccb21..22c1588 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> @@ -595,6 +595,7 @@ static int vcn_v1_0_start(struct amdgpu_device *adev)
> struct amdgpu_ring *ring = &adev->vcn.ring_dec;
> uint32_t rb_bufsz, tmp;
> uint32_t lmi_swap_cntl;
> + uint32_t reg_temp;
> int i, j, r;
>
> /* disable byte swapping */
> @@ -700,6 +701,11 @@ static int vcn_v1_0_start(struct amdgpu_device *adev)
> (UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK),
> ~(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK));
>
> + /* enable system interrupt for JRBC*/
> + reg_temp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SYS_INT_EN));
> + reg_temp |= UVD_SYS_INT_EN__UVD_JRBC_EN_MASK;
> + WREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SYS_INT_EN), reg_temp);
> +
Shouldn't we move the setting of these interrupts into
vcn_v1_0_set_interrupt_state()? Same for the mastint. that way they
will get enabled/disabled as part of the fence driver sequence I
think. Or do they need to happen in a specific sequence?
Alex
> /* clear the bit 4 of VCN_STATUS */
> WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_STATUS), 0,
> ~(2 << UVD_STATUS__VCPU_REPORT__SHIFT));
> @@ -1754,7 +1760,7 @@ static const struct amdgpu_irq_src_funcs
> vcn_v1_0_irq_funcs = {
>
> static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev)
> {
> - adev->vcn.irq.num_types = adev->vcn.num_enc_rings + 1;
> + adev->vcn.irq.num_types = adev->vcn.num_enc_rings + 2;
> adev->vcn.irq.funcs = &vcn_v1_0_irq_funcs;
> }
>
> --
> 2.7.4
>
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On 2018-07-19 02:30 PM, Alex Deucher wrote:
> On Thu, Jul 19, 2018 at 1:07 PM, Andrey Grodzovsky
> wrote:
>>
>>
>> On 07/19/2018 12:59 PM, Michel Dänzer wrote:
>>>
>>> On 2018-07-19 06:53 PM, Andrey Grodzovsky wrote:
On 07/19/2018 12:47 PM, Michel Dänzer wrote:
>
> On 2018-07-19 06:33 PM, Andrey Grodzovsky wrote:
>>
>> On 07/19/2018 11:39 AM, Ville Syrjälä wrote:
>>>
>>> On Thu, Jul 19, 2018 at 11:19:56AM -0400, Andrey Grodzovsky wrote:
Problem:
FB is still not unpinned during the first run of amdgpu_bo_evict_vram
and so it's left for the second run, but during second run the SDMA
for
moving buffer around already disabled and you have to do
it with CPU, but FB is not in visible VRAM and hence the eviction
failure
leading later to resume failure.
Fix:
When DAL in use get a pointer to FB from crtc->primary->state rather
then from crtc->primary which is not set for DAL since it supports
atomic KMS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic
drivers
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..dd9ebf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device
*dev, bool suspend, bool fbcon)
/* unpin the front buffers and cursors */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
{
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-struct drm_framebuffer *fb = crtc->primary->fb;
+ struct drm_framebuffer *fb =
amdgpu_device_has_dc_support(adev) ?
+ crtc->primary->state->fb : crtc->primary->fb;
>>>
>>> So apparently you haven't yet turned off the planes here. If I'm
>>> reading things right amdgpu_device_ip_suspend() should end up doing
>>> that through drm_atomic_helper_suspend(). So it looks like like now
>>> you'll end up unpinning the same bos twice. Doesn't that mess up
>>> some kind of refcount or something?
>>
>> amdgpu_bo_unpin has a guard against that, amdgpu_bo_unreserve is less
>> clear.
>
> BO reservation shouldn't an issue here, BOs are only reserved for a
> short time around (un)pinning them.
>
>
>>> To me it would seem better to susped the display before trying
>>> to evict the bos.
>>
>> Yea, i was aware of that and indeed DAL shouldn't rely on the code in
>> amdgpu_device_suspend to unpin
>> front buffer and cursor since the atomic helper should do it. Problem
>> is
>> that during amdgpu_device_ip_suspend
>> the SDMA engine gets suspended too, so you have to embed another
>> eviction in between, after display is suspended but before
>> SDMA and this forces ordering between them which kind of already in
>> place (amd_ip_block_type) but still it's an extra constrain.
>
> Ville's point (which I basically agree with) is that the display
> hardware should be turned off before evicting VRAM the first time, in
> which case no second eviction should be necessary (for this purpose).
Display HW is turned off as part of all IPs in a loop inside
amdgpu_device_ip_suspend.
Are you suggesting to extract the display HW turn off from inside
amdgpu_device_ip_suspend and place it
before the first call to amdgpu_bo_evict_vram ?
>>>
>>> In a nutshell, yes.
>>>
>>> Or maybe it would be easier to move the amdgpu_bo_evict_vram call down
>>> to somewhere called from amdgpu_device_ip_suspend?
>>
>>
>> I can move the BEFORE and AFTER calls to amdgpu_bo_evict_vram inside
>> amdgpu_device_ip_suspend
>> such that the first one is called AFTER display is shut off, while the
>> second in the very end of the function.
>> I am just not sure what's gonna be the side effect of evicting after bunch
>> of blocks (such as GMC) are already disabled.
>
> How about something like the attached patches? Basically split the ip
> suspend sequence in two like we do for resume.
>
Patches are
Acked-by: Harry Wentland
Harry
> Alex
>
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[pull] amdgpu, ttm, scheduler drm-next-4.19
Hi Dave, More features for 4.19: - Map processes to vmids for debugging GPUVM faults - Raven gfxoff fixes - Initial gfxoff support for vega12 - Use defines for interrupt sources rather than magic numbers - DC aux fixes - Finish DC logging TODO - Add more DC debugfs interfaces for conformance testing - Add CRC support for DCN - Scheduler rework in preparation for load balancing - Unify common smu9 code - Clean up UVD instancing support - ttm cleanups - Misc fixes and cleanups The following changes since commit b861686b18538eaaf3530255eb37b4133146fbe2: Merge tag 'vmwgfx-next-4.19-3' of git://people.freedesktop.org/~thomash/linux into drm-next (2018-07-10 11:13:39 +1000) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-next-4.19 for you to fetch changes up to 5c675bf2c67c4efb36a78bebf44dc435db2daf16: drm/amdgpu: clean up UVD instance handling v2 (2018-07-19 13:56:44 -0500) Alex Deucher (9): drm/amdgpu/vi: fix mixed up state in smu clockgating setup drm/amdgpu/pp/smu7: use a local variable for toc indexing drm/amdgpu/pp/smu7: drop unused values in smu data structure drm/amdgpu/pp/smu7: remove local mc_addr variable drm/amdgpu/pp/smu7: cache smu firmware toc drm/amdgpu/pp: remove dead vega12 code drm/amdgpu/pp: split out common smumgr smu9 code drm/amdgpu/pp: switch smu callback type for get_argument() drm/amdgpu/powerplay: use irq source defines for smu7 sources Alvin lee (1): drm/amd/display: read DP sink and DP branch hardware and firmware revision from DPCD Andrey Grodzovsky (8): drm/amdgpu: Add support for logging process info in amdgpu_vm. drm/amdgpu: Present amdgpu_task_info in VM_FAULTS. drm/amdgpu: Verify root PD is mapped into kernel address space (v4) drm/amd: Add interrupt source definitions for VI v3. drm/amd: Use newly added interrupt source defs for VI v3. drm/amd: Add interrupt source definitions for SOC15 v3. drm/amd: Use newly added interrupt source defs for SOC15. drm/amdgpu: Allow to create BO lists in CS ioctl v3 Charlene Liu (6): drm/amd/display: Move common GPIO registers into a common define drm/amd/display: Define couple extra DCN registers drm/amd/display: add missing mask for dcn drm/amd/display: set default GPIO_ID_HPD drm/amd/display: introduce concept of send_reset_length for i2c engines drm/amd/display: add DalEnableHDMI20 key support Christian König (14): drm/amd/display: fix invalid function table override drm/amd/display: make function tables const drm/amdgpu: fix TTM move entity init order drm/amdgpu: cleanup job header drm/amdgpu: remove fence context from the job drm/amdgpu: remove ring parameter from amdgpu_job_submit drm/amdgpu: remove job->ring drm/amdgpu: add amdgpu_job_submit_direct helper drm/amdgpu: remove job->adev (v2) drm/amdgpu: minor cleanup in amdgpu_job.c drm/amdgpu: allow for more flexible priority handling drm/amdgpu: change ring priority after pushing the job (v2) drm/amdgpu: remove superflous UVD encode entity drm/amdgpu: clean up UVD instance handling v2 David Francis (2): drm/amd/display: Add CRC support for DCN drm/amd/display: Expose couple OPTC functions through header Dmytro Laktyushkin (8): drm/amd/display: dcc always on for bw calculations on raven drm/amd/display: remove dentist_vco_freq from resource_pool drm/amd/display: drop unused register defines drm/amd/display: add additional info for cursor position programming drm/amd/display: add dcn cursor hotsport rotation and mirror support drm/amd/display: add max scl ratio to soc bounding box drm/amd/display: update dml to match DV dml drm/amd/display: properly turn autocal off Eric Bernstein (3): drm/amd/display: Separate HUBP surface size and rotation/mirror programming drm/amd/display: Add Azalia registers to HW sequencer drm/amd/display: Expose bunch of functions from dcn10_hw_sequencer Eric Huang (1): Revert "drm/amd/powerplay: fix performance drop on Vega10" Eric Yang (1): drm/amd/display: support access ddc for mst branch Evan Quan (10): drm/amdgpu: pin the csb buffer on hw init v2 drm/amdgpu: init CSIB regardless of rlc version and pg status drm/amdgpu: correct rlc save restore list initialization for v2_1 drm/amdgpu: drop mmRLC_PG_CNTL clear v2 drm/amdgpu: no touch for the reserved bit of RLC_CGTT_MGCG_OVERRIDE drm/amdgpu: reduce the idle period that RLC has to wait before request CGCG drm/amd/powerplay: add vega12 SMU gfxoff support v3 drm/amd/powerplay: no need to mask workable gfxoff feature for vega12 drm/amd/powerplay: convert the sclk/mclk into Mhz for comparation drm/amd/powerplay: fixe
Re: [PATCH] drm/amd/display: Drop unused backlight functions in DM
On Thu, Jul 19, 2018 at 2:28 PM, Harry Wentland wrote:
> These are only ever called for non-DC code.
>
> Signed-off-by: Harry Wentland
Acked-by: Alex Deucher
> ---
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 18 ++
> 1 file changed, 2 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 004636ead29b..205c62903050 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1568,18 +1568,6 @@ static void dm_bandwidth_update(struct amdgpu_device
> *adev)
> /* TODO: implement later */
> }
>
> -static void dm_set_backlight_level(struct amdgpu_encoder *amdgpu_encoder,
> -u8 level)
> -{
> - /* TODO: translate amdgpu_encoder to display_index and call DAL */
> -}
> -
> -static u8 dm_get_backlight_level(struct amdgpu_encoder *amdgpu_encoder)
> -{
> - /* TODO: translate amdgpu_encoder to display_index and call DAL */
> - return 0;
> -}
> -
> static int amdgpu_notify_freesync(struct drm_device *dev, void *data,
> struct drm_file *filp)
> {
> @@ -1654,10 +1642,8 @@ static int amdgpu_notify_freesync(struct drm_device
> *dev, void *data,
> static const struct amdgpu_display_funcs dm_display_funcs = {
> .bandwidth_update = dm_bandwidth_update, /* called unconditionally */
> .vblank_get_counter = dm_vblank_get_counter,/* called unconditionally
> */
> - .backlight_set_level =
> - dm_set_backlight_level,/* called unconditionally */
> - .backlight_get_level =
> - dm_get_backlight_level,/* called unconditionally */
> + .backlight_set_level = NULL, /* never called for DC */
> + .backlight_get_level = NULL, /* never called for DC */
> .hpd_sense = NULL,/* called unconditionally */
> .hpd_set_polarity = NULL, /* called unconditionally */
> .hpd_get_gpio_reg = NULL, /* VBIOS parsing. DAL does it. */
> --
> 2.17.1
>
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[PATCH v2] drm/amd/display: Honor pplib stutter mask for all ASICs in DC
[Why]
We were only setting this mask for DCN, but should really use it
universally for all ASICs.
[How]
Move the assignment out of the Raven switch statement for all ASICs
other than Stoney and Carrizo.
v2: Keep stutter always on for Carrizo and Stoney (Alex)
Cc: rex@amd.com
Cc: feifei...@amd.com
Cc: kenneth.f...@amd.com
Cc: evan.q...@amd.com
Cc: bhawanpreet.la...@amd.com
Cc: jordan.laz...@amd.com
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 8e3ebd988043..4d6e5914256c 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1528,10 +1528,6 @@ static int amdgpu_dm_initialize_drm_device(struct
amdgpu_device *adev)
DRM_ERROR("DM: Failed to initialize IRQ\n");
goto fail;
}
- /*
-* Temporary disable until pplib/smu interaction is implemented
-*/
- dm->dc->debug.disable_stutter = amdgpu_pp_feature_mask &
PP_STUTTER_MODE ? false : true;
break;
#endif
default:
@@ -1539,6 +1535,9 @@ static int amdgpu_dm_initialize_drm_device(struct
amdgpu_device *adev)
goto fail;
}
+ if (adev->asic_type != CHIP_CARRIZO && adev->asic_type != CHIP_STONEY)
+ dm->dc->debug.disable_stutter = amdgpu_pp_feature_mask &
PP_STUTTER_MODE ? false : true;
+
return 0;
fail:
kfree(aencoder);
--
2.17.1
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Re: [PATCH v2] drm/amd/display: Honor pplib stutter mask for all ASICs in DC
On Thu, Jul 19, 2018 at 3:49 PM, Harry Wentland wrote:
> [Why]
> We were only setting this mask for DCN, but should really use it
> universally for all ASICs.
>
> [How]
> Move the assignment out of the Raven switch statement for all ASICs
> other than Stoney and Carrizo.
>
> v2: Keep stutter always on for Carrizo and Stoney (Alex)
>
> Cc: rex@amd.com
> Cc: feifei...@amd.com
> Cc: kenneth.f...@amd.com
> Cc: evan.q...@amd.com
> Cc: bhawanpreet.la...@amd.com
> Cc: jordan.laz...@amd.com
> Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 +++
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 8e3ebd988043..4d6e5914256c 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1528,10 +1528,6 @@ static int amdgpu_dm_initialize_drm_device(struct
> amdgpu_device *adev)
> DRM_ERROR("DM: Failed to initialize IRQ\n");
> goto fail;
> }
> - /*
> -* Temporary disable until pplib/smu interaction is
> implemented
> -*/
> - dm->dc->debug.disable_stutter = amdgpu_pp_feature_mask &
> PP_STUTTER_MODE ? false : true;
> break;
> #endif
> default:
> @@ -1539,6 +1535,9 @@ static int amdgpu_dm_initialize_drm_device(struct
> amdgpu_device *adev)
> goto fail;
> }
>
> + if (adev->asic_type != CHIP_CARRIZO && adev->asic_type != CHIP_STONEY)
> + dm->dc->debug.disable_stutter = amdgpu_pp_feature_mask &
> PP_STUTTER_MODE ? false : true;
> +
> return 0;
> fail:
> kfree(aencoder);
> --
> 2.17.1
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Re: [PATCH xf86-video-amdgpu] Remove AMDGPUInfoRec::fbcon_pixmap
On Thu, Jul 19, 2018 at 11:01 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> We always destroy the fbcon pixmap in drmmode_copy_fb anyway.
>
> Signed-off-by: Michel Dänzer
Reviewed-by: Alex Deucher
> ---
> src/amdgpu_drv.h | 1 -
> src/amdgpu_kms.c | 3 ---
> src/drmmode_display.c | 13 ++---
> 3 files changed, 2 insertions(+), 15 deletions(-)
>
> diff --git a/src/amdgpu_drv.h b/src/amdgpu_drv.h
> index 8a77b05fd..45bc394aa 100644
> --- a/src/amdgpu_drv.h
> +++ b/src/amdgpu_drv.h
> @@ -264,7 +264,6 @@ typedef struct {
> struct amdgpu_dri2 dri2;
>
> /* accel */
> - PixmapPtr fbcon_pixmap;
> int callback_event_type;
> uint_fast32_t gpu_flushed;
> uint_fast32_t gpu_synced;
> diff --git a/src/amdgpu_kms.c b/src/amdgpu_kms.c
> index 39e047e29..c22b7975c 100644
> --- a/src/amdgpu_kms.c
> +++ b/src/amdgpu_kms.c
> @@ -125,9 +125,6 @@ static void AMDGPUFreeRec(ScrnInfoPtr pScrn)
>
> info = AMDGPUPTR(pScrn);
> if (info) {
> - if (info->fbcon_pixmap)
> - pScrn->pScreen->DestroyPixmap(info->fbcon_pixmap);
> -
> pEnt = info->pEnt;
> free(pScrn->driverPrivate);
> pScrn->driverPrivate = NULL;
> diff --git a/src/drmmode_display.c b/src/drmmode_display.c
> index 8407a4577..aa4915933 100644
> --- a/src/drmmode_display.c
> +++ b/src/drmmode_display.c
> @@ -357,13 +357,9 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
> {
> ScreenPtr pScreen = pScrn->pScreen;
> AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
> - AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
> - PixmapPtr pixmap = info->fbcon_pixmap;
> + PixmapPtr pixmap = NULL;
> drmModeFBPtr fbcon;
>
> - if (pixmap)
> - return pixmap;
> -
> fbcon = drmModeGetFB(pAMDGPUEnt->fd, fbcon_id);
> if (!fbcon)
> return NULL;
> @@ -387,7 +383,6 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
> pixmap = NULL;
> }
>
> - info->fbcon_pixmap = pixmap;
> out_free_fb:
> drmModeFreeFB(fbcon);
> return pixmap;
> @@ -396,7 +391,6 @@ out_free_fb:
> void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode)
> {
> xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
> - AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
> ScreenPtr pScreen = pScrn->pScreen;
> PixmapPtr src, dst = pScreen->GetScreenPixmap(pScreen);
> struct drmmode_fb *fb = amdgpu_pixmap_get_fb(dst);
> @@ -436,10 +430,7 @@ void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr
> drmmode)
> FreeScratchGC(gc);
>
> pScreen->canDoBGNoneRoot = TRUE;
> -
> - if (info->fbcon_pixmap)
> - pScrn->pScreen->DestroyPixmap(info->fbcon_pixmap);
> - info->fbcon_pixmap = NULL;
> + pScreen->DestroyPixmap(src);
>
> return;
> }
> --
> 2.18.0
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Re: [PATCH xf86-video-amdgpu] Free previous xf86CrtcRec gamma LUT memory
On Thu, Jul 19, 2018 at 5:37 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> We were leaking it.
>
> Also, don't bother allocating new memory if it's already the expected
> size.
>
> Signed-off-by: Michel Dänzer
Reviewed-by: Alex Deucher
> ---
> src/drmmode_display.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/src/drmmode_display.c b/src/drmmode_display.c
> index 1aefd199b..e947ca979 100644
> --- a/src/drmmode_display.c
> +++ b/src/drmmode_display.c
> @@ -3629,13 +3629,18 @@ Bool drmmode_setup_colormap(ScreenPtr pScreen,
> ScrnInfoPtr pScrn)
>
> for (i = 0; i < xf86_config->num_crtc; i++) {
> xf86CrtcPtr crtc = xf86_config->crtc[i];
> - void *gamma = malloc(1024 * 3 *
> sizeof(CARD16));
> + void *gamma;
>
> + if (crtc->gamma_size == 1024)
> + continue;
> +
> + gamma = malloc(1024 * 3 * sizeof(CARD16));
> if (!gamma) {
> ErrorF("Failed to allocate gamma LUT
> memory\n");
> return FALSE;
> }
>
> + free(crtc->gamma_red);
> crtc->gamma_size = 1024;
> crtc->gamma_red = gamma;
> crtc->gamma_green = crtc->gamma_red +
> crtc->gamma_size;
> --
> 2.18.0
>
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On 07/19/2018 03:37 PM, Harry Wentland wrote:
On 2018-07-19 02:30 PM, Alex Deucher wrote:
On Thu, Jul 19, 2018 at 1:07 PM, Andrey Grodzovsky
wrote:
On 07/19/2018 12:59 PM, Michel Dänzer wrote:
On 2018-07-19 06:53 PM, Andrey Grodzovsky wrote:
On 07/19/2018 12:47 PM, Michel Dänzer wrote:
On 2018-07-19 06:33 PM, Andrey Grodzovsky wrote:
On 07/19/2018 11:39 AM, Ville Syrjälä wrote:
On Thu, Jul 19, 2018 at 11:19:56AM -0400, Andrey Grodzovsky wrote:
Problem:
FB is still not unpinned during the first run of amdgpu_bo_evict_vram
and so it's left for the second run, but during second run the SDMA
for
moving buffer around already disabled and you have to do
it with CPU, but FB is not in visible VRAM and hence the eviction
failure
leading later to resume failure.
Fix:
When DAL in use get a pointer to FB from crtc->primary->state rather
then from crtc->primary which is not set for DAL since it supports
atomic KMS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic
drivers
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..dd9ebf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct drm_device
*dev, bool suspend, bool fbcon)
/* unpin the front buffers and cursors */
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
{
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-struct drm_framebuffer *fb = crtc->primary->fb;
+ struct drm_framebuffer *fb =
amdgpu_device_has_dc_support(adev) ?
+ crtc->primary->state->fb : crtc->primary->fb;
So apparently you haven't yet turned off the planes here. If I'm
reading things right amdgpu_device_ip_suspend() should end up doing
that through drm_atomic_helper_suspend(). So it looks like like now
you'll end up unpinning the same bos twice. Doesn't that mess up
some kind of refcount or something?
amdgpu_bo_unpin has a guard against that, amdgpu_bo_unreserve is less
clear.
BO reservation shouldn't an issue here, BOs are only reserved for a
short time around (un)pinning them.
To me it would seem better to susped the display before trying
to evict the bos.
Yea, i was aware of that and indeed DAL shouldn't rely on the code in
amdgpu_device_suspend to unpin
front buffer and cursor since the atomic helper should do it. Problem
is
that during amdgpu_device_ip_suspend
the SDMA engine gets suspended too, so you have to embed another
eviction in between, after display is suspended but before
SDMA and this forces ordering between them which kind of already in
place (amd_ip_block_type) but still it's an extra constrain.
Ville's point (which I basically agree with) is that the display
hardware should be turned off before evicting VRAM the first time, in
which case no second eviction should be necessary (for this purpose).
Display HW is turned off as part of all IPs in a loop inside
amdgpu_device_ip_suspend.
Are you suggesting to extract the display HW turn off from inside
amdgpu_device_ip_suspend and place it
before the first call to amdgpu_bo_evict_vram ?
In a nutshell, yes.
Or maybe it would be easier to move the amdgpu_bo_evict_vram call down
to somewhere called from amdgpu_device_ip_suspend?
I can move the BEFORE and AFTER calls to amdgpu_bo_evict_vram inside
amdgpu_device_ip_suspend
such that the first one is called AFTER display is shut off, while the
second in the very end of the function.
I am just not sure what's gonna be the side effect of evicting after bunch
of blocks (such as GMC) are already disabled.
How about something like the attached patches? Basically split the ip
suspend sequence in two like we do for resume.
Patches are
Acked-by: Harry Wentland
Harry
Alex
Patches look good indeed but on second S3 in a raw i get a warning in
dma_fence_is_later
about fence contexts not equal. I will have to take a look why is that.
Andrey
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Re: [PATCH] drm/amdgpu: Fix S3 resume failre.
On 07/19/2018 04:17 PM, Andrey Grodzovsky wrote:
On 07/19/2018 03:37 PM, Harry Wentland wrote:
On 2018-07-19 02:30 PM, Alex Deucher wrote:
On Thu, Jul 19, 2018 at 1:07 PM, Andrey Grodzovsky
wrote:
On 07/19/2018 12:59 PM, Michel Dänzer wrote:
On 2018-07-19 06:53 PM, Andrey Grodzovsky wrote:
On 07/19/2018 12:47 PM, Michel Dänzer wrote:
On 2018-07-19 06:33 PM, Andrey Grodzovsky wrote:
On 07/19/2018 11:39 AM, Ville Syrjälä wrote:
On Thu, Jul 19, 2018 at 11:19:56AM -0400, Andrey Grodzovsky
wrote:
Problem:
FB is still not unpinned during the first run of
amdgpu_bo_evict_vram
and so it's left for the second run, but during second run
the SDMA
for
moving buffer around already disabled and you have to do
it with CPU, but FB is not in visible VRAM and hence the
eviction
failure
leading later to resume failure.
Fix:
When DAL in use get a pointer to FB from crtc->primary->state
rather
then from crtc->primary which is not set for DAL since it
supports
atomic KMS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic
drivers
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 709e4a3..dd9ebf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2642,7 +2642,8 @@ int amdgpu_device_suspend(struct
drm_device
*dev, bool suspend, bool fbcon)
/* unpin the front buffers and cursors */
list_for_each_entry(crtc,
&dev->mode_config.crtc_list, head)
{
struct amdgpu_crtc *amdgpu_crtc =
to_amdgpu_crtc(crtc);
- struct drm_framebuffer *fb = crtc->primary->fb;
+ struct drm_framebuffer *fb =
amdgpu_device_has_dc_support(adev) ?
+ crtc->primary->state->fb : crtc->primary->fb;
So apparently you haven't yet turned off the planes here. If I'm
reading things right amdgpu_device_ip_suspend() should end up
doing
that through drm_atomic_helper_suspend(). So it looks like
like now
you'll end up unpinning the same bos twice. Doesn't that mess up
some kind of refcount or something?
amdgpu_bo_unpin has a guard against that, amdgpu_bo_unreserve
is less
clear.
BO reservation shouldn't an issue here, BOs are only reserved for a
short time around (un)pinning them.
To me it would seem better to susped the display before trying
to evict the bos.
Yea, i was aware of that and indeed DAL shouldn't rely on the
code in
amdgpu_device_suspend to unpin
front buffer and cursor since the atomic helper should do it.
Problem
is
that during amdgpu_device_ip_suspend
the SDMA engine gets suspended too, so you have to embed another
eviction in between, after display is suspended but before
SDMA and this forces ordering between them which kind of
already in
place (amd_ip_block_type) but still it's an extra constrain.
Ville's point (which I basically agree with) is that the display
hardware should be turned off before evicting VRAM the first
time, in
which case no second eviction should be necessary (for this
purpose).
Display HW is turned off as part of all IPs in a loop inside
amdgpu_device_ip_suspend.
Are you suggesting to extract the display HW turn off from inside
amdgpu_device_ip_suspend and place it
before the first call to amdgpu_bo_evict_vram ?
In a nutshell, yes.
Or maybe it would be easier to move the amdgpu_bo_evict_vram call
down
to somewhere called from amdgpu_device_ip_suspend?
I can move the BEFORE and AFTER calls to amdgpu_bo_evict_vram inside
amdgpu_device_ip_suspend
such that the first one is called AFTER display is shut off, while the
second in the very end of the function.
I am just not sure what's gonna be the side effect of evicting
after bunch
of blocks (such as GMC) are already disabled.
How about something like the attached patches? Basically split the ip
suspend sequence in two like we do for resume.
Patches are
Acked-by: Harry Wentland
Harry
Alex
Patches look good indeed but on second S3 in a raw i get a warning in
dma_fence_is_later
about fence contexts not equal. I will have to take a look why is that.
Andrey
Seems like amdgpu_ttm_set_buffer_funcs_status destroys adev->mman.entity
on suspend without releasing
adev->mman.bdev.man[TTM_PL_VRAM].move fence so on resume the new
drm_sched_entity.fence_context causes
the warning against the old fence context which is different.
BTW, happens with my original change to, I just haven't noticed.
Andrey
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答复: [PATCH 2/2] drm/amdgpu/acpi: skip backlight events for DC
Those two patches are Reviewed-by: Jim Qu
Thanks
JimQu
发件人: amd-gfx 代表 Alex Deucher
发送时间: 2018年7月19日 22:35:53
收件人: amd-gfx@lists.freedesktop.org
抄送: Deucher, Alexander
主题: [PATCH 2/2] drm/amdgpu/acpi: skip backlight events for DC
No change in behavior, just bail sooner.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index 455617813ec4..353993218f21 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -389,7 +389,9 @@ static int amdgpu_atif_handler(struct amdgpu_device *adev,
DRM_DEBUG_DRIVER("ATIF: %d pending SBIOS requests\n", count);
- if (req.pending & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST) {
+ /* todo: add DC handling */
+ if ((req.pending & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST) &&
+ !amdgpu_device_has_dc_support(adev)) {
struct amdgpu_encoder *enc = atif->encoder_for_bl;
if (enc) {
--
2.13.6
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[PATCH 1/3] drm/amd/powerplay: slow UCLK switch when multiple displays not in sync
Slow switch for UCLK when there is multiple displays and they are not in sync. Change-Id: I8a296400d8b96443cc95518905307fc76c9f9e44 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c index 1a0dccb3fac1..bf7b8cfebe2b 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c @@ -3780,7 +3780,8 @@ static int vega10_notify_smc_display_config_after_ps_adjustment( uint32_t i; struct pp_display_clock_request clock_req; - if (hwmgr->display_config->num_display > 1) + if ((hwmgr->display_config->num_display > 1) && +!hwmgr->display_config->multi_monitor_in_sync) vega10_notify_smc_display_change(hwmgr, false); else vega10_notify_smc_display_change(hwmgr, true); -- 2.18.0 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/3] drm/amd/powerplay: correct the argument for PPSMC_MSG_SetUclkFastSwitch
The argument was set wrongly. Fast/slow switch was asked when there is
actually a slow/fast switch needed.
Change-Id: Ibcfdf741dea1700cc3796f84291606231e732f4b
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index bf7b8cfebe2b..002ed77a5268 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -3705,7 +3705,7 @@ static void vega10_notify_smc_display_change(struct
pp_hwmgr *hwmgr,
{
smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_SetUclkFastSwitch,
- has_disp ? 0 : 1);
+ has_disp ? 1 : 0);
}
int vega10_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
index 4ed218dd8ba7..35f96dacb50a 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
@@ -1334,7 +1334,7 @@ static int vega12_notify_smc_display_change(struct
pp_hwmgr *hwmgr,
if (data->smu_features[GNLD_DPM_UCLK].enabled)
return smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_SetUclkFastSwitch,
- has_disp ? 0 : 1);
+ has_disp ? 1 : 0);
return 0;
}
--
2.18.0
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[PATCH 3/3] drm/amd/powerplay: disallow slow switch if NBPState is disabled
Otherwise there may be potential SMU performance issues.
Change-Id: I05a09bb05407f7b3705d79a1d2c6628385c80461
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 5 -
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 5 -
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 002ed77a5268..ccb587607b03 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -3779,9 +3779,12 @@ static int
vega10_notify_smc_display_config_after_ps_adjustment(
struct PP_Clocks min_clocks = {0};
uint32_t i;
struct pp_display_clock_request clock_req;
+ bool uclk_switching_disabled =
+ (bool)hwmgr->display_config->nb_pstate_switch_disable;
if ((hwmgr->display_config->num_display > 1) &&
-!hwmgr->display_config->multi_monitor_in_sync)
+!hwmgr->display_config->multi_monitor_in_sync &&
+!uclk_switching_disabled)
vega10_notify_smc_display_change(hwmgr, false);
else
vega10_notify_smc_display_change(hwmgr, true);
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
index 35f96dacb50a..e3b11ae8fdb8 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
@@ -1387,9 +1387,12 @@ static int
vega12_notify_smc_display_config_after_ps_adjustment(
(struct vega12_hwmgr *)(hwmgr->backend);
struct PP_Clocks min_clocks = {0};
struct pp_display_clock_request clock_req;
+ bool uclk_switching_disabled =
+ (bool)hwmgr->display_config->nb_pstate_switch_disable;
if ((hwmgr->display_config->num_display > 1) &&
- !hwmgr->display_config->multi_monitor_in_sync)
+!hwmgr->display_config->multi_monitor_in_sync &&
+!uclk_switching_disabled)
vega12_notify_smc_display_change(hwmgr, false);
else
vega12_notify_smc_display_change(hwmgr, true);
--
2.18.0
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Re: [PATCH libdrm] amdgpu: add amdgpu_bo_handle_type_kms_noimport
On Wed, Jul 18, 2018 at 11:55 AM, Michel Dänzer wrote: > On 2018-07-17 08:14 PM, Marek Olšák wrote: >> Michel, I think you are wasting your time. This change can be misused >> as easily as any other API. It's not more dangerous that any other >> amdgpu libdrm function. > > That's trivially false. > >> You won't achieve anything by optimizing the hash table (= losing time), >> [...] > > I think you're focusing too much on your immediate desire instead of the > big(ger) picture. > > E.g. I see amdgpu_bo_export getting called from surprising places (in > Xorg), performing a hash table lookup each time. Fixing that would > achieve something, though probably not much. I know about the use in Xorg and this patch actually indirectly mentions it (it mentions Glamor in the code). The flag contains _noimport to self-document itself to mitigate incorrect usage. > > Anyway, adding dangerous API (keep in mind that we don't control all > libdrm_amdgpu users, or even know how they're using it) for something > that can also be achieved without is just a bad idea. Avoiding that is > achievement enough. We don't need to control other libdrm users. They can control themselves. :) I'm totally fine with incorrect usage leading to bad things, like any other bug. Much worse things can be done with the CS ioctl. Marek ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
