RE: [PATCH] drm/amdgpu: Moved doorbell structures to seperate file

[Zeng, Oak]

Alex,

No I didn't. I don't know what happened to my email account.

Can you forward that comment to me again?

Regards,
Oak

From: Deucher, Alexander 
Sent: Friday, November 23, 2018 3:20 PM
To: Zeng, Oak ; amd-gfx@lists.freedesktop.org
Cc: Zeng, Oak 
Subject: Re: [PATCH] drm/amdgpu: Moved doorbell structures to seperate file


Did you see my other comments about consolidating vega10, raven, and vega12?



Reviewed-by: Alex Deucher 
mailto:alexander.deuc...@amd.com>>


From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Oak Zeng mailto:oz...@amd.com>>
Sent: Friday, November 23, 2018 3:01:23 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zeng, Oak
Subject: [PATCH] drm/amdgpu: Moved doorbell structures to seperate file

Move doorbell structures, enum definitions and helper functions
from amdgpu.h to amdgpu_doorbell.h. No functional change

Change-Id: I09f7b84869b6d3c688b7a2506ff78d62b3de23f5
Signed-off-by: Oak Zeng mailto:oz...@amd.com>>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  | 227 +---
 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 249 +++
 2 files changed, 250 insertions(+), 226 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e4101b1..7fc32c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -81,6 +81,7 @@
 #include "amdgpu_job.h"
 #include "amdgpu_bo_list.h"
 #include "amdgpu_gem.h"
+#include "amdgpu_doorbell.h"

 #define MAX_GPU_INSTANCE16

@@ -361,173 +362,6 @@ int amdgpu_fence_slab_init(void);
 void amdgpu_fence_slab_fini(void);

 /*
- * GPU doorbell structures, functions & helpers
- */
-typedef enum _AMDGPU_DOORBELL_ASSIGNMENT
-{
-   AMDGPU_DOORBELL_KIQ = 0x000,
-   AMDGPU_DOORBELL_HIQ = 0x001,
-   AMDGPU_DOORBELL_DIQ = 0x002,
-   AMDGPU_DOORBELL_MEC_RING0   = 0x010,
-   AMDGPU_DOORBELL_MEC_RING1   = 0x011,
-   AMDGPU_DOORBELL_MEC_RING2   = 0x012,
-   AMDGPU_DOORBELL_MEC_RING3   = 0x013,
-   AMDGPU_DOORBELL_MEC_RING4   = 0x014,
-   AMDGPU_DOORBELL_MEC_RING5   = 0x015,
-   AMDGPU_DOORBELL_MEC_RING6   = 0x016,
-   AMDGPU_DOORBELL_MEC_RING7   = 0x017,
-   AMDGPU_DOORBELL_GFX_RING0   = 0x020,
-   AMDGPU_DOORBELL_sDMA_ENGINE0= 0x1E0,
-   AMDGPU_DOORBELL_sDMA_ENGINE1= 0x1E1,
-   AMDGPU_DOORBELL_IH  = 0x1E8,
-   AMDGPU_DOORBELL_MAX_ASSIGNMENT  = 0x3FF,
-   AMDGPU_DOORBELL_INVALID = 0x
-} AMDGPU_DOORBELL_ASSIGNMENT;
-
-struct amdgpu_doorbell {
-   /* doorbell mmio */
-   resource_size_t base;
-   resource_size_t size;
-   u32 __iomem *ptr;
-   u32 num_doorbells;  /* Number of doorbells actually 
reserved for amdgpu. */
-};
-
-typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT
-{
-   /* Compute + GFX: 0~255 */
-   AMDGPU_VEGA20_DOORBELL_KIQ = 0x000,
-   AMDGPU_VEGA20_DOORBELL_HIQ = 0x001,
-   AMDGPU_VEGA20_DOORBELL_DIQ = 0x002,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING0   = 0x003,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING1   = 0x004,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING2   = 0x005,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING3   = 0x006,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING4   = 0x007,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING5   = 0x008,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING6   = 0x009,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING7   = 0x00A,
-   AMDGPU_VEGA20_DOORBELL_USERQUEUE_START = 0x00B,
-   AMDGPU_VEGA20_DOORBELL_USERQUEUE_END   = 0x08A,
-   AMDGPU_VEGA20_DOORBELL_GFX_RING0   = 0x08B,
-   /* SDMA:256~335*/
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0= 0x100,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1= 0x10A,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2= 0x114,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3= 0x11E,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4= 0x128,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5= 0x132,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6= 0x13C,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7= 0x146,
-   /* IH: 376~391 */
-   AMDGPU_VEGA20_DOORBELL_IH  = 0x178,
-   /* MMSCH: 392~407
-* overlap the doorbell assignment with VCN as they are  mutually 
exclusive
-* VCE engine's doorbell is 32 bit and two VCE ring share one QWORD
-*/
-   

Re: [PATCH] drm/amdgpu: Add delay after enable RLC ucode

[Kuehling, Felix]

On 2018-11-22 1:22 p.m., Liu, Shaoyun wrote:
> Driver shouldn't try to access any GFX registers until RLC is idle.
> During the test, it took 12 seconds for RLC to clear the BUSY bit
> in RLC_GPM_STAT register which is un-acceptable for driver.
> As per RLC engineer, it would take RLC Ucode less than 10,000 GFXCLK
> cycles to finish its critical section. In a lowest 300M enginer clock
> setting(default from vbios), 50 us delay is enough.
>
> Change-Id: If074fbeeecad3f63cf5f5ab232472d0fe46082a6
> Signed-off-by: shaoyunl 

See the comment from Ernst Sjöstrand. Other than that, this patch is
Acked-by: Felix Kuehling 

Maybe someone more familiar with the RLC can give a R-B.

Regards,
  Felix


> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 7 ---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index e409fbf..9686fcc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -2326,12 +2326,13 @@ static void gfx_v9_0_rlc_start(struct amdgpu_device 
> *adev)
>  #endif
>  
>   WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);
> + udelay(50);
>  
>   /* carrizo do enable cp interrupt after cp inited */
> - if (!(adev->flags & AMD_IS_APU))
> + if (!(adev->flags & AMD_IS_APU)) {
>   gfx_v9_0_enable_gui_idle_interrupt(adev, true);
> -
> - udelay(50);
> + udelay(50);
> + }
>  
>  #ifdef AMDGPU_RLC_DEBUG_RETRY
>   /* RLC_GPM_GENERAL_6 : RLC Ucode version */
___
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Re: amdgpu: several powerplay errors during boot of HAWAII PRO GPU

[Alex Deucher]

On Fri, Nov 23, 2018 at 5:28 AM Kai Wasserbäch
 wrote:
>
> [Please CC me on replies, I'm not subscribed to amd-gfx.]
>
> Hey,
> with the recent 4.19.x series of kernels I'm seeing several errors being 
> logged
> during boot for my R9 290 (HAWAII PRO) GPU:
> > [   50.057264] amdgpu: [powerplay] Failed to retrieve minimum clocks.
> > [   50.057266] amdgpu: [powerplay] Error in phm_get_clock_info
> > [   50.057309] [drm] dce110_link_encoder_construct: Failed to get 
> > encoder_cap_info from VBIOS with error code 4!
> > [   50.057316] [drm] dce110_link_encoder_construct: Failed to get 
> > encoder_cap_info from VBIOS with error code 4!
> > [   50.057324] [drm] dce110_link_encoder_construct: Failed to get 
> > encoder_cap_info from VBIOS with error code 4!

These are harmless.

> > [   51.611918] amdgpu: [powerplay]
> > failed to send message 282 ret is 254

These may be fixed by this patch if you are using an older pcie gen1/2 platform:
https://patchwork.freedesktop.org/patch/259364/

Alex

>
> Since the system is coming up and accelerations seems to be working, this 
> can't
> be critical. Or is there something I need to set on the kernel command line 
> (so
> far I have: modprobe.blacklist=radeon radeon.cik_support=0 
> amdgpu.cik_support=1
> amdgpu.dc=1)? Anyway, I thought I let you know. If you need more information,
> feel free to ask.
>
> Cheers,
> Kai
> ___
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
___
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Re: [PATCH] drm/amdgpu: Moved doorbell structures to seperate file

[Deucher, Alexander]

Did you see my other comments about consolidating vega10, raven, and vega12?


Reviewed-by: Alex Deucher 


From: amd-gfx  on behalf of Oak Zeng 

Sent: Friday, November 23, 2018 3:01:23 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zeng, Oak
Subject: [PATCH] drm/amdgpu: Moved doorbell structures to seperate file

Move doorbell structures, enum definitions and helper functions
from amdgpu.h to amdgpu_doorbell.h. No functional change

Change-Id: I09f7b84869b6d3c688b7a2506ff78d62b3de23f5
Signed-off-by: Oak Zeng 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  | 227 +---
 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 249 +++
 2 files changed, 250 insertions(+), 226 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e4101b1..7fc32c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -81,6 +81,7 @@
 #include "amdgpu_job.h"
 #include "amdgpu_bo_list.h"
 #include "amdgpu_gem.h"
+#include "amdgpu_doorbell.h"

 #define MAX_GPU_INSTANCE16

@@ -361,173 +362,6 @@ int amdgpu_fence_slab_init(void);
 void amdgpu_fence_slab_fini(void);

 /*
- * GPU doorbell structures, functions & helpers
- */
-typedef enum _AMDGPU_DOORBELL_ASSIGNMENT
-{
-   AMDGPU_DOORBELL_KIQ = 0x000,
-   AMDGPU_DOORBELL_HIQ = 0x001,
-   AMDGPU_DOORBELL_DIQ = 0x002,
-   AMDGPU_DOORBELL_MEC_RING0   = 0x010,
-   AMDGPU_DOORBELL_MEC_RING1   = 0x011,
-   AMDGPU_DOORBELL_MEC_RING2   = 0x012,
-   AMDGPU_DOORBELL_MEC_RING3   = 0x013,
-   AMDGPU_DOORBELL_MEC_RING4   = 0x014,
-   AMDGPU_DOORBELL_MEC_RING5   = 0x015,
-   AMDGPU_DOORBELL_MEC_RING6   = 0x016,
-   AMDGPU_DOORBELL_MEC_RING7   = 0x017,
-   AMDGPU_DOORBELL_GFX_RING0   = 0x020,
-   AMDGPU_DOORBELL_sDMA_ENGINE0= 0x1E0,
-   AMDGPU_DOORBELL_sDMA_ENGINE1= 0x1E1,
-   AMDGPU_DOORBELL_IH  = 0x1E8,
-   AMDGPU_DOORBELL_MAX_ASSIGNMENT  = 0x3FF,
-   AMDGPU_DOORBELL_INVALID = 0x
-} AMDGPU_DOORBELL_ASSIGNMENT;
-
-struct amdgpu_doorbell {
-   /* doorbell mmio */
-   resource_size_t base;
-   resource_size_t size;
-   u32 __iomem *ptr;
-   u32 num_doorbells;  /* Number of doorbells actually 
reserved for amdgpu. */
-};
-
-typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT
-{
-   /* Compute + GFX: 0~255 */
-   AMDGPU_VEGA20_DOORBELL_KIQ = 0x000,
-   AMDGPU_VEGA20_DOORBELL_HIQ = 0x001,
-   AMDGPU_VEGA20_DOORBELL_DIQ = 0x002,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING0   = 0x003,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING1   = 0x004,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING2   = 0x005,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING3   = 0x006,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING4   = 0x007,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING5   = 0x008,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING6   = 0x009,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING7   = 0x00A,
-   AMDGPU_VEGA20_DOORBELL_USERQUEUE_START = 0x00B,
-   AMDGPU_VEGA20_DOORBELL_USERQUEUE_END   = 0x08A,
-   AMDGPU_VEGA20_DOORBELL_GFX_RING0   = 0x08B,
-   /* SDMA:256~335*/
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0= 0x100,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1= 0x10A,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2= 0x114,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3= 0x11E,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4= 0x128,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5= 0x132,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6= 0x13C,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7= 0x146,
-   /* IH: 376~391 */
-   AMDGPU_VEGA20_DOORBELL_IH  = 0x178,
-   /* MMSCH: 392~407
-* overlap the doorbell assignment with VCN as they are  mutually 
exclusive
-* VCE engine's doorbell is 32 bit and two VCE ring share one QWORD
-*/
-   AMDGPU_VEGA20_DOORBELL64_VCN0_1  = 0x188, /* lower 32 
bits for VNC0 and upper 32 bits for VNC1 */
-   AMDGPU_VEGA20_DOORBELL64_VCN2_3  = 0x189,
-   AMDGPU_VEGA20_DOORBELL64_VCN4_5  = 0x18A,
-   AMDGPU_VEGA20_DOORBELL64_VCN6_7  = 0x18B,
-
-   AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1 = 0x188,
-   AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3 = 0x189,
-   AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5 

RE: [PATCH] drm/amdgpu: Moved doorbell structures to seperate file

[Zeng, Oak]

Hi Alex,

This is a follow up patch to your previous comment on the doorbell patches. 
Please review.

Regards,
Oak

-Original Message-
From: Zeng, Oak  
Sent: Friday, November 23, 2018 3:01 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zeng, Oak 
Subject: [PATCH] drm/amdgpu: Moved doorbell structures to seperate file

Move doorbell structures, enum definitions and helper functions from amdgpu.h 
to amdgpu_doorbell.h. No functional change

Change-Id: I09f7b84869b6d3c688b7a2506ff78d62b3de23f5
Signed-off-by: Oak Zeng 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  | 227 +---
 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 249 +++
 2 files changed, 250 insertions(+), 226 deletions(-)  create mode 100644 
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e4101b1..7fc32c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -81,6 +81,7 @@
 #include "amdgpu_job.h"
 #include "amdgpu_bo_list.h"
 #include "amdgpu_gem.h"
+#include "amdgpu_doorbell.h"
 
 #define MAX_GPU_INSTANCE   16
 
@@ -361,173 +362,6 @@ int amdgpu_fence_slab_init(void);  void 
amdgpu_fence_slab_fini(void);
 
 /*
- * GPU doorbell structures, functions & helpers
- */
-typedef enum _AMDGPU_DOORBELL_ASSIGNMENT -{
-   AMDGPU_DOORBELL_KIQ = 0x000,
-   AMDGPU_DOORBELL_HIQ = 0x001,
-   AMDGPU_DOORBELL_DIQ = 0x002,
-   AMDGPU_DOORBELL_MEC_RING0   = 0x010,
-   AMDGPU_DOORBELL_MEC_RING1   = 0x011,
-   AMDGPU_DOORBELL_MEC_RING2   = 0x012,
-   AMDGPU_DOORBELL_MEC_RING3   = 0x013,
-   AMDGPU_DOORBELL_MEC_RING4   = 0x014,
-   AMDGPU_DOORBELL_MEC_RING5   = 0x015,
-   AMDGPU_DOORBELL_MEC_RING6   = 0x016,
-   AMDGPU_DOORBELL_MEC_RING7   = 0x017,
-   AMDGPU_DOORBELL_GFX_RING0   = 0x020,
-   AMDGPU_DOORBELL_sDMA_ENGINE0= 0x1E0,
-   AMDGPU_DOORBELL_sDMA_ENGINE1= 0x1E1,
-   AMDGPU_DOORBELL_IH  = 0x1E8,
-   AMDGPU_DOORBELL_MAX_ASSIGNMENT  = 0x3FF,
-   AMDGPU_DOORBELL_INVALID = 0x
-} AMDGPU_DOORBELL_ASSIGNMENT;
-
-struct amdgpu_doorbell {
-   /* doorbell mmio */
-   resource_size_t base;
-   resource_size_t size;
-   u32 __iomem *ptr;
-   u32 num_doorbells;  /* Number of doorbells actually 
reserved for amdgpu. */
-};
-
-typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT
-{
-   /* Compute + GFX: 0~255 */
-   AMDGPU_VEGA20_DOORBELL_KIQ = 0x000,
-   AMDGPU_VEGA20_DOORBELL_HIQ = 0x001,
-   AMDGPU_VEGA20_DOORBELL_DIQ = 0x002,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING0   = 0x003,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING1   = 0x004,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING2   = 0x005,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING3   = 0x006,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING4   = 0x007,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING5   = 0x008,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING6   = 0x009,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING7   = 0x00A,
-   AMDGPU_VEGA20_DOORBELL_USERQUEUE_START = 0x00B,
-   AMDGPU_VEGA20_DOORBELL_USERQUEUE_END   = 0x08A,
-   AMDGPU_VEGA20_DOORBELL_GFX_RING0   = 0x08B,
-   /* SDMA:256~335*/
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0= 0x100,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1= 0x10A,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2= 0x114,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3= 0x11E,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4= 0x128,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5= 0x132,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6= 0x13C,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7= 0x146,
-   /* IH: 376~391 */
-   AMDGPU_VEGA20_DOORBELL_IH  = 0x178,
-   /* MMSCH: 392~407
-* overlap the doorbell assignment with VCN as they are  mutually 
exclusive
-* VCE engine's doorbell is 32 bit and two VCE ring share one QWORD
-*/
-   AMDGPU_VEGA20_DOORBELL64_VCN0_1  = 0x188, /* lower 32 
bits for VNC0 and upper 32 bits for VNC1 */
-   AMDGPU_VEGA20_DOORBELL64_VCN2_3  = 0x189,
-   AMDGPU_VEGA20_DOORBELL64_VCN4_5  = 0x18A,
-   AMDGPU_VEGA20_DOORBELL64_VCN6_7  = 0x18B,
-
-   AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1 = 0x188,
-   AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3 = 0x189,
-   AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5 = 0x18A,
- 

[PATCH] drm/amdgpu: Moved doorbell structures to seperate file

[Oak Zeng]

Move doorbell structures, enum definitions and helper functions
from amdgpu.h to amdgpu_doorbell.h. No functional change

Change-Id: I09f7b84869b6d3c688b7a2506ff78d62b3de23f5
Signed-off-by: Oak Zeng 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  | 227 +---
 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 249 +++
 2 files changed, 250 insertions(+), 226 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e4101b1..7fc32c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -81,6 +81,7 @@
 #include "amdgpu_job.h"
 #include "amdgpu_bo_list.h"
 #include "amdgpu_gem.h"
+#include "amdgpu_doorbell.h"
 
 #define MAX_GPU_INSTANCE   16
 
@@ -361,173 +362,6 @@ int amdgpu_fence_slab_init(void);
 void amdgpu_fence_slab_fini(void);
 
 /*
- * GPU doorbell structures, functions & helpers
- */
-typedef enum _AMDGPU_DOORBELL_ASSIGNMENT
-{
-   AMDGPU_DOORBELL_KIQ = 0x000,
-   AMDGPU_DOORBELL_HIQ = 0x001,
-   AMDGPU_DOORBELL_DIQ = 0x002,
-   AMDGPU_DOORBELL_MEC_RING0   = 0x010,
-   AMDGPU_DOORBELL_MEC_RING1   = 0x011,
-   AMDGPU_DOORBELL_MEC_RING2   = 0x012,
-   AMDGPU_DOORBELL_MEC_RING3   = 0x013,
-   AMDGPU_DOORBELL_MEC_RING4   = 0x014,
-   AMDGPU_DOORBELL_MEC_RING5   = 0x015,
-   AMDGPU_DOORBELL_MEC_RING6   = 0x016,
-   AMDGPU_DOORBELL_MEC_RING7   = 0x017,
-   AMDGPU_DOORBELL_GFX_RING0   = 0x020,
-   AMDGPU_DOORBELL_sDMA_ENGINE0= 0x1E0,
-   AMDGPU_DOORBELL_sDMA_ENGINE1= 0x1E1,
-   AMDGPU_DOORBELL_IH  = 0x1E8,
-   AMDGPU_DOORBELL_MAX_ASSIGNMENT  = 0x3FF,
-   AMDGPU_DOORBELL_INVALID = 0x
-} AMDGPU_DOORBELL_ASSIGNMENT;
-
-struct amdgpu_doorbell {
-   /* doorbell mmio */
-   resource_size_t base;
-   resource_size_t size;
-   u32 __iomem *ptr;
-   u32 num_doorbells;  /* Number of doorbells actually 
reserved for amdgpu. */
-};
-
-typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT
-{
-   /* Compute + GFX: 0~255 */
-   AMDGPU_VEGA20_DOORBELL_KIQ = 0x000,
-   AMDGPU_VEGA20_DOORBELL_HIQ = 0x001,
-   AMDGPU_VEGA20_DOORBELL_DIQ = 0x002,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING0   = 0x003,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING1   = 0x004,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING2   = 0x005,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING3   = 0x006,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING4   = 0x007,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING5   = 0x008,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING6   = 0x009,
-   AMDGPU_VEGA20_DOORBELL_MEC_RING7   = 0x00A,
-   AMDGPU_VEGA20_DOORBELL_USERQUEUE_START = 0x00B,
-   AMDGPU_VEGA20_DOORBELL_USERQUEUE_END   = 0x08A,
-   AMDGPU_VEGA20_DOORBELL_GFX_RING0   = 0x08B,
-   /* SDMA:256~335*/
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0= 0x100,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1= 0x10A,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2= 0x114,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3= 0x11E,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4= 0x128,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5= 0x132,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6= 0x13C,
-   AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7= 0x146,
-   /* IH: 376~391 */
-   AMDGPU_VEGA20_DOORBELL_IH  = 0x178,
-   /* MMSCH: 392~407
-* overlap the doorbell assignment with VCN as they are  mutually 
exclusive
-* VCE engine's doorbell is 32 bit and two VCE ring share one QWORD
-*/
-   AMDGPU_VEGA20_DOORBELL64_VCN0_1  = 0x188, /* lower 32 
bits for VNC0 and upper 32 bits for VNC1 */
-   AMDGPU_VEGA20_DOORBELL64_VCN2_3  = 0x189,
-   AMDGPU_VEGA20_DOORBELL64_VCN4_5  = 0x18A,
-   AMDGPU_VEGA20_DOORBELL64_VCN6_7  = 0x18B,
-
-   AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1 = 0x188,
-   AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3 = 0x189,
-   AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5 = 0x18A,
-   AMDGPU_VEGA20_DOORBELL64_UVD_RING6_7 = 0x18B,
-
-   AMDGPU_VEGA20_DOORBELL64_VCE_RING0_1 = 0x18C,
-   AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3 = 0x18D,
-   AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5 = 0x18E,
-   AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7 = 0x18F,

RE: [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic

[Zeng, Oak]

Hi Alex,

It is strange I didn't get your email on Wednesday. I will add one patch to 
move all the doorbell definitions to a separate amdgpu_doorbell.h

Regards,
Oak

From: Deucher, Alexander 
Sent: Friday, November 23, 2018 1:57 PM
To: Alex Deucher ; Zeng, Oak ; Koenig, 
Christian 
Cc: amd-gfx list 
Subject: Re: [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and 
future asic


The main idea is to be able to use different layouts on different asics that 
may share the same IP code.



Alex


From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Christian König 
mailto:ckoenig.leichtzumer...@gmail.com>>
Sent: Thursday, November 22, 2018 4:26:53 AM
To: Alex Deucher; Zeng, Oak
Cc: amd-gfx list
Subject: Re: [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and 
future asic

Am 21.11.18 um 17:39 schrieb Alex Deucher:
> On Wed, Nov 21, 2018 at 11:37 AM Zeng, Oak 
> mailto:oak.z...@amd.com>> wrote:
>>> No need to add a new file for this.  Just add this to vega20_reg_init.c.
>> Agreed.
>>
>>> Also, please use the doorbell enums rather than hardcoding the numbers.
>> Ok. Where should I put the doorbell enums for vega20? In amdgpu.h or in 
>> vega20_reg_init.c?
> Maybe add amdgpu_doorbell.h and move all of the enums there?

Mhm, isn't part of the goal of this work to get rid of the enums?

I mean when we have a structure to hold the indexes to we really need
the enums any more? I don't think so.

Christian.

>
> Alex
>
>> thanks,
>> Oak
>>
>> -Original Message-
>> From: amd-gfx 
>> mailto:amd-gfx-boun...@lists.freedesktop.org>>
>>  On Behalf Of Alex Deucher
>> Sent: Wednesday, November 21, 2018 11:22 AM
>> To: Zeng, Oak mailto:oak.z...@amd.com>>
>> Cc: Zeng, Oak mailto:oak.z...@amd.com>>; amd-gfx list 
>> mailto:amd-gfx@lists.freedesktop.org>>
>> Subject: Re: [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and 
>> future asic
>>
>> On Wed, Nov 21, 2018 at 10:52 AM Oak Zeng 
>> mailto:oz...@amd.com>> wrote:
>>> Change-Id: I04d22fb717ac50483c0835f160a2e860e344f358
>>> Signed-off-by: Oak Zeng mailto:oz...@amd.com>>
>>> Suggested-by: Felix Kuehling 
>>> mailto:felix.kuehl...@amd.com>>
>>> Suggested-by: Alex Deucher 
>>> mailto:alexander.deuc...@amd.com>>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/Makefile|  4 +-
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  4 +-
>>>   drivers/gpu/drm/amd/amdgpu/soc15.h |  1 +
>>>   .../drm/amd/amdgpu/vega20_doorbell_index_init.c| 64 
>>> ++
>>>   4 files changed, 70 insertions(+), 3 deletions(-)  create mode 100644
>>> drivers/gpu/drm/amd/amdgpu/vega20_doorbell_index_init.c
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
>>> b/drivers/gpu/drm/amd/amdgpu/Makefile
>>> index 3ab8eba..b3b150b 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/Makefile
>>> +++ b/drivers/gpu/drm/amd/amdgpu/Makefile
>>> @@ -63,8 +63,8 @@ amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o
>>> gfx_v6_0.o si_ih.o si_dma.o dce
>>>
>>>   amdgpu-y += \
>>>  vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o 
>>> nbio_v7_0.o vega10_reg_init.o \
>>> -   vega20_reg_init.o nbio_v7_4.o vega10_doorbell_index_init.o 
>>> vega12_doorbell_index_init.o \
>>> -   vi_doorbell_index_init.o
>>> +   vega20_reg_init.o nbio_v7_4.o vi_doorbell_index_init.o 
>>> vega10_doorbell_index_init.o \
>>> +   vega12_doorbell_index_init.o vega20_doorbell_index_init.o
>>>
>>>   # add DF block
>>>   amdgpu-y += \
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> index 3ffd8f5..19f2149 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> @@ -517,8 +517,10 @@ static int amdgpu_device_doorbell_init(struct 
>>> amdgpu_device *adev)
>>>  vi_doorbell_index_init(adev);
>>>  else if (adev->asic_type == CHIP_VEGA10)
>>>  vega10_doorbell_index_init(adev);
>>> -   else
>>> +   else if (adev->asic_type == CHIP_VEGA12 || adev->asic_type ==
>>> + CHIP_RAVEN)
>>>  vega12_doorbell_index_init(adev);
>>> +   else
>>> +   vega20_doorbell_index_init(adev);
>>>
>>>  /* No doorbell on SI hardware generation */
>>>  if (adev->asic_type < CHIP_BONAIRE) { diff --git
>>> a/drivers/gpu/drm/amd/amdgpu/soc15.h
>>> b/drivers/gpu/drm/amd/amdgpu/soc15.h
>>> index 939c0e8..6ba0d26 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/soc15.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h
>>> @@ -60,4 +60,5 @@ int vega20_reg_base_init(struct amdgpu_device
>>> *adev);
>>>
>>>   void vega10_doorbell_index_init(struct amdgpu_device *adev);  void
>>> vega12_doorbell_index_init(struct amdgpu_device *adev);
>>> +void vega20_doorbell_index_init(struct amdgpu_device *adev);
>>>   #endif
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_doorbell_index_init.c
>>> 

Re: [PATCH] drm: should break if already get the best size

[Deucher, Alexander]

Please add a proper patch description.


Alex


From: amd-gfx  on behalf of Zhu, Rex 

Sent: Friday, November 23, 2018 4:44:31 AM
To: Liu, Monk; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm: should break if already get the best size


Tested-by: Rex Zhu 


Without this patch, if we search node via rb tree.


For example: we insert  different node with rand size, size range in 
(1-).


the key in root node is 5587.


if we try to find the node with key equal to 5587 or 7381,


Loop:
node->key is 5587
node->key is 2273
node->key is 3706
node->key is 4892
node->key is 5296
node->key is 5461
node->key is 5519
node->key is 5549
node->key is 5570
node->key is 5581
node->key is 5584
node->key is 5585
node->key is 5586
node->key is 5586


Find the best node, key is 5587 (Loop 14 levels)


Loop:
node->key is 5587
node->key is 7381
node->key is 6474
node->key is 7034
node->key is 7228
node->key is 7314
node->key is 7339
node->key is 7349
node->key is 7372
node->key is 7377
node->key is 7378
node->key is 7379
node->key is 7379

find the best node, key is 7381. (Loop 13 levels)



With this patch:

we don't need to go down if we found the right node that size equal to we 
needed.



Best Regards
Rex


From: amd-gfx  on behalf of Monk Liu 

Sent: Thursday, November 22, 2018 8:33 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk
Subject: [PATCH] drm: should break if already get the best size

Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/drm_mm.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 3cc5fbd..369fd9b 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -318,6 +318,8 @@ static struct drm_mm_node *best_hole(struct drm_mm *mm, u64 
size)
 if (size <= node->hole_size) {
 best = node;
 rb = rb->rb_right;
+   if (size == node->hole_size)
+   break;
 } else {
 rb = rb->rb_left;
 }
--
2.7.4

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Re: [PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants

[Deucher, Alexander]

Is this required?  Are the harvesting fuses incorrect?  If the blocks are 
harvested, we should bail out of the blocks properly during init.  Also, please 
make this more explicit if we still need it.  E.g.,

   if ((adev->pdev->device == 0x67df) &&
  (adev->pdev->revision == 0xf7)) {

/* Some polaris12 variants don't support UVD/VCE */

  } else  {

 amdgpu_device_ip_block_add(adev, _v6_3_ip_block);

 amdgpu_device_ip_block_add(adev, _v3_4_ip_block);

}


That way if we re-arrange the order later, it will be easier to track.


Alex


From: amd-gfx  on behalf of Junwei Zhang 

Sent: Friday, November 23, 2018 3:32:27 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Jerry
Subject: [PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants

Some variants don't support UVD and VCE.

Signed-off-by: Junwei Zhang 
---
 drivers/gpu/drm/amd/amdgpu/vi.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index f3a4cf1f013a..3338b013ded4 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1660,6 +1660,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
 amdgpu_device_ip_block_add(adev, _v11_2_ip_block);
 amdgpu_device_ip_block_add(adev, _v8_0_ip_block);
 amdgpu_device_ip_block_add(adev, _v3_1_ip_block);
+   /* Some polaris12 variants don't support UVD/VCE */
+   if ((adev->pdev->device == 0x67df) &&
+ (adev->pdev->revision == 0xf7))
+   break;
 amdgpu_device_ip_block_add(adev, _v6_3_ip_block);
 amdgpu_device_ip_block_add(adev, _v3_4_ip_block);
 break;
--
2.17.1

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RE: [PATCH RFC 4/5] drm/amdgpu: Add accounting of command submission via DRM cgroup

[Ho, Kenny]

On Fri, Nov 23, 2018 at 1:13 PM Koenig, Christian  
wrote:
> Am 23.11.18 um 18:36 schrieb Eric Anholt:
> > Christian König  writes:
> >> Am 20.11.18 um 21:57 schrieb Eric Anholt:
> >>> Kenny Ho  writes:
>  Account for the number of command submitted to amdgpu by type on a per
>  cgroup basis, for the purpose of profiling/monitoring applications.
> >>> For profiling other drivers, I've used perf tracepoints, which let you
> >>> get useful timelines of multiple events in the driver.  Have you made
> >>> use of this stat for productive profiling?
> >> Yes, but this is not related to profiling at all.
> >>
> >> What we want to do is to limit the resource usage of processes.
> > That sounds great, and something I'd be interested in for vc4.  However,
> > as far as I saw explained here, this patch doesn't let you limit
> > resource usage of a process and is only useful for
> > "profiling/monitoring" so I'm wondering how it is useful for that
> > purpose.
>
> Ok, good to know. I haven't looked at this in deep, but if this is just
> for accounting that would certainly be missing the goal.
The end goal is to have limit in place.  The current patch is mostly to 
illustrate the structure of the controller and get some early feedback.  I will 
have more soon.

Regards,
Kenny
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Re: [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and future asic

[Deucher, Alexander]

The main idea is to be able to use different layouts on different asics that 
may share the same IP code.


Alex


From: amd-gfx  on behalf of Christian 
K?nig 
Sent: Thursday, November 22, 2018 4:26:53 AM
To: Alex Deucher; Zeng, Oak
Cc: amd-gfx list
Subject: Re: [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and 
future asic

Am 21.11.18 um 17:39 schrieb Alex Deucher:
> On Wed, Nov 21, 2018 at 11:37 AM Zeng, Oak  wrote:
>>> No need to add a new file for this.  Just add this to vega20_reg_init.c.
>> Agreed.
>>
>>> Also, please use the doorbell enums rather than hardcoding the numbers.
>> Ok. Where should I put the doorbell enums for vega20? In amdgpu.h or in 
>> vega20_reg_init.c?
> Maybe add amdgpu_doorbell.h and move all of the enums there?

Mhm, isn't part of the goal of this work to get rid of the enums?

I mean when we have a structure to hold the indexes to we really need
the enums any more? I don't think so.

Christian.

>
> Alex
>
>> thanks,
>> Oak
>>
>> -Original Message-
>> From: amd-gfx  On Behalf Of Alex 
>> Deucher
>> Sent: Wednesday, November 21, 2018 11:22 AM
>> To: Zeng, Oak 
>> Cc: Zeng, Oak ; amd-gfx list 
>> 
>> Subject: Re: [PATCH 7/7] drm/amdgpu: Use new doorbell layout for vega20 and 
>> future asic
>>
>> On Wed, Nov 21, 2018 at 10:52 AM Oak Zeng  wrote:
>>> Change-Id: I04d22fb717ac50483c0835f160a2e860e344f358
>>> Signed-off-by: Oak Zeng 
>>> Suggested-by: Felix Kuehling 
>>> Suggested-by: Alex Deucher 
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/Makefile|  4 +-
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  4 +-
>>>   drivers/gpu/drm/amd/amdgpu/soc15.h |  1 +
>>>   .../drm/amd/amdgpu/vega20_doorbell_index_init.c| 64 
>>> ++
>>>   4 files changed, 70 insertions(+), 3 deletions(-)  create mode 100644
>>> drivers/gpu/drm/amd/amdgpu/vega20_doorbell_index_init.c
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
>>> b/drivers/gpu/drm/amd/amdgpu/Makefile
>>> index 3ab8eba..b3b150b 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/Makefile
>>> +++ b/drivers/gpu/drm/amd/amdgpu/Makefile
>>> @@ -63,8 +63,8 @@ amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o
>>> gfx_v6_0.o si_ih.o si_dma.o dce
>>>
>>>   amdgpu-y += \
>>>  vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o 
>>> nbio_v7_0.o vega10_reg_init.o \
>>> -   vega20_reg_init.o nbio_v7_4.o vega10_doorbell_index_init.o 
>>> vega12_doorbell_index_init.o \
>>> -   vi_doorbell_index_init.o
>>> +   vega20_reg_init.o nbio_v7_4.o vi_doorbell_index_init.o 
>>> vega10_doorbell_index_init.o \
>>> +   vega12_doorbell_index_init.o vega20_doorbell_index_init.o
>>>
>>>   # add DF block
>>>   amdgpu-y += \
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> index 3ffd8f5..19f2149 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> @@ -517,8 +517,10 @@ static int amdgpu_device_doorbell_init(struct 
>>> amdgpu_device *adev)
>>>  vi_doorbell_index_init(adev);
>>>  else if (adev->asic_type == CHIP_VEGA10)
>>>  vega10_doorbell_index_init(adev);
>>> -   else
>>> +   else if (adev->asic_type == CHIP_VEGA12 || adev->asic_type ==
>>> + CHIP_RAVEN)
>>>  vega12_doorbell_index_init(adev);
>>> +   else
>>> +   vega20_doorbell_index_init(adev);
>>>
>>>  /* No doorbell on SI hardware generation */
>>>  if (adev->asic_type < CHIP_BONAIRE) { diff --git
>>> a/drivers/gpu/drm/amd/amdgpu/soc15.h
>>> b/drivers/gpu/drm/amd/amdgpu/soc15.h
>>> index 939c0e8..6ba0d26 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/soc15.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h
>>> @@ -60,4 +60,5 @@ int vega20_reg_base_init(struct amdgpu_device
>>> *adev);
>>>
>>>   void vega10_doorbell_index_init(struct amdgpu_device *adev);  void
>>> vega12_doorbell_index_init(struct amdgpu_device *adev);
>>> +void vega20_doorbell_index_init(struct amdgpu_device *adev);
>>>   #endif
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_doorbell_index_init.c
>>> b/drivers/gpu/drm/amd/amdgpu/vega20_doorbell_index_init.c
>>> new file mode 100644
>>> index 000..dcaef7f
>>> --- /dev/null
>>> +++ b/drivers/gpu/drm/amd/amdgpu/vega20_doorbell_index_init.c
>>> @@ -0,0 +1,64 @@
>>> +/*
>>> + * Copyright 2018 Advanced Micro Devices, Inc.
>>> + *
>>> + * Permission is hereby granted, free of charge, to any person
>>> +obtaining a
>>> + * copy of this software and associated documentation files (the
>>> +"Software"),
>>> + * to deal in the Software without restriction, including without
>>> +limitation
>>> + * the rights to use, copy, modify, merge, publish, distribute,
>>> +sublicense,
>>> + * and/or sell copies of the Software, and to permit persons to whom
>>> +the
>>> + * Software is furnished to do so, subject to the following conditions:
>>> + *
>>> 

Re: [PATCH RFC 4/5] drm/amdgpu: Add accounting of command submission via DRM cgroup

[Koenig, Christian]

Am 23.11.18 um 18:36 schrieb Eric Anholt:
> Christian König  writes:
>
>> Am 20.11.18 um 21:57 schrieb Eric Anholt:
>>> Kenny Ho  writes:
>>>
 Account for the number of command submitted to amdgpu by type on a per
 cgroup basis, for the purpose of profiling/monitoring applications.
>>> For profiling other drivers, I've used perf tracepoints, which let you
>>> get useful timelines of multiple events in the driver.  Have you made
>>> use of this stat for productive profiling?
>> Yes, but this is not related to profiling at all.
>>
>> What we want to do is to limit the resource usage of processes.
> That sounds great, and something I'd be interested in for vc4.  However,
> as far as I saw explained here, this patch doesn't let you limit
> resource usage of a process and is only useful for
> "profiling/monitoring" so I'm wondering how it is useful for that
> purpose.

Ok, good to know. I haven't looked at this in deep, but if this is just 
for accounting that would certainly be missing the goal.

Christian.
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Re: [PATCH] drm/amdgpu: add the checking to avoid NULL pointer dereference

[Koenig, Christian]

Am 23.11.18 um 15:10 schrieb Zhou, David(ChunMing):
>
> 在 2018/11/23 21:30, Koenig, Christian 写道:
>> Am 23.11.18 um 14:27 schrieb Zhou, David(ChunMing):
>>> 在 2018/11/22 19:25, Christian König 写道:
 Am 22.11.18 um 07:56 schrieb Sharma, Deepak:
> when returned fence is not valid mostly due to userspace ignored
> previous error causes NULL pointer dereference.
 Again, this is clearly incorrect. The my other mails on the earlier
 patch.
>>> Sorry for I didn't get your history, but looks from the patch itself, it
>>> is still a valid patch, isn't it?
>> No, the semantic of amdgpu_ctx_get_fence() is that we return NULL when
>> the fence is already signaled.
>>
>> So this patch could totally break userspace because it changes the
>> behavior when we try to sync to an already signaled fence.
> Ah, I got your meaning, how about attached patch?

Yeah something like this, but I would just give the 
DRM_SYNCOBJ_CREATE_SIGNALED instead.

I mean that's what this flag is good for isn't it?

Christian.

>
> -David
>> If that patch was applied then please revert it immediately.
>>
>> Christian.
>>
>>> -David
 If you have already pushed the patch then please revert.

 Christian.

> Signed-off-by: Deepak Sharma 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index 024dfbd87f11..14166cd8a12f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -1403,6 +1403,8 @@ static struct dma_fence
> *amdgpu_cs_get_fence(struct amdgpu_device *adev,
>    fence = amdgpu_ctx_get_fence(ctx, entity, user->seq_no);
>  amdgpu_ctx_put(ctx);
> +    if(!fence)
> +    return ERR_PTR(-EINVAL);
>    return fence;
>  }

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Re: [PATCH RFC 4/5] drm/amdgpu: Add accounting of command submission via DRM cgroup

[Eric Anholt]

Christian König  writes:

> Am 20.11.18 um 21:57 schrieb Eric Anholt:
>> Kenny Ho  writes:
>>
>>> Account for the number of command submitted to amdgpu by type on a per
>>> cgroup basis, for the purpose of profiling/monitoring applications.
>> For profiling other drivers, I've used perf tracepoints, which let you
>> get useful timelines of multiple events in the driver.  Have you made
>> use of this stat for productive profiling?
>
> Yes, but this is not related to profiling at all.
>
> What we want to do is to limit the resource usage of processes.

That sounds great, and something I'd be interested in for vc4.  However,
as far as I saw explained here, this patch doesn't let you limit
resource usage of a process and is only useful for
"profiling/monitoring" so I'm wondering how it is useful for that
purpose.


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Re: [PATCH] drm/amdgpu: add the checking to avoid NULL pointer dereference

[Chunming Zhou]

在 2018/11/23 21:30, Koenig, Christian 写道:
> Am 23.11.18 um 14:27 schrieb Zhou, David(ChunMing):
>> 在 2018/11/22 19:25, Christian König 写道:
>>> Am 22.11.18 um 07:56 schrieb Sharma, Deepak:
 when returned fence is not valid mostly due to userspace ignored
 previous error causes NULL pointer dereference.
>>> Again, this is clearly incorrect. The my other mails on the earlier
>>> patch.
>> Sorry for I didn't get your history, but looks from the patch itself, it
>> is still a valid patch, isn't it?
> No, the semantic of amdgpu_ctx_get_fence() is that we return NULL when
> the fence is already signaled.
>
> So this patch could totally break userspace because it changes the
> behavior when we try to sync to an already signaled fence.
Ah, I got your meaning, how about attached patch?

-David
>
> If that patch was applied then please revert it immediately.
>
> Christian.
>
>> -David
>>> If you have already pushed the patch then please revert.
>>>
>>> Christian.
>>>
 Signed-off-by: Deepak Sharma 
 ---
     drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 ++
     1 file changed, 2 insertions(+)

 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
 b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
 index 024dfbd87f11..14166cd8a12f 100644
 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
 +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
 @@ -1403,6 +1403,8 @@ static struct dma_fence
 *amdgpu_cs_get_fence(struct amdgpu_device *adev,
       fence = amdgpu_ctx_get_fence(ctx, entity, user->seq_no);
     amdgpu_ctx_put(ctx);
 +    if(!fence)
 +    return ERR_PTR(-EINVAL);
       return fence;
     }

From 3640a18c31e7b786129286615fcdf397e1142451 Mon Sep 17 00:00:00 2001
From: Chunming Zhou 
Date: Fri, 23 Nov 2018 22:05:19 +0800
Subject: [PATCH] drm/amdgpu: fix signaled fence isn't handled
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Chunming Zhou 
Cc: Sharma, Deepak 
CC: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 3 +++
 drivers/gpu/drm/drm_syncobj.c  | 1 +
 include/drm/drm_syncobj.h  | 1 +
 3 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 6a823b58b3b8..e960f9864e9f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -1505,6 +1505,9 @@ int amdgpu_cs_fence_to_handle_ioctl(struct drm_device 
*dev, void *data,
if (IS_ERR(fence))
return PTR_ERR(fence);
 
+/* that means fence was signaled */
+   if (!fence)
+   fence = drm_syncobj_get_stub_fence();
switch (info->in.what) {
case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ:
r = drm_syncobj_create(, 0, fence);
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 5f2df10e51c3..e5621f80d501 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -97,6 +97,7 @@ struct dma_fence *drm_syncobj_get_stub_fence(void)
 
return dma_fence_get(_fence);
 }
+EXPORT_SYMBOL(drm_syncobj_get_stub_fence);
 /**
  * drm_syncobj_find - lookup and reference a sync object.
  * @file_private: drm file private pointer
diff --git a/include/drm/drm_syncobj.h b/include/drm/drm_syncobj.h
index 29244cbcd05e..93e9e9b159ab 100644
--- a/include/drm/drm_syncobj.h
+++ b/include/drm/drm_syncobj.h
@@ -147,5 +147,6 @@ int drm_syncobj_get_handle(struct drm_file *file_private,
 int drm_syncobj_get_fd(struct drm_syncobj *syncobj, int *p_fd);
 int drm_syncobj_search_fence(struct drm_syncobj *syncobj, u64 point, u64 flags,
 struct dma_fence **fence);
+struct dma_fence *drm_syncobj_get_stub_fence(void);
 
 #endif
-- 
2.17.1

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Re: [PATCH] drm/amdgpu: add the checking to avoid NULL pointer dereference

[Koenig, Christian]

Am 23.11.18 um 14:27 schrieb Zhou, David(ChunMing):
>
> 在 2018/11/22 19:25, Christian König 写道:
>> Am 22.11.18 um 07:56 schrieb Sharma, Deepak:
>>> when returned fence is not valid mostly due to userspace ignored
>>> previous error causes NULL pointer dereference.
>> Again, this is clearly incorrect. The my other mails on the earlier
>> patch.
> Sorry for I didn't get your history, but looks from the patch itself, it
> is still a valid patch, isn't it?

No, the semantic of amdgpu_ctx_get_fence() is that we return NULL when 
the fence is already signaled.

So this patch could totally break userspace because it changes the 
behavior when we try to sync to an already signaled fence.

If that patch was applied then please revert it immediately.

Christian.

>
> -David
>> If you have already pushed the patch then please revert.
>>
>> Christian.
>>
>>> Signed-off-by: Deepak Sharma 
>>> ---
>>>    drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 ++
>>>    1 file changed, 2 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>>> index 024dfbd87f11..14166cd8a12f 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>>> @@ -1403,6 +1403,8 @@ static struct dma_fence
>>> *amdgpu_cs_get_fence(struct amdgpu_device *adev,
>>>      fence = amdgpu_ctx_get_fence(ctx, entity, user->seq_no);
>>>    amdgpu_ctx_put(ctx);
>>> +    if(!fence)
>>> +    return ERR_PTR(-EINVAL);
>>>      return fence;
>>>    }

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Re: [PATCH] drm/amdgpu: Fix static checker warning

[Christian König]

Am 23.11.18 um 11:32 schrieb Rex Zhu:

drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c:49 amdgpu_allocate_static_csa()
error: uninitialized symbol 'ptr'.

the test if (!bo) doesn't work, as the bo is a pointer to a pointer.
so need to check !*bo

Signed-off-by: Rex Zhu 


Reviewed-by: Christian König 


---
  drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
index fea4555..d3a2536 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
@@ -52,7 +52,7 @@ int amdgpu_allocate_static_csa(struct amdgpu_device *adev, 
struct amdgpu_bo **bo
r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
domain, bo,
NULL, );
-   if (!bo)
+   if (!*bo)
return -ENOMEM;
  
  	memset(ptr, 0, size);


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[PATCH] drm/amdgpu: Fix static checker warning

[Rex Zhu]

drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c:49 amdgpu_allocate_static_csa()
error: uninitialized symbol 'ptr'.

the test if (!bo) doesn't work, as the bo is a pointer to a pointer.
so need to check !*bo

Signed-off-by: Rex Zhu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
index fea4555..d3a2536 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
@@ -52,7 +52,7 @@ int amdgpu_allocate_static_csa(struct amdgpu_device *adev, 
struct amdgpu_bo **bo
r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
domain, bo,
NULL, );
-   if (!bo)
+   if (!*bo)
return -ENOMEM;
 
memset(ptr, 0, size);
-- 
1.9.1

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amdgpu: several powerplay errors during boot of HAWAII PRO GPU

[Kai Wasserbäch]

[Please CC me on replies, I'm not subscribed to amd-gfx.]

Hey,
with the recent 4.19.x series of kernels I'm seeing several errors being logged
during boot for my R9 290 (HAWAII PRO) GPU:
> [   50.057264] amdgpu: [powerplay] Failed to retrieve minimum clocks.
> [   50.057266] amdgpu: [powerplay] Error in phm_get_clock_info 
> [   50.057309] [drm] dce110_link_encoder_construct: Failed to get 
> encoder_cap_info from VBIOS with error code 4!
> [   50.057316] [drm] dce110_link_encoder_construct: Failed to get 
> encoder_cap_info from VBIOS with error code 4!
> [   50.057324] [drm] dce110_link_encoder_construct: Failed to get 
> encoder_cap_info from VBIOS with error code 4!
> [   51.611918] amdgpu: [powerplay] 
> failed to send message 282 ret is 254

Since the system is coming up and accelerations seems to be working, this can't
be critical. Or is there something I need to set on the kernel command line (so
far I have: modprobe.blacklist=radeon radeon.cik_support=0 amdgpu.cik_support=1
amdgpu.dc=1)? Anyway, I thought I let you know. If you need more information,
feel free to ask.

Cheers,
Kai
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Re: [PATCH] drm: should break if already get the best size

[Zhu, Rex]

Tested-by: Rex Zhu 


Without this patch, if we search node via rb tree.


For example: we insert  different node with rand size, size range in 
(1-).


the key in root node is 5587.


if we try to find the node with key equal to 5587 or 7381,


Loop:
node->key is 5587
node->key is 2273
node->key is 3706
node->key is 4892
node->key is 5296
node->key is 5461
node->key is 5519
node->key is 5549
node->key is 5570
node->key is 5581
node->key is 5584
node->key is 5585
node->key is 5586
node->key is 5586


Find the best node, key is 5587 (Loop 14 levels)


Loop:
node->key is 5587
node->key is 7381
node->key is 6474
node->key is 7034
node->key is 7228
node->key is 7314
node->key is 7339
node->key is 7349
node->key is 7372
node->key is 7377
node->key is 7378
node->key is 7379
node->key is 7379

find the best node, key is 7381. (Loop 13 levels)



With this patch:

we don't need to go down if we found the right node that size equal to we 
needed.



Best Regards
Rex


From: amd-gfx  on behalf of Monk Liu 

Sent: Thursday, November 22, 2018 8:33 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk
Subject: [PATCH] drm: should break if already get the best size

Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/drm_mm.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 3cc5fbd..369fd9b 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -318,6 +318,8 @@ static struct drm_mm_node *best_hole(struct drm_mm *mm, u64 
size)
 if (size <= node->hole_size) {
 best = node;
 rb = rb->rb_right;
+   if (size == node->hole_size)
+   break;
 } else {
 rb = rb->rb_left;
 }
--
2.7.4

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[bug report] drm/amd/display: Add support for Freesync 2 HDR and Content to Display Mapping

[Dan Carpenter]

Hello SivapiriyanKumarasamy,

This is a semi-automatic email about new static checker warnings.

The patch e1e8a020c6b8: "drm/amd/display: Add support for Freesync 2 
HDR and Content to Display Mapping" from Sep 11, 2018, leads to the 
following Smatch complaint:

drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c:826 
build_freesync_hdr()
 warn: variable dereferenced before check 'fs_params' (see line 816)

drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c
   815  struct fixed31_32 scaledX1 = dc_fixpt_zero;
   816  struct fixed31_32 max_display = 
dc_fixpt_from_int(fs_params->max_display);
   
^
   817  struct fixed31_32 min_display = 
dc_fixpt_from_fraction(fs_params->min_display, 1);

^
   818  struct fixed31_32 max_content = 
dc_fixpt_from_int(fs_params->max_content);
   819  struct fixed31_32 min_content = 
dc_fixpt_from_fraction(fs_params->min_content, 1);
   820  struct fixed31_32 clip = dc_fixpt_one;
   821  struct fixed31_32 output;
   822  bool use_eetf = false;
   823  bool is_clipped = false;
   824  struct fixed31_32 sdr_white_level = 
dc_fixpt_from_int(fs_params->sdr_white_level);
   825  
   826  if (fs_params == NULL || fs_params->max_content == 0 ||
^
Too late.

   827  fs_params->max_display == 0)
   828  return false;

regards,
dan carpenter
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RE: [PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants

[Cui, Flora]

Patch is Reviewed-by: Flora Cui 

-Original Message-
From: amd-gfx  On Behalf Of Junwei Zhang
Sent: Friday, November 23, 2018 4:32 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Jerry 
Subject: [PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants

Some variants don't support UVD and VCE.

Signed-off-by: Junwei Zhang 
---
 drivers/gpu/drm/amd/amdgpu/vi.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c 
index f3a4cf1f013a..3338b013ded4 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1660,6 +1660,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, _v11_2_ip_block);
amdgpu_device_ip_block_add(adev, _v8_0_ip_block);
amdgpu_device_ip_block_add(adev, _v3_1_ip_block);
+   /* Some polaris12 variants don't support UVD/VCE */
+   if ((adev->pdev->device == 0x67df) &&
+ (adev->pdev->revision == 0xf7))
+   break;
amdgpu_device_ip_block_add(adev, _v6_3_ip_block);
amdgpu_device_ip_block_add(adev, _v3_4_ip_block);
break;
--
2.17.1

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[bug report] drm/amdgpu: Refine CSA related functions

[Dan Carpenter]

Hello Rex Zhu,

The patch 1e256e276221: "drm/amdgpu: Refine CSA related functions"
from Oct 15, 2018, leads to the following static checker warning:

drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c:49 amdgpu_allocate_static_csa()
error: uninitialized symbol 'ptr'.

drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
37  int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct 
amdgpu_bo **bo,
38  u32 domain, uint32_t size)
39  {
40  int r;
41  void *ptr;
42  
43  r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
44  domain, bo,
45  NULL, );
46  if (!bo)
^^^
We've already dereferenced "bo" at this point so this test doesn't work.
Smatch doesn't complain because it knows that all the caller pass a
valid "bo" pointer...  Anyway probably this should just check if "r" is
non-zero.

47  return -ENOMEM;
48  
49  memset(ptr, 0, size);
   ^^^
This is uninitialized if amdgpu_bo_create_kernel() fails.

50  return 0;
51  }

regards,
dan carpenter
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Re: [PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants

[Zhang, Jerry(Junwei)]

please ignore this patch, there is typo in code.

On 11/23/18 4:01 PM, Junwei Zhang wrote:

Some variants don't support UVD and VCE.

Signed-off-by: Junwei Zhang 
---
  drivers/gpu/drm/amd/amdgpu/vi.c | 5 +
  1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index f3a4cf1f013a..46a92eca831b 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1660,6 +1660,11 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, _v11_2_ip_block);
amdgpu_device_ip_block_add(adev, _v8_0_ip_block);
amdgpu_device_ip_block_add(adev, _v3_1_ip_block);
+   /* Some polaris12 variants don't support UVD/VCE */
+   if (((adev->pdev->device == 0x67df) &&
+((adev->pdev->revision == 0xe1) ||
+ (adev->pdev->revision == 0xf7
+   break;
amdgpu_device_ip_block_add(adev, _v6_3_ip_block);
amdgpu_device_ip_block_add(adev, _v3_4_ip_block);
break;


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[PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants

[Junwei Zhang]

Some variants don't support UVD and VCE.

Signed-off-by: Junwei Zhang 
---
 drivers/gpu/drm/amd/amdgpu/vi.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index f3a4cf1f013a..3338b013ded4 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1660,6 +1660,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, _v11_2_ip_block);
amdgpu_device_ip_block_add(adev, _v8_0_ip_block);
amdgpu_device_ip_block_add(adev, _v3_1_ip_block);
+   /* Some polaris12 variants don't support UVD/VCE */
+   if ((adev->pdev->device == 0x67df) &&
+ (adev->pdev->revision == 0xf7))
+   break;
amdgpu_device_ip_block_add(adev, _v6_3_ip_block);
amdgpu_device_ip_block_add(adev, _v3_4_ip_block);
break;
-- 
2.17.1

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[PATCH] drm/amd/amdkfd: Remove duplicate header

[Brajeswar Ghosh]

Remove gca/gfx_8_0_enum.h which is included more than once

Signed-off-by: Brajeswar Ghosh 
---
 drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c
index fd60a116be37..c3a5dcfe877a 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c
@@ -24,7 +24,6 @@
 #include "kfd_device_queue_manager.h"
 #include "gca/gfx_8_0_enum.h"
 #include "gca/gfx_8_0_sh_mask.h"
-#include "gca/gfx_8_0_enum.h"
 #include "oss/oss_3_0_sh_mask.h"
 
 static bool set_cache_memory_policy_vi(struct device_queue_manager *dqm,
-- 
2.17.1

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[PATCH] drm/amd/amdgpu: Remove duplicate header

[Brajeswar Ghosh]

Remove drm/drm_fb_helper.h which is included more than once

Signed-off-by: Brajeswar Ghosh 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index b9e9e8b02fb7..1cac12a26a4e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -38,7 +38,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
-- 
2.17.1

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Re: [PATCH] mm: convert totalram_pages, totalhigh_pages and managed_pages to atomic.

[Kuehling, Felix]

On 2018-10-22 1:23 p.m., Arun KS wrote:
> Remove managed_page_count_lock spinlock and instead use atomic
> variables.
>
> Suggested-by: Michal Hocko 
> Suggested-by: Vlastimil Babka 
> Signed-off-by: Arun KS 

Acked-by: Felix Kuehling 

Regards,
  Felix

>
> ---
> As discussed here,
> https://patchwork.kernel.org/patch/10627521/#22261253
> ---
> ---
>  arch/csky/mm/init.c   |  4 +-
>  arch/powerpc/platforms/pseries/cmm.c  | 11 ++--
>  arch/s390/mm/init.c   |  2 +-
>  arch/um/kernel/mem.c  |  4 +-
>  arch/x86/kernel/cpu/microcode/core.c  |  5 +-
>  drivers/char/agp/backend.c|  4 +-
>  drivers/gpu/drm/amd/amdkfd/kfd_crat.c |  2 +-
>  drivers/gpu/drm/i915/i915_gem.c   |  2 +-
>  drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  4 +-
>  drivers/hv/hv_balloon.c   | 19 +++
>  drivers/md/dm-bufio.c |  5 +-
>  drivers/md/dm-crypt.c |  4 +-
>  drivers/md/dm-integrity.c |  4 +-
>  drivers/md/dm-stats.c |  3 +-
>  drivers/media/platform/mtk-vpu/mtk_vpu.c  |  3 +-
>  drivers/misc/vmw_balloon.c|  2 +-
>  drivers/parisc/ccio-dma.c |  5 +-
>  drivers/parisc/sba_iommu.c|  5 +-
>  drivers/staging/android/ion/ion_system_heap.c |  2 +-
>  drivers/xen/xen-selfballoon.c |  7 +--
>  fs/ceph/super.h   |  3 +-
>  fs/file_table.c   |  9 ++--
>  fs/fuse/inode.c   |  4 +-
>  fs/nfs/write.c|  3 +-
>  fs/nfsd/nfscache.c|  3 +-
>  fs/ntfs/malloc.h  |  2 +-
>  fs/proc/base.c|  3 +-
>  include/linux/highmem.h   |  2 +-
>  include/linux/mm.h|  2 +-
>  include/linux/mmzone.h| 10 +---
>  include/linux/swap.h  |  2 +-
>  kernel/fork.c |  6 +--
>  kernel/kexec_core.c   |  5 +-
>  kernel/power/snapshot.c   |  2 +-
>  lib/show_mem.c|  3 +-
>  mm/highmem.c  |  2 +-
>  mm/huge_memory.c  |  2 +-
>  mm/kasan/quarantine.c |  4 +-
>  mm/memblock.c |  6 +--
>  mm/memory_hotplug.c   |  4 +-
>  mm/mm_init.c  |  3 +-
>  mm/oom_kill.c |  2 +-
>  mm/page_alloc.c   | 75 
> ++-
>  mm/shmem.c| 12 +++--
>  mm/slab.c |  3 +-
>  mm/swap.c |  3 +-
>  mm/util.c |  2 +-
>  mm/vmalloc.c  |  4 +-
>  mm/vmstat.c   |  4 +-
>  mm/workingset.c   |  2 +-
>  mm/zswap.c|  2 +-
>  net/dccp/proto.c  |  6 +--
>  net/decnet/dn_route.c |  2 +-
>  net/ipv4/tcp_metrics.c|  2 +-
>  net/netfilter/nf_conntrack_core.c |  6 +--
>  net/netfilter/xt_hashlimit.c  |  4 +-
>  net/sctp/protocol.c   |  6 +--
>  security/integrity/ima/ima_kexec.c|  2 +-
>  58 files changed, 171 insertions(+), 143 deletions(-)
>
> diff --git a/arch/csky/mm/init.c b/arch/csky/mm/init.c
> index dc07c07..3f4d35e 100644
> --- a/arch/csky/mm/init.c
> +++ b/arch/csky/mm/init.c
> @@ -71,7 +71,7 @@ void free_initrd_mem(unsigned long start, unsigned long end)
>   ClearPageReserved(virt_to_page(start));
>   init_page_count(virt_to_page(start));
>   free_page(start);
> - totalram_pages++;
> + atomic_long_inc(_pages);
>   }
>  }
>  #endif
> @@ -88,7 +88,7 @@ void free_initmem(void)
>   ClearPageReserved(virt_to_page(addr));
>   init_page_count(virt_to_page(addr));
>   free_page(addr);
> - totalram_pages++;
> + atomic_long_inc(_pages);
>   addr += PAGE_SIZE;
>   }
>  
> diff --git a/arch/powerpc/platforms/pseries/cmm.c 
> b/arch/powerpc/platforms/pseries/cmm.c
> index 25427a4..85fe503 100644
> --- a/arch/powerpc/platforms/pseries/cmm.c
> +++ b/arch/powerpc/platforms/pseries/cmm.c
> @@ -208,7 +208,7 @@ static long cmm_alloc_pages(long nr)
>  
>   pa->page[pa->index++] = addr;
>   loaned_pages++;
> - totalram_pages--;
> + atomic_long_dec(_pages);
>   

[PATCH] drm/amd/display: Remove duplicate header

[Brajeswar Ghosh]

Remove dce/dce_mem_input.h which is included more than once

Signed-off-by: Brajeswar Ghosh 
---
 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 
b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
index d68f951f9869..c41408c3eaf1 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
@@ -40,7 +40,6 @@
 #include "dce/dce_mem_input.h"
 #include "dce/dce_link_encoder.h"
 #include "dce/dce_stream_encoder.h"
-#include "dce/dce_mem_input.h"
 #include "dce/dce_ipp.h"
 #include "dce/dce_transform.h"
 #include "dce/dce_opp.h"
-- 
2.17.1

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[PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants

[Junwei Zhang]

Some variants don't support UVD and VCE.

Signed-off-by: Junwei Zhang 
---
 drivers/gpu/drm/amd/amdgpu/vi.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index f3a4cf1f013a..46a92eca831b 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1660,6 +1660,11 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, _v11_2_ip_block);
amdgpu_device_ip_block_add(adev, _v8_0_ip_block);
amdgpu_device_ip_block_add(adev, _v3_1_ip_block);
+   /* Some polaris12 variants don't support UVD/VCE */
+   if (((adev->pdev->device == 0x67df) &&
+((adev->pdev->revision == 0xe1) ||
+ (adev->pdev->revision == 0xf7
+   break;
amdgpu_device_ip_block_add(adev, _v6_3_ip_block);
amdgpu_device_ip_block_add(adev, _v3_4_ip_block);
break;
-- 
2.17.1

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