[PATCH] drm/amd/display: Use vrr friendly pageflip throttling in DC.
In VRR mode, keep track of the vblank count of the last
completed pageflip in amdgpu_crtc->last_flip_vblank, as
recorded in the pageflip completion handler after each
completed flip.
Use that count to prevent mmio programming a new pageflip
within the same vblank in which the last pageflip completed,
iow. to throttle pageflips to at most one flip per video
frame, while at the same time allowing to request a flip
not only before start of vblank, but also anywhere within
vblank.
The old logic did the same, and made sense for regular fixed
refresh rate flipping, but in vrr mode it prevents requesting
a flip anywhere inside the possibly huge vblank, thereby
reducing framerate in vrr mode instead of improving it, by
delaying a slightly delayed flip requests up to a maximum
vblank duration + 1 scanout duration. This would limit VRR
usefulness to only help applications with a very high GPU
demand, which can submit the flip request before start of
vblank, but then have to wait long for fences to complete.
With this method a flip can be both requested and - after
fences have completed - executed, ie. it doesn't matter if
the request (amdgpu_dm_do_flip()) gets delayed until deep
into the extended vblank due to cpu execution delays. This
also allows clients which want to regulate framerate within
the vrr range a much more fine-grained control of flip timing,
a feature that might be useful for video playback, and is
very useful for neuroscience/vision research applications.
In regular non-VRR mode, retain the old flip submission
behavior. This to keep flip scheduling for fullscreen X11/GLX
OpenGL clients intact, if they use the GLX_OML_sync_control
extensions glXSwapBufferMscOML(, ..., target_msc,...) function
with a specific target_msc target vblank count.
glXSwapBuffersMscOML() or DRI3/Present PresentPixmap() will
not flip at the proper target_msc for a non-zero target_msc
if VRR mode is active with this patch. They'd often flip one
frame too early. However, this limitation should not matter
much in VRR mode, as scheduling based on vblank counts is
pretty futile/unusable under variable refresh duration
anyway, so no real extra harm is done.
According to some testing already done with this patch by
Nicholas on top of my tests, IGT tests didn't report any
problems. If fixes stuttering and flickering when flipping
at rates below the minimum vrr refresh rate.
Fixes: bb47de736661 ("drm/amdgpu: Set FreeSync state using drm VRR
properties")
Signed-off-by: Mario Kleiner
Cc:
Cc: Nicholas Kazlauskas
Cc: Harry Wentland
Cc: Alex Deucher
Cc: Michel Dänzer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 1 +
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 33 ---
2 files changed, 30 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index bfa394ffd6d2..87ca5746f861 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -411,6 +411,7 @@ struct amdgpu_crtc {
struct amdgpu_flip_work *pflip_works;
enum amdgpu_flip_status pflip_status;
int deferred_flip_completion;
+ u64 last_flip_vblank;
/* pll sharing */
struct amdgpu_atom_ss ss;
bool ss_enabled;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index d59bafc84475..d4da331aa349 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -303,12 +303,11 @@ static void dm_pflip_high_irq(void *interrupt_params)
return;
}
+ /* Update to correct count(s) if racing with vblank irq */
+ amdgpu_crtc->last_flip_vblank =
drm_crtc_accurate_vblank_count(_crtc->base);
/* wake up userspace */
if (amdgpu_crtc->event) {
- /* Update to correct count(s) if racing with vblank irq */
- drm_crtc_accurate_vblank_count(_crtc->base);
-
drm_crtc_send_vblank_event(_crtc->base,
amdgpu_crtc->event);
/* page flip completed. clean up */
@@ -4736,6 +4735,8 @@ static void amdgpu_dm_commit_planes(struct
drm_atomic_state *state,
struct amdgpu_bo *abo;
uint64_t tiling_flags, dcc_address;
uint32_t target, target_vblank;
+ uint64_t last_flip_vblank;
+ bool vrr_active = acrtc_state->freesync_config.state ==
VRR_STATE_ACTIVE_VARIABLE;
struct {
struct dc_surface_update surface_updates[MAX_SURFACES];
@@ -4889,7 +4890,31 @@ static void amdgpu_dm_commit_planes(struct
drm_atomic_state *state,
* hopefully eliminating dc_*_update structs in their entirety.
*/
if (flip_count) {
- target = (uint32_t)drm_crtc_vblank_count(pcrtc) +
*wait_for_vblank;
+ if (!vrr_active) {
+ /* Use old throttling in non-vrr fixed refresh rate mode
+
Re: [PATCH v2 4/4] drm/amdgpu: Simplify eviction fence handling
Reviewed By: Harish Kasiviswanathan
On 2019-02-08 4:21 p.m., Kuehling, Felix wrote:
> Temporarily removing eviction fences to avoid triggering them by
> accident is no longer necessary due to the fence_owner logic in
> amdgpu_sync_resv.
>
> As a result the ef_list usage of amdgpu_amdkfd_remove_eviction_fence
> and amdgpu_amdkfd_add_eviction_fence are no longer needed.
>
> Signed-off-by: Felix Kuehling
> Acked-by: Christian König
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 134
> ++-
> 1 file changed, 11 insertions(+), 123 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index 44a1581..1921dec3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -204,38 +204,25 @@ void amdgpu_amdkfd_unreserve_memory_limit(struct
> amdgpu_bo *bo)
> }
>
>
> -/* amdgpu_amdkfd_remove_eviction_fence - Removes eviction fence(s) from BO's
> +/* amdgpu_amdkfd_remove_eviction_fence - Removes eviction fence from BO's
>* reservation object.
>*
>* @bo: [IN] Remove eviction fence(s) from this BO
> - * @ef: [IN] If ef is specified, then this eviction fence is removed if it
> + * @ef: [IN] This eviction fence is removed if it
>* is present in the shared list.
> - * @ef_list: [OUT] Returns list of eviction fences. These fences are removed
> - * from BO's reservation object shared list.
> - * @ef_count: [OUT] Number of fences in ef_list.
>*
> - * NOTE: If called with ef_list, then amdgpu_amdkfd_add_eviction_fence must
> be
> - * called to restore the eviction fences and to avoid memory leak. This is
> - * useful for shared BOs.
>* NOTE: Must be called with BO reserved i.e. bo->tbo.resv->lock held.
>*/
> static int amdgpu_amdkfd_remove_eviction_fence(struct amdgpu_bo *bo,
> - struct amdgpu_amdkfd_fence *ef,
> - struct amdgpu_amdkfd_fence ***ef_list,
> - unsigned int *ef_count)
> + struct amdgpu_amdkfd_fence *ef)
> {
> struct reservation_object *resv = bo->tbo.resv;
> struct reservation_object_list *old, *new;
> unsigned int i, j, k;
>
> - if (!ef && !ef_list)
> + if (!ef)
> return -EINVAL;
>
> - if (ef_list) {
> - *ef_list = NULL;
> - *ef_count = 0;
> - }
> -
> old = reservation_object_get_list(resv);
> if (!old)
> return 0;
> @@ -254,8 +241,7 @@ static int amdgpu_amdkfd_remove_eviction_fence(struct
> amdgpu_bo *bo,
> f = rcu_dereference_protected(old->shared[i],
> reservation_object_held(resv));
>
> - if ((ef && f->context == ef->base.context) ||
> - (!ef && to_amdgpu_amdkfd_fence(f)))
> + if (f->context == ef->base.context)
> RCU_INIT_POINTER(new->shared[--j], f);
> else
> RCU_INIT_POINTER(new->shared[k++], f);
> @@ -263,21 +249,6 @@ static int amdgpu_amdkfd_remove_eviction_fence(struct
> amdgpu_bo *bo,
> new->shared_max = old->shared_max;
> new->shared_count = k;
>
> - if (!ef) {
> - unsigned int count = old->shared_count - j;
> -
> - /* Alloc memory for count number of eviction fence pointers.
> - * Fill the ef_list array and ef_count
> - */
> - *ef_list = kcalloc(count, sizeof(**ef_list), GFP_KERNEL);
> - *ef_count = count;
> -
> - if (!*ef_list) {
> - kfree(new);
> - return -ENOMEM;
> - }
> - }
> -
> /* Install the new fence list, seqcount provides the barriers */
> preempt_disable();
> write_seqcount_begin(>seq);
> @@ -291,46 +262,13 @@ static int amdgpu_amdkfd_remove_eviction_fence(struct
> amdgpu_bo *bo,
>
> f = rcu_dereference_protected(new->shared[i],
> reservation_object_held(resv));
> - if (!ef)
> - (*ef_list)[k++] = to_amdgpu_amdkfd_fence(f);
> - else
> - dma_fence_put(f);
> + dma_fence_put(f);
> }
> kfree_rcu(old, rcu);
>
> return 0;
> }
>
> -/* amdgpu_amdkfd_add_eviction_fence - Adds eviction fence(s) back into BO's
> - * reservation object.
> - *
> - * @bo: [IN] Add eviction fences to this BO
> - * @ef_list: [IN] List of eviction fences to be added
> - * @ef_count: [IN] Number of fences in ef_list.
> - *
> - * NOTE: Must call amdgpu_amdkfd_remove_eviction_fence before calling this
> - * function.
> - */
> -static void amdgpu_amdkfd_add_eviction_fence(struct amdgpu_bo *bo,
> - struct amdgpu_amdkfd_fence
Re: [PATCH 2/2] drm/amdgpu: Delete user queue doorbell variables
The series is Reviewed-by: Felix Kuehling
On 2019-02-07 5:23 p.m., Zhao, Yong wrote:
> They are no longer used, so delete them to avoid confusion.
>
> Change-Id: I3cf23fe7110ff88f53c0c279b2b4ec8d1a53b87c
> Signed-off-by: Yong Zhao
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 8
> drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 2 --
> drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 2 --
> 3 files changed, 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> index 4de431f7f380..4c877e57ba97 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> @@ -48,8 +48,6 @@ struct amdgpu_doorbell_index {
> uint32_t mec_ring5;
> uint32_t mec_ring6;
> uint32_t mec_ring7;
> - uint32_t userqueue_start;
> - uint32_t userqueue_end;
> uint32_t gfx_ring0;
> uint32_t sdma_engine[8];
> uint32_t ih;
> @@ -112,8 +110,6 @@ typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT
> AMDGPU_VEGA20_DOORBELL_MEC_RING5 = 0x008,
> AMDGPU_VEGA20_DOORBELL_MEC_RING6 = 0x009,
> AMDGPU_VEGA20_DOORBELL_MEC_RING7 = 0x00A,
> - AMDGPU_VEGA20_DOORBELL_USERQUEUE_START = 0x00B,
> - AMDGPU_VEGA20_DOORBELL_USERQUEUE_END = 0x08A,
> AMDGPU_VEGA20_DOORBELL_GFX_RING0 = 0x08B,
> /* SDMA:256~335*/
> AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0= 0x100,
> @@ -178,10 +174,6 @@ typedef enum _AMDGPU_DOORBELL64_ASSIGNMENT
> AMDGPU_DOORBELL64_MEC_RING6 = 0x09,
> AMDGPU_DOORBELL64_MEC_RING7 = 0x0a,
>
> - /* User queue doorbell range (128 doorbells) */
> - AMDGPU_DOORBELL64_USERQUEUE_START = 0x0b,
> - AMDGPU_DOORBELL64_USERQUEUE_END = 0x8a,
> -
> /* Graphics engine */
> AMDGPU_DOORBELL64_GFX_RING0 = 0x8b,
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> index fa0433199215..ffe0e0593207 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> @@ -67,8 +67,6 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
> adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL64_MEC_RING5;
> adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL64_MEC_RING6;
> adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL64_MEC_RING7;
> - adev->doorbell_index.userqueue_start =
> AMDGPU_DOORBELL64_USERQUEUE_START;
> - adev->doorbell_index.userqueue_end = AMDGPU_DOORBELL64_USERQUEUE_END;
> adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL64_GFX_RING0;
> adev->doorbell_index.sdma_engine[0] = AMDGPU_DOORBELL64_sDMA_ENGINE0;
> adev->doorbell_index.sdma_engine[1] = AMDGPU_DOORBELL64_sDMA_ENGINE1;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> index b1052caaff5e..700ff8aec999 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> @@ -65,8 +65,6 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
> adev->doorbell_index.mec_ring5 = AMDGPU_VEGA20_DOORBELL_MEC_RING5;
> adev->doorbell_index.mec_ring6 = AMDGPU_VEGA20_DOORBELL_MEC_RING6;
> adev->doorbell_index.mec_ring7 = AMDGPU_VEGA20_DOORBELL_MEC_RING7;
> - adev->doorbell_index.userqueue_start =
> AMDGPU_VEGA20_DOORBELL_USERQUEUE_START;
> - adev->doorbell_index.userqueue_end =
> AMDGPU_VEGA20_DOORBELL_USERQUEUE_END;
> adev->doorbell_index.gfx_ring0 = AMDGPU_VEGA20_DOORBELL_GFX_RING0;
> adev->doorbell_index.sdma_engine[0] =
> AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0;
> adev->doorbell_index.sdma_engine[1] =
> AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1;
___
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Re: [PATCH 5/5] drm/amdkfd: Optimize out sdma doorbell array in kgd2kfd_shared_resources
Some nit-picks inline. Looks good otherwise.
On 2019-02-05 3:31 p.m., Zhao, Yong wrote:
> We can directly calculate the sdma doorbell index in the process doorbell
> pages through the doorbell_index structure in amdgpu_device, so no need
> to cache them in kgd2kfd_shared_resources any more, resulting in more
> portable code.
What do you mean by "portable" here? Portable to what? Other
architectures? Kernels? GPUs?
>
> Change-Id: Ic657799856ed0256f36b01e502ef0cab263b1f49
> Signed-off-by: Yong Zhao
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c| 55 ++-
> .../drm/amd/amdkfd/kfd_device_queue_manager.c | 18 --
> .../gpu/drm/amd/include/kgd_kfd_interface.h | 2 +-
> 3 files changed, 31 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> index ee8527701731..e62c3703169a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> @@ -131,7 +131,7 @@ static void amdgpu_doorbell_get_kfd_info(struct
> amdgpu_device *adev,
>
> void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
> {
> - int i, n;
> + int i;
> int last_valid_bit;
>
> if (adev->kfd.dev) {
> @@ -142,7 +142,9 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
> .gpuvm_size = min(adev->vm_manager.max_pfn
> << AMDGPU_GPU_PAGE_SHIFT,
> AMDGPU_GMC_HOLE_START),
> - .drm_render_minor = adev->ddev->render->index
> + .drm_render_minor = adev->ddev->render->index,
> + .sdma_doorbell_idx = adev->doorbell_index.sdma_engine,
> +
> };
>
> /* this is going to have a few of the MSBs set that we need to
> @@ -172,45 +174,22 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device
> *adev)
> _resources.doorbell_aperture_size,
> _resources.doorbell_start_offset);
>
> - if (adev->asic_type < CHIP_VEGA10) {
> - kgd2kfd_device_init(adev->kfd.dev, _resources);
> - return;
> - }
> -
> - n = (adev->asic_type < CHIP_VEGA20) ? 2 : 8;
> -
> - for (i = 0; i < n; i += 2) {
> - /* On SOC15 the BIF is involved in routing
> - * doorbells using the low 12 bits of the
> - * address. Communicate the assignments to
> - * KFD. KFD uses two doorbell pages per
> - * process in case of 64-bit doorbells so we
> - * can use each doorbell assignment twice.
> + if (adev->asic_type >= CHIP_VEGA10) {
> + /* Because of the setting in registers like
> + * SDMA0_DOORBELL_RANGE etc., BIF statically uses the
> + * lower 12 bits of doorbell address for routing. In
> + * order to route the CP queue doorbells to CP engine,
> + * the doorbells allocated to CP queues have to be
> + * outside the range set for SDMA, VCN, and IH blocks
> + * Prior to SOC15, all queues use queue ID to
> + * determine doorbells.
>*/
> - gpu_resources.sdma_doorbell[0][i] =
> - adev->doorbell_index.sdma_engine[0] + (i >> 1);
> - gpu_resources.sdma_doorbell[0][i+1] =
> - adev->doorbell_index.sdma_engine[0] + 0x200 +
> (i >> 1);
> - gpu_resources.sdma_doorbell[1][i] =
> - adev->doorbell_index.sdma_engine[1] + (i >> 1);
> - gpu_resources.sdma_doorbell[1][i+1] =
> - adev->doorbell_index.sdma_engine[1] + 0x200 +
> (i >> 1);
> + gpu_resources.reserved_doorbells_start =
> + adev->doorbell_index.sdma_engine[0];
> + gpu_resources.reserved_doorbells_end =
> + adev->doorbell_index.last_non_cp;
> }
>
> - /* Because of the setting in registers like
> - * SDMA0_DOORBELL_RANGE etc., BIF statically uses the
> - * lower 12 bits of doorbell address for routing. In
> - * order to route the CP queue doorbells to CP engine,
> - * the doorbells allocated to CP queues have to be
> - * outside the range set for SDMA, VCN, and IH blocks
> - * Prior to SOC15, all queues use queue ID to
> - * determine doorbells.
> - */
> - gpu_resources.reserved_doorbells_start =
> -
Re: [PATCH 4/5] drm/amdkfd: Fix bugs regarding CP user queue doorbells mask on SOC15
The code is fine. Some comments about your comment changes inline to
help clarify things a bit.
On 2019-02-05 3:31 p.m., Zhao, Yong wrote:
> Reserved doorbells for SDMA IH and VCN were not properly masked out
> when allocating doorbells for CP user queues. This patch fixed that.
>
> Change-Id: I670adfc3fd7725d2ed0bd9665cb7f69f8b9023c2
> Signed-off-by: Yong Zhao
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c| 17 +++
> drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 4
> drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 3 +++
> drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 3 +++
> drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 9
> drivers/gpu/drm/amd/amdkfd/kfd_process.c | 21 ++-
> .../gpu/drm/amd/include/kgd_kfd_interface.h | 19 ++---
> 7 files changed, 54 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> index e957e42c539a..ee8527701731 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> @@ -196,11 +196,20 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device
> *adev)
> gpu_resources.sdma_doorbell[1][i+1] =
> adev->doorbell_index.sdma_engine[1] + 0x200 +
> (i >> 1);
> }
> - /* Doorbells 0x0e0-0ff and 0x2e0-2ff are reserved for
> - * SDMA, IH and VCN. So don't use them for the CP.
> +
> + /* Because of the setting in registers like
> + * SDMA0_DOORBELL_RANGE etc., BIF statically uses the
> + * lower 12 bits of doorbell address for routing. In
> + * order to route the CP queue doorbells to CP engine,
> + * the doorbells allocated to CP queues have to be
> + * outside the range set for SDMA, VCN, and IH blocks
> + * Prior to SOC15, all queues use queue ID to
> + * determine doorbells.
This comment mixes up cause and effect:
1. Doorbell routing by the BIF (cause)
2. Changes to doorbell assignment for user mode queues (effect)
The first is a HW change (cause). The second is a consequence from that
(effect). Amdgpu doesn't know anything about KFD queue IDs. I'd just
drop that sentence.
In this context, what distinguishes SOC15 from older chips is, that on
older chips the BIF does not route doorbells. All doorbells can be used
by all engines. Only on SOC15 and newer, KFD needs to know about how
doorbells are routed by the BIF in order to correctly assign doorbells
to queues. Therefore the reserved_doorbell_... and sdma_doorbell fields
are only used on SOC15.
>*/
> - gpu_resources.reserved_doorbell_mask = 0x1e0;
> - gpu_resources.reserved_doorbell_val = 0x0e0;
> + gpu_resources.reserved_doorbells_start =
> + adev->doorbell_index.sdma_engine[0];
> + gpu_resources.reserved_doorbells_end =
> + adev->doorbell_index.last_non_cp;
>
> kgd2kfd_device_init(adev->kfd.dev, _resources);
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> index 59c41841cbce..74b8e2bfabd3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> @@ -70,6 +70,7 @@ struct amdgpu_doorbell_index {
> uint32_t vce_ring6_7;
> } uvd_vce;
> };
> + uint32_t last_non_cp;
> uint32_t max_assignment;
> uint32_t last_idx;
> /* Per engine SDMA doorbell size in dword */
> @@ -141,6 +142,7 @@ typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT
> AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3 = 0x18D,
> AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5 = 0x18E,
> AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7 = 0x18F,
> + AMDGPU_VEGA20_DOORBELL64_LAST_NON_CP =
> AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7,
> AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT= 0x18F,
> AMDGPU_VEGA20_DOORBELL_INVALID = 0x
> } AMDGPU_VEGA20_DOORBELL_ASSIGNMENT;
> @@ -216,6 +218,8 @@ typedef enum _AMDGPU_DOORBELL64_ASSIGNMENT
> AMDGPU_DOORBELL64_VCE_RING4_5 = 0xFE,
> AMDGPU_DOORBELL64_VCE_RING6_7 = 0xFF,
>
> + AMDGPU_DOORBELL64_LAST_NON_CP =
> AMDGPU_DOORBELL64_VCE_RING6_7,
> +
> AMDGPU_DOORBELL64_MAX_ASSIGNMENT = 0xFF,
> AMDGPU_DOORBELL64_INVALID = 0x
> } AMDGPU_DOORBELL64_ASSIGNMENT;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> index 65214c7b0b20..76166c0ec509 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
> @@ -80,6 +80,9
[PATCH v2 4/4] drm/amdgpu: Simplify eviction fence handling
Temporarily removing eviction fences to avoid triggering them by
accident is no longer necessary due to the fence_owner logic in
amdgpu_sync_resv.
As a result the ef_list usage of amdgpu_amdkfd_remove_eviction_fence
and amdgpu_amdkfd_add_eviction_fence are no longer needed.
Signed-off-by: Felix Kuehling
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 134 ++-
1 file changed, 11 insertions(+), 123 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 44a1581..1921dec3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -204,38 +204,25 @@ void amdgpu_amdkfd_unreserve_memory_limit(struct
amdgpu_bo *bo)
}
-/* amdgpu_amdkfd_remove_eviction_fence - Removes eviction fence(s) from BO's
+/* amdgpu_amdkfd_remove_eviction_fence - Removes eviction fence from BO's
* reservation object.
*
* @bo: [IN] Remove eviction fence(s) from this BO
- * @ef: [IN] If ef is specified, then this eviction fence is removed if it
+ * @ef: [IN] This eviction fence is removed if it
* is present in the shared list.
- * @ef_list: [OUT] Returns list of eviction fences. These fences are removed
- * from BO's reservation object shared list.
- * @ef_count: [OUT] Number of fences in ef_list.
*
- * NOTE: If called with ef_list, then amdgpu_amdkfd_add_eviction_fence must be
- * called to restore the eviction fences and to avoid memory leak. This is
- * useful for shared BOs.
* NOTE: Must be called with BO reserved i.e. bo->tbo.resv->lock held.
*/
static int amdgpu_amdkfd_remove_eviction_fence(struct amdgpu_bo *bo,
- struct amdgpu_amdkfd_fence *ef,
- struct amdgpu_amdkfd_fence ***ef_list,
- unsigned int *ef_count)
+ struct amdgpu_amdkfd_fence *ef)
{
struct reservation_object *resv = bo->tbo.resv;
struct reservation_object_list *old, *new;
unsigned int i, j, k;
- if (!ef && !ef_list)
+ if (!ef)
return -EINVAL;
- if (ef_list) {
- *ef_list = NULL;
- *ef_count = 0;
- }
-
old = reservation_object_get_list(resv);
if (!old)
return 0;
@@ -254,8 +241,7 @@ static int amdgpu_amdkfd_remove_eviction_fence(struct
amdgpu_bo *bo,
f = rcu_dereference_protected(old->shared[i],
reservation_object_held(resv));
- if ((ef && f->context == ef->base.context) ||
- (!ef && to_amdgpu_amdkfd_fence(f)))
+ if (f->context == ef->base.context)
RCU_INIT_POINTER(new->shared[--j], f);
else
RCU_INIT_POINTER(new->shared[k++], f);
@@ -263,21 +249,6 @@ static int amdgpu_amdkfd_remove_eviction_fence(struct
amdgpu_bo *bo,
new->shared_max = old->shared_max;
new->shared_count = k;
- if (!ef) {
- unsigned int count = old->shared_count - j;
-
- /* Alloc memory for count number of eviction fence pointers.
-* Fill the ef_list array and ef_count
-*/
- *ef_list = kcalloc(count, sizeof(**ef_list), GFP_KERNEL);
- *ef_count = count;
-
- if (!*ef_list) {
- kfree(new);
- return -ENOMEM;
- }
- }
-
/* Install the new fence list, seqcount provides the barriers */
preempt_disable();
write_seqcount_begin(>seq);
@@ -291,46 +262,13 @@ static int amdgpu_amdkfd_remove_eviction_fence(struct
amdgpu_bo *bo,
f = rcu_dereference_protected(new->shared[i],
reservation_object_held(resv));
- if (!ef)
- (*ef_list)[k++] = to_amdgpu_amdkfd_fence(f);
- else
- dma_fence_put(f);
+ dma_fence_put(f);
}
kfree_rcu(old, rcu);
return 0;
}
-/* amdgpu_amdkfd_add_eviction_fence - Adds eviction fence(s) back into BO's
- * reservation object.
- *
- * @bo: [IN] Add eviction fences to this BO
- * @ef_list: [IN] List of eviction fences to be added
- * @ef_count: [IN] Number of fences in ef_list.
- *
- * NOTE: Must call amdgpu_amdkfd_remove_eviction_fence before calling this
- * function.
- */
-static void amdgpu_amdkfd_add_eviction_fence(struct amdgpu_bo *bo,
- struct amdgpu_amdkfd_fence **ef_list,
- unsigned int ef_count)
-{
- int i;
-
- if (!ef_list || !ef_count)
- return;
-
- for (i = 0; i < ef_count; i++) {
- amdgpu_bo_fence(bo, _list[i]->base, true);
-
[PATCH v2 3/4] drm/amdgpu: Avoid setting off KFD eviction fences in amdgpu_vm
Use FENCE_OWNER_KFD to synchronize PT/PD initialization and clearing
of page table entries. This avoids triggering KFD eviction fences on
the PD reservation objects of compute VMs.
Signed-off-by: Felix Kuehling
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 488d913..942b5eb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -826,7 +826,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
WARN_ON(job->ibs[0].length_dw > 64);
r = amdgpu_sync_resv(adev, >sync, bo->tbo.resv,
-AMDGPU_FENCE_OWNER_UNDEFINED, false);
+AMDGPU_FENCE_OWNER_KFD, false);
if (r)
goto error_free;
@@ -1746,9 +1746,9 @@ static int amdgpu_vm_bo_update_mapping(struct
amdgpu_device *adev,
params.adev = adev;
params.vm = vm;
- /* sync to everything on unmapping */
+ /* sync to everything except eviction fences on unmapping */
if (!(flags & AMDGPU_PTE_VALID))
- owner = AMDGPU_FENCE_OWNER_UNDEFINED;
+ owner = AMDGPU_FENCE_OWNER_KFD;
if (vm->use_cpu_for_update) {
/* params.src is used as flag to indicate system Memory */
--
2.7.4
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[PATCH v2 1/4] drm/amdgpu: Add helper to wait for BO fences using a sync object
Creates a temporary sync object to wait for the BO reservation. This
generalizes amdgpu_vm_wait_pd.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 24
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 30 +++---
3 files changed, 28 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index fd9c4be..ec9e450 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1285,6 +1285,30 @@ void amdgpu_bo_fence(struct amdgpu_bo *bo, struct
dma_fence *fence,
}
/**
+ * amdgpu_sync_wait_resv - Wait for BO reservation fences
+ *
+ * @bo: buffer object
+ * @owner: fence owner
+ * @intr: Whether the wait is interruptible
+ *
+ * Returns:
+ * 0 on success, errno otherwise.
+ */
+int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)
+{
+ struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+ struct amdgpu_sync sync;
+ int r;
+
+ amdgpu_sync_create();
+ amdgpu_sync_resv(adev, , bo->tbo.resv, owner, false);
+ r = amdgpu_sync_wait(, intr);
+ amdgpu_sync_free();
+
+ return r;
+}
+
+/**
* amdgpu_bo_gpu_offset - return GPU offset of bo
* @bo:amdgpu object for which we query the offset
*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 9291c2f..220a6a7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -266,6 +266,7 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,
bool shared);
+int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
int amdgpu_bo_validate(struct amdgpu_bo *bo);
int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 5d7c191..488d913 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1330,31 +1330,6 @@ static void amdgpu_vm_cpu_set_ptes(struct
amdgpu_pte_update_params *params,
}
}
-
-/**
- * amdgpu_vm_wait_pd - Wait for PT BOs to be free.
- *
- * @adev: amdgpu_device pointer
- * @vm: related vm
- * @owner: fence owner
- *
- * Returns:
- * 0 on success, errno otherwise.
- */
-static int amdgpu_vm_wait_pd(struct amdgpu_device *adev, struct amdgpu_vm *vm,
-void *owner)
-{
- struct amdgpu_sync sync;
- int r;
-
- amdgpu_sync_create();
- amdgpu_sync_resv(adev, , vm->root.base.bo->tbo.resv, owner, false);
- r = amdgpu_sync_wait(, true);
- amdgpu_sync_free();
-
- return r;
-}
-
/**
* amdgpu_vm_update_func - helper to call update function
*
@@ -1449,7 +1424,8 @@ int amdgpu_vm_update_directories(struct amdgpu_device
*adev,
params.adev = adev;
if (vm->use_cpu_for_update) {
- r = amdgpu_vm_wait_pd(adev, vm, AMDGPU_FENCE_OWNER_VM);
+ r = amdgpu_bo_sync_wait(vm->root.base.bo,
+ AMDGPU_FENCE_OWNER_VM, true);
if (unlikely(r))
return r;
@@ -1782,7 +1758,7 @@ static int amdgpu_vm_bo_update_mapping(struct
amdgpu_device *adev,
/* Wait for PT BOs to be idle. PTs share the same resv. object
* as the root PD BO
*/
- r = amdgpu_vm_wait_pd(adev, vm, owner);
+ r = amdgpu_bo_sync_wait(vm->root.base.bo, owner, true);
if (unlikely(r))
return r;
--
2.7.4
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[PATCH v2 2/4] drm/amdgpu: Replace ttm_bo_wait with amdgpu_bo_sync_wait
The fence_owner logic in amdgpu_sync_wait will allow waiting without
having to temporarily remove eviction fences.
Signed-off-by: Felix Kuehling
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index d7b10d7..44a1581 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -355,7 +355,7 @@ static int amdgpu_amdkfd_bo_validate(struct amdgpu_bo *bo,
uint32_t domain,
if (ret)
goto validate_fail;
- ttm_bo_wait(>tbo, false, false);
+ amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false);
amdgpu_amdkfd_add_eviction_fence(bo, ef_list, ef_count);
}
@@ -1002,7 +1002,7 @@ static int init_kfd_vm(struct amdgpu_vm *vm, void
**process_info,
pr_err("validate_pt_pd_bos() failed\n");
goto validate_pd_fail;
}
- ret = ttm_bo_wait(>root.base.bo->tbo, false, false);
+ amdgpu_bo_sync_wait(vm->root.base.bo, AMDGPU_FENCE_OWNER_KFD, false);
if (ret)
goto wait_pd_fail;
amdgpu_bo_fence(vm->root.base.bo,
--
2.7.4
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[pull] amdgpu drm-next-5.1
Hi Dave, Daniel, Updates for 5.1: - GDS fixes - Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES interface - GPUVM fixes - PCIE DPM switching fixes for vega20 - Vega10 uclk DPM regression fix - DC Freesync fixes - DC ABM fixes - Various DC cleanups The following changes since commit 47dd8048a1bf5b2fb96e5abe99b4f1dcd208ea4d: drm/amdgpu: Show XGMI node and hive message per device only once (2019-01-29 15:16:18 -0500) are available in the Git repository at: git://people.freedesktop.org/~agd5f/linux drm-next-5.1 for you to fetch changes up to 0461221316ec21e0a535a35fba3feb6ba75706e6: drm/amd/display: Check hpd_gpio for NULL before accessing it (2019-02-07 17:22:12 -0500) Andrey Grodzovsky (1): drm/amdgpu: Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES Anthony Koo (8): drm/amd/display: fix issue with DC brightness low with VB drm/amd/display: link_rate_set should index into table drm/amd/display: interface to check if timing can be seamless drm/amd/display: refactor out programming of vupdate interrupt drm/amd/display: add way to determine if link is active drm/amd/display: add seamless boot flag to stream drm/amd/display: refactor programming of DRR drm/amd/display: refactor init_hw to isolate pipe related init Chiawen Huang (1): drm/amd/display: add gpio lock/unlock Christian König (4): drm/amdgpu: cleanup amdgpu_pte_update_params drm/amdgpu: fix waiting for BO moves with CPU based PD/PT updates drm/amdgpu: cleanup VM dw estimation a bit drm/amdgpu: fix NULL ptr dref in the VM code Colin Ian King (1): drm/amd/amdgpu: fix spelling mistake "matech" -> "match" Dmytro Laktyushkin (2): drm/amd/display: add a debug flag to force odm combine drm/amd/display: add n_vid_mul and half pix_rate for odm Eryk Brol (1): drm/amd/display: DC VM Fixes Harish Kasiviswanathan (2): drm/amdgpu: Fix pci platform speed and width drm/amd/powerplay: add override pcie parameters for Vega20 (v2) Harry Wentland (1): drm/amd/display: Check hpd_gpio for NULL before accessing it Ilya Bakoulin (1): drm/amd/display: Check that vrefresh is in freesync range Jerry (Fangzhi) Zuo (2): drm/amd/display: Apply fake sink back to MST sequence drm/amd/display: Clear dc_sink after it gets released John Barberiz (1): drm/amd/display: Use udelay when waiting between aux retries Josip Pavic (1): drm/amd/display: Modify ABM 2.2 Max Reduction Kenneth Feng (1): drm/amd/powerplay: update soc boot and max level on vega10 Krunoslav Kovac (1): drm/amd/display: DGAM enabled for HDR Marek Olšák (2): drm/amdgpu: clean up memory/GDS/GWS/OA alignment code drm/amdgpu: add a workaround for GDS ordered append hangs with compute queues Murton Liu (1): drm/amd/display: PIP overlay corruption Nathan Chancellor (3): drm/amd/display: Use memset to initialize variable in wait_for_training_aux_rd_interval drm/amd/display: Use memset to initialize variables in amdgpu_dm_atomic_commit_tail drm/amd/display: Use memset to initialize variables in fill_plane_dcc_attributes Nicholas Kazlauskas (8): drm/amd/display: Don't re-enable CRC when CONFIG_DEBUG_FS isn't defined drm/amd/display: Apply all surface updates onto surfaces drm/amd/display: Use the right surface for flip and FreeSync drm/amd/display: Reformat dm_determine_update_type_for_commit drm/amd/display: Initialize stream_update to zero drm/amd/display: Remove FreeSync timing changed debug output drm/amd/display: Disconnect mpcc when changing tg drm/amd/display: Don't re-program planes for DPMS changes Paul Hsieh (1): drm/amd/display: dmcu is blocking due to wrong disable ABM command Pratik Vishwakarma (1): drm/amdgpu/display: fix compiler errors [-Werror,-Wparentheses-equality] Shirish S (1): drm/amd/display: Use context parameters to enable FBC Steven Chiu (1): drm/amd/display: 3.2.16 Su Sung Chung (1): drm/amd/display: store timing sync info in dc_stream_status Wenjing Liu (1): drm/amd/display: determine if a pipe is synced by plane state Wesley Chalmers (1): drm/amd/display: Disable Stutter for Stereo 3D Xiaodong Yan (1): drm/amd/display: Add monitor patch for backlight off Yongqiang Sun (2): drm/amd/display: pass vline_config parameter by reference. drm/amd/display: Calc vline position in dc. mark mcgarrity (1): drm/amd/display: 3.2.17 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 13 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 58 -- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h| 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c| 7 - drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 16 +-
Re: [PATCH v2 02/10] drm/amd/display: dc/dce: add DCE6 support (v2)
Hi Harry,
On Wed, Oct 17, 2018 at 9:47 PM Wentland, Harry wrote:
>
> On 2018-10-17 4:35 a.m., Mauro Rossi wrote:
> > DCE6 targets are added replicating existing DCE8 implementation.
> >
> > NOTE: dce_8_0_{d,sh_mask}.h headers used instead of dce_6_0_{d,sh_mask}.h
> > only to build dce60_resource.c due to missing *_DCE60 macros/registers/masks
> >
> > IMPORTANT: Coding of dce60_resource.c requires review to understand
> > if dce_6_0_{d,sh_mask}.h should be updated with macros/registers/masks
> >
> > (v2) updated dce60_{hw_sequencer,resources}.c as per amd-staging-drm-next
> > removed dce_version cases in dc/dce/dce_clock_source.c
> > ---
> > drivers/gpu/drm/amd/display/dc/Makefile |4 +
> > drivers/gpu/drm/amd/display/dc/dce60/Makefile | 34 +
> > .../amd/display/dc/dce60/dce60_hw_sequencer.c | 82 +
> > .../amd/display/dc/dce60/dce60_hw_sequencer.h | 36 +
> > .../drm/amd/display/dc/dce60/dce60_resource.c | 1458 +
> > .../drm/amd/display/dc/dce60/dce60_resource.h | 47 +
> > .../display/dc/dce60/dce60_timing_generator.c | 242 +++
> > .../display/dc/dce60/dce60_timing_generator.h | 39 +
> > .../include/asic_reg/dce/dce_6_0_sh_mask.h|4 +
> > 9 files changed, 1946 insertions(+)
> > create mode 100644 drivers/gpu/drm/amd/display/dc/dce60/Makefile
> > create mode 100644
> > drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.c
> > create mode 100644
> > drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.h
> > create mode 100644 drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c
> > create mode 100644 drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.h
> > create mode 100644
> > drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c
> > create mode 100644
> > drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.h
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/Makefile
> > b/drivers/gpu/drm/amd/display/dc/Makefile
> > index aed538a4d1ba..d5d5acd57559 100644
> > --- a/drivers/gpu/drm/amd/display/dc/Makefile
> > +++ b/drivers/gpu/drm/amd/display/dc/Makefile
> > @@ -36,6 +36,10 @@ DC_LIBS += dce110
> > DC_LIBS += dce100
> > DC_LIBS += dce80
> >
> > +ifdef CONFIG_DRM_AMD_DC_SI
> > +DC_LIBS += dce60
> > +endif
> > +
> > AMD_DC = $(addsuffix /Makefile, $(addprefix
> > $(FULL_AMD_DISPLAY_PATH)/dc/,$(DC_LIBS)))
> >
> > include $(AMD_DC)
> > diff --git a/drivers/gpu/drm/amd/display/dc/dce60/Makefile
> > b/drivers/gpu/drm/amd/display/dc/dce60/Makefile
> > new file mode 100644
> > index ..39afd7c59a7c
> > --- /dev/null
> > +++ b/drivers/gpu/drm/amd/display/dc/dce60/Makefile
> > @@ -0,0 +1,34 @@
> > +#
> > +# Copyright 2017 Advanced Micro Devices, Inc.
> > +#
> > +# Permission is hereby granted, free of charge, to any person obtaining a
> > +# copy of this software and associated documentation files (the
> > "Software"),
> > +# to deal in the Software without restriction, including without limitation
> > +# the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > +# and/or sell copies of the Software, and to permit persons to whom the
> > +# Software is furnished to do so, subject to the following conditions:
> > +#
> > +# The above copyright notice and this permission notice shall be included
> > in
> > +# all copies or substantial portions of the Software.
> > +#
> > +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> > OR
> > +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > +# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > +# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > +# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > +# OTHER DEALINGS IN THE SOFTWARE.
> > +#
> > +#
> > +# Makefile for the 'controller' sub-component of DAL.
> > +# It provides the control and status of HW CRTC block.
> > +
> > +DCE60 = dce60_timing_generator.o dce60_hw_sequencer.o \
> > + dce60_resource.o
> > +
> > +AMD_DAL_DCE60 = $(addprefix $(AMDDALPATH)/dc/dce60/,$(DCE60))
> > +
> > +AMD_DISPLAY_FILES += $(AMD_DAL_DCE60)
> > +
> > +
> > +
> > diff --git a/drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.c
> > b/drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.c
> > new file mode 100644
> > index ..502172bf6097
> > --- /dev/null
> > +++ b/drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.c
> > @@ -0,0 +1,82 @@
> > +/*
> > + * Copyright 2015 Advanced Micro Devices, Inc.
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a
> > + * copy of this software and associated documentation files (the
> > "Software"),
> > + * to deal in the Software without restriction, including without
> > limitation
> > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > + * and/or sell copies of the Software, and to
Re: [PATCH v2 2/2] drm/drv: drm_dev_unplug(): Move out drm_dev_put() call
On 2/8/19 4:01 PM, Noralf Trønnes wrote:
This makes it possible to use drm_dev_unplug() with the upcoming
devm_drm_dev_init() which will do drm_dev_put() in its release callback.
Cc: Alex Deucher
Cc: Christian König
Cc: David (ChunMing) Zhou
Cc: Dave Airlie
Cc: Sean Paul
Cc: Oleksandr Andrushchenko
Cc: Daniel Vetter
Signed-off-by: Noralf Trønnes
---
I will take this through drm-misc-next.
Noralf.
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
drivers/gpu/drm/drm_drv.c | 1 -
drivers/gpu/drm/udl/udl_drv.c | 1 +
drivers/gpu/drm/xen/xen_drm_front.c | 1 +
4 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index a1bb3773087b..d1f37ba3c118 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -971,6 +971,7 @@ amdgpu_pci_remove(struct pci_dev *pdev)
DRM_ERROR("Device removal is currently not supported outside of fbcon\n");
drm_dev_unplug(dev);
+ drm_dev_put(dev);
pci_disable_device(pdev);
pci_set_drvdata(pdev, NULL);
}
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 05bbc2b622fc..b04982101fcb 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -376,7 +376,6 @@ void drm_dev_unplug(struct drm_device *dev)
synchronize_srcu(_unplug_srcu);
drm_dev_unregister(dev);
- drm_dev_put(dev);
}
EXPORT_SYMBOL(drm_dev_unplug);
diff --git a/drivers/gpu/drm/udl/udl_drv.c b/drivers/gpu/drm/udl/udl_drv.c
index 22cd2d13e272..53b7b8c04bc6 100644
--- a/drivers/gpu/drm/udl/udl_drv.c
+++ b/drivers/gpu/drm/udl/udl_drv.c
@@ -107,6 +107,7 @@ static void udl_usb_disconnect(struct usb_interface
*interface)
udl_fbdev_unplug(dev);
udl_drop_usb(dev);
drm_dev_unplug(dev);
+ drm_dev_put(dev);
}
/*
diff --git a/drivers/gpu/drm/xen/xen_drm_front.c
b/drivers/gpu/drm/xen/xen_drm_front.c
index 3e78a832d7f9..84aa4d61dc42 100644
--- a/drivers/gpu/drm/xen/xen_drm_front.c
+++ b/drivers/gpu/drm/xen/xen_drm_front.c
@@ -582,6 +582,7 @@ static void xen_drm_drv_fini(struct xen_drm_front_info
*front_info)
drm_kms_helper_poll_fini(dev);
drm_dev_unplug(dev);
+ drm_dev_put(dev);
Acked-by: Oleksandr Andrushchenko
front_info->drm_info = NULL;
___
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Re: [PATCH] drm/amdgpu: cleanup amdgpu_ih_process a bit more
Sorry, I thought I had reviewed that already. The change is Reviewed-by: Felix
Kuehling
From: amd-gfx on behalf of Christian
König
Sent: Friday, February 8, 2019 7:42 AM
To: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: cleanup amdgpu_ih_process a bit more
Ping? Just a minor cleanup without functional change.
Am 16.01.19 um 15:32 schrieb Christian König:
> Remove the callback and call the dispatcher directly.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c | 6 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | 4 +--
> drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 48 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h | 2 +-
> 4 files changed, 21 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
> index d0a5db777b6d..1c50be3ab8a9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
> @@ -140,9 +140,7 @@ void amdgpu_ih_ring_fini(struct amdgpu_device *adev,
> struct amdgpu_ih_ring *ih)
>* Interrupt hander (VI), walk the IH ring.
>* Returns irq process return code.
>*/
> -int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih,
> - void (*callback)(struct amdgpu_device *adev,
> -struct amdgpu_ih_ring *ih))
> +int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih)
> {
> u32 wptr;
>
> @@ -162,7 +160,7 @@ int amdgpu_ih_process(struct amdgpu_device *adev, struct
> amdgpu_ih_ring *ih,
> rmb();
>
> while (ih->rptr != wptr) {
> - callback(adev, ih);
> + amdgpu_irq_dispatch(adev, ih);
> ih->rptr &= ih->ptr_mask;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
> index 1ccb1831382a..113a1ba13d4a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
> @@ -69,8 +69,6 @@ struct amdgpu_ih_funcs {
> int amdgpu_ih_ring_init(struct amdgpu_device *adev, struct amdgpu_ih_ring
> *ih,
> unsigned ring_size, bool use_bus_addr);
> void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring
> *ih);
> -int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih,
> - void (*callback)(struct amdgpu_device *adev,
> -struct amdgpu_ih_ring *ih));
> +int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih);
>
> #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> index 8bfb3dab46f7..af4c3b1af322 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> @@ -130,29 +130,6 @@ void amdgpu_irq_disable_all(struct amdgpu_device *adev)
> spin_unlock_irqrestore(>irq.lock, irqflags);
> }
>
> -/**
> - * amdgpu_irq_callback - callback from the IH ring
> - *
> - * @adev: amdgpu device pointer
> - * @ih: amdgpu ih ring
> - *
> - * Callback from IH ring processing to handle the entry at the current
> position
> - * and advance the read pointer.
> - */
> -static void amdgpu_irq_callback(struct amdgpu_device *adev,
> - struct amdgpu_ih_ring *ih)
> -{
> - u32 ring_index = ih->rptr >> 2;
> - struct amdgpu_iv_entry entry;
> -
> - entry.iv_entry = (const uint32_t *)>ring[ring_index];
> - amdgpu_ih_decode_iv(adev, );
> -
> - trace_amdgpu_iv(ih - >irq.ih, );
> -
> - amdgpu_irq_dispatch(adev, );
> -}
> -
> /**
>* amdgpu_irq_handler - IRQ handler
>*
> @@ -170,7 +147,7 @@ irqreturn_t amdgpu_irq_handler(int irq, void *arg)
> struct amdgpu_device *adev = dev->dev_private;
> irqreturn_t ret;
>
> - ret = amdgpu_ih_process(adev, >irq.ih, amdgpu_irq_callback);
> + ret = amdgpu_ih_process(adev, >irq.ih);
> if (ret == IRQ_HANDLED)
> pm_runtime_mark_last_busy(dev->dev);
> return ret;
> @@ -188,7 +165,7 @@ static void amdgpu_irq_handle_ih1(struct work_struct
> *work)
> struct amdgpu_device *adev = container_of(work, struct amdgpu_device,
> irq.ih1_work);
>
> - amdgpu_ih_process(adev, >irq.ih1, amdgpu_irq_callback);
> + amdgpu_ih_process(adev, >irq.ih1);
> }
>
> /**
> @@ -203,7 +180,7 @@ static void amdgpu_irq_handle_ih2(struct work_struct
> *work)
> struct amdgpu_device *adev = container_of(work, struct amdgpu_device,
> irq.ih2_work);
>
> - amdgpu_ih_process(adev, >irq.ih2, amdgpu_irq_callback);
> + amdgpu_ih_process(adev, >irq.ih2);
> }
>
> /**
> @@ -394,14 +371,23 @@ int amdgpu_irq_add_id(struct amdgpu_device *adev,
>* Dispatches IRQ to IP blocks.
>*/
> void
[PATCH v2 2/2] drm/drv: drm_dev_unplug(): Move out drm_dev_put() call
This makes it possible to use drm_dev_unplug() with the upcoming
devm_drm_dev_init() which will do drm_dev_put() in its release callback.
Cc: Alex Deucher
Cc: Christian König
Cc: David (ChunMing) Zhou
Cc: Dave Airlie
Cc: Sean Paul
Cc: Oleksandr Andrushchenko
Cc: Daniel Vetter
Signed-off-by: Noralf Trønnes
---
I will take this through drm-misc-next.
Noralf.
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
drivers/gpu/drm/drm_drv.c | 1 -
drivers/gpu/drm/udl/udl_drv.c | 1 +
drivers/gpu/drm/xen/xen_drm_front.c | 1 +
4 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index a1bb3773087b..d1f37ba3c118 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -971,6 +971,7 @@ amdgpu_pci_remove(struct pci_dev *pdev)
DRM_ERROR("Device removal is currently not supported outside of
fbcon\n");
drm_dev_unplug(dev);
+ drm_dev_put(dev);
pci_disable_device(pdev);
pci_set_drvdata(pdev, NULL);
}
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 05bbc2b622fc..b04982101fcb 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -376,7 +376,6 @@ void drm_dev_unplug(struct drm_device *dev)
synchronize_srcu(_unplug_srcu);
drm_dev_unregister(dev);
- drm_dev_put(dev);
}
EXPORT_SYMBOL(drm_dev_unplug);
diff --git a/drivers/gpu/drm/udl/udl_drv.c b/drivers/gpu/drm/udl/udl_drv.c
index 22cd2d13e272..53b7b8c04bc6 100644
--- a/drivers/gpu/drm/udl/udl_drv.c
+++ b/drivers/gpu/drm/udl/udl_drv.c
@@ -107,6 +107,7 @@ static void udl_usb_disconnect(struct usb_interface
*interface)
udl_fbdev_unplug(dev);
udl_drop_usb(dev);
drm_dev_unplug(dev);
+ drm_dev_put(dev);
}
/*
diff --git a/drivers/gpu/drm/xen/xen_drm_front.c
b/drivers/gpu/drm/xen/xen_drm_front.c
index 3e78a832d7f9..84aa4d61dc42 100644
--- a/drivers/gpu/drm/xen/xen_drm_front.c
+++ b/drivers/gpu/drm/xen/xen_drm_front.c
@@ -582,6 +582,7 @@ static void xen_drm_drv_fini(struct xen_drm_front_info
*front_info)
drm_kms_helper_poll_fini(dev);
drm_dev_unplug(dev);
+ drm_dev_put(dev);
front_info->drm_info = NULL;
--
2.20.1
___
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH v2 0/2] drm/drv: Rework drm_dev_unplug() (was: Remove drm_dev_unplug())
This series makes drm_dev_unplug() compatible with the upcoming devm_drm_dev_init(), fixes a double drm_dev_unregister() situation and simplifies the drm_device ref handling wrt to the last fd closed after unregister. The first version of this patchset removed drm_dev_unplug(), see here for the discussion as to why it is kept for the time being: [2/6] drm/drv: Prepare to remove drm_dev_unplug() https://patchwork.freedesktop.org/patch/282902/ Noralf. Noralf Trønnes (2): drm: Fix drm_release() and device unplug drm/drv: drm_dev_unplug(): Move out drm_dev_put() call drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 + drivers/gpu/drm/drm_drv.c | 5 - drivers/gpu/drm/drm_file.c | 6 ++ drivers/gpu/drm/udl/udl_drv.c | 1 + drivers/gpu/drm/xen/xen_drm_front.c | 1 + 5 files changed, 5 insertions(+), 9 deletions(-) -- 2.20.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH v2 1/2] drm: Fix drm_release() and device unplug
If userspace has open fd(s) when drm_dev_unplug() is run, it will result
in drm_dev_unregister() being called twice. First in drm_dev_unplug() and
then later in drm_release() through the call to drm_put_dev().
Since userspace already holds a ref on drm_device through the drm_minor,
it's not necessary to add extra ref counting based on no open file
handles. Instead just drm_dev_put() unconditionally in drm_dev_unplug().
We now have this:
- Userpace holds a ref on drm_device as long as there's open fd(s)
- The driver holds a ref on drm_device as long as it's bound to the
struct device
When both sides are done with drm_device, it is released.
Signed-off-by: Noralf Trønnes
Reviewed-by: Oleksandr Andrushchenko
Reviewed-by: Daniel Vetter
Reviewed-by: Sean Paul
---
drivers/gpu/drm/drm_drv.c | 6 +-
drivers/gpu/drm/drm_file.c | 6 ++
2 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 381581b01d48..05bbc2b622fc 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -376,11 +376,7 @@ void drm_dev_unplug(struct drm_device *dev)
synchronize_srcu(_unplug_srcu);
drm_dev_unregister(dev);
-
- mutex_lock(_global_mutex);
- if (dev->open_count == 0)
- drm_dev_put(dev);
- mutex_unlock(_global_mutex);
+ drm_dev_put(dev);
}
EXPORT_SYMBOL(drm_dev_unplug);
diff --git a/drivers/gpu/drm/drm_file.c b/drivers/gpu/drm/drm_file.c
index 46f48f245eb5..3f20f598cd7c 100644
--- a/drivers/gpu/drm/drm_file.c
+++ b/drivers/gpu/drm/drm_file.c
@@ -479,11 +479,9 @@ int drm_release(struct inode *inode, struct file *filp)
drm_file_free(file_priv);
- if (!--dev->open_count) {
+ if (!--dev->open_count)
drm_lastclose(dev);
- if (drm_dev_is_unplugged(dev))
- drm_put_dev(dev);
- }
+
mutex_unlock(_global_mutex);
drm_minor_release(minor);
--
2.20.1
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Re: [PATCH] drm/amdgpu: cleanup amdgpu_ih_process a bit more
Ping? Just a minor cleanup without functional change.
Am 16.01.19 um 15:32 schrieb Christian König:
Remove the callback and call the dispatcher directly.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c | 6 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | 4 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 48 +
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h | 2 +-
4 files changed, 21 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
index d0a5db777b6d..1c50be3ab8a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
@@ -140,9 +140,7 @@ void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct
amdgpu_ih_ring *ih)
* Interrupt hander (VI), walk the IH ring.
* Returns irq process return code.
*/
-int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih,
- void (*callback)(struct amdgpu_device *adev,
- struct amdgpu_ih_ring *ih))
+int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih)
{
u32 wptr;
@@ -162,7 +160,7 @@ int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih,
rmb();
while (ih->rptr != wptr) {
- callback(adev, ih);
+ amdgpu_irq_dispatch(adev, ih);
ih->rptr &= ih->ptr_mask;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
index 1ccb1831382a..113a1ba13d4a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
@@ -69,8 +69,6 @@ struct amdgpu_ih_funcs {
int amdgpu_ih_ring_init(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih,
unsigned ring_size, bool use_bus_addr);
void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring
*ih);
-int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih,
- void (*callback)(struct amdgpu_device *adev,
- struct amdgpu_ih_ring *ih));
+int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih);
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 8bfb3dab46f7..af4c3b1af322 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -130,29 +130,6 @@ void amdgpu_irq_disable_all(struct amdgpu_device *adev)
spin_unlock_irqrestore(>irq.lock, irqflags);
}
-/**
- * amdgpu_irq_callback - callback from the IH ring
- *
- * @adev: amdgpu device pointer
- * @ih: amdgpu ih ring
- *
- * Callback from IH ring processing to handle the entry at the current position
- * and advance the read pointer.
- */
-static void amdgpu_irq_callback(struct amdgpu_device *adev,
- struct amdgpu_ih_ring *ih)
-{
- u32 ring_index = ih->rptr >> 2;
- struct amdgpu_iv_entry entry;
-
- entry.iv_entry = (const uint32_t *)>ring[ring_index];
- amdgpu_ih_decode_iv(adev, );
-
- trace_amdgpu_iv(ih - >irq.ih, );
-
- amdgpu_irq_dispatch(adev, );
-}
-
/**
* amdgpu_irq_handler - IRQ handler
*
@@ -170,7 +147,7 @@ irqreturn_t amdgpu_irq_handler(int irq, void *arg)
struct amdgpu_device *adev = dev->dev_private;
irqreturn_t ret;
- ret = amdgpu_ih_process(adev, >irq.ih, amdgpu_irq_callback);
+ ret = amdgpu_ih_process(adev, >irq.ih);
if (ret == IRQ_HANDLED)
pm_runtime_mark_last_busy(dev->dev);
return ret;
@@ -188,7 +165,7 @@ static void amdgpu_irq_handle_ih1(struct work_struct *work)
struct amdgpu_device *adev = container_of(work, struct amdgpu_device,
irq.ih1_work);
- amdgpu_ih_process(adev, >irq.ih1, amdgpu_irq_callback);
+ amdgpu_ih_process(adev, >irq.ih1);
}
/**
@@ -203,7 +180,7 @@ static void amdgpu_irq_handle_ih2(struct work_struct *work)
struct amdgpu_device *adev = container_of(work, struct amdgpu_device,
irq.ih2_work);
- amdgpu_ih_process(adev, >irq.ih2, amdgpu_irq_callback);
+ amdgpu_ih_process(adev, >irq.ih2);
}
/**
@@ -394,14 +371,23 @@ int amdgpu_irq_add_id(struct amdgpu_device *adev,
* Dispatches IRQ to IP blocks.
*/
void amdgpu_irq_dispatch(struct amdgpu_device *adev,
-struct amdgpu_iv_entry *entry)
+struct amdgpu_ih_ring *ih)
{
- unsigned client_id = entry->client_id;
- unsigned src_id = entry->src_id;
+ u32 ring_index = ih->rptr >> 2;
+ struct amdgpu_iv_entry entry;
+ unsigned client_id, src_id;
struct amdgpu_irq_src *src;
bool handled = false;
int r;
+ entry.iv_entry = (const uint32_t
Re: [PATCH] drm/sched: Always trace the dependencies we wait on, to fix a race.
Am 08.02.19 um 00:10 schrieb Eric Anholt: "Koenig, Christian" writes: Am 07.12.18 um 20:16 schrieb Eric Anholt: The entity->dependency can go away completely once we've called drm_sched_entity_add_dependency_cb() (if the cb is called before we get around to tracing). The tracepoint is more useful if we trace every dependency instead of just ones that get callbacks installed, anyway, so just do that. Fixes any easy-to-produce OOPS when tracing the scheduler on V3D with "perf record -a -e gpu_scheduler:.\* glxgears" and DEBUG_SLAB enabled. Signed-off-by: Eric Anholt Reviewed-by: Christian König Going to pick that up for upstream and will add with a CC: stable. Looks like this got misplaced. My fault, pushed to our internal branch now with a CC: stable tag on it. Christian. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 1/4] drm/amdgpu: Add helper to wait for a reservation using a sync object
Am 07.02.19 um 20:53 schrieb Kuehling, Felix:
> Creates a temporary sync object to wait for the reservation. This
> generalizes amdgpu_vm_wait_pd.
>
> Signed-off-by: Felix Kuehling
For this one it might be better to name this function
amdgpu_bo_sync_wait and add it to amdgpu_object.c.
Just because the object we work with is the BO/resv and not the sync
container.
Apart from that the series looks good to me and patches #2 and #3 are
Reviewed-by: Christian König and patch #4 is
Acked-by: Christian König
Regards,
Christian.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 25 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h | 3 +++
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 31
> ---
> 3 files changed, 32 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> index 2d6f5ec..f56d104 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> @@ -377,6 +377,31 @@ int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)
> }
>
> /**
> + * amdgpu_sync_wait_resv - Wait for reservation fences
> + *
> + * @vm: related vm
> + * @owner: fence owner
> + * @intr: Whether the wait is interruptible
> + *
> + * Returns:
> + * 0 on success, errno otherwise.
> + */
> +int amdgpu_sync_wait_resv(struct amdgpu_device *adev,
> + struct reservation_object *resv,
> + void *owner, bool intr)
> +{
> + struct amdgpu_sync sync;
> + int r;
> +
> + amdgpu_sync_create();
> + amdgpu_sync_resv(adev, , resv, owner, false);
> + r = amdgpu_sync_wait(, intr);
> + amdgpu_sync_free();
> +
> + return r;
> +}
> +
> +/**
>* amdgpu_sync_free - free the sync object
>*
>* @sync: sync object to use
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
> index 10cf23a..af6eea6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
> @@ -52,6 +52,9 @@ struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync
> *sync,
> struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync, bool
> *explicit);
> int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync
> *clone);
> int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);
> +int amdgpu_sync_wait_resv(struct amdgpu_device *adev,
> + struct reservation_object *resv,
> + void *owner, bool intr);
> void amdgpu_sync_free(struct amdgpu_sync *sync);
> int amdgpu_sync_init(void);
> void amdgpu_sync_fini(void);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 5d7c191..ed1ca1d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1330,31 +1330,6 @@ static void amdgpu_vm_cpu_set_ptes(struct
> amdgpu_pte_update_params *params,
> }
> }
>
> -
> -/**
> - * amdgpu_vm_wait_pd - Wait for PT BOs to be free.
> - *
> - * @adev: amdgpu_device pointer
> - * @vm: related vm
> - * @owner: fence owner
> - *
> - * Returns:
> - * 0 on success, errno otherwise.
> - */
> -static int amdgpu_vm_wait_pd(struct amdgpu_device *adev, struct amdgpu_vm
> *vm,
> - void *owner)
> -{
> - struct amdgpu_sync sync;
> - int r;
> -
> - amdgpu_sync_create();
> - amdgpu_sync_resv(adev, , vm->root.base.bo->tbo.resv, owner, false);
> - r = amdgpu_sync_wait(, true);
> - amdgpu_sync_free();
> -
> - return r;
> -}
> -
> /**
>* amdgpu_vm_update_func - helper to call update function
>*
> @@ -1449,7 +1424,8 @@ int amdgpu_vm_update_directories(struct amdgpu_device
> *adev,
> params.adev = adev;
>
> if (vm->use_cpu_for_update) {
> - r = amdgpu_vm_wait_pd(adev, vm, AMDGPU_FENCE_OWNER_VM);
> + r = amdgpu_sync_wait_resv(adev, vm->root.base.bo->tbo.resv,
> + AMDGPU_FENCE_OWNER_VM, true);
> if (unlikely(r))
> return r;
>
> @@ -1782,7 +1758,8 @@ static int amdgpu_vm_bo_update_mapping(struct
> amdgpu_device *adev,
> /* Wait for PT BOs to be idle. PTs share the same resv. object
>* as the root PD BO
>*/
> - r = amdgpu_vm_wait_pd(adev, vm, owner);
> + r = amdgpu_sync_wait_resv(adev, vm->root.base.bo->tbo.resv,
> + owner, true);
> if (unlikely(r))
> return r;
>
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