Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2)

[Christian König]

Am 02.08.21 um 07:16 schrieb Guchun Chen:

In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to stop
scheduler in s3 test, otherwise, fence related failure will arrive
after resume. To fix this and for a better clean up, move drm_sched_fini
from fence_hw_fini to fence_sw_fini, as it's part of driver shutdown, and
should never be called in hw_fini.

v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init,
to keep sw_init and sw_fini paired.

Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence
Suggested-by: Christian König 
Signed-off-by: Guchun Chen 


It's a bit ambiguous now what fence_drv.initialized means, but I think 
we can live with that for now.


Patch is Reviewed-by: Christian König .

Regards,
Christian.


---
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  5 ++---
  drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  | 12 +++-
  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h   |  4 ++--
  3 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index b1d2dc39e8be..9e53ff851496 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device *adev,
  
  fence_driver_init:

/* Fence driver */
-   r = amdgpu_fence_driver_init(adev);
+   r = amdgpu_fence_driver_sw_init(adev);
if (r) {
-   dev_err(adev->dev, "amdgpu_fence_driver_init failed\n");
+   dev_err(adev->dev, "amdgpu_fence_driver_sw_init failed\n");
amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 
0);
goto failed;
}
@@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool 
fbcon)
}
amdgpu_fence_driver_hw_init(adev);
  
-

r = amdgpu_device_ip_late_init(adev);
if (r)
return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 49c5c7331c53..7495911516c2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
  }
  
  /**

- * amdgpu_fence_driver_init - init the fence driver
+ * amdgpu_fence_driver_sw_init - init the fence driver
   * for all possible rings.
   *
   * @adev: amdgpu device pointer
@@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring 
*ring,
   * amdgpu_fence_driver_start_ring().
   * Returns 0 for success.
   */
-int amdgpu_fence_driver_init(struct amdgpu_device *adev)
+int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev)
  {
return 0;
  }
  
  /**

- * amdgpu_fence_driver_fini - tear down the fence driver
+ * amdgpu_fence_driver_hw_fini - tear down the fence driver
   * for all possible rings.
   *
   * @adev: amdgpu device pointer
@@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev)
  
  		if (!ring || !ring->fence_drv.initialized)

continue;
-   if (!ring->no_scheduler)
-   drm_sched_fini(&ring->sched);
+
/* You can't wait for HW to signal if it's gone */
if (!drm_dev_is_unplugged(&adev->ddev))
r = amdgpu_fence_wait_empty(ring);
@@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev)
if (!ring || !ring->fence_drv.initialized)
continue;
  
+		if (!ring->no_scheduler)

+   drm_sched_fini(&ring->sched);
+
for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j)
dma_fence_put(ring->fence_drv.fences[j]);
kfree(ring->fence_drv.fences);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 27adffa7658d..9c11ced4312c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -106,7 +106,6 @@ struct amdgpu_fence_driver {
struct dma_fence**fences;
  };
  
-int amdgpu_fence_driver_init(struct amdgpu_device *adev);

  void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
  
  int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,

@@ -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
  int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
   struct amdgpu_irq_src *irq_src,
   unsigned irq_type);
+void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev);
  void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev);
+int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev);
  void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev);
-void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev);
  int amdgpu

[PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2)

[Guchun Chen]

In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to stop
scheduler in s3 test, otherwise, fence related failure will arrive
after resume. To fix this and for a better clean up, move drm_sched_fini
from fence_hw_fini to fence_sw_fini, as it's part of driver shutdown, and
should never be called in hw_fini.

v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init,
to keep sw_init and sw_fini paired.

Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence
Suggested-by: Christian König 
Signed-off-by: Guchun Chen 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  5 ++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  | 12 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h   |  4 ++--
 3 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index b1d2dc39e8be..9e53ff851496 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 
 fence_driver_init:
/* Fence driver */
-   r = amdgpu_fence_driver_init(adev);
+   r = amdgpu_fence_driver_sw_init(adev);
if (r) {
-   dev_err(adev->dev, "amdgpu_fence_driver_init failed\n");
+   dev_err(adev->dev, "amdgpu_fence_driver_sw_init failed\n");
amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 
0);
goto failed;
}
@@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool 
fbcon)
}
amdgpu_fence_driver_hw_init(adev);
 
-
r = amdgpu_device_ip_late_init(adev);
if (r)
return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 49c5c7331c53..7495911516c2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
 }
 
 /**
- * amdgpu_fence_driver_init - init the fence driver
+ * amdgpu_fence_driver_sw_init - init the fence driver
  * for all possible rings.
  *
  * @adev: amdgpu device pointer
@@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring 
*ring,
  * amdgpu_fence_driver_start_ring().
  * Returns 0 for success.
  */
-int amdgpu_fence_driver_init(struct amdgpu_device *adev)
+int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev)
 {
return 0;
 }
 
 /**
- * amdgpu_fence_driver_fini - tear down the fence driver
+ * amdgpu_fence_driver_hw_fini - tear down the fence driver
  * for all possible rings.
  *
  * @adev: amdgpu device pointer
@@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev)
 
if (!ring || !ring->fence_drv.initialized)
continue;
-   if (!ring->no_scheduler)
-   drm_sched_fini(&ring->sched);
+
/* You can't wait for HW to signal if it's gone */
if (!drm_dev_is_unplugged(&adev->ddev))
r = amdgpu_fence_wait_empty(ring);
@@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev)
if (!ring || !ring->fence_drv.initialized)
continue;
 
+   if (!ring->no_scheduler)
+   drm_sched_fini(&ring->sched);
+
for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j)
dma_fence_put(ring->fence_drv.fences[j]);
kfree(ring->fence_drv.fences);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 27adffa7658d..9c11ced4312c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -106,7 +106,6 @@ struct amdgpu_fence_driver {
struct dma_fence**fences;
 };
 
-int amdgpu_fence_driver_init(struct amdgpu_device *adev);
 void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
 
 int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
@@ -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
   struct amdgpu_irq_src *irq_src,
   unsigned irq_type);
+void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev);
 void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev);
+int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev);
 void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev);
-void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev);
 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence,
  unsigned flags);
 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
-- 
2.17.1

RE: [PATCH] drm/amdgpu: adjust fence driver enable sequence

[Chen, Guchun]

[Public]

Hi Lothian,

Thanks for your report. I have a following fix for this problem, will send it 
out soon for review.

Regards,
Guchun

From: amd-gfx  On Behalf Of Mike Lothian
Sent: Sunday, August 1, 2021 7:57 PM
To: Gao, Likun 
Cc: amd-gfx list ; Zhang, Hawking 

Subject: Re: [PATCH] drm/amdgpu: adjust fence driver enable sequence

Hi

This patch is causing me issues on my Skylake/Tonga PRIME laptop, reverting 
sorts it

More details here: 
https://gitlab.freedesktop.org/drm/amd/-/issues/1668

Cheers

Mike

On Wed, 28 Jul 2021 at 05:07, Likun Gao 
mailto:likun@amd.com>> wrote:
From: Likun Gao mailto:likun@amd.com>>

Fence driver was enabled per ring when sw init on per IP block before.
Change to enable all the fence driver at the same time after
amdgpu_device_ip_init finished.
Rename some function related to fence to make it reasonable for read.

Signed-off-by: Likun Gao mailto:likun@amd.com>>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  6 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  | 15 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h   |  4 ++--
 3 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index d3a4299b1f30..77195a4e5c59 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3675,6 +3675,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
goto release_ras_con;
}

+   amdgpu_fence_driver_hw_init(adev);
+
dev_info(adev->dev,
"SE %d, SH per SE %d, CU per SH %d, active_cu_number %d\n",
adev->gfx.config.max_shader_engines,
@@ -3939,7 +3941,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool 
fbcon)
/* evict vram memory */
amdgpu_bo_evict_vram(adev);

-   amdgpu_fence_driver_suspend(adev);
+   amdgpu_fence_driver_hw_fini(adev);

amdgpu_device_ip_suspend_phase2(adev);
/* evict remaining vram memory
@@ -3984,7 +3986,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool 
fbcon)
dev_err(adev->dev, "amdgpu_device_ip_resume failed (%d).\n", r);
return r;
}
-   amdgpu_fence_driver_resume(adev);
+   amdgpu_fence_driver_hw_init(adev);


r = amdgpu_device_ip_late_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 72d9b92b1754..e2f606bca779 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -417,9 +417,6 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
}
amdgpu_fence_write(ring, atomic_read(&ring->fence_drv.last_seq));

-   if (irq_src)
-   amdgpu_irq_get(adev, irq_src, irq_type);
-
ring->fence_drv.irq_src = irq_src;
ring->fence_drv.irq_type = irq_type;
ring->fence_drv.initialized = true;
@@ -572,14 +569,14 @@ void amdgpu_fence_driver_fini_sw(struct amdgpu_device 
*adev)
 }

 /**
- * amdgpu_fence_driver_suspend - suspend the fence driver
+ * amdgpu_fence_driver_hw_fini - disable the fence driver
  * for all possible rings.
  *
  * @adev: amdgpu device pointer
  *
- * Suspend the fence driver for all possible rings (all asics).
+ * Disable the fence driver for all possible rings (all asics).
  */
-void amdgpu_fence_driver_suspend(struct amdgpu_device *adev)
+void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev)
 {
int i, r;

@@ -603,18 +600,18 @@ void amdgpu_fence_driver_suspend(struct amdgpu_device 
*adev)
 }

 /**
- * amdgpu_fence_driver_resume - resume the fence driver
+ * amdgpu_fence_driver_hw_init - enable the fence driver
  * for all possible rings.
  *
  * @adev: amdgpu device pointer
  *
- * Resume the fence driver for all possible rings (all asics).
+ * Enable the fence driver for all possible rings (all asics).
  * Not all asics have all rings, so each asic will only
  * start the fence driver on the rings it has using
  * amdgpu_fence_driver_start_ring().
  * Returns 0 for success.
  */
-void amdgpu_fence_driver_resume(struct amdgpu_device *adev)
+void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev)
 {
int i;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index e7d3d0dbdd96..64471018f5e6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -117,8 +117,8 @@ int amdgpu_fence_driver_

RE: [PATCH] drm/amdgpu: Fix channel_index table layout for Aldebaran

[Chen, Guchun]

[Public]

/* number of umc channel instance with memory map register access */
-#define UMC_V6_7_CHANNEL_INSTANCE_NUM  4
+#define UMC_V6_7_UMC_INSTANCE_NUM  4
 /* number of umc instance with memory map register access */
-#define UMC_V6_7_UMC_INSTANCE_NUM  8
+#define UMC_V6_7_CHANNEL_INSTANCE_NUM  8

Please update the comments accordingly as well.

Regards,
Guchun

-Original Message-
From: amd-gfx  On Behalf Of Mukul Joshi
Sent: Thursday, July 29, 2021 11:38 PM
To: amd-gfx@lists.freedesktop.org
Cc: Joshi, Mukul ; Clements, John ; 
Zhang, Hawking 
Subject: [PATCH] drm/amdgpu: Fix channel_index table layout for Aldebaran

Fix the channel_index table layout to fetch the correct channel_index when 
calculating physical address from normalized address during page retirement.
Also, fix the number of UMC instances and number of channels within each UMC 
instance for Aldebaran.

Signed-off-by: Mukul Joshi 
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c |  4 ++--  
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c | 16   
drivers/gpu/drm/amd/amdgpu/umc_v6_7.h |  4 ++--
 3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 7cf653f9e9a7..097230b5e946 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1171,8 +1171,8 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device 
*adev)
break;
case CHIP_ALDEBARAN:
adev->umc.max_ras_err_cnt_per_query = 
UMC_V6_7_TOTAL_CHANNEL_NUM;
-   adev->umc.channel_inst_num = UMC_V6_7_UMC_INSTANCE_NUM;
-   adev->umc.umc_inst_num = UMC_V6_7_CHANNEL_INSTANCE_NUM;
+   adev->umc.channel_inst_num = UMC_V6_7_CHANNEL_INSTANCE_NUM;
+   adev->umc.umc_inst_num = UMC_V6_7_UMC_INSTANCE_NUM;
adev->umc.channel_offs = UMC_V6_7_PER_CHANNEL_OFFSET;
if (!adev->gmc.xgmi.connected_to_cpu)
adev->umc.ras_funcs = &umc_v6_7_ras_funcs; diff --git 
a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
index 7da12110425c..bb30336b1e8d 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
@@ -30,17 +30,17 @@
 
 const uint32_t

umc_v6_7_channel_idx_tbl_second[UMC_V6_7_UMC_INSTANCE_NUM][UMC_V6_7_CHANNEL_INSTANCE_NUM]
 = {
-   {28, 12, 6, 22},{19, 3, 9, 25},
-   {20, 4, 30, 14},{11, 27, 1, 17},
-   {24, 8, 2, 18}, {15, 31, 5, 21},
-   {16, 0, 26, 10},{7, 23, 29, 13}
+   {28, 20, 24, 16, 12, 4, 8, 0},
+   {6, 30, 2, 26, 22, 14, 18, 10},
+   {19, 11, 15, 7, 3, 27, 31, 23},
+   {9, 1, 5, 29, 25, 17, 21, 13}
 };
 const uint32_t

umc_v6_7_channel_idx_tbl_first[UMC_V6_7_UMC_INSTANCE_NUM][UMC_V6_7_CHANNEL_INSTANCE_NUM]
 = {
-   {19, 3, 9, 25}, {28, 12, 6, 22},
-   {11, 27, 1, 17},{20, 4, 30, 14},
-   {15, 31, 5, 21},{24, 8, 2, 18},
-   {7, 23, 29, 13},{16, 0, 26, 10}
+   {19, 11, 15, 7, 3, 27, 31, 23},
+   {9, 1, 5, 29, 25, 17, 21, 13},
+   {28, 20, 24, 16, 12, 4, 8, 0},
+   {6, 30, 2, 26, 22, 14, 18, 10},
 };
 
 static inline uint32_t get_umc_v6_7_reg_offset(struct amdgpu_device *adev, 
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.h 
b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.h
index 81b8f1844091..57f2557e7aca 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.h
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.h
@@ -36,9 +36,9 @@
 #define UMC_V6_7_INST_DIST 0x4
 
 /* number of umc channel instance with memory map register access */
-#define UMC_V6_7_CHANNEL_INSTANCE_NUM  4
+#define UMC_V6_7_UMC_INSTANCE_NUM  4
 /* number of umc instance with memory map register access */
-#define UMC_V6_7_UMC_INSTANCE_NUM  8
+#define UMC_V6_7_CHANNEL_INSTANCE_NUM  8
 /* total channel instances in one umc block */
 #define UMC_V6_7_TOTAL_CHANNEL_NUM (UMC_V6_7_CHANNEL_INSTANCE_NUM * 
UMC_V6_7_UMC_INSTANCE_NUM)
 /* UMC regiser per channel offset */
--
2.17.1

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[PATCH] drm/amd/pm: correct aldebaran smu feature mapping FEATURE_DATA_CALCULATIONS

[Kevin Wang]

correct smu feature mapping: FEATURE_DATA_CALCULATIONS

Signed-off-by: Kevin Wang 
---
 drivers/gpu/drm/amd/pm/inc/smu_types.h | 1 +
 drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 3 +--
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/inc/smu_types.h 
b/drivers/gpu/drm/amd/pm/inc/smu_types.h
index 1d3765b873df..6239c30fcd5f 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_types.h
@@ -282,6 +282,7 @@ enum smu_clk_type {
__SMU_DUMMY_MAP(TDC),   \
__SMU_DUMMY_MAP(THERMAL),   \
__SMU_DUMMY_MAP(GFX_PER_CU_CG), \
+   __SMU_DUMMY_MAP(DATA_CALCULATIONS), \
__SMU_DUMMY_MAP(RM),\
__SMU_DUMMY_MAP(DS_DCEFCLK),\
__SMU_DUMMY_MAP(ACDC),  \
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index 856eeaf293b8..4af602d6ee02 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -64,7 +64,6 @@
 
 #define FEATURE_MASK(feature) (1ULL << feature)
 #define SMC_DPM_FEATURE ( \
- FEATURE_MASK(FEATURE_DATA_CALCULATIONS) | \
  FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT)  | \
  FEATURE_MASK(FEATURE_DPM_UCLK_BIT)| \
  FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT)  | \
@@ -150,7 +149,7 @@ static const struct cmn2asic_mapping 
aldebaran_clk_map[SMU_CLK_COUNT] = {
 };
 
 static const struct cmn2asic_mapping 
aldebaran_feature_mask_map[SMU_FEATURE_COUNT] = {
-   ALDEBARAN_FEA_MAP(SMU_FEATURE_DPM_PREFETCHER_BIT,   
FEATURE_DATA_CALCULATIONS),
+   ALDEBARAN_FEA_MAP(SMU_FEATURE_DATA_CALCULATIONS_BIT,
FEATURE_DATA_CALCULATIONS),
ALDEBARAN_FEA_MAP(SMU_FEATURE_DPM_GFXCLK_BIT,   
FEATURE_DPM_GFXCLK_BIT),
ALDEBARAN_FEA_MAP(SMU_FEATURE_DPM_UCLK_BIT, 
FEATURE_DPM_UCLK_BIT),
ALDEBARAN_FEA_MAP(SMU_FEATURE_DPM_SOCCLK_BIT,   
FEATURE_DPM_SOCCLK_BIT),
-- 
2.25.1

RE: Re: AMD A8 3500M LVDS with CH7511B goes off on resolution change (randomly)

[edgardo . g]

Hi Alex, thanks for replying.
I reported the issue ( https://gitlab.freedesktop.org/drm/amd/-/issues/1665 ) 
but have not got much help there.
I notice when the issue happens LCD backlight goes off, so I measured the 
Backlight Enable cable and it goes from 5V to 0V.. so I suspected maybe it was 
just the backlight that was off, and I connected the line to 5V in the 
motherboard and the backlight went ON, but screen was all white (like LVDS was 
not sending pixels).
 
I'm not sure why it randomly goes into this state when changing resolutions. At 
the moment I'm trying to detect the video output is on this wrong state, but I 
have read everything I could find related to video (/sys/class/drm , 
/sys/modules/radeon ,  /sys/class/graphics) to find some file that is different 
when video is OFF compared when video is ON, and I could not find anything 
there.
 
Is there a way to dump all registers on the eDP to LVDS chip on debugfs? 
running drm.debug=0xe does not show a clue either. I'm trying to find something 
that will tell me the LCD is effectively OFF so I can trigger another 
resolution change and bring it back to life.
 
Best Regards,
Edgardo
 
- Original Message - Subject: Re: AMD A8 3500M LVDS with 
CH7511B goes off on resolution change (randomly)
From: "Alex Deucher" 
Date: 7/26/21 11:04 am
To: "Edgardo Gho" 
Cc: "amd-gfx@lists.freedesktop.org" 

On Mon, Jul 26, 2021 at 10:45 AM Edgardo Gho  wrote:
 >
 > Hello all,
 > Not sure if this is the proper place to report this issue.
 > I'm using an AMD A8-3500M with AMD Radeon HD 6620G.
 > I'm testing with several recent kernels (5.11 , 5.13) on different distros 
 > (Ubuntu, Tinycore).
 > On all of them I have the same issue. When the video resolution change (for 
 > instance with xrandr) sometimes LVDS won't turn on again.
 > If I trigger another resolution change most of the times it comes back to 
 > life, but its very annoying because when kernel loads and video driver loads 
 > it changes from BIOS video resolution to full HD and some of the times the 
 > LCD shuts down.
 > I keep a HDMI monitor connected and HDMI never fails.
 > I tried with Windows and the catalyst driver does not fail either. I can 
 > change resolution hundreds of times in windows and it never fails. I also 
 > noticed that on windows, when I change resolution, both LCD and HDMI go off, 
 > and then LCD (LVDS) turns on first and then HDMI turns on. On Linux its 
 > different, both go off on a resolution change but LCD (LVDS) always turns on 
 > AFTER HDMI.. and sometimes it does not turn on at all.
 > Backlight is off when it fails, but I tried illuminating the LCD panel and 
 > there are no pixels, so its does not look like a backlight issue.
 >
 > It using a CH7511B to convert from eDP to LVDS.
 >
 > Here is a piece of DMESG output with drm.debug=0xe . I can't find 
 > differences between the piece when it works and when it fails.
 > The earlier piece of this dmesg correspond to working resolution change, and 
 > the later piece is from a failing one.
 > I would appreciate any pointers into how to debug this issue further. I only 
 > got 2 units with this motherboard at the moment and same thing happens on 
 > both, so I'm not thinking its a BAD LCD or something like that.
 >
 
 It might be easier to file a ticket for this and track it there
 (https://gitlab.freedesktop.org/drm/amd/-/issues). Please attach the
 full dmesg output from boot (without debug enabled is fine).
 
 Alex
 
 
 > Kernel 5.11 , DMESG
 > --
 > [ 428.597737] [drm:radeon_crtc_page_flip_target [radeon]] flip-ioctl() 
 > cur_rbo = a7ab5f38, new_rbo = d4b81f84
 > [ 428.598024] [drm:radeon_crtc_page_flip_target [radeon]] flip-ioctl() 
 > cur_rbo = a7ab5f38, new_rbo = d4b81f84
 > [ 429.133422] [drm:radeon_crtc_page_flip_target [radeon]] flip-ioctl() 
 > cur_rbo = d4b81f84, new_rbo = a7ab5f38
 > [ 429.133769] [drm:radeon_crtc_page_flip_target [radeon]] flip-ioctl() 
 > cur_rbo = d4b81f84, new_rbo = a7ab5f38
 > [ 429.731470] [drm:radeon_crtc_page_flip_target [radeon]] flip-ioctl() 
 > cur_rbo = a7ab5f38, new_rbo = d4b81f84
 > [ 429.731861] [drm:radeon_crtc_page_flip_target [radeon]] flip-ioctl() 
 > cur_rbo = a7ab5f38, new_rbo = d4b81f84
 > [ 429.896066] [drm:radeon_crtc_page_flip_target [radeon]] flip-ioctl() 
 > cur_rbo = d4b81f84, new_rbo = a7ab5f38
 > [ 429.896339] [drm:radeon_crtc_page_flip_target [radeon]] flip-ioctl() 
 > cur_rbo = d4b81f84, new_rbo = a7ab5f38
 > [ 429.915513] [drm:radeon_crtc_page_flip_target [radeon]] flip-ioctl() 
 > cur_rbo = a7ab5f38, new_rbo = d4b81f84
 > [ 429.915735] [drm:radeon_crtc_page_flip_target [radeon]] flip-ioctl() 
 > cur_rbo = a7ab5f38, new_rbo = d4b81f84
 > [ 430.067063] [drm:radeon_atom_encoder_dpms [radeon]] encoder dpms 33 to 
 > mode 3, devices 0008, active_

Re: [PATCH 00/14] drm: Make DRM's IRQ helpers legacy

[Sam Ravnborg]

Hi Thomas,

> > 
> > 1) IRQ_NOTCONNECTED
> > 
> > We do not have this check in drm_irq today and we should avoid spreading
> > it all over. We are either carrying it forever or we wil lsee patches
> > floating in to drop the check again.
> > The current use in the kernel is minimal:
> > https://elixir.bootlin.com/linux/latest/A/ident/IRQ_NOTCONNECTED
> > 
> > So as a minimum drop it from atmel_hlcdc and preferably from the rest as
> > it is really not used. (Speaking as atmel_hlcdc maintainer)
> 
> I'll drop it from atmel_hlcdc then.
> 
> But saying that it's not used is not correct.
My point is the drm_irq do not check this - so adding this check add
something there was not needed/done before.

> > 2) devm_request_irq()
> > 
> > We are moving towards managed allocation so we do not fail to free
> > resources. And an irq has a lifetime equal the device itself - so an
> > obvious cnadidate for devm_request_irq.
> > If we do not introduce it now we will see a revisit of this later.
> > I can be convinced to wait with this as we will have to do much more in
> > each driver, but I cannot see any good arguments to avoid the more
> > modern way to use devm_request_irq.
> 
> I'll change this in atmel_hdlcd and maybe I can find trivial cases where
> devm_request_irq() can be used. But drivers that had an uninstall callback
> before should not have the cleanup logic altered by a patch as this one. I
> suspect that most of the IRQ cleanup
> is actually a vblank cleanup and should be done in response to
> drm_vblank_init(). But that's again not something for this patchset here. We
> cannot change multiple things at once and still expect any of it to work.
> 
> I welcome the use of devm_ et al. But these changes are better done in a
> per-driver patchset that changes all of the driver to managed release.
Fair enough, and fine with me.
I have yet to read through all patches - will do so in the coming week.

Sam

Re: [PATCH 00/14] drm: Make DRM's IRQ helpers legacy

[Thomas Zimmermann]

Hi Sam

Am 31.07.21 um 20:50 schrieb Sam Ravnborg:

Hi Thomas,

On Tue, Jul 27, 2021 at 08:27:07PM +0200, Thomas Zimmermann wrote:

DRM's IRQ helpers are only helpful for old, non-KMS drivers. Move
the code behind CONFIG_DRM_LEGACY. Convert KMS drivers to Linux
IRQ interfaces.

DRM provides IRQ helpers for setting up, receiving and removing IRQ
handlers. It's an abstraction over plain Linux functions. The code
is mid-layerish with several callbacks to hook into the rsp drivers.
Old UMS driver have their interrupts enabled via ioctl, so these
abstractions makes some sense. Modern KMS manage all their interrupts
internally. Using the DRM helpers adds indirection without benefits.

Most KMs drivers already use Linux IRQ functions instead of DRM's
abstraction layer. Patches 1 to 12 convert the remaining ones.
The patches also resolve a bug for devices without assigned interrupt
number. DRM helpers don't test for IRQ_NOTCONNECTED, so drivers do
not detect if the device has no interrupt assigned.

Patch 13 removes an unused function.

Patch 14 moves the DRM IRQ helpers behind CONFIG_DRM_LEGACY. Only
the old non-KMS drivers still use the functionality.

Thomas Zimmermann (14):
   drm/amdgpu: Convert to Linux IRQ interfaces
   drm/arm/hdlcd: Convert to Linux IRQ interfaces
   drm/atmel-hlcdc: Convert to Linux IRQ interfaces
   drm/fsl-dcu: Convert to Linux IRQ interfaces
   drm/gma500: Convert to Linux IRQ interfaces
   drm/kmb: Convert to Linux IRQ interfaces
   drm/msm: Convert to Linux IRQ interfaces
   drm/mxsfb: Convert to Linux IRQ interfaces
   drm/radeon: Convert to Linux IRQ interfaces
   drm/tidss: Convert to Linux IRQ interfaces
   drm/tilcdc: Convert to Linux IRQ interfaces
   drm/vc4: Convert to Linux IRQ interfaces
   drm: Remove unused devm_drm_irq_install()
   drm: IRQ midlayer is now legacy


With the irq_enabled confusion out of the way I want to re-address two
issues here that I know you have answered but I am just not convinced.

1) IRQ_NOTCONNECTED

We do not have this check in drm_irq today and we should avoid spreading
it all over. We are either carrying it forever or we wil lsee patches
floating in to drop the check again.
The current use in the kernel is minimal:
https://elixir.bootlin.com/linux/latest/A/ident/IRQ_NOTCONNECTED

So as a minimum drop it from atmel_hlcdc and preferably from the rest as
it is really not used. (Speaking as atmel_hlcdc maintainer)


I'll drop it from atmel_hlcdc then.

But saying that it's not used is not correct. At least radeon an gma500 
handle PCI-based devices and BIOSes often had the option of disabling 
the rsp graphics interrupts.





2) devm_request_irq()

We are moving towards managed allocation so we do not fail to free
resources. And an irq has a lifetime equal the device itself - so an
obvious cnadidate for devm_request_irq.
If we do not introduce it now we will see a revisit of this later.
I can be convinced to wait with this as we will have to do much more in
each driver, but I cannot see any good arguments to avoid the more
modern way to use devm_request_irq.


I'll change this in atmel_hdlcd and maybe I can find trivial cases where 
devm_request_irq() can be used. But drivers that had an uninstall 
callback before should not have the cleanup logic altered by a patch as 
this one. I suspect that most of the IRQ cleanup
is actually a vblank cleanup and should be done in response to 
drm_vblank_init(). But that's again not something for this patchset 
here. We cannot change multiple things at once and still expect any of 
it to work.


I welcome the use of devm_ et al. But these changes are better done in a 
per-driver patchset that changes all of the driver to managed release.


Best regards
Thomas



Sam



--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer



OpenPGP_signature
Description: OpenPGP digital signature

Re: [PATCH] drm/amdgpu: fix possible null-pointer dereference in amdgpu_ttm_tt_unpopulate()

[Christian König]

Am 31.07.21 um 10:13 schrieb Tuo Li:

The variable ttm is assigned to the variable gtt, and the variable gtt
is checked in:
   if (gtt && gtt->userptr)

This indicates that both ttm and gtt can be NULL.
If so, a null-pointer dereference will occur:
   if (ttm->page_flags & TTM_PAGE_FLAG_SG)

Also, some null-pointer dereferences will occur in the function
ttm_pool_free() which is called in:
   return ttm_pool_free(&adev->mman.bdev.pool, ttm);

To fix these possible null-pointer dereferences, the function returns
when ttm is NULL.


NAK, same as with the other patch.

The ttm object is mandatory, asking the driver to destroy a ttm object 
which doesn't exists makes no sense at all and is a bug in the upper layer.


The NULL check is just a leftover from when the gtt and ttm objects 
where distinct. Please remove that one instead.


BTW: Bonus points for changing the (void *) cast into a much cleaner 
container_of().


Thanks,
Christian.



Reported-by: TOTE Robot 
Signed-off-by: Tuo Li 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 5 -
  1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3a55f08e00e1..0216ca085f11 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1146,7 +1146,10 @@ static void amdgpu_ttm_tt_unpopulate(struct ttm_device 
*bdev,
struct amdgpu_ttm_tt *gtt = (void *)ttm;
struct amdgpu_device *adev;
  
-	if (gtt && gtt->userptr) {

+   if (ttm == NULL)
+   return;
+
+   if (gtt->userptr) {
amdgpu_ttm_tt_set_user_pages(ttm, NULL);
kfree(ttm->sg);
ttm->sg = NULL;

Re: [PATCH] drm/amdgpu: fix possible null-pointer dereference in amdgpu_ttm_tt_populate()

[Christian König]

Am 31.07.21 um 10:04 schrieb Tuo Li:

The variable ttm is assigned to the variable gtt, and the variable gtt
is checked in:
   if (gtt && gtt->userptr)

This indicates that both ttm and gtt can be NULL.
If so, a null-pointer dereference will occur:
   if (ttm->page_flags & TTM_PAGE_FLAG_SG)

Also, some null-pointer dereferences will occur in the function
ttm_pool_alloc() which is called in:
   return ttm_pool_alloc(&adev->mman.bdev.pool, ttm, ctx);

To fix these possible null-pointer dereferences, the function returns
-EINVAL when ttm is NULL.


NAK, the NULL test is just a leftover from when the objects where distinct.

Please remove the NULL test instead.

Regards,
Christian.



Reported-by: TOTE Robot 
Signed-off-by: Tuo Li 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 5 -
  1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3a55f08e00e1..80440f799c09 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1120,8 +1120,11 @@ static int amdgpu_ttm_tt_populate(struct ttm_device 
*bdev,
struct amdgpu_device *adev = amdgpu_ttm_adev(bdev);
struct amdgpu_ttm_tt *gtt = (void *)ttm;
  
+	if (ttm == NULL)

+   return -EINVAL;
+
/* user pages are bound by amdgpu_ttm_tt_pin_userptr() */
-   if (gtt && gtt->userptr) {
+   if (gtt->userptr) {
ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
if (!ttm->sg)
return -ENOMEM;

Re: [PATCH] drm/amdgpu: adjust fence driver enable sequence

[Mike Lothian]

Hi

This patch is causing me issues on my Skylake/Tonga PRIME laptop, reverting
sorts it

More details here: https://gitlab.freedesktop.org/drm/amd/-/issues/1668

Cheers

Mike

On Wed, 28 Jul 2021 at 05:07, Likun Gao  wrote:

> From: Likun Gao 
>
> Fence driver was enabled per ring when sw init on per IP block before.
> Change to enable all the fence driver at the same time after
> amdgpu_device_ip_init finished.
> Rename some function related to fence to make it reasonable for read.
>
> Signed-off-by: Likun Gao 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  6 --
>  drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  | 15 ++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h   |  4 ++--
>  3 files changed, 12 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index d3a4299b1f30..77195a4e5c59 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -3675,6 +3675,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
> goto release_ras_con;
> }
>
> +   amdgpu_fence_driver_hw_init(adev);
> +
> dev_info(adev->dev,
> "SE %d, SH per SE %d, CU per SH %d, active_cu_number %d\n",
> adev->gfx.config.max_shader_engines,
> @@ -3939,7 +3941,7 @@ int amdgpu_device_suspend(struct drm_device *dev,
> bool fbcon)
> /* evict vram memory */
> amdgpu_bo_evict_vram(adev);
>
> -   amdgpu_fence_driver_suspend(adev);
> +   amdgpu_fence_driver_hw_fini(adev);
>
> amdgpu_device_ip_suspend_phase2(adev);
> /* evict remaining vram memory
> @@ -3984,7 +3986,7 @@ int amdgpu_device_resume(struct drm_device *dev,
> bool fbcon)
> dev_err(adev->dev, "amdgpu_device_ip_resume failed
> (%d).\n", r);
> return r;
> }
> -   amdgpu_fence_driver_resume(adev);
> +   amdgpu_fence_driver_hw_init(adev);
>
>
> r = amdgpu_device_ip_late_init(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> index 72d9b92b1754..e2f606bca779 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> @@ -417,9 +417,6 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring
> *ring,
> }
> amdgpu_fence_write(ring, atomic_read(&ring->fence_drv.last_seq));
>
> -   if (irq_src)
> -   amdgpu_irq_get(adev, irq_src, irq_type);
> -
> ring->fence_drv.irq_src = irq_src;
> ring->fence_drv.irq_type = irq_type;
> ring->fence_drv.initialized = true;
> @@ -572,14 +569,14 @@ void amdgpu_fence_driver_fini_sw(struct
> amdgpu_device *adev)
>  }
>
>  /**
> - * amdgpu_fence_driver_suspend - suspend the fence driver
> + * amdgpu_fence_driver_hw_fini - disable the fence driver
>   * for all possible rings.
>   *
>   * @adev: amdgpu device pointer
>   *
> - * Suspend the fence driver for all possible rings (all asics).
> + * Disable the fence driver for all possible rings (all asics).
>   */
> -void amdgpu_fence_driver_suspend(struct amdgpu_device *adev)
> +void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev)
>  {
> int i, r;
>
> @@ -603,18 +600,18 @@ void amdgpu_fence_driver_suspend(struct
> amdgpu_device *adev)
>  }
>
>  /**
> - * amdgpu_fence_driver_resume - resume the fence driver
> + * amdgpu_fence_driver_hw_init - enable the fence driver
>   * for all possible rings.
>   *
>   * @adev: amdgpu device pointer
>   *
> - * Resume the fence driver for all possible rings (all asics).
> + * Enable the fence driver for all possible rings (all asics).
>   * Not all asics have all rings, so each asic will only
>   * start the fence driver on the rings it has using
>   * amdgpu_fence_driver_start_ring().
>   * Returns 0 for success.
>   */
> -void amdgpu_fence_driver_resume(struct amdgpu_device *adev)
> +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev)
>  {
> int i;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index e7d3d0dbdd96..64471018f5e6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -117,8 +117,8 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring
> *ring,
>  int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
>struct amdgpu_irq_src *irq_src,
>unsigned irq_type);
> -void amdgpu_fence_driver_suspend(struct amdgpu_device *adev);
> -void amdgpu_fence_driver_resume(struct amdgpu_device *adev);
> +void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev);
> +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev);
>  int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence,
>   unsigned flags);
>  int amdgpu_fence_emit_polling(struct