Re: [PATCH] drm/amdgpu: check vm bo eviction valuable at last

2022-02-21 Thread Christian König

Am 21.02.22 um 04:28 schrieb Qiang Yu:

On Fri, Feb 18, 2022 at 6:24 PM Christian König
 wrote:

Am 18.02.22 um 11:16 schrieb Qiang Yu:

[SNIP]

If amdgpu_vm_ready() use evicting flag, it's still not equivalent to check
vm idle: true -> vm idle, false -> vm may be idle or busy.

Yeah, but why should that be relevant?

The amdgpu_vm_ready() return if we can do page table updates or not. If
the VM is idle or not is only relevant for eviction.

In other words any CS or page table update makes the VM busy, but that
only affects if the VM can be evicted or not.


My point is: we can't use amdgpu_vm_ready() to replace vm_is_busy(), so
currently we update vm even when vm is busy. So why not use:

Sorry, should be "vm is idle".


if (!amdgpu_vm_ready() || vm_is_busy()) return;
in amdgpu_gem_va_update_vm(), as you mentioned we prefer to not
update vm when it's idle.

Because updating the VM while it is busy is perfectly fine, we do it all
the time.


Yeah, as above, my typo.


We should just not update it when it is already idle and was considered
for eviction.

"and", not "or"?


In this situation it makes most of the time sense to keep
it idle and postpone the update till the next command submission.


Then we can keep the evicting flag accurate (after solving your
concern for this patch that eviction may fail latter by further delay
the flag update after eviction success).

That won't work. See we need to mark the VM as evicted before we
actually evict them because otherwise somebody could use the VM in
parallel and add another fence to it.


I see, make this too accurate should cost too much like holding the
eviction_lock when eviction. But just delay it in
amdgpu_ttm_bo_eviction_valuable()
could avoid most false positive case.

Partially correct. Another fundamental problem is that we can't hold the
eviction lock because that would result in lock inversion and potential
deadlock.

We could set the flag later on, but as I said before that when we set
the evicted flag when the VM is already idle is a desired effect.


As above, this confuse me as we can explicitly check vm idle when
user update vm, why bother to embed it in evicting flag implicitly?

Well as I said it's irrelevant for the update if the VM is idle or not.

To summarize the rules once more:
1. When VM page tables are used by CS or page tables updates it is
considered busy, e.g. not idle.

2. When we want to evict a VM it must be idle. As soon as we considered
this we should set the evicted flag to make sure to keep it idle as much
as possible.

3. When we want to update the page tables we just need to check if the
VM is idle or not.


But now we does not check vm idle directly in amdgpu_gem_va_update_vm().
If VM bo has not been considered for eviction, it could be either idle or busy.

Just want to confirm if the fix should be only change amdgpu_vm_ready()
to use evicting flag or besides using evicting flag, also check vm_idle() in
amdgpu_gem_va_update_vm().


Only changing the amdgpu_vm_ready() should be enough. It can be that 
this then bubbles up more issue, but those need to be taken care of 
separately then.


Regards,
Christian.



Regards,
Qiang


4. When a CS happens we don't have another chance and make the VM busy
again. And do all postponed page table updates.


Anyway,


Regards,
Christian.


Check vm idle need to hold resv lock. Read your patch for adding
evicting flag is to update vm without resv lock. But user vm ops in
amdgpu_gem_va_update_vm() do hold the resv lock, so the difference
happens when calling amdgpu_vm_bo_update_mapping() from
svm_range_(un)map_to_gpu(). So embed vm idle in evicting flag
is for svm_range_(un)map_to_gpu() also do nothing when vm idle?




Regards,
Qiang


Regards,
Christian.


Regards,
Qiang


Regards,
Christian.


Regards,
Qiang



Regards,
Christian.


Regards,
Qiang


Regards,
Christian.


Regards,
Qiang


Regards,
Christian.


Regards,
Qiang


What we should rather do is to fix amdgpu_vm_ready() to take a look at
the flag instead of the linked list.

Regards,
Christian.


Signed-off-by: Qiang Yu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 85 ++---
 1 file changed, 47 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 5a32ee66d8c8..88a27911054f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1306,45 +1306,11 @@ uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device 
*adev, struct ttm_tt *ttm,
 return flags;
 }

-/*
- * amdgpu_ttm_bo_eviction_valuable - Check to see if we can evict a buffer
- * object.
- *
- * Return true if eviction is sensible. Called by ttm_mem_evict_first() on
- * behalf of ttm_bo_mem_force_space() which tries to evict buffer objects until
- * it can find space for a new object and by ttm_bo_force_list_clean() which is
- * used to clean out a memory space.
- */
-static bool amdgpu_ttm_b

Bug 215600 - Radeon - *ERROR* Failed waiting for UVD message

2022-02-21 Thread Thorsten Leemhuis
Hi, this is your Linux kernel regression tracker.

I noticed a regression report in bugzilla.kernel.org that afaics nobody
acted upon since it was reported about a week ago, that's why I decided
to forward it to the lists and all the relevant people. To quote
https://bugzilla.kernel.org/show_bug.cgi?id=215600 :

>  Richard Herbert 2022-02-12 22:13:07 UTC
> 
> Created attachment 300445 [details]
> Details
> 
> When attempting to play some types of videos with VLC 3.0.16 (eg. *.flv, 
> *.mp4), when running kernels 5.17-rc1 to 5.17-rc3, only the audio portion is 
> heard and the VLC video screen remains black. Meanwhile, many of these 
> entries are written per second to /var/log/syslog:
> 
> 2/12/22 3:41 PM   starbug kernel  [drm:radeon_uvd_cs_parse [radeon]] 
> *ERROR* Failed waiting for UVD message (-1)!
> 2/12/22 3:41 PM   starbug kernel  [drm:radeon_cs_ioctl [radeon]] *ERROR* 
> Invalid command stream !
> 2/12/22 3:41 PM   starbug kernel  [drm:radeon_uvd_cs_parse [radeon]] 
> *ERROR* Failed waiting for UVD message (-1)!
> 2/12/22 3:41 PM   starbug kernel  [drm:radeon_cs_ioctl [radeon]] *ERROR* 
> Invalid command stream !
> 2/12/22 3:41 PM   starbug kernel  [drm:radeon_uvd_cs_parse [radeon]] 
> *ERROR* Failed waiting for UVD message (-1)!
> 2/12/22 3:41 PM   starbug kernel  [drm:radeon_cs_ioctl [radeon]] *ERROR* 
> Invalid command stream !
> 
> 
> The problem doesn't occur in kernels of the 5.16 series.  It may have been 
> introduced here:
> 
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/diff/drivers/gpu/drm/radeon/radeon_uvd.c?id=v5.16&id2=v5.17-rc1
> 
> 
> Thanks!

Could somebody take a look into this? Or was this discussed somewhere
else already? Or even fixed?

Anyway, to get this tracked:

#regzbot introduced: v5.16..v5.17-rc1
#regzbot from:  Richard Herbert 
#regzbot title: drm: radeon: no sound on video, *ERROR* Failed waiting
for UVD message
#regzbot link: https://bugzilla.kernel.org/show_bug.cgi?id=215600

Ciao, Thorsten (wearing his 'the Linux kernel's regression tracker' hat)

P.S.: As the Linux kernel's regression tracker I'm getting a lot of
reports on my table. I can only look briefly into most of them and lack
knowledge about most of the areas they concern. I thus unfortunately
will sometimes get things wrong or miss something important. I hope
that's not the case here; if you think it is, don't hesitate to tell me
in a public reply, it's in everyone's interest to set the public record
straight.

-- 
Additional information about regzbot:

If you want to know more about regzbot, check out its web-interface, the
getting start guide, and the references documentation:

https://linux-regtracking.leemhuis.info/regzbot/
https://gitlab.com/knurd42/regzbot/-/blob/main/docs/getting_started.md
https://gitlab.com/knurd42/regzbot/-/blob/main/docs/reference.md

The last two documents will explain how you can interact with regzbot
yourself if your want to.

Hint for reporters: when reporting a regression it's in your interest to
CC the regression list and tell regzbot about the issue, as that ensures
the regression makes it onto the radar of the Linux kernel's regression
tracker -- that's in your interest, as it ensures your report won't fall
through the cracks unnoticed.

Hint for developers: you normally don't need to care about regzbot once
it's involved. Fix the issue as you normally would, just remember to
include 'Link:' tag in the patch descriptions pointing to all reports
about the issue. This has been expected from developers even before
regzbot showed up for reasons explained in
'Documentation/process/submitting-patches.rst' and
'Documentation/process/5.Posting.rst'.


[PATCH v2 2/2] drm/amd: use fixed dsc bits-per-pixel from edid

2022-02-21 Thread Yaroslav Bolyukin
VESA vendor header from DisplayID spec may contain fixed bit per pixel
rate, it should be respected by drm driver

Signed-off-by: Yaroslav Bolyukin 
Reviewed-by: Wayne Lin 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 ++
 drivers/gpu/drm/amd/display/dc/core/dc_stream.c   | 3 ++-
 drivers/gpu/drm/amd/display/dc/dc_types.h | 3 +++
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index 29f07c26d..b34dd89ae 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -118,6 +118,8 @@ enum dc_edid_status dm_helpers_parse_edid_caps(
 
edid_caps->edid_hdmi = connector->display_info.is_hdmi;
 
+   edid_caps->dsc_fixed_bits_per_pixel_x16 = 
connector->display_info.dp_dsc_bpp;
+
sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads);
if (sad_count <= 0)
return result;
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index 57cf4cb82..f8516ec70 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -105,6 +105,8 @@ static bool dc_stream_construct(struct dc_stream_state 
*stream,
 
/* EDID CAP translation for HDMI 2.0 */
stream->timing.flags.LTE_340MCSC_SCRAMBLE = 
dc_sink_data->edid_caps.lte_340mcsc_scramble;
+   stream->timing.dsc_fixed_bits_per_pixel_x16 =
+   dc_sink_data->edid_caps.dsc_fixed_bits_per_pixel_x16;
 
memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg));
stream->timing.dsc_cfg.num_slices_h = 0;
@@ -738,4 +740,3 @@ void dc_stream_log(const struct dc *dc, const struct 
dc_stream_state *stream)
"\tlink: %d\n",
stream->link->link_index);
 }
-
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h 
b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 0285a4b38..ce2e11d70 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -227,6 +227,9 @@ struct dc_edid_caps {
bool edid_hdmi;
bool hdr_supported;
 
+   /* DisplayPort caps */
+   uint32_t dsc_fixed_bits_per_pixel_x16;
+
struct dc_panel_patch panel_patch;
 };
 
-- 
2.35.1



Re: [PATCH 4/4] kunit: tool: Disable broken options for --alltests

2022-02-21 Thread Johannes Berg
On Sat, 2022-02-19 at 16:00 +0800, David Gow wrote:
> On Fri, Feb 18, 2022 at 8:26 PM Johannes Berg  
> wrote:
> > 
> > On Fri, 2022-02-18 at 15:57 +0800, David Gow wrote:
> > > 
> > > Note that, while this does build again, it still segfaults on startup,
> > > so more work remains to be done.
> > 
> > That's probably just a lot more stuff getting included somehow?
> > 
> 
> Yeah: it used to work (a couple of years ago), but something has
> broken it in the meantime. It's just a shame that bisecting things
> with allyesconfig takes so long...

Heh, right.

But I guess you could "Kconfig bisect" first, i.e. see what option
breaks it? It might not even help to bisect, if it's just some option
getting enabled over time. Or perhaps the kernel is just too big for the
address space layout if you have allyesconfig? Though that shouldn't be
an issue, I think.

> I didn't realise X86 wasn't defined in UML: 

X86 is the architecture, X86_{32,64} is kind of a selection for how you
want things to be built, and it's thus required for UML on x86, because
UML imports stuff from X86.

> that's definitely a bit
> cleaner than !UML in a number of these cases.

It looks like some (most?) of them don't really work that way though
since they're not really platform specific, they just know only about a
handful of platforms that they're compatible with.

> Not all of those issues are fundamentally solved by "depends on X86",
> though: there are a few which might be other missing things in UML
> (maybe the 'dma_ops' issues?), and/or might be the result of -Werror
> being enabled.

Right.

> We do want the ability to build PCI drivers under UML, as it makes
> running KUnit tests for PCI drivers much simpler and more pleasant.

OK, fair point. I'm thinking about this area in general also right now
for iwlwifi, and obviously we're probably the only user of the virtual
PCI code that lets us connect the driver to a simulated device on UML
(but the driver doesn't really know) :-)

> And indeed, it does work for KUnit in general, it's just that some
> drivers do have the issues mentioned above, so allyesconfig picks up
> every broken driver.

Right.

> We don't actually build the PCI drivers by default, only if the
> "--alltests" option is passed, which does include them, as we do have
> tests which depend on PCI we'd like to run (like the thunderbolt
> test).

Makes sense.
> 
> I did try this as well, and it just got us a different set of issues
> (there are a bunch of drivers which depend on IOMEM but don't state it
> -- I'll try to send fixes for those out next week). 
> 

Fun.

> Ultimately, the 'broken_on_uml.config' file is just there to pare back
> allyesconfig a bit for KUnit's purposes, but we still definitely want
> as many options (and hence tests) enabled as possible long-term. So I
> think actual fixes to either the code or Kconfig do make sense.

Makes sense.

> Is 'make ARCH=um allyesconfig' something we actually want to be able
> to build? If so, no amount of adding things to KUnit's
> broken_on_uml.config will solve the underlying issues, and we'll need
> to at least update the Kconfig entries.
> 

That's a good point, as long as people are doing allyes/randconfig
builds on UML, we probably need to have these fixes anyway rather than
disabling something for KUnit specifically.

johannes


Re: Regression from 3c196f056666 ("drm/amdgpu: always reset the asic in suspend (v2)") on suspend?

2022-02-21 Thread Dominique Dumont
On Monday, 14 February 2022 22:52:27 CET Alex Deucher wrote:
> Does the system actually suspend?  

Not really. The screens looks like it's going to suspend, but it does come 
back after 10s or so. The light mounted in the middle of the power button does 
not switch off.

> Is this system S0i3 or regular S3?

I'm not sure how to check that. After a bit of reading on the Internet [1], I 
hope that the following information answers that question. Please get back to 
me if that's not the case.

Looks like my system supports both Soi3 and S3

$ cat /sys/power/state 
freeze mem disk

I get the same result running these 2 commands as root:
# echo freeze > /sys/power/state
# echo mem > /sys/power/state

>  Does this patch help by any chance?
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i
> d=e55a3aea418269266d84f426b3bd70794d3389c8

yes, with this patch:
- the suspend issue is solved
- kernel logs no longer show messages like "failed to send message" or 
"*ERROR* suspend of IP block  failed" while suspending

All the best

[1] https://01.org/blogs/rzhang/2015/best-practice-debug-linux-suspend/
hibernate-issues




Re: Regression from 3c196f056666 ("drm/amdgpu: always reset the asic in suspend (v2)") on suspend?

2022-02-21 Thread Eric Valette

On 20/02/2022 16:48, Dominique Dumont wrote:

On Monday, 14 February 2022 22:52:27 CET Alex Deucher wrote:

Does the system actually suspend?


Not really. The screens looks like it's going to suspend, but it does come
back after 10s or so. The light mounted in the middle of the power button does
not switch off.



As I have a very similar problem and also commented on the original 
debian bug report 
(https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1005005), I will add 
some information here on another amd only laptop (renoir AMD Ryzen 7 
4800H with Radeon Graphics + Radeon RX 5500/5500M / Pro 5500M).


For me the suspend works once, but after the first resume (I do know 
know if it is in the suspend path or the resume path I see a RIP in the 
dmesg (see aditional info in debian bug))  and later suspend do not 
work: It only go to the kde login screen.


I was unable due to network connectivity to do a full bisect but tested 
with the patch I had on my laptop:


5.10.101 works, 5.10 from debian works
5.11 works
5.12 works
5.13 suspend works but when resuming the PC is dead I have to reboot
5.14 seems to work but looking at dmesg it is full of RIP messages at 
various places.

5.15.24 is a described 5.15 from debian is behaving identically
5.16 from debian is behaving identically.


Is this system S0i3 or regular S3?


For me it is real S3.

The proposed patch is intended for INTEl + intel gpu + amdgpu but I have 
dual amd GPU.


--eric




[PATCH v2 1/2] drm/edid: parse DRM VESA dsc bpp target

2022-02-21 Thread Yaroslav Bolyukin
As per DisplayID v2.0 Errata E9 spec "DSC pass-through timing support"
VESA vendor-specific data block may contain target DSC bits per pixel
fields

Signed-off-by: Yaroslav Bolyukin 
---
 drivers/gpu/drm/drm_edid.c  | 33 ++---
 include/drm/drm_connector.h |  6 ++
 include/drm/drm_displayid.h |  4 
 3 files changed, 32 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a7663f9a1..ee8c2b911 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5270,7 +5270,7 @@ static void drm_parse_vesa_mso_data(struct drm_connector 
*connector,
if (oui(vesa->oui[0], vesa->oui[1], vesa->oui[2]) != VESA_IEEE_OUI)
return;
 
-   if (sizeof(*vesa) != sizeof(*block) + block->num_bytes) {
+   if (block->num_bytes < 5) {
drm_dbg_kms(connector->dev, "Unexpected VESA vendor block 
size\n");
return;
}
@@ -5290,20 +5290,29 @@ static void drm_parse_vesa_mso_data(struct 
drm_connector *connector,
break;
}
 
-   if (!info->mso_stream_count) {
-   info->mso_pixel_overlap = 0;
-   return;
+   info->mso_pixel_overlap = 0;
+
+   if (info->mso_stream_count) {
+   info->mso_pixel_overlap = FIELD_GET(DISPLAYID_VESA_MSO_OVERLAP, 
vesa->mso);
+   if (info->mso_pixel_overlap > 8) {
+   drm_dbg_kms(connector->dev, "Reserved MSO pixel overlap 
value %u\n",
+   info->mso_pixel_overlap);
+   info->mso_pixel_overlap = 8;
+   }
+
+   drm_dbg_kms(connector->dev, "MSO stream count %u, pixel overlap 
%u\n",
+   info->mso_stream_count, info->mso_pixel_overlap);
}
 
-   info->mso_pixel_overlap = FIELD_GET(DISPLAYID_VESA_MSO_OVERLAP, 
vesa->mso);
-   if (info->mso_pixel_overlap > 8) {
-   drm_dbg_kms(connector->dev, "Reserved MSO pixel overlap value 
%u\n",
-   info->mso_pixel_overlap);
-   info->mso_pixel_overlap = 8;
+   if (block->num_bytes < 7) {
+   /* DSC bpp is optional */
+   return;
}
 
-   drm_dbg_kms(connector->dev, "MSO stream count %u, pixel overlap %u\n",
-   info->mso_stream_count, info->mso_pixel_overlap);
+   info->dp_dsc_bpp = FIELD_GET(DISPLAYID_VESA_DSC_BPP_INT, 
vesa->dsc_bpp_int) * 16 +
+   FIELD_GET(DISPLAYID_VESA_DSC_BPP_FRACT, vesa->dsc_bpp_fract);
+
+   drm_dbg_kms(connector->dev, "DSC bits per pixel %u\n", 
info->dp_dsc_bpp);
 }
 
 static void drm_update_mso(struct drm_connector *connector, const struct edid 
*edid)
@@ -5348,6 +5357,8 @@ drm_reset_display_info(struct drm_connector *connector)
 
info->mso_stream_count = 0;
info->mso_pixel_overlap = 0;
+
+   info->dp_dsc_bpp = 0;
 }
 
 u32 drm_add_display_info(struct drm_connector *connector, const struct edid 
*edid)
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 5e36eb3df..04ef0e995 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -634,6 +634,12 @@ struct drm_display_info {
 * @mso_pixel_overlap: eDP MSO segment pixel overlap, 0-8 pixels.
 */
u8 mso_pixel_overlap;
+
+   /**
+* @dp_dsc_bpp: DP Display-Stream-Compression (DSC) timing's target
+* DST bits per pixel in 6.4 fixed point format. 0 means undefined
+*/
+   u16 dp_dsc_bpp;
 };
 
 int drm_display_info_set_bus_formats(struct drm_display_info *info,
diff --git a/include/drm/drm_displayid.h b/include/drm/drm_displayid.h
index 7ffbd9f7b..1be6deddc 100644
--- a/include/drm/drm_displayid.h
+++ b/include/drm/drm_displayid.h
@@ -131,12 +131,16 @@ struct displayid_detailed_timing_block {
 
 #define DISPLAYID_VESA_MSO_OVERLAP GENMASK(3, 0)
 #define DISPLAYID_VESA_MSO_MODEGENMASK(6, 5)
+#define DISPLAYID_VESA_DSC_BPP_INT GENMASK(5, 0)
+#define DISPLAYID_VESA_DSC_BPP_FRACT GENMASK(3, 0)
 
 struct displayid_vesa_vendor_specific_block {
struct displayid_block base;
u8 oui[3];
u8 data_structure_type;
u8 mso;
+   u8 dsc_bpp_int;
+   u8 dsc_bpp_fract;
 } __packed;
 
 /* DisplayID iteration */

base-commit: 1528038385c0a706aac9ac165eeb24044fef6825
-- 
2.35.1



Re: [PATCH v8 1/2] drm/amdgpu: add debugfs for reset registers list

2022-02-21 Thread Christian König




Am 21.02.22 um 08:15 schrieb Somalapuram Amaranath:

List of register populated for dump collection during the GPU reset.

Signed-off-by: Somalapuram Amaranath 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h |   4 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 114 
  2 files changed, 118 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b85b67a88a3d..6e35f2c4c869 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1097,6 +1097,10 @@ struct amdgpu_device {
  
  	struct amdgpu_reset_control *reset_cntl;

uint32_t
ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
+
+   /* reset dump register */
+   uint32_t*reset_dump_reg_list;
+   int num_regs;
  };
  
  static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 164d6a9e9fbb..14ad9610f805 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1609,6 +1609,118 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
  DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
amdgpu_debugfs_sclk_set, "%llu\n");
  
+static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,

+   char __user *buf, size_t size, loff_t *pos)
+{
+   struct amdgpu_device *adev = (struct amdgpu_device 
*)file_inode(f)->i_private;
+   char reg_offset[11];
+   uint32_t num_regs;
+   int i, ret, len = 0;
+
+   if (*pos)
+   return 0;
+
+   ret = down_read_killable(&adev->reset_sem);
+
+   if (ret)
+   return ret;
+
+   num_regs = adev->num_regs;
+
+   up_read(&adev->reset_sem);
+
+   if (num_regs == 0)
+   return 0;


I think we should drop that cause it just avoids the final \n.


+
+   for (i = 0; i < num_regs; i++) {


That's pretty close, but one problem is still that it is possible that 
the number of register becomes much smaller while this loop runs.


Try it like this instead:

down_read_killable(...)
for (i = 0; i < adev->num_regs; ++i) {
    sprintf(...)
    up_read(...);

    copy_to_user(

    down_read_killable(...)
}
up_read().


+
+   ret = down_read_killable(&adev->reset_sem);
+
+   if (ret)
+   return ret;
+
+   sprintf(reg_offset, "0x%x ", adev->reset_dump_reg_list[i]);
+
+   up_read(&adev->reset_sem);
+
+   ret = copy_to_user(buf + len, reg_offset, strlen(reg_offset));
+
+   if (ret)
+   return -EFAULT;
+
+   len += strlen(reg_offset);
+   }
+
+   ret = copy_to_user(buf + len, "\n", 1);
+
+   if (ret)
+   return -EFAULT;
+
+   len++;
+   *pos += len;
+
+   return len;
+}
+
+static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
+   const char __user *buf, size_t size, loff_t *pos)
+{
+   struct amdgpu_device *adev = (struct amdgpu_device 
*)file_inode(f)->i_private;
+   char *reg_offset, *reg, reg_temp[11];
+   uint32_t *tmp_list;
+   int ret, i = 0, len = 0;
+
+   do {
+   reg_offset = reg_temp;
+   memset(reg_offset, 0, 11);
+   ret = copy_from_user(reg_offset, buf + len, min(11, 
((int)size-len)));
+
+   if (ret) {
+   kfree(tmp_list);
+   return -EFAULT;
+   }
+
+   reg = strsep(®_offset, " ");
+   tmp_list = krealloc_array(tmp_list,
+   1, sizeof(uint32_t), GFP_KERNEL);
+   ret = kstrtouint(reg, 16, &tmp_list[i]);
+
+   if (ret) {
+   kfree(tmp_list);
+   return -EFAULT;
+   }
+
+   len += strlen(reg) + 1;
+   i++;
+
+   } while (len < size);
+
+   ret = down_read_killable(&adev->reset_sem);
+
+   if (ret) {
+   kfree(tmp_list);
+   return ret;
+   }
+
+   kfree(adev->reset_dump_reg_list);
+
+   swap(adev->reset_dump_reg_list, tmp_list);


Just an assignment is sufficient here if you do the kfree before since 
tmp_list isn't used after that.



+   adev->num_regs = i;
+
+   up_read(&adev->reset_sem);


This should be a down_write_killable() and up_write() to avoid 
concurrent reads.


Apart from that the write function now looks clean.

Regards,
Christian.


+
+   return size;
+}
+
+
+
+static const struct file_operations amdgpu_reset_dump_register_list = {
+   .owner = THIS_MODULE,
+   .read = amdgpu_reset_dump_register_list_read,
+   .write = amdgpu_reset_dump_register_list_write,
+   .llseek = default_

[PATCH] drm/sched: Add device pointer to drm_gpu_scheduler

2022-02-21 Thread Jiawei Gu
Add device pointer so scheduler's printing can use
DRM_DEV_ERROR() instead, which makes life easier under multiple GPU
scenario.

v2: amend all calls of drm_sched_init()
v3: fill dev pointer for all drm_sched_init() calls

Signed-off-by: Jiawei Gu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c |  2 +-
 drivers/gpu/drm/etnaviv/etnaviv_sched.c   |  2 +-
 drivers/gpu/drm/lima/lima_sched.c |  2 +-
 drivers/gpu/drm/panfrost/panfrost_job.c   |  2 +-
 drivers/gpu/drm/scheduler/sched_main.c|  9 +
 drivers/gpu/drm/v3d/v3d_sched.c   | 10 +-
 include/drm/gpu_scheduler.h   |  3 ++-
 7 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 45977a72b5dd..cd2d594d4ffc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -502,7 +502,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
 
r = drm_sched_init(&ring->sched, &amdgpu_sched_ops,
   num_hw_submission, amdgpu_job_hang_limit,
-  timeout, NULL, sched_score, ring->name);
+  timeout, NULL, sched_score, ring->name, adev->dev);
if (r) {
DRM_ERROR("Failed to create scheduler on ring %s.\n",
  ring->name);
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_sched.c 
b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
index 58f593b278c1..35e5ef7dbdcc 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_sched.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
@@ -195,7 +195,7 @@ int etnaviv_sched_init(struct etnaviv_gpu *gpu)
ret = drm_sched_init(&gpu->sched, &etnaviv_sched_ops,
 etnaviv_hw_jobs_limit, etnaviv_job_hang_limit,
 msecs_to_jiffies(500), NULL, NULL,
-dev_name(gpu->dev));
+dev_name(gpu->dev), gpu->dev);
if (ret)
return ret;
 
diff --git a/drivers/gpu/drm/lima/lima_sched.c 
b/drivers/gpu/drm/lima/lima_sched.c
index 5612d73f238f..8d517c8880e3 100644
--- a/drivers/gpu/drm/lima/lima_sched.c
+++ b/drivers/gpu/drm/lima/lima_sched.c
@@ -490,7 +490,7 @@ int lima_sched_pipe_init(struct lima_sched_pipe *pipe, 
const char *name)
return drm_sched_init(&pipe->base, &lima_sched_ops, 1,
  lima_job_hang_limit,
  msecs_to_jiffies(timeout), NULL,
- NULL, name);
+ NULL, name, pipe->ldev->dev);
 }
 
 void lima_sched_pipe_fini(struct lima_sched_pipe *pipe)
diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c 
b/drivers/gpu/drm/panfrost/panfrost_job.c
index 908d79520853..a6925dbb6224 100644
--- a/drivers/gpu/drm/panfrost/panfrost_job.c
+++ b/drivers/gpu/drm/panfrost/panfrost_job.c
@@ -812,7 +812,7 @@ int panfrost_job_init(struct panfrost_device *pfdev)
 nentries, 0,
 msecs_to_jiffies(JOB_TIMEOUT_MS),
 pfdev->reset.wq,
-NULL, "pan_js");
+NULL, "pan_js", pfdev->dev);
if (ret) {
dev_err(pfdev->dev, "Failed to create scheduler: %d.", 
ret);
goto err_sched;
diff --git a/drivers/gpu/drm/scheduler/sched_main.c 
b/drivers/gpu/drm/scheduler/sched_main.c
index f91fb31ab7a7..b81fceb0b8a2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -491,7 +491,7 @@ void drm_sched_start(struct drm_gpu_scheduler *sched, bool 
full_recovery)
if (r == -ENOENT)
drm_sched_job_done(s_job);
else if (r)
-   DRM_ERROR("fence add callback failed (%d)\n",
+   DRM_DEV_ERROR(sched->dev, "fence add callback 
failed (%d)\n",
  r);
} else
drm_sched_job_done(s_job);
@@ -957,7 +957,7 @@ static int drm_sched_main(void *param)
if (r == -ENOENT)
drm_sched_job_done(sched_job);
else if (r)
-   DRM_ERROR("fence add callback failed (%d)\n",
+   DRM_DEV_ERROR(sched->dev, "fence add callback 
failed (%d)\n",
  r);
dma_fence_put(fence);
} else {
@@ -991,7 +991,7 @@ int drm_sched_init(struct drm_gpu_scheduler *sched,
   const struct drm_sched_backend_ops *ops,
   unsigned hw_submission, unsigned hang_limit,
   long timeout, struct workqueue_struct *timeout_wq,
-  atomic_t *score, const char *nam

Re: [PATCH v8 1/2] drm/amdgpu: add debugfs for reset registers list

2022-02-21 Thread Somalapuram, Amaranath
[AMD Official Use Only]


On 2/21/2022 2:45 PM, Christian König wrote:
>
>
> Am 21.02.22 um 08:15 schrieb Somalapuram Amaranath:
>> List of register populated for dump collection during the GPU reset.
>>
>> Signed-off-by: Somalapuram Amaranath 
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h |   4 +
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 114 
>>   2 files changed, 118 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> index b85b67a88a3d..6e35f2c4c869 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> @@ -1097,6 +1097,10 @@ struct amdgpu_device {
>>     struct amdgpu_reset_control *reset_cntl;
>>   uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
>> +
>> +    /* reset dump register */
>> +    uint32_t    *reset_dump_reg_list;
>> +    int num_regs;
>>   };
>>     static inline struct amdgpu_device *drm_to_adev(struct drm_device 
>> *ddev)
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>> index 164d6a9e9fbb..14ad9610f805 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>> @@ -1609,6 +1609,118 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
>>   DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
>>   amdgpu_debugfs_sclk_set, "%llu\n");
>>   +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
>> +    char __user *buf, size_t size, loff_t *pos)
>> +{
>> +    struct amdgpu_device *adev = (struct amdgpu_device 
>> *)file_inode(f)->i_private;
>> +    char reg_offset[11];
>> +    uint32_t num_regs;
>> +    int i, ret, len = 0;
>> +
>> +    if (*pos)
>> +    return 0;
>> +
>> +    ret = down_read_killable(&adev->reset_sem);
>> +
>> +    if (ret)
>> +    return ret;
>> +
>> +    num_regs = adev->num_regs;
>> +
>> +    up_read(&adev->reset_sem);
>> +
>> +    if (num_regs == 0)
>> +    return 0;
>
> I think we should drop that cause it just avoids the final \n.
>
ok.
>> +
>> +    for (i = 0; i < num_regs; i++) {
>
> That's pretty close, but one problem is still that it is possible that 
> the number of register becomes much smaller while this loop runs.
>
> Try it like this instead:
>
> down_read_killable(...)
> for (i = 0; i < adev->num_regs; ++i) {
>     sprintf(...)
>     up_read(...);
>
>     copy_to_user(
>
>     down_read_killable(...)
> }
> up_read().
>
I created local num_regs to avoid lock ousted the loop. I guess you me 
to remove ?

so we can hold up_read inside the loop ?

>> +
>> +    ret = down_read_killable(&adev->reset_sem);
>> +
>> +    if (ret)
>> +    return ret;
>> +
>> +    sprintf(reg_offset, "0x%x ", adev->reset_dump_reg_list[i]);
>> +
>> +    up_read(&adev->reset_sem);
>> +
>> +    ret = copy_to_user(buf + len, reg_offset, strlen(reg_offset));
>> +
>> +    if (ret)
>> +    return -EFAULT;
>> +
>> +    len += strlen(reg_offset);
>> +    }
>> +
>> +    ret = copy_to_user(buf + len, "\n", 1);
>> +
>> +    if (ret)
>> +    return -EFAULT;
>> +
>> +    len++;
>> +    *pos += len;
>> +
>> +    return len;
>> +}
>> +
>> +static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
>> +    const char __user *buf, size_t size, loff_t *pos)
>> +{
>> +    struct amdgpu_device *adev = (struct amdgpu_device 
>> *)file_inode(f)->i_private;
>> +    char *reg_offset, *reg, reg_temp[11];
>> +    uint32_t *tmp_list;
>> +    int ret, i = 0, len = 0;
>> +
>> +    do {
>> +    reg_offset = reg_temp;
>> +    memset(reg_offset, 0, 11);
>> +    ret = copy_from_user(reg_offset, buf + len, min(11, 
>> ((int)size-len)));
>> +
>> +    if (ret) {
>> +    kfree(tmp_list);
>> +    return -EFAULT;
>> +    }
>> +
>> +    reg = strsep(®_offset, " ");
>> +    tmp_list = krealloc_array(tmp_list,
>> +    1, sizeof(uint32_t), GFP_KERNEL);
>> +    ret = kstrtouint(reg, 16, &tmp_list[i]);
>> +
>> +    if (ret) {
>> +    kfree(tmp_list);
>> +    return -EFAULT;
>> +    }
>> +
>> +    len += strlen(reg) + 1;
>> +    i++;
>> +
>> +    } while (len < size);
>> +
>> +    ret = down_read_killable(&adev->reset_sem);
>> +
>> +    if (ret) {
>> +    kfree(tmp_list);
>> +    return ret;
>> +    }
>> +
>> +    kfree(adev->reset_dump_reg_list);
>> +
>> +    swap(adev->reset_dump_reg_list, tmp_list);
>
> Just an assignment is sufficient here if you do the kfree before since 
> tmp_list isn't used after that.

This is required. what happens when the function is called for the 
second time (the old tmp_list will never be freed)

tmp_list is also freed as its can return from the middle of the loop and 
tmp_list  will never be freed.

>
>> +    adev->num_regs = i;
>> +
>> +    up_read(&adev->reset_sem);
>
> This s

[PATCH] drm/amdgpu: check vm ready by evicting

2022-02-21 Thread Qiang Yu
Workstation application ANSA/META get this error dmesg:
[drm:amdgpu_gem_va_ioctl [amdgpu]] *ERROR* Couldn't update BO_VA (-16)

This is caused by:
1. create a 256MB buffer in invisible VRAM
2. CPU map the buffer and access it causes vm_fault and try to move
   it to visible VRAM
3. force visible VRAM space and traverse all VRAM bos to check if
   evicting this bo is valuable
4. when checking a VM bo (in invisible VRAM), amdgpu_vm_evictable()
   will set amdgpu_vm->evicting, but latter due to not in visible
   VRAM, won't really evict it so not add it to amdgpu_vm->evicted
5. before next CS to clear the amdgpu_vm->evicting, user VM ops
   ioctl will pass amdgpu_vm_ready() (check amdgpu_vm->evicted)
   but fail in amdgpu_vm_bo_update_mapping() (check
   amdgpu_vm->evicting) and get this error log

This error won't affect functionality as next CS will finish the
waiting VM ops. But we'd better clear the error log by check the
evicting flag which really stop VM ops latter.

Signed-off-by: Qiang Yu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 37acd8911168..2cd9f1a2e5fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -770,11 +770,16 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, 
struct amdgpu_vm *vm,
  * Check if all VM PDs/PTs are ready for updates
  *
  * Returns:
- * True if eviction list is empty.
+ * True if VM is not evicting.
  */
 bool amdgpu_vm_ready(struct amdgpu_vm *vm)
 {
-   return list_empty(&vm->evicted);
+   bool ret;
+
+   amdgpu_vm_eviction_lock(vm);
+   ret = !vm->evicting;
+   amdgpu_vm_eviction_unlock(vm);
+   return ret;
 }
 
 /**
-- 
2.25.1



[PATCH] drm/amd/display: add GTT domain support for dcn 3.1.5

2022-02-21 Thread Yifan Zhang
From: "Tianci.Yin" 

this patch adds GTT domain support for dcn 3.1.5

Signed-off-by: Tianci.Yin 
Signed-off-by: Yifan Zhang 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 9709368b4915..88ee1224541c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -523,6 +523,7 @@ uint32_t amdgpu_display_supported_domains(struct 
amdgpu_device *adev,
case IP_VERSION(3, 0, 1):
case IP_VERSION(3, 1, 2):
case IP_VERSION(3, 1, 3):
+   case IP_VERSION(3, 1, 5):
domain |= AMDGPU_GEM_DOMAIN_GTT;
break;
default:
-- 
2.25.1



[PATCH 01/12] drm/amdgpu: Modify .ras_fini function pointer parameter

2022-02-21 Thread yipechai
Modify .ras_fini function pointer parameter so that
it can remove redundant intermediate calls in some
ras blocks.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c   | 8 
 drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h  | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h  | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/mca_v3_0.c | 6 +++---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/soc15.c| 2 +-
 19 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 52912b6bcb20..d020c4599433 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -644,7 +644,7 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, 
struct ras_common_if *r
return r;
 }
 
-void amdgpu_gfx_ras_fini(struct amdgpu_device *adev)
+void amdgpu_gfx_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
 {
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX) &&
adev->gfx.ras_if)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index ccca0a85b982..f7c50ab4589c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -387,7 +387,7 @@ bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device 
*adev, int me,
 void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable);
 int amdgpu_get_gfx_off_status(struct amdgpu_device *adev, uint32_t *value);
 int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
-void amdgpu_gfx_ras_fini(struct amdgpu_device *adev);
+void amdgpu_gfx_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
 int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev,
void *err_data,
struct amdgpu_iv_entry *entry);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 26e31c53ed0d..5dcb341cae19 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -455,16 +455,16 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
 void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
 {
if (adev->umc.ras && adev->umc.ras->ras_block.ras_fini)
-   adev->umc.ras->ras_block.ras_fini(adev);
+   adev->umc.ras->ras_block.ras_fini(adev, NULL);
 
if (adev->mmhub.ras && adev->mmhub.ras->ras_block.ras_fini)
-   adev->mmhub.ras->ras_block.ras_fini(adev);
+   adev->mmhub.ras->ras_block.ras_fini(adev, NULL);
 
if (adev->gmc.xgmi.ras && adev->gmc.xgmi.ras->ras_block.ras_fini)
-   adev->gmc.xgmi.ras->ras_block.ras_fini(adev);
+   adev->gmc.xgmi.ras->ras_block.ras_fini(adev, NULL);
 
if (adev->hdp.ras && adev->hdp.ras->ras_block.ras_fini)
-   adev->hdp.ras->ras_block.ras_fini(adev);
+   adev->hdp.ras->ras_block.ras_fini(adev, NULL);
 }
 
/*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
index b7fbc114a175..0f224e21cd55 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
@@ -24,7 +24,7 @@
 #include "amdgpu.h"
 #include "amdgpu_ras.h"
 
-void amdgpu_hdp_ras_fini(struct amdgpu_device *adev)
+void amdgpu_hdp_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
 {
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__HDP) &&
adev->hdp.ras_if)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
index aabd59aa5213..c05cd992ef8a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
@@ -44,5 +44,5 @@ struct amdgpu_hdp {
 };
 
 int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
-void amdgpu_hdp_ras_fini(struct amdgpu_device *adev);
+void amdgpu_hdp_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
 #endif /* __AMDGPU_HDP_H__ */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c
index 42413813765a..6dfcedcc37fd 100644
--- a/drivers/gpu/

[PATCH 02/12] drm/amdgpu: Optimize xxx_ras_fini function of each ras block

2022-02-21 Thread yipechai
1. Move the variables of ras block instance members to
   the top of the call to xxx_ras_fini.
2. Function calls inside the modules only use parameters
   passed from xxx_ras_fini instead of ras block instance
   members.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c   | 8 
 drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/soc15.c| 2 +-
 11 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index d020c4599433..40f7e29aa9ca 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -647,8 +647,8 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, 
struct ras_common_if *r
 void amdgpu_gfx_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
 {
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX) &&
-   adev->gfx.ras_if)
-   amdgpu_ras_block_late_fini(adev, adev->gfx.ras_if);
+   ras_block)
+   amdgpu_ras_block_late_fini(adev, ras_block);
 }
 
 int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 5dcb341cae19..4823c42e0e02 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -455,16 +455,16 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
 void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
 {
if (adev->umc.ras && adev->umc.ras->ras_block.ras_fini)
-   adev->umc.ras->ras_block.ras_fini(adev, NULL);
+   adev->umc.ras->ras_block.ras_fini(adev, adev->umc.ras_if);
 
if (adev->mmhub.ras && adev->mmhub.ras->ras_block.ras_fini)
-   adev->mmhub.ras->ras_block.ras_fini(adev, NULL);
+   adev->mmhub.ras->ras_block.ras_fini(adev, adev->mmhub.ras_if);
 
if (adev->gmc.xgmi.ras && adev->gmc.xgmi.ras->ras_block.ras_fini)
-   adev->gmc.xgmi.ras->ras_block.ras_fini(adev, NULL);
+   adev->gmc.xgmi.ras->ras_block.ras_fini(adev, 
adev->gmc.xgmi.ras_if);
 
if (adev->hdp.ras && adev->hdp.ras->ras_block.ras_fini)
-   adev->hdp.ras->ras_block.ras_fini(adev, NULL);
+   adev->hdp.ras->ras_block.ras_fini(adev, adev->hdp.ras_if);
 }
 
/*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
index 0f224e21cd55..5595f903c17a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
@@ -27,6 +27,6 @@
 void amdgpu_hdp_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
 {
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__HDP) &&
-   adev->hdp.ras_if)
-   amdgpu_ras_block_late_fini(adev, adev->hdp.ras_if);
+   ras_block)
+   amdgpu_ras_block_late_fini(adev, ras_block);
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c
index 6dfcedcc37fd..e7c3b8fff868 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c
@@ -27,6 +27,6 @@
 void amdgpu_mmhub_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
 {
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB) &&
-   adev->mmhub.ras_if)
-   amdgpu_ras_block_late_fini(adev, adev->mmhub.ras_if);
+   ras_block)
+   amdgpu_ras_block_late_fini(adev, ras_block);
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c
index 0de2fdf31eed..54a5a15272c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c
@@ -47,6 +47,6 @@ int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, 
struct ras_common_if *
 void amdgpu_nbio_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
 {
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__PCIE_BIF) &&
-   adev->nbio.ras_if)
-   amdgpu_ras_block_late_fini(adev, adev->nbio.ras_if);
+   ras_block)
+   amdgpu_ras_block_late_fini(adev, ras_block);
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index 863035a94bd8..1df8de84386d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gp

[PATCH 03/12] drm/amdgpu: centrally calls the .ras_fini function of all ras blocks

2022-02-21 Thread yipechai
centrally calls the .ras_fini function of all ras blocks.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 10 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 22 --
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   |  3 ---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c  |  4 
 drivers/gpu/drm/amd/amdgpu/soc15.c  |  3 ---
 5 files changed, 16 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 4823c42e0e02..ab75e189bc0b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -454,17 +454,7 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
 
 void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
 {
-   if (adev->umc.ras && adev->umc.ras->ras_block.ras_fini)
-   adev->umc.ras->ras_block.ras_fini(adev, adev->umc.ras_if);
 
-   if (adev->mmhub.ras && adev->mmhub.ras->ras_block.ras_fini)
-   adev->mmhub.ras->ras_block.ras_fini(adev, adev->mmhub.ras_if);
-
-   if (adev->gmc.xgmi.ras && adev->gmc.xgmi.ras->ras_block.ras_fini)
-   adev->gmc.xgmi.ras->ras_block.ras_fini(adev, 
adev->gmc.xgmi.ras_if);
-
-   if (adev->hdp.ras && adev->hdp.ras->ras_block.ras_fini)
-   adev->hdp.ras->ras_block.ras_fini(adev, adev->hdp.ras_if);
 }
 
/*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index e5874df3c9ca..846f51b0c013 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2572,11 +2572,27 @@ int amdgpu_ras_pre_fini(struct amdgpu_device *adev)
 int amdgpu_ras_fini(struct amdgpu_device *adev)
 {
struct amdgpu_ras_block_list *ras_node, *tmp;
+   struct amdgpu_ras_block_object *obj;
struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
 
if (!adev->ras_enabled || !con)
return 0;
 
+
+   list_for_each_entry_safe(ras_node, tmp, &adev->ras_list, node) {
+
+   if (ras_node->ras_obj) {
+   obj = ras_node->ras_obj;
+   if (amdgpu_ras_is_supported(adev, obj->ras_comm.block) 
&&
+   obj->ras_fini)
+   obj->ras_fini(adev, &obj->ras_comm);
+   }
+
+   /* Clear ras blocks from ras_list and free ras block list node 
*/
+   list_del(&ras_node->node);
+   kfree(ras_node);
+   }
+
amdgpu_ras_fs_fini(adev);
amdgpu_ras_interrupt_remove_all(adev);
 
@@ -2590,12 +2606,6 @@ int amdgpu_ras_fini(struct amdgpu_device *adev)
amdgpu_ras_set_context(adev, NULL);
kfree(con);
 
-   /* Clear ras blocks from ras_list and free ras block list node */
-   list_for_each_entry_safe(ras_node, tmp, &adev->ras_list, node) {
-   list_del(&ras_node->node);
-   kfree(ras_node);
-   }
-
return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index e8446967a4d4..dc6e6fe6c978 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2432,9 +2432,6 @@ static int gfx_v9_0_sw_fini(void *handle)
int i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-   if (adev->gfx.ras && adev->gfx.ras->ras_block.ras_fini)
-   adev->gfx.ras->ras_block.ras_fini(adev, adev->gfx.ras_if);
-
for (i = 0; i < adev->gfx.num_gfx_rings; i++)
amdgpu_ring_fini(&adev->gfx.gfx_ring[i]);
for (i = 0; i < adev->gfx.num_compute_rings; i++)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 222d25a0413a..d1d40bbb2892 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1995,10 +1995,6 @@ static int sdma_v4_0_sw_fini(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
int i;
 
-   if (adev->sdma.ras && adev->sdma.ras->ras_block.hw_ops &&
-   adev->sdma.ras->ras_block.ras_fini)
-   adev->sdma.ras->ras_block.ras_fini(adev, adev->sdma.ras_if);
-
for (i = 0; i < adev->sdma.num_instances; i++) {
amdgpu_ring_fini(&adev->sdma.instance[i].ring);
if (adev->sdma.has_page_queue)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c 
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 0631ebd39db1..496c4a6e23ac 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1214,9 +1214,6 @@ static int soc15_common_sw_fini(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-   if (adev->nbio.ras && adev->nbio.ras->ras_block.ras_fini)
-   adev->nbio.ras->ras_block.ras_fini(adev, adev->nbio.ras_if);
-
if (adev->df.funcs &&
adev->df.funcs->sw_fini)
  

[PATCH 04/12] drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in gfx ras block

2022-02-21 Thread yipechai
Remove redundant calls of amdgpu_ras_block_late_fini in gfx ras block.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 7 ---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 -
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 2 +-
 3 files changed, 1 insertion(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 40f7e29aa9ca..8fe939976224 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -644,13 +644,6 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, 
struct ras_common_if *r
return r;
 }
 
-void amdgpu_gfx_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
-{
-   if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX) &&
-   ras_block)
-   amdgpu_ras_block_late_fini(adev, ras_block);
-}
-
 int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev,
void *err_data,
struct amdgpu_iv_entry *entry)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index f7c50ab4589c..dcb3c7871c73 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -387,7 +387,6 @@ bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device 
*adev, int me,
 void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable);
 int amdgpu_get_gfx_off_status(struct amdgpu_device *adev, uint32_t *value);
 int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
-void amdgpu_gfx_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
 int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev,
void *err_data,
struct amdgpu_iv_entry *entry);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index dc6e6fe6c978..f0cc073e6bb0 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2206,7 +2206,7 @@ static int gfx_v9_0_gpu_early_init(struct amdgpu_device 
*adev)
 
/* If not define special ras_fini function, use gfx default 
ras_fini */
if (!adev->gfx.ras->ras_block.ras_fini)
-   adev->gfx.ras->ras_block.ras_fini = amdgpu_gfx_ras_fini;
+   adev->gfx.ras->ras_block.ras_fini = 
amdgpu_ras_block_late_fini;
 
/* If not defined special ras_cb function, use default ras_cb */
if (!adev->gfx.ras->ras_block.ras_cb)
-- 
2.25.1



[PATCH 07/12] drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in umc ras block

2022-02-21 Thread yipechai
Remove redundant calls of amdgpu_ras_block_late_fini in umc ras block.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c | 7 ---
 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 1 -
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c   | 2 +-
 4 files changed, 2 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
index 2623a2d30703..85da6cbaf3b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
@@ -162,13 +162,6 @@ int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, 
struct ras_common_if *r
return r;
 }
 
-void amdgpu_umc_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
-{
-   if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC) &&
-   ras_block)
-   amdgpu_ras_block_late_fini(adev, ras_block);
-}
-
 int amdgpu_umc_process_ecc_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
index c8deba8dacb5..2ec6698aa1fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
@@ -73,7 +73,6 @@ struct amdgpu_umc {
 };
 
 int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
-void amdgpu_umc_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
 int amdgpu_umc_poison_handler(struct amdgpu_device *adev,
void *ras_error_status,
bool reset);
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index e7add2020d48..c8ad824328d7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -683,7 +683,7 @@ static void gmc_v10_0_set_umc_funcs(struct amdgpu_device 
*adev)
 
/* If don't define special ras_fini function, use default 
ras_fini */
if (!adev->umc.ras->ras_block.ras_fini)
-   adev->umc.ras->ras_block.ras_fini = 
amdgpu_umc_ras_fini;
+   adev->umc.ras->ras_block.ras_fini = 
amdgpu_ras_block_late_fini;
 
/* If not defined special ras_cb function, use default ras_cb */
if (!adev->umc.ras->ras_block.ras_cb)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 2f1b092c53b0..b01767d78153 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1243,7 +1243,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device 
*adev)
 
/* If don't define special ras_fini function, use default 
ras_fini */
if (!adev->umc.ras->ras_block.ras_fini)
-   adev->umc.ras->ras_block.ras_fini = 
amdgpu_umc_ras_fini;
+   adev->umc.ras->ras_block.ras_fini = 
amdgpu_ras_block_late_fini;
 
/* If not defined special ras_cb function, use default ras_cb */
if (!adev->umc.ras->ras_block.ras_cb)
-- 
2.25.1



[PATCH 06/12] drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in nbio ras block

2022-02-21 Thread yipechai
Remove redundant calls of amdgpu_ras_block_late_fini in nbio ras block.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c | 7 ---
 drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h | 1 -
 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c   | 2 +-
 3 files changed, 1 insertion(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c
index 54a5a15272c1..37d779b8e4a6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c
@@ -43,10 +43,3 @@ int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, 
struct ras_common_if *
amdgpu_ras_block_late_fini(adev, ras_block);
return r;
 }
-
-void amdgpu_nbio_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
-{
-   if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__PCIE_BIF) &&
-   ras_block)
-   amdgpu_ras_block_late_fini(adev, ras_block);
-}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
index 3222e1cae134..3d13e601fc35 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
@@ -105,5 +105,4 @@ struct amdgpu_nbio {
 };
 
 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
-void amdgpu_nbio_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c 
b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index 14768570c298..485fd9239cd5 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
@@ -671,7 +671,7 @@ struct amdgpu_nbio_ras nbio_v7_4_ras = {
},
.hw_ops = &nbio_v7_4_ras_hw_ops,
.ras_late_init = amdgpu_nbio_ras_late_init,
-   .ras_fini = amdgpu_nbio_ras_fini,
+   .ras_fini = amdgpu_ras_block_late_fini,
},
.handle_ras_controller_intr_no_bifring = 
nbio_v7_4_handle_ras_controller_intr_no_bifring,
.handle_ras_err_event_athub_intr_no_bifring = 
nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring,
-- 
2.25.1



[PATCH 08/12] drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in xgmi ras block

2022-02-21 Thread yipechai
Remove redundant calls of amdgpu_ras_block_late_fini in xgmi ras block.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 9 +
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 7d18c5d22e10..c04d98e3bd9d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -743,13 +743,6 @@ static int amdgpu_xgmi_ras_late_init(struct amdgpu_device 
*adev, struct ras_comm
return amdgpu_ras_block_late_init(adev, ras_block);
 }
 
-static void amdgpu_xgmi_ras_fini(struct amdgpu_device *adev, struct 
ras_common_if *ras_block)
-{
-   if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__XGMI_WAFL) &&
-   ras_block)
-   amdgpu_ras_block_late_fini(adev, ras_block);
-}
-
 uint64_t amdgpu_xgmi_get_relative_phy_addr(struct amdgpu_device *adev,
   uint64_t addr)
 {
@@ -957,6 +950,6 @@ struct amdgpu_xgmi_ras xgmi_ras = {
},
.hw_ops = &xgmi_ras_hw_ops,
.ras_late_init = amdgpu_xgmi_ras_late_init,
-   .ras_fini = amdgpu_xgmi_ras_fini,
+   .ras_fini = amdgpu_ras_block_late_fini,
},
 };
-- 
2.25.1



[PATCH 05/12] drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in mmhub ras block

2022-02-21 Thread yipechai
Remove redundant calls of amdgpu_ras_block_late_fini in mmhub ras block.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c | 4 +---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h | 1 -
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
 3 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c
index e7c3b8fff868..8f2fa247d605 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c
@@ -26,7 +26,5 @@
 
 void amdgpu_mmhub_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
 {
-   if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB) &&
-   ras_block)
-   amdgpu_ras_block_late_fini(adev, ras_block);
+
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h
index 253f047379cf..9f1540f0ebf9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h
@@ -47,6 +47,5 @@ struct amdgpu_mmhub {
struct amdgpu_mmhub_ras  *ras;
 };
 
-void amdgpu_mmhub_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
 #endif
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 412e44af1608..2f1b092c53b0 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1293,7 +1293,7 @@ static void gmc_v9_0_set_mmhub_ras_funcs(struct 
amdgpu_device *adev)
 
/* If don't define special ras_fini function, use default 
ras_fini */
if (!adev->mmhub.ras->ras_block.ras_fini)
-   adev->mmhub.ras->ras_block.ras_fini = 
amdgpu_mmhub_ras_fini;
+   adev->mmhub.ras->ras_block.ras_fini = 
amdgpu_ras_block_late_fini;
}
 }
 
-- 
2.25.1



[PATCH 10/12] drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in sdma ras block

2022-02-21 Thread yipechai
Remove redundant calls of amdgpu_ras_block_late_fini in sdma ras block.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 7 ---
 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 1 -
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c   | 2 +-
 3 files changed, 1 insertion(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index 1df8de84386d..e1835fd4b237 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
@@ -111,13 +111,6 @@ int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
return r;
 }
 
-void amdgpu_sdma_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
-{
-   if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA) &&
-   ras_block)
-   amdgpu_ras_block_late_fini(adev, ras_block);
-}
-
 int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
void *err_data,
struct amdgpu_iv_entry *entry)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
index 34ec60dfe5e8..53ac3ebae8d6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
@@ -118,7 +118,6 @@ int amdgpu_sdma_get_index_from_ring(struct amdgpu_ring 
*ring, uint32_t *index);
 uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring, unsigned vmid);
 int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
  struct ras_common_if *ras_block);
-void amdgpu_sdma_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
 int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
void *err_data,
struct amdgpu_iv_entry *entry);
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index d1d40bbb2892..206acb6a5b20 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -2824,7 +2824,7 @@ static void sdma_v4_0_set_ras_funcs(struct amdgpu_device 
*adev)
 
/* If don't define special ras_fini function, use default 
ras_fini */
if (!adev->sdma.ras->ras_block.ras_fini)
-   adev->sdma.ras->ras_block.ras_fini = 
amdgpu_sdma_ras_fini;
+   adev->sdma.ras->ras_block.ras_fini = 
amdgpu_ras_block_late_fini;
 
/* If not defined special ras_cb function, use default ras_cb */
if (!adev->sdma.ras->ras_block.ras_cb)
-- 
2.25.1



[PATCH 11/12] drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in mca ras block

2022-02-21 Thread yipechai
Remove redundant calls of amdgpu_ras_block_late_fini in mca ras block.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c |  6 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h |  3 ---
 drivers/gpu/drm/amd/amdgpu/mca_v3_0.c   | 21 +++--
 3 files changed, 3 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
index e2607d9f5cf4..51c2a82e2fa4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
@@ -70,9 +70,3 @@ void amdgpu_mca_query_ras_error_count(struct amdgpu_device 
*adev,
 
amdgpu_mca_reset_error_count(adev, mc_status_addr);
 }
-
-void amdgpu_mca_ras_fini(struct amdgpu_device *adev,
-struct amdgpu_mca_ras *mca_dev)
-{
-   amdgpu_ras_block_late_fini(adev, mca_dev->ras_if);
-}
\ No newline at end of file
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h
index 15e1a1efeb4f..7ce16d16e34b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h
@@ -56,7 +56,4 @@ void amdgpu_mca_query_ras_error_count(struct amdgpu_device 
*adev,
  uint64_t mc_status_addr,
  void *ras_error_status);
 
-void amdgpu_mca_ras_fini(struct amdgpu_device *adev,
-struct amdgpu_mca_ras *mca_dev);
-
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c 
b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
index 02c50be19d3b..5ce6778a821d 100644
--- a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
@@ -37,11 +37,6 @@ static void mca_v3_0_mp0_query_ras_error_count(struct 
amdgpu_device *adev,
 ras_error_status);
 }
 
-static void mca_v3_0_mp0_ras_fini(struct amdgpu_device *adev, struct 
ras_common_if *ras_block)
-{
-   amdgpu_mca_ras_fini(adev, &adev->mca.mp0);
-}
-
 static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj,
enum amdgpu_ras_block block, uint32_t 
sub_block_index)
 {
@@ -71,7 +66,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mp0_ras = {
},
.hw_ops = &mca_v3_0_mp0_hw_ops,
.ras_block_match = mca_v3_0_ras_block_match,
-   .ras_fini = mca_v3_0_mp0_ras_fini,
+   .ras_fini = amdgpu_ras_block_late_fini,
},
 };
 
@@ -83,11 +78,6 @@ static void mca_v3_0_mp1_query_ras_error_count(struct 
amdgpu_device *adev,
 ras_error_status);
 }
 
-static void mca_v3_0_mp1_ras_fini(struct amdgpu_device *adev, struct 
ras_common_if *ras_block)
-{
-   amdgpu_mca_ras_fini(adev, &adev->mca.mp1);
-}
-
 const struct amdgpu_ras_block_hw_ops mca_v3_0_mp1_hw_ops = {
.query_ras_error_count = mca_v3_0_mp1_query_ras_error_count,
.query_ras_error_address = NULL,
@@ -103,7 +93,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mp1_ras = {
},
.hw_ops = &mca_v3_0_mp1_hw_ops,
.ras_block_match = mca_v3_0_ras_block_match,
-   .ras_fini = mca_v3_0_mp1_ras_fini,
+   .ras_fini = amdgpu_ras_block_late_fini,
},
 };
 
@@ -115,11 +105,6 @@ static void mca_v3_0_mpio_query_ras_error_count(struct 
amdgpu_device *adev,
 ras_error_status);
 }
 
-static void mca_v3_0_mpio_ras_fini(struct amdgpu_device *adev, struct 
ras_common_if *ras_block)
-{
-   amdgpu_mca_ras_fini(adev, &adev->mca.mpio);
-}
-
 const struct amdgpu_ras_block_hw_ops mca_v3_0_mpio_hw_ops = {
.query_ras_error_count = mca_v3_0_mpio_query_ras_error_count,
.query_ras_error_address = NULL,
@@ -135,7 +120,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mpio_ras = {
},
.hw_ops = &mca_v3_0_mpio_hw_ops,
.ras_block_match = mca_v3_0_ras_block_match,
-   .ras_fini = mca_v3_0_mpio_ras_fini,
+   .ras_fini = amdgpu_ras_block_late_fini,
},
 };
 
-- 
2.25.1



Re: [PATCH] drm/sched: Add device pointer to drm_gpu_scheduler

2022-02-21 Thread Christian König

Am 21.02.22 um 10:57 schrieb Jiawei Gu:

Add device pointer so scheduler's printing can use
DRM_DEV_ERROR() instead, which makes life easier under multiple GPU
scenario.

v2: amend all calls of drm_sched_init()
v3: fill dev pointer for all drm_sched_init() calls

Signed-off-by: Jiawei Gu 


Reviewed-by: Christian König 

When Andrey is fine with that as well I think the best approach is to 
push this upstream through drm-misc-next since it touches multiple drivers.


We can merge it into the DKMS branch as well if necessary.

Regards,
Christian


---
  drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c |  2 +-
  drivers/gpu/drm/etnaviv/etnaviv_sched.c   |  2 +-
  drivers/gpu/drm/lima/lima_sched.c |  2 +-
  drivers/gpu/drm/panfrost/panfrost_job.c   |  2 +-
  drivers/gpu/drm/scheduler/sched_main.c|  9 +
  drivers/gpu/drm/v3d/v3d_sched.c   | 10 +-
  include/drm/gpu_scheduler.h   |  3 ++-
  7 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 45977a72b5dd..cd2d594d4ffc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -502,7 +502,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
  
  	r = drm_sched_init(&ring->sched, &amdgpu_sched_ops,

   num_hw_submission, amdgpu_job_hang_limit,
-  timeout, NULL, sched_score, ring->name);
+  timeout, NULL, sched_score, ring->name, adev->dev);
if (r) {
DRM_ERROR("Failed to create scheduler on ring %s.\n",
  ring->name);
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_sched.c 
b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
index 58f593b278c1..35e5ef7dbdcc 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_sched.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
@@ -195,7 +195,7 @@ int etnaviv_sched_init(struct etnaviv_gpu *gpu)
ret = drm_sched_init(&gpu->sched, &etnaviv_sched_ops,
 etnaviv_hw_jobs_limit, etnaviv_job_hang_limit,
 msecs_to_jiffies(500), NULL, NULL,
-dev_name(gpu->dev));
+dev_name(gpu->dev), gpu->dev);
if (ret)
return ret;
  
diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c

index 5612d73f238f..8d517c8880e3 100644
--- a/drivers/gpu/drm/lima/lima_sched.c
+++ b/drivers/gpu/drm/lima/lima_sched.c
@@ -490,7 +490,7 @@ int lima_sched_pipe_init(struct lima_sched_pipe *pipe, 
const char *name)
return drm_sched_init(&pipe->base, &lima_sched_ops, 1,
  lima_job_hang_limit,
  msecs_to_jiffies(timeout), NULL,
- NULL, name);
+ NULL, name, pipe->ldev->dev);
  }
  
  void lima_sched_pipe_fini(struct lima_sched_pipe *pipe)

diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c 
b/drivers/gpu/drm/panfrost/panfrost_job.c
index 908d79520853..a6925dbb6224 100644
--- a/drivers/gpu/drm/panfrost/panfrost_job.c
+++ b/drivers/gpu/drm/panfrost/panfrost_job.c
@@ -812,7 +812,7 @@ int panfrost_job_init(struct panfrost_device *pfdev)
 nentries, 0,
 msecs_to_jiffies(JOB_TIMEOUT_MS),
 pfdev->reset.wq,
-NULL, "pan_js");
+NULL, "pan_js", pfdev->dev);
if (ret) {
dev_err(pfdev->dev, "Failed to create scheduler: %d.", 
ret);
goto err_sched;
diff --git a/drivers/gpu/drm/scheduler/sched_main.c 
b/drivers/gpu/drm/scheduler/sched_main.c
index f91fb31ab7a7..b81fceb0b8a2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -491,7 +491,7 @@ void drm_sched_start(struct drm_gpu_scheduler *sched, bool 
full_recovery)
if (r == -ENOENT)
drm_sched_job_done(s_job);
else if (r)
-   DRM_ERROR("fence add callback failed (%d)\n",
+   DRM_DEV_ERROR(sched->dev, "fence add callback failed 
(%d)\n",
  r);
} else
drm_sched_job_done(s_job);
@@ -957,7 +957,7 @@ static int drm_sched_main(void *param)
if (r == -ENOENT)
drm_sched_job_done(sched_job);
else if (r)
-   DRM_ERROR("fence add callback failed (%d)\n",
+   DRM_DEV_ERROR(sched->dev, "fence add callback failed 
(%d)\n",
  r);
dma_fence_put(fence);
} else {
@@

[PATCH 09/12] drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in hdp ras block

2022-02-21 Thread yipechai
Remove redundant calls of amdgpu_ras_block_late_fini in hdp ras block.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c | 4 +---
 drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h | 1 -
 drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c   | 2 +-
 3 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
index 5595f903c17a..3f3d92e16c2e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
@@ -26,7 +26,5 @@
 
 void amdgpu_hdp_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block)
 {
-   if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__HDP) &&
-   ras_block)
-   amdgpu_ras_block_late_fini(adev, ras_block);
+
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
index c05cd992ef8a..9181c7bef7c6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
@@ -44,5 +44,4 @@ struct amdgpu_hdp {
 };
 
 int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
-void amdgpu_hdp_ras_fini(struct amdgpu_device *adev, struct ras_common_if 
*ras_block);
 #endif /* __AMDGPU_HDP_H__ */
diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
index d7811e0327cb..86c166ae794a 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
@@ -163,7 +163,7 @@ struct amdgpu_hdp_ras hdp_v4_0_ras = {
.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,
},
.hw_ops = &hdp_v4_0_ras_hw_ops,
-   .ras_fini = amdgpu_hdp_ras_fini,
+   .ras_fini = amdgpu_ras_block_late_fini,
},
 };
 
-- 
2.25.1



[PATCH 12/12] drm/amdgpu: Remove redundant .ras_fini initialization in some ras blocks

2022-02-21 Thread yipechai
1. Define amdgpu_ras_block_late_fini_default in amdgpu_ras.c as
   .ras_fini common function, which is called when
   .ras_fini of ras block isn't initialized.
2. Remove the code of using amdgpu_ras_block_late_fini to
   initialize .ras_fini in ras blocks.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c  | 8 
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 1 -
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c| 4 
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c   | 4 
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c| 8 
 drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c| 1 -
 drivers/gpu/drm/amd/amdgpu/mca_v3_0.c| 3 ---
 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c   | 1 -
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c   | 4 
 9 files changed, 8 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 846f51b0c013..17f7c0259115 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2477,6 +2477,12 @@ void amdgpu_ras_block_late_fini(struct amdgpu_device 
*adev,
amdgpu_ras_interrupt_remove_handler(adev, ras_block);
 }
 
+void amdgpu_ras_block_late_fini_default(struct amdgpu_device *adev,
+ struct ras_common_if *ras_block)
+{
+   return amdgpu_ras_block_late_fini(adev, ras_block);
+}
+
 /* do some init work after IP late init as dependence.
  * and it runs in resume/gpu reset/booting up cases.
  */
@@ -2586,6 +2592,8 @@ int amdgpu_ras_fini(struct amdgpu_device *adev)
if (amdgpu_ras_is_supported(adev, obj->ras_comm.block) 
&&
obj->ras_fini)
obj->ras_fini(adev, &obj->ras_comm);
+   else
+   amdgpu_ras_block_late_fini_default(adev, 
&obj->ras_comm);
}
 
/* Clear ras blocks from ras_list and free ras block list node 
*/
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index c04d98e3bd9d..8abdab6869e9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -950,6 +950,5 @@ struct amdgpu_xgmi_ras xgmi_ras = {
},
.hw_ops = &xgmi_ras_hw_ops,
.ras_late_init = amdgpu_xgmi_ras_late_init,
-   .ras_fini = amdgpu_ras_block_late_fini,
},
 };
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index f0cc073e6bb0..8def7f630d4c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2204,10 +2204,6 @@ static int gfx_v9_0_gpu_early_init(struct amdgpu_device 
*adev)
if (!adev->gfx.ras->ras_block.ras_late_init)
adev->gfx.ras->ras_block.ras_late_init = 
amdgpu_gfx_ras_late_init;
 
-   /* If not define special ras_fini function, use gfx default 
ras_fini */
-   if (!adev->gfx.ras->ras_block.ras_fini)
-   adev->gfx.ras->ras_block.ras_fini = 
amdgpu_ras_block_late_fini;
-
/* If not defined special ras_cb function, use default ras_cb */
if (!adev->gfx.ras->ras_block.ras_cb)
adev->gfx.ras->ras_block.ras_cb = 
amdgpu_gfx_process_ras_data_cb;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index c8ad824328d7..d9353bb99314 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -681,10 +681,6 @@ static void gmc_v10_0_set_umc_funcs(struct amdgpu_device 
*adev)
if (!adev->umc.ras->ras_block.ras_late_init)
adev->umc.ras->ras_block.ras_late_init = 
amdgpu_umc_ras_late_init;
 
-   /* If don't define special ras_fini function, use default 
ras_fini */
-   if (!adev->umc.ras->ras_block.ras_fini)
-   adev->umc.ras->ras_block.ras_fini = 
amdgpu_ras_block_late_fini;
-
/* If not defined special ras_cb function, use default ras_cb */
if (!adev->umc.ras->ras_block.ras_cb)
adev->umc.ras->ras_block.ras_cb = 
amdgpu_umc_process_ras_data_cb;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index b01767d78153..4c3483fbe613 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1241,10 +1241,6 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device 
*adev)
if (!adev->umc.ras->ras_block.ras_late_init)
adev->umc.ras->ras_block.ras_late_init = 
amdgpu_umc_ras_late_init;
 
-   /* If don't define special ras_fini function, use default 
ras_fini */
-   if (!adev->umc.ras->ras_block.ras_fini)
-   adev->umc.ras->ras_block.ras_fini = 

Re: [PATCH v8 1/2] drm/amdgpu: add debugfs for reset registers list

2022-02-21 Thread Christian König

Am 21.02.22 um 11:06 schrieb Somalapuram, Amaranath:

[AMD Official Use Only]


On 2/21/2022 2:45 PM, Christian König wrote:


Am 21.02.22 um 08:15 schrieb Somalapuram Amaranath:

List of register populated for dump collection during the GPU reset.

Signed-off-by: Somalapuram Amaranath 
---
   drivers/gpu/drm/amd/amdgpu/amdgpu.h |   4 +
   drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 114 
   2 files changed, 118 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b85b67a88a3d..6e35f2c4c869 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1097,6 +1097,10 @@ struct amdgpu_device {
     struct amdgpu_reset_control *reset_cntl;
   uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
+
+    /* reset dump register */
+    uint32_t    *reset_dump_reg_list;
+    int num_regs;
   };
     static inline struct amdgpu_device *drm_to_adev(struct drm_device
*ddev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 164d6a9e9fbb..14ad9610f805 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1609,6 +1609,118 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
   DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
   amdgpu_debugfs_sclk_set, "%llu\n");
   +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
+    char __user *buf, size_t size, loff_t *pos)
+{
+    struct amdgpu_device *adev = (struct amdgpu_device
*)file_inode(f)->i_private;
+    char reg_offset[11];
+    uint32_t num_regs;
+    int i, ret, len = 0;
+
+    if (*pos)
+    return 0;
+
+    ret = down_read_killable(&adev->reset_sem);
+
+    if (ret)
+    return ret;
+
+    num_regs = adev->num_regs;
+
+    up_read(&adev->reset_sem);
+
+    if (num_regs == 0)
+    return 0;

I think we should drop that cause it just avoids the final \n.


ok.

+
+    for (i = 0; i < num_regs; i++) {

That's pretty close, but one problem is still that it is possible that
the number of register becomes much smaller while this loop runs.

Try it like this instead:

down_read_killable(...)
for (i = 0; i < adev->num_regs; ++i) {
     sprintf(...)
     up_read(...);

     copy_to_user(

     down_read_killable(...)
}
up_read().


I created local num_regs to avoid lock ousted the loop. I guess you me
to remove ?

so we can hold up_read inside the loop ?


Yes to both. See num_regs and the pointer always needs to be consistent.

In other words you need to read both while in the same instance of the 
critical section:


down..
num_regs =...
up
...
down
x = array[num_regs]
up

That above is illegal since you read num_regs and the array in two 
different critical sections.


But when you do:
down..
for(i=0; i < num_regs; ++i) {
    x = array[i]
    up..
    
    down..
}
up...

You still have multiple critical sections, but the read of both num_regs 
and the array happens in the same one and because of that this is legal.



+
+    ret = down_read_killable(&adev->reset_sem);
+
+    if (ret)
+    return ret;
+
+    sprintf(reg_offset, "0x%x ", adev->reset_dump_reg_list[i]);
+
+    up_read(&adev->reset_sem);
+
+    ret = copy_to_user(buf + len, reg_offset, strlen(reg_offset));
+
+    if (ret)
+    return -EFAULT;
+
+    len += strlen(reg_offset);
+    }
+
+    ret = copy_to_user(buf + len, "\n", 1);
+
+    if (ret)
+    return -EFAULT;
+
+    len++;
+    *pos += len;
+
+    return len;
+}
+
+static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
+    const char __user *buf, size_t size, loff_t *pos)
+{
+    struct amdgpu_device *adev = (struct amdgpu_device
*)file_inode(f)->i_private;
+    char *reg_offset, *reg, reg_temp[11];
+    uint32_t *tmp_list;
+    int ret, i = 0, len = 0;
+
+    do {
+    reg_offset = reg_temp;
+    memset(reg_offset, 0, 11);
+    ret = copy_from_user(reg_offset, buf + len, min(11,
((int)size-len)));
+
+    if (ret) {
+    kfree(tmp_list);
+    return -EFAULT;
+    }
+
+    reg = strsep(®_offset, " ");
+    tmp_list = krealloc_array(tmp_list,
+    1, sizeof(uint32_t), GFP_KERNEL);
+    ret = kstrtouint(reg, 16, &tmp_list[i]);
+
+    if (ret) {
+    kfree(tmp_list);
+    return -EFAULT;
+    }
+
+    len += strlen(reg) + 1;
+    i++;
+
+    } while (len < size);
+
+    ret = down_read_killable(&adev->reset_sem);
+
+    if (ret) {
+    kfree(tmp_list);
+    return ret;
+    }
+
+    kfree(adev->reset_dump_reg_list);
+
+    swap(adev->reset_dump_reg_list, tmp_list);

Just an assignment is sufficient here if you do the kfree before since
tmp_list isn't used after that.

This is required. what happens when the function is called for the
second time (the old t

Re: [PATCH] drm/amdgpu: check vm ready by evicting

2022-02-21 Thread Christian König




Am 21.02.22 um 11:12 schrieb Qiang Yu:

Workstation application ANSA/META get this error dmesg:
[drm:amdgpu_gem_va_ioctl [amdgpu]] *ERROR* Couldn't update BO_VA (-16)

This is caused by:
1. create a 256MB buffer in invisible VRAM
2. CPU map the buffer and access it causes vm_fault and try to move
it to visible VRAM
3. force visible VRAM space and traverse all VRAM bos to check if
evicting this bo is valuable
4. when checking a VM bo (in invisible VRAM), amdgpu_vm_evictable()
will set amdgpu_vm->evicting, but latter due to not in visible
VRAM, won't really evict it so not add it to amdgpu_vm->evicted
5. before next CS to clear the amdgpu_vm->evicting, user VM ops
ioctl will pass amdgpu_vm_ready() (check amdgpu_vm->evicted)
but fail in amdgpu_vm_bo_update_mapping() (check
amdgpu_vm->evicting) and get this error log

This error won't affect functionality as next CS will finish the
waiting VM ops. But we'd better clear the error log by check the
evicting flag which really stop VM ops latter.

Signed-off-by: Qiang Yu 


Reviewed-by: Christian König 

Good work.


---
  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 +++--
  1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 37acd8911168..2cd9f1a2e5fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -770,11 +770,16 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, 
struct amdgpu_vm *vm,
   * Check if all VM PDs/PTs are ready for updates
   *
   * Returns:
- * True if eviction list is empty.
+ * True if VM is not evicting.
   */
  bool amdgpu_vm_ready(struct amdgpu_vm *vm)
  {
-   return list_empty(&vm->evicted);
+   bool ret;
+
+   amdgpu_vm_eviction_lock(vm);
+   ret = !vm->evicting;
+   amdgpu_vm_eviction_unlock(vm);
+   return ret;
  }
  
  /**




Re: [PATCH] drm/amdgpu: check vm ready by evicting

2022-02-21 Thread Paul Menzel

Dear Qiang Yu,


Am 21.02.22 um 11:12 schrieb Qiang Yu:


Thank you for your patch. Reading the commit message summary, I have no 
idea what “check vm ready by evicting” means. Can you please rephrase it?



Workstation application ANSA/META get this error dmesg:


What version, and how can this be reproduced exactly? Just by starting 
the application?



[drm:amdgpu_gem_va_ioctl [amdgpu]] *ERROR* Couldn't update BO_VA (-16)

This is caused by:
1. create a 256MB buffer in invisible VRAM
2. CPU map the buffer and access it causes vm_fault and try to move
it to visible VRAM
3. force visible VRAM space and traverse all VRAM bos to check if
evicting this bo is valuable
4. when checking a VM bo (in invisible VRAM), amdgpu_vm_evictable()
will set amdgpu_vm->evicting, but latter due to not in visible
VRAM, won't really evict it so not add it to amdgpu_vm->evicted
5. before next CS to clear the amdgpu_vm->evicting, user VM ops
ioctl will pass amdgpu_vm_ready() (check amdgpu_vm->evicted)
but fail in amdgpu_vm_bo_update_mapping() (check
amdgpu_vm->evicting) and get this error log

This error won't affect functionality as next CS will finish the
waiting VM ops. But we'd better clear the error log by check the


s/check/checking/


evicting flag which really stop VM ops latter.


stop*s*?

Can you please elaborate. Christian’s and your discussions was quite 
long, so adding a summary, why this approach works and what possible 
regressions there are going to be might be warranted.



Kind regards,

Paul



Signed-off-by: Qiang Yu 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 +++--
  1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 37acd8911168..2cd9f1a2e5fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -770,11 +770,16 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, 
struct amdgpu_vm *vm,
   * Check if all VM PDs/PTs are ready for updates
   *
   * Returns:
- * True if eviction list is empty.
+ * True if VM is not evicting.
   */
  bool amdgpu_vm_ready(struct amdgpu_vm *vm)
  {
-   return list_empty(&vm->evicted);
+   bool ret;
+
+   amdgpu_vm_eviction_lock(vm);
+   ret = !vm->evicting;
+   amdgpu_vm_eviction_unlock(vm);
+   return ret;
  }
  
  /**


Re: [PATCH 1/7] drm/amdgpu/benchmark: use dev_info rather than DRM macros for logging

2022-02-21 Thread Christian König

Am 18.02.22 um 23:25 schrieb Alex Deucher:

So we can tell which output goes to which device when multiple GPUs
are present.  Also while we are here, convert DRM_ERROR to dev_info.
The error cases are not critical.

Signed-off-by: Alex Deucher 


Reviewed-by: Christian König  for the entire 
series.


As a follow up we should probably replace the create, reserve, pin, 
alloc_gart dance in amdgpu_benchmark_move() with a call to 
amdgpu_bo_create_kernel() and amdgpu_bo_free_kernel().


And using ktime() instead of jiffies would protect us against wrap 
arounds in amdgpu_benchmark_do_move().


Regards,
Christian.


---
  drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 12 +++-
  1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
index 313517f7cf10..b38783278a99 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
@@ -56,13 +56,15 @@ static int amdgpu_benchmark_do_move(struct amdgpu_device 
*adev, unsigned size,
  }
  
  
-static void amdgpu_benchmark_log_results(int n, unsigned size,

+static void amdgpu_benchmark_log_results(struct amdgpu_device *adev,
+int n, unsigned size,
 unsigned int time,
 unsigned sdomain, unsigned ddomain,
 char *kind)
  {
unsigned int throughput = (n * (size >> 10)) / time;
-   DRM_INFO("amdgpu: %s %u bo moves of %u kB from"
+
+   dev_info(adev->dev, "amdgpu: %s %u bo moves of %u kB from"
 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
 kind, n, size >> 10, sdomain, ddomain, time,
 throughput * 8, throughput);
@@ -131,14 +133,14 @@ static void amdgpu_benchmark_move(struct amdgpu_device 
*adev, unsigned size,
if (time < 0)
goto out_cleanup;
if (time > 0)
-   amdgpu_benchmark_log_results(n, size, time,
+   amdgpu_benchmark_log_results(adev, n, size, time,
 sdomain, ddomain, "dma");
}
  
  out_cleanup:

/* Check error value now. The value can be overwritten when clean up.*/
if (r) {
-   DRM_ERROR("Error while benchmarking BO move.\n");
+   dev_info(adev->dev, "Error while benchmarking BO move.\n");
}
  
  	if (sobj) {

@@ -239,6 +241,6 @@ void amdgpu_benchmark(struct amdgpu_device *adev, int 
test_number)
break;
  
  	default:

-   DRM_ERROR("Unknown benchmark\n");
+   dev_info(adev->dev, "Unknown benchmark\n");
}
  }




Re: [PATCH 1/1] drm/amdkfd: Use real device for messages

2022-02-21 Thread Christian König

Am 19.02.22 um 01:57 schrieb Felix Kuehling:

kfd_chardev() doesn't provide much useful information in dev_... messages
on multi-GPU systems because there is only one KFD device, which doesn't
correspond to any particular GPU. Use the actual GPU device to indicate
the GPU that caused a message.

Signed-off-by: Felix Kuehling 


Ah, yes somebody noted that to me as well a while ago. Good to see that 
changed.


Reviewed-by: Christian König 


---
  drivers/gpu/drm/amd/amdkfd/kfd_chardev.c   | 5 -
  drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c | 8 
  drivers/gpu/drm/amd/amdkfd/kfd_priv.h  | 1 -
  3 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index 7affec907fd1..ceeb0d5e9060 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -104,11 +104,6 @@ void kfd_chardev_exit(void)
kfd_device = NULL;
  }
  
-struct device *kfd_chardev(void)

-{
-   return kfd_device;
-}
-
  
  static int kfd_open(struct inode *inode, struct file *filep)

  {
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c
index 7041a6714baa..9178cfe34f20 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c
@@ -58,14 +58,14 @@ int kfd_interrupt_init(struct kfd_dev *kfd)
KFD_IH_NUM_ENTRIES * kfd->device_info.ih_ring_entry_size,
GFP_KERNEL);
if (r) {
-   dev_err(kfd_chardev(), "Failed to allocate IH fifo\n");
+   dev_err(kfd->adev->dev, "Failed to allocate IH fifo\n");
return r;
}
  
  	kfd->ih_wq = alloc_workqueue("KFD IH", WQ_HIGHPRI, 1);

if (unlikely(!kfd->ih_wq)) {
kfifo_free(&kfd->ih_fifo);
-   dev_err(kfd_chardev(), "Failed to allocate KFD IH workqueue\n");
+   dev_err(kfd->adev->dev, "Failed to allocate KFD IH 
workqueue\n");
return -ENOMEM;
}
spin_lock_init(&kfd->interrupt_lock);
@@ -117,7 +117,7 @@ bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const 
void *ih_ring_entry)
count = kfifo_in(&kfd->ih_fifo, ih_ring_entry,
kfd->device_info.ih_ring_entry_size);
if (count != kfd->device_info.ih_ring_entry_size) {
-   dev_dbg_ratelimited(kfd_chardev(),
+   dev_dbg_ratelimited(kfd->adev->dev,
"Interrupt ring overflow, dropping interrupt %d\n",
count);
return false;
@@ -148,7 +148,7 @@ static void interrupt_wq(struct work_struct *work)
uint32_t ih_ring_entry[KFD_MAX_RING_ENTRY_SIZE];
  
  	if (dev->device_info.ih_ring_entry_size > sizeof(ih_ring_entry)) {

-   dev_err_once(kfd_chardev(), "Ring entry too small\n");
+   dev_err_once(dev->adev->dev, "Ring entry too small\n");
return;
}
  
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h

index 783d53a3dd9e..f36062be9ca8 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
@@ -355,7 +355,6 @@ enum kfd_mempool {
  /* Character device interface */
  int kfd_chardev_init(void);
  void kfd_chardev_exit(void);
-struct device *kfd_chardev(void);
  
  /**

   * enum kfd_unmap_queues_filter - Enum for queue filters.




[PATCH] drm/radeon: fix variable type

2022-02-21 Thread Christian König
When we switch to dma_resv_wait_timeout() the returned type changes as
well.

Signed-off-by: Christian König 
Fixes: 89aae41d740f ("drm/radeon: use dma_resv_wait_timeout() instead of 
manually waiting")
---
 drivers/gpu/drm/radeon/radeon_uvd.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c 
b/drivers/gpu/drm/radeon/radeon_uvd.c
index 377f9cdb5b53..84013faa4756 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
+++ b/drivers/gpu/drm/radeon/radeon_uvd.c
@@ -470,8 +470,8 @@ static int radeon_uvd_cs_msg(struct radeon_cs_parser *p, 
struct radeon_bo *bo,
int32_t *msg, msg_type, handle;
unsigned img_size = 0;
void *ptr;
-
-   int i, r;
+   long r;
+   int i;
 
if (offset & 0x3F) {
DRM_ERROR("UVD messages must be 64 byte aligned!\n");
@@ -481,13 +481,13 @@ static int radeon_uvd_cs_msg(struct radeon_cs_parser *p, 
struct radeon_bo *bo,
r = dma_resv_wait_timeout(bo->tbo.base.resv, false, false,
  MAX_SCHEDULE_TIMEOUT);
if (r <= 0) {
-   DRM_ERROR("Failed waiting for UVD message (%d)!\n", r);
+   DRM_ERROR("Failed waiting for UVD message (%ld)!\n", r);
return r ? r : -ETIME;
}
 
r = radeon_bo_kmap(bo, &ptr);
if (r) {
-   DRM_ERROR("Failed mapping the UVD message (%d)!\n", r);
+   DRM_ERROR("Failed mapping the UVD message (%ld)!\n", r);
return r;
}
 
-- 
2.25.1



[PATCH] drm/amd/display: move FPU-related code from dcn20 to dml folder

2022-02-21 Thread Melissa Wen
Move parts of dcn20 code that uses FPU to dml folder. It aims to isolate
FPU operations as described by series:

drm/amd/display: Introduce FPU directory inside DC
https://patchwork.freedesktop.org/series/93042/

This patch moves the following functions from dcn20_resource to
dml/dcn20_fpu and calls of public functions in dcn20_resource are
wrapped by DC_FP_START/END():

- void dcn20_populate_dml_writeback_from_context
- static bool is_dtbclk_required()
- static enum dcn_zstate_support_state()
- void dcn20_calculate_dlg_params()
- static void swizzle_to_dml_params()
- int dcn20_populate_dml_pipes_from_context()
- void dcn20_calculate_wm()
- void dcn20_cap_soc_clocks()
- void dcn20_update_bounding_box()
- void dcn20_patch_bounding_box()
- bool dcn20_validate_bandwidth_fp()

This movement also affects dcn30/31, as dcn20_calculate_dlg_params() is
used by dcn30 and dcn31. For this reason, I included dcn20_fpu headers
in dcn20_resource headers to make dcn20_calculate_dlg_params() visible
to dcn30/31.

Three new functions are created to isolate well-delimited FPU
operations:

- void dcn20_fpu_set_wb_arb_params(): set cli_watermark,
  pstate_watermark and time_per_pixel from wb_arb_params (struct
mcif_arb_params), since those uses FPU operations on double types:
WritebackUrgentWatermark, WritebackDRAMClockChangeWatermark, '16.0'.
- void dcn20_fpu_set_wm_ranges(): set min_fill_clk_mhz and
  max_fill_clk_mhz involves FPU calcs on dram_speed_mts (double type);
- void dcn20_fpu_adjust_dppclk(): adjust operation on RequiredDPPCLK
  that is a double.

Signed-off-by: Melissa Wen 
---
 drivers/gpu/drm/amd/display/dc/dcn20/Makefile |   25 -
 .../drm/amd/display/dc/dcn20/dcn20_resource.c | 1370 +---
 .../drm/amd/display/dc/dcn20/dcn20_resource.h |   30 +-
 .../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c  | 1385 +
 .../drm/amd/display/dc/dml/dcn20/dcn20_fpu.h  |   42 +-
 5 files changed, 1451 insertions(+), 1401 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/Makefile 
b/drivers/gpu/drm/amd/display/dc/dcn20/Makefile
index 5fcaf78334ff..abaed2121feb 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/Makefile
@@ -9,31 +9,6 @@ DCN20 = dcn20_resource.o dcn20_init.o dcn20_hwseq.o 
dcn20_dpp.o dcn20_dpp_cm.o d
 
 DCN20 += dcn20_dsc.o
 
-ifdef CONFIG_X86
-CFLAGS_$(AMDDALPATH)/dc/dcn20/dcn20_resource.o := -mhard-float -msse
-endif
-
-ifdef CONFIG_PPC64
-CFLAGS_$(AMDDALPATH)/dc/dcn20/dcn20_resource.o := -mhard-float -maltivec
-endif
-
-ifdef CONFIG_CC_IS_GCC
-ifeq ($(call cc-ifversion, -lt, 0701, y), y)
-IS_OLD_GCC = 1
-endif
-endif
-
-ifdef CONFIG_X86
-ifdef IS_OLD_GCC
-# Stack alignment mismatch, proceed with caution.
-# GCC < 7.1 cannot compile code using `double` and -mpreferred-stack-boundary=3
-# (8B stack alignment).
-CFLAGS_$(AMDDALPATH)/dc/dcn20/dcn20_resource.o += -mpreferred-stack-boundary=4
-else
-CFLAGS_$(AMDDALPATH)/dc/dcn20/dcn20_resource.o += -msse2
-endif
-endif
-
 AMD_DAL_DCN20 = $(addprefix $(AMDDALPATH)/dc/dcn20/,$(DCN20))
 
 AMD_DISPLAY_FILES += $(AMD_DAL_DCN20)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index dfe2e1c25a26..63c50bee0144 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -63,7 +63,6 @@
 #include "dcn20_dccg.h"
 #include "dcn20_vmid.h"
 #include "dc_link_ddc.h"
-#include "dc_link_dp.h"
 #include "dce/dce_panel_cntl.h"
 
 #include "navi10_ip_offset.h"
@@ -93,367 +92,6 @@
 
 #define DC_LOGGER_INIT(logger)
 
-struct _vcs_dpi_ip_params_st dcn2_0_ip = {
-   .odm_capable = 1,
-   .gpuvm_enable = 0,
-   .hostvm_enable = 0,
-   .gpuvm_max_page_table_levels = 4,
-   .hostvm_max_page_table_levels = 4,
-   .hostvm_cached_page_table_levels = 0,
-   .pte_group_size_bytes = 2048,
-   .num_dsc = 6,
-   .rob_buffer_size_kbytes = 168,
-   .det_buffer_size_kbytes = 164,
-   .dpte_buffer_size_in_pte_reqs_luma = 84,
-   .pde_proc_buffer_size_64k_reqs = 48,
-   .dpp_output_buffer_pixels = 2560,
-   .opp_output_buffer_lines = 1,
-   .pixel_chunk_size_kbytes = 8,
-   .pte_chunk_size_kbytes = 2,
-   .meta_chunk_size_kbytes = 2,
-   .writeback_chunk_size_kbytes = 2,
-   .line_buffer_size_bits = 789504,
-   .is_line_buffer_bpp_fixed = 0,
-   .line_buffer_fixed_bpp = 0,
-   .dcc_supported = true,
-   .max_line_buffer_lines = 12,
-   .writeback_luma_buffer_size_kbytes = 12,
-   .writeback_chroma_buffer_size_kbytes = 8,
-   .writeback_chroma_line_buffer_width_pixels = 4,
-   .writeback_max_hscl_ratio = 1,
-   .writeback_max_vscl_ratio = 1,
-   .writeback_min_hscl_ratio = 1,
-   .writeback_min_vscl_ratio = 1,
-   .writeback_max_hscl_taps = 12,
-   .writeback_max_vscl_taps = 12,
-   .writeback_line_buffer_luma_buffer_size = 0,
-   .writeback_line_

[PATCH v9 1/2] drm/amdgpu: add debugfs for reset registers list

2022-02-21 Thread Somalapuram Amaranath
List of register populated for dump collection during the GPU reset.

Signed-off-by: Somalapuram Amaranath 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h |  4 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 96 +
 2 files changed, 100 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b85b67a88a3d..6e35f2c4c869 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1097,6 +1097,10 @@ struct amdgpu_device {
 
struct amdgpu_reset_control *reset_cntl;
uint32_t
ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
+
+   /* reset dump register */
+   uint32_t*reset_dump_reg_list;
+   int num_regs;
 };
 
 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 164d6a9e9fbb..69c0a28deeac 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1609,6 +1609,100 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
 DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
amdgpu_debugfs_sclk_set, "%llu\n");
 
+static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
+   char __user *buf, size_t size, loff_t *pos)
+{
+   struct amdgpu_device *adev = (struct amdgpu_device 
*)file_inode(f)->i_private;
+   char reg_offset[11];
+   int i, ret, len = 0;
+
+   if (*pos)
+   return 0;
+
+   ret = down_read_killable(&adev->reset_sem);
+
+   if (ret)
+   return ret;
+
+   for (i = 0; i < adev->num_regs; i++) {
+   down_read(&adev->reset_sem);
+   sprintf(reg_offset, "0x%x ", adev->reset_dump_reg_list[i]);
+   up_read(&adev->reset_sem);
+   ret = copy_to_user(buf + len, reg_offset, strlen(reg_offset));
+
+   if (ret)
+   goto error;
+
+   len += strlen(reg_offset);
+   }
+
+   up_read(&adev->reset_sem);
+   ret = copy_to_user(buf + len, "\n", 1);
+
+   if (ret)
+   return -EFAULT;
+
+   len++;
+   *pos += len;
+
+   return len;
+error:
+   up_read(&adev->reset_sem);
+   return -EFAULT;
+}
+
+static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
+   const char __user *buf, size_t size, loff_t *pos)
+{
+   struct amdgpu_device *adev = (struct amdgpu_device 
*)file_inode(f)->i_private;
+   char *reg_offset, *reg, reg_temp[11];
+   uint32_t *tmp;
+   int ret, i = 0, len = 0;
+
+   do {
+   reg_offset = reg_temp;
+   memset(reg_offset, 0, 11);
+   ret = copy_from_user(reg_offset, buf + len, min(11, 
((int)size-len)));
+
+   if (ret)
+   goto error_free;
+
+   reg = strsep(®_offset, " ");
+   tmp = krealloc_array(tmp, 1, sizeof(uint32_t), GFP_KERNEL);
+   ret = kstrtouint(reg, 16, &tmp[i]);
+
+   if (ret)
+   goto error_free;
+
+   len += strlen(reg) + 1;
+   i++;
+
+   } while (len < size);
+
+   ret = down_write_killable(&adev->reset_sem);
+
+   if (ret)
+   goto error_free;
+
+   swap(adev->reset_dump_reg_list, tmp);
+   adev->num_regs = i;
+   up_write(&adev->reset_sem);
+   ret = size;
+
+error_free:
+   kfree(tmp);
+   return ret;
+}
+
+
+
+static const struct file_operations amdgpu_reset_dump_register_list = {
+   .owner = THIS_MODULE,
+   .read = amdgpu_reset_dump_register_list_read,
+   .write = amdgpu_reset_dump_register_list_write,
+   .llseek = default_llseek
+};
+
 int amdgpu_debugfs_init(struct amdgpu_device *adev)
 {
struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
@@ -1672,6 +1766,8 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
&amdgpu_debugfs_test_ib_fops);
debugfs_create_file("amdgpu_vm_info", 0444, root, adev,
&amdgpu_debugfs_vm_info_fops);
+   debugfs_create_file("amdgpu_reset_dump_register_list", 0644, root, adev,
+   &amdgpu_reset_dump_register_list);
 
adev->debugfs_vbios_blob.data = adev->bios;
adev->debugfs_vbios_blob.size = adev->bios_size;
-- 
2.25.1



[PATCH v9 2/2] drm/amdgpu: add reset register dump trace on GPU reset

2022-02-21 Thread Somalapuram Amaranath
Dump the list of register values to trace event on GPU reset.

Signed-off-by: Somalapuram Amaranath 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16 
 drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h  | 16 
 2 files changed, 32 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 1e651b959141..0eedcd4e2227 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4534,6 +4534,21 @@ int amdgpu_device_pre_asic_reset(struct amdgpu_device 
*adev,
return r;
 }
 
+static int amdgpu_reset_reg_dumps(struct amdgpu_device *adev)
+{
+   uint32_t reg_value;
+   int i;
+
+   lockdep_assert_held(&adev->reset_sem);
+
+   for (i = 0; i < adev->num_regs; i++) {
+   reg_value = RREG32(adev->reset_dump_reg_list[i]);
+   trace_amdgpu_reset_reg_dumps(adev->reset_dump_reg_list[i], 
reg_value);
+   }
+
+   return 0;
+}
+
 int amdgpu_do_asic_reset(struct list_head *device_list_handle,
 struct amdgpu_reset_context *reset_context)
 {
@@ -4544,6 +4559,7 @@ int amdgpu_do_asic_reset(struct list_head 
*device_list_handle,
/* Try reset handler method first */
tmp_adev = list_first_entry(device_list_handle, struct amdgpu_device,
reset_list);
+   amdgpu_reset_reg_dumps(tmp_adev);
r = amdgpu_reset_perform_reset(tmp_adev, reset_context);
/* If reset handler not implemented, continue; otherwise return */
if (r == -ENOSYS)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
index d855cb53c7e0..b9637925e85c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
@@ -537,6 +537,22 @@ TRACE_EVENT(amdgpu_ib_pipe_sync,
  __entry->seqno)
 );
 
+TRACE_EVENT(amdgpu_reset_reg_dumps,
+   TP_PROTO(uint32_t address, uint32_t value),
+   TP_ARGS(address, value),
+   TP_STRUCT__entry(
+__field(uint32_t, address)
+__field(uint32_t, value)
+),
+   TP_fast_assign(
+  __entry->address = address;
+  __entry->value = value;
+  ),
+   TP_printk("amdgpu register dump 0x%x: 0x%x",
+ __entry->address,
+ __entry->value)
+);
+
 #undef AMDGPU_JOB_GET_TIMELINE_NAME
 #endif
 
-- 
2.25.1



Re: [PATCH v9 1/2] drm/amdgpu: add debugfs for reset registers list

2022-02-21 Thread Christian König




Am 21.02.22 um 14:34 schrieb Somalapuram Amaranath:

List of register populated for dump collection during the GPU reset.

Signed-off-by: Somalapuram Amaranath 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h |  4 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 96 +
  2 files changed, 100 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b85b67a88a3d..6e35f2c4c869 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1097,6 +1097,10 @@ struct amdgpu_device {
  
  	struct amdgpu_reset_control *reset_cntl;

uint32_t
ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
+
+   /* reset dump register */
+   uint32_t*reset_dump_reg_list;
+   int num_regs;
  };
  
  static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 164d6a9e9fbb..69c0a28deeac 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1609,6 +1609,100 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
  DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
amdgpu_debugfs_sclk_set, "%llu\n");
  
+static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,

+   char __user *buf, size_t size, loff_t *pos)
+{
+   struct amdgpu_device *adev = (struct amdgpu_device 
*)file_inode(f)->i_private;
+   char reg_offset[11];
+   int i, ret, len = 0;
+
+   if (*pos)
+   return 0;
+
+   ret = down_read_killable(&adev->reset_sem);
+
+   if (ret)
+   return ret;


We usually don't have an empty line between function call and checking 
the return code.



+
+   for (i = 0; i < adev->num_regs; i++) {
+   down_read(&adev->reset_sem);


That here will just crash because we have already locked the semaphore 
before the loop.



+   sprintf(reg_offset, "0x%x ", adev->reset_dump_reg_list[i]);
+   up_read(&adev->reset_sem);
+   ret = copy_to_user(buf + len, reg_offset, strlen(reg_offset));
+
+   if (ret)
+   goto error;
+
+   len += strlen(reg_offset);


And here the down_read_killable() is missing.


+   }
+
+   up_read(&adev->reset_sem);
+   ret = copy_to_user(buf + len, "\n", 1);
+
+   if (ret)
+   return -EFAULT;
+
+   len++;
+   *pos += len;
+
+   return len;
+error:
+   up_read(&adev->reset_sem);
+   return -EFAULT;
+}
+
+static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
+   const char __user *buf, size_t size, loff_t *pos)
+{
+   struct amdgpu_device *adev = (struct amdgpu_device 
*)file_inode(f)->i_private;
+   char *reg_offset, *reg, reg_temp[11];
+   uint32_t *tmp;
+   int ret, i = 0, len = 0;
+
+   do {
+   reg_offset = reg_temp;


I think you can just drop the reg_offset variable;


+   memset(reg_offset, 0, 11);
+   ret = copy_from_user(reg_offset, buf + len, min(11, 
((int)size-len)));
+
+   if (ret)
+   goto error_free;
+
+   reg = strsep(®_offset, " ");
+   tmp = krealloc_array(tmp, 1, sizeof(uint32_t), GFP_KERNEL);


That must be krealloc_array(tmp, i, ... not krealloc_array(tmp, 1, ... !

Regards,
Christian.


+   ret = kstrtouint(reg, 16, &tmp[i]);
+
+   if (ret)
+   goto error_free;
+
+   len += strlen(reg) + 1;
+   i++;
+
+   } while (len < size);
+
+   ret = down_write_killable(&adev->reset_sem);
+
+   if (ret)
+   goto error_free;
+
+   swap(adev->reset_dump_reg_list, tmp);
+   adev->num_regs = i;
+   up_write(&adev->reset_sem);
+   ret = size;
+
+error_free:
+   kfree(tmp);
+   return ret;
+}
+
+
+
+static const struct file_operations amdgpu_reset_dump_register_list = {
+   .owner = THIS_MODULE,
+   .read = amdgpu_reset_dump_register_list_read,
+   .write = amdgpu_reset_dump_register_list_write,
+   .llseek = default_llseek
+};
+
  int amdgpu_debugfs_init(struct amdgpu_device *adev)
  {
struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
@@ -1672,6 +1766,8 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
&amdgpu_debugfs_test_ib_fops);
debugfs_create_file("amdgpu_vm_info", 0444, root, adev,
&amdgpu_debugfs_vm_info_fops);
+   debugfs_create_file("amdgpu_reset_dump_register_list", 0644, root, adev,
+   &amdgpu_reset_dump_register_list);
  
  	adev->debugfs_vbios_blob.data = adev->bios;

adev->debugfs_vbios_blob.size 

[PATCH v2 05/22] drm/amd/display: Fix color encoding mismatch

2022-02-21 Thread Maxime Ripard
The amdgpu KMS driver calls drm_plane_create_color_properties() with a
default encoding set to BT709.

However, the core will ignore it and the driver doesn't force it in its
plane state reset hook, so the initial value will be 0, which represents
BT601.

Fix the mismatch by using an initial value of BT601 in
drm_plane_create_color_properties().

Cc: amd-gfx@lists.freedesktop.org
Cc: Alex Deucher 
Cc: "Christian König" 
Cc: Harry Wentland 
Cc: Leo Li 
Cc: "Pan, Xinhui" 
Cc: Rodrigo Siqueira 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index feccf2b555d2..86b27a355e90 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7914,7 +7914,7 @@ static int amdgpu_dm_plane_init(struct 
amdgpu_display_manager *dm,
BIT(DRM_COLOR_YCBCR_BT2020),
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
BIT(DRM_COLOR_YCBCR_FULL_RANGE),
-   DRM_COLOR_YCBCR_BT709, DRM_COLOR_YCBCR_LIMITED_RANGE);
+   DRM_COLOR_YCBCR_BT601, DRM_COLOR_YCBCR_LIMITED_RANGE);
}
 
supported_rotations =
-- 
2.35.1



Re: Regression from 3c196f056666 ("drm/amdgpu: always reset the asic in suspend (v2)") on suspend?

2022-02-21 Thread Alex Deucher
On Mon, Feb 21, 2022 at 3:29 AM Eric Valette  wrote:
>
> On 20/02/2022 16:48, Dominique Dumont wrote:
> > On Monday, 14 February 2022 22:52:27 CET Alex Deucher wrote:
> >> Does the system actually suspend?
> >
> > Not really. The screens looks like it's going to suspend, but it does come
> > back after 10s or so. The light mounted in the middle of the power button 
> > does
> > not switch off.
>
>
> As I have a very similar problem and also commented on the original
> debian bug report
> (https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1005005), I will add
> some information here on another amd only laptop (renoir AMD Ryzen 7
> 4800H with Radeon Graphics + Radeon RX 5500/5500M / Pro 5500M).
>
> For me the suspend works once, but after the first resume (I do know
> know if it is in the suspend path or the resume path I see a RIP in the
> dmesg (see aditional info in debian bug))  and later suspend do not
> work: It only go to the kde login screen.
>
> I was unable due to network connectivity to do a full bisect but tested
> with the patch I had on my laptop:
>
> 5.10.101 works, 5.10 from debian works
> 5.11 works
> 5.12 works
> 5.13 suspend works but when resuming the PC is dead I have to reboot
> 5.14 seems to work but looking at dmesg it is full of RIP messages at
> various places.
> 5.15.24 is a described 5.15 from debian is behaving identically
> 5.16 from debian is behaving identically.
>
> >> Is this system S0i3 or regular S3?
>
> For me it is real S3.
>
> The proposed patch is intended for INTEl + intel gpu + amdgpu but I have
> dual amd GPU.

It doesn't really matter what the platform is, it could still
potentially help on your system, it depends on the bios implementation
for your platform and how it handles suspend. You can try the patch,
but I don't think you are hitting the same issue.  I bisect would be
helpful in your case.

Alex


Re: [PATCH v9 1/2] drm/amdgpu: add debugfs for reset registers list

2022-02-21 Thread Somalapuram, Amaranath
[AMD Official Use Only]


On 2/21/2022 7:09 PM, Christian König wrote:
>
>
> Am 21.02.22 um 14:34 schrieb Somalapuram Amaranath:
>> List of register populated for dump collection during the GPU reset.
>>
>> Signed-off-by: Somalapuram Amaranath 
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h |  4 +
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 96 +
>>   2 files changed, 100 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> index b85b67a88a3d..6e35f2c4c869 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> @@ -1097,6 +1097,10 @@ struct amdgpu_device {
>>     struct amdgpu_reset_control *reset_cntl;
>>   uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
>> +
>> +    /* reset dump register */
>> +    uint32_t    *reset_dump_reg_list;
>> +    int num_regs;
>>   };
>>     static inline struct amdgpu_device *drm_to_adev(struct drm_device 
>> *ddev)
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>> index 164d6a9e9fbb..69c0a28deeac 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>> @@ -1609,6 +1609,100 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
>>   DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
>>   amdgpu_debugfs_sclk_set, "%llu\n");
>>   +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
>> +    char __user *buf, size_t size, loff_t *pos)
>> +{
>> +    struct amdgpu_device *adev = (struct amdgpu_device 
>> *)file_inode(f)->i_private;
>> +    char reg_offset[11];
>> +    int i, ret, len = 0;
>> +
>> +    if (*pos)
>> +    return 0;
>> +
>> +    ret = down_read_killable(&adev->reset_sem);
>> +
>> +    if (ret)
>> +    return ret;
>
> We usually don't have an empty line between function call and checking 
> the return code.
>
>> +
>> +    for (i = 0; i < adev->num_regs; i++) {
>> +    down_read(&adev->reset_sem);
>
> That here will just crash because we have already locked the semaphore 
> before the loop.
>
unfortunately it did not crash. Sorry I misunderstood your earlier comments.
>> +    sprintf(reg_offset, "0x%x ", adev->reset_dump_reg_list[i]);
>> +    up_read(&adev->reset_sem);
>> +    ret = copy_to_user(buf + len, reg_offset, strlen(reg_offset));
>> +
>> +    if (ret)
>> +    goto error;
>> +
>> +    len += strlen(reg_offset);
>
> And here the down_read_killable() is missing.
>
>> +    }
>> +
>> +    up_read(&adev->reset_sem);
>> +    ret = copy_to_user(buf + len, "\n", 1);
>> +
>> +    if (ret)
>> +    return -EFAULT;
>> +
>> +    len++;
>> +    *pos += len;
>> +
>> +    return len;
>> +error:
>> +    up_read(&adev->reset_sem);
>> +    return -EFAULT;
>> +}
>> +
>> +static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
>> +    const char __user *buf, size_t size, loff_t *pos)
>> +{
>> +    struct amdgpu_device *adev = (struct amdgpu_device 
>> *)file_inode(f)->i_private;
>> +    char *reg_offset, *reg, reg_temp[11];
>> +    uint32_t *tmp;
>> +    int ret, i = 0, len = 0;
>> +
>> +    do {
>> +    reg_offset = reg_temp;
>
> I think you can just drop the reg_offset variable;
>
strsep takes only pointer as input, this is workaround.
>> +    memset(reg_offset, 0, 11);
>> +    ret = copy_from_user(reg_offset, buf + len, min(11, 
>> ((int)size-len)));
>> +
>> +    if (ret)
>> +    goto error_free;
>> +
>> +    reg = strsep(®_offset, " ");
>> +    tmp = krealloc_array(tmp, 1, sizeof(uint32_t), GFP_KERNEL);
>
> That must be krealloc_array(tmp, i, ... not krealloc_array(tmp, 1, ... !
I thought it will append (if not it should have crashed or some kernel dump)
> Regards,
> Christian.
>
>> +    ret = kstrtouint(reg, 16, &tmp[i]);
>> +
>> +    if (ret)
>> +    goto error_free;
>> +
>> +    len += strlen(reg) + 1;
>> +    i++;
>> +
>> +    } while (len < size);
>> +
>> +    ret = down_write_killable(&adev->reset_sem);
>> +
>> +    if (ret)
>> +    goto error_free;
>> +
>> +    swap(adev->reset_dump_reg_list, tmp);
>> +    adev->num_regs = i;
>> +    up_write(&adev->reset_sem);
>> +    ret = size;
>> +
>> +error_free:
>> +    kfree(tmp);
>> +    return ret;
>> +}
>> +
>> +
>> +
>> +static const struct file_operations amdgpu_reset_dump_register_list = {
>> +    .owner = THIS_MODULE,
>> +    .read = amdgpu_reset_dump_register_list_read,
>> +    .write = amdgpu_reset_dump_register_list_write,
>> +    .llseek = default_llseek
>> +};
>> +
>>   int amdgpu_debugfs_init(struct amdgpu_device *adev)
>>   {
>>   struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
>> @@ -1672,6 +1766,8 @@ int amdgpu_debugfs_init(struct amdgpu_device 
>> *adev)
>>   &amdgpu_debugfs_test_ib_fops);
>>   debugfs_create_file("

RE: [PATCH] drm/amd/display: add GTT domain support for dcn 3.1.5

2022-02-21 Thread Chen, Guchun
Acked-by: Guchun Chen 

Regards,
Guchun

-Original Message-
From: amd-gfx  On Behalf Of Yifan Zhang
Sent: Monday, February 21, 2022 6:15 PM
To: amd-gfx@lists.freedesktop.org
Cc: Li, Sun peng (Leo) ; Zhang, Yifan 
; Yin, Tianci (Rico) ; Wentland, 
Harry 
Subject: [PATCH] drm/amd/display: add GTT domain support for dcn 3.1.5

From: "Tianci.Yin" 

this patch adds GTT domain support for dcn 3.1.5

Signed-off-by: Tianci.Yin 
Signed-off-by: Yifan Zhang 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 9709368b4915..88ee1224541c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -523,6 +523,7 @@ uint32_t amdgpu_display_supported_domains(struct 
amdgpu_device *adev,
case IP_VERSION(3, 0, 1):
case IP_VERSION(3, 1, 2):
case IP_VERSION(3, 1, 3):
+   case IP_VERSION(3, 1, 5):
domain |= AMDGPU_GEM_DOMAIN_GTT;
break;
default:
-- 
2.25.1



Re: [PATCH] drm/amd/display: add GTT domain support for dcn 3.1.5

2022-02-21 Thread Alex Deucher
On Mon, Feb 21, 2022 at 5:15 AM Yifan Zhang  wrote:
>
> From: "Tianci.Yin" 
>
> this patch adds GTT domain support for dcn 3.1.5
>
> Signed-off-by: Tianci.Yin 
> Signed-off-by: Yifan Zhang 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 9709368b4915..88ee1224541c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -523,6 +523,7 @@ uint32_t amdgpu_display_supported_domains(struct 
> amdgpu_device *adev,
> case IP_VERSION(3, 0, 1):
> case IP_VERSION(3, 1, 2):
> case IP_VERSION(3, 1, 3):
> +   case IP_VERSION(3, 1, 5):

Should also add 3.1.6 as well?

Alex


> domain |= AMDGPU_GEM_DOMAIN_GTT;
> break;
> default:
> --
> 2.25.1
>


Re: [PATCH v9 1/2] drm/amdgpu: add debugfs for reset registers list

2022-02-21 Thread Christian König

Am 21.02.22 um 15:19 schrieb Somalapuram, Amaranath:

[AMD Official Use Only]


On 2/21/2022 7:09 PM, Christian König wrote:


Am 21.02.22 um 14:34 schrieb Somalapuram Amaranath:

List of register populated for dump collection during the GPU reset.

Signed-off-by: Somalapuram Amaranath 
---
   drivers/gpu/drm/amd/amdgpu/amdgpu.h |  4 +
   drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 96 +
   2 files changed, 100 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b85b67a88a3d..6e35f2c4c869 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1097,6 +1097,10 @@ struct amdgpu_device {
     struct amdgpu_reset_control *reset_cntl;
   uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
+
+    /* reset dump register */
+    uint32_t    *reset_dump_reg_list;
+    int num_regs;
   };
     static inline struct amdgpu_device *drm_to_adev(struct drm_device
*ddev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 164d6a9e9fbb..69c0a28deeac 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1609,6 +1609,100 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
   DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
   amdgpu_debugfs_sclk_set, "%llu\n");
   +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
+    char __user *buf, size_t size, loff_t *pos)
+{
+    struct amdgpu_device *adev = (struct amdgpu_device
*)file_inode(f)->i_private;
+    char reg_offset[11];
+    int i, ret, len = 0;
+
+    if (*pos)
+    return 0;
+
+    ret = down_read_killable(&adev->reset_sem);
+
+    if (ret)
+    return ret;

We usually don't have an empty line between function call and checking
the return code.


+
+    for (i = 0; i < adev->num_regs; i++) {
+    down_read(&adev->reset_sem);

That here will just crash because we have already locked the semaphore
before the loop.


unfortunately it did not crash. Sorry I misunderstood your earlier comments.

+    sprintf(reg_offset, "0x%x ", adev->reset_dump_reg_list[i]);
+    up_read(&adev->reset_sem);
+    ret = copy_to_user(buf + len, reg_offset, strlen(reg_offset));
+
+    if (ret)
+    goto error;
+
+    len += strlen(reg_offset);

And here the down_read_killable() is missing.


+    }
+
+    up_read(&adev->reset_sem);
+    ret = copy_to_user(buf + len, "\n", 1);
+
+    if (ret)
+    return -EFAULT;
+
+    len++;
+    *pos += len;
+
+    return len;
+error:
+    up_read(&adev->reset_sem);
+    return -EFAULT;
+}
+
+static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
+    const char __user *buf, size_t size, loff_t *pos)
+{
+    struct amdgpu_device *adev = (struct amdgpu_device
*)file_inode(f)->i_private;
+    char *reg_offset, *reg, reg_temp[11];
+    uint32_t *tmp;
+    int ret, i = 0, len = 0;
+
+    do {
+    reg_offset = reg_temp;

I think you can just drop the reg_offset variable;


strsep takes only pointer as input, this is workaround.


Ah, now I see what you are doing here.

Please don't do it like that. Better use memchr() instead.


+    memset(reg_offset, 0, 11);
+    ret = copy_from_user(reg_offset, buf + len, min(11,
((int)size-len)));
+
+    if (ret)
+    goto error_free;
+
+    reg = strsep(®_offset, " ");
+    tmp = krealloc_array(tmp, 1, sizeof(uint32_t), GFP_KERNEL);

That must be krealloc_array(tmp, i, ... not krealloc_array(tmp, 1, ... !

I thought it will append (if not it should have crashed or some kernel dump)


No, krealloc_array works similar to realloc() in userspace.

You need to give it the full size of the necessary space.

Regards,
Christian.


Regards,
Christian.


+    ret = kstrtouint(reg, 16, &tmp[i]);
+
+    if (ret)
+    goto error_free;
+
+    len += strlen(reg) + 1;
+    i++;
+
+    } while (len < size);
+
+    ret = down_write_killable(&adev->reset_sem);
+
+    if (ret)
+    goto error_free;
+
+    swap(adev->reset_dump_reg_list, tmp);
+    adev->num_regs = i;
+    up_write(&adev->reset_sem);
+    ret = size;
+
+error_free:
+    kfree(tmp);
+    return ret;
+}
+
+
+
+static const struct file_operations amdgpu_reset_dump_register_list = {
+    .owner = THIS_MODULE,
+    .read = amdgpu_reset_dump_register_list_read,
+    .write = amdgpu_reset_dump_register_list_write,
+    .llseek = default_llseek
+};
+
   int amdgpu_debugfs_init(struct amdgpu_device *adev)
   {
   struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
@@ -1672,6 +1766,8 @@ int amdgpu_debugfs_init(struct amdgpu_device
*adev)
   &amdgpu_debugfs_test_ib_fops);
   debugfs_create_file("amdgpu_vm_info", 0444, root, adev,
   &amdgpu_debugfs_vm_info_fops);
+    debugfs_create_file("amdgpu_r

Re: Bug 215600 - Radeon - *ERROR* Failed waiting for UVD message

2022-02-21 Thread Alex Deucher
On Mon, Feb 21, 2022 at 3:30 AM Thorsten Leemhuis
 wrote:
>
> Hi, this is your Linux kernel regression tracker.
>
> I noticed a regression report in bugzilla.kernel.org that afaics nobody
> acted upon since it was reported about a week ago, that's why I decided
> to forward it to the lists and all the relevant people. To quote
> https://bugzilla.kernel.org/show_bug.cgi?id=215600 :
>
> >  Richard Herbert 2022-02-12 22:13:07 UTC
> >
> > Created attachment 300445 [details]
> > Details
> >
> > When attempting to play some types of videos with VLC 3.0.16 (eg. *.flv, 
> > *.mp4), when running kernels 5.17-rc1 to 5.17-rc3, only the audio portion 
> > is heard and the VLC video screen remains black. Meanwhile, many of these 
> > entries are written per second to /var/log/syslog:
> >
> > 2/12/22 3:41 PM   starbug kernel  [drm:radeon_uvd_cs_parse [radeon]] 
> > *ERROR* Failed waiting for UVD message (-1)!
> > 2/12/22 3:41 PM   starbug kernel  [drm:radeon_cs_ioctl [radeon]] 
> > *ERROR* Invalid command stream !
> > 2/12/22 3:41 PM   starbug kernel  [drm:radeon_uvd_cs_parse [radeon]] 
> > *ERROR* Failed waiting for UVD message (-1)!
> > 2/12/22 3:41 PM   starbug kernel  [drm:radeon_cs_ioctl [radeon]] 
> > *ERROR* Invalid command stream !
> > 2/12/22 3:41 PM   starbug kernel  [drm:radeon_uvd_cs_parse [radeon]] 
> > *ERROR* Failed waiting for UVD message (-1)!
> > 2/12/22 3:41 PM   starbug kernel  [drm:radeon_cs_ioctl [radeon]] 
> > *ERROR* Invalid command stream !
> >
> >
> > The problem doesn't occur in kernels of the 5.16 series.  It may have been 
> > introduced here:
> >
> >
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/diff/drivers/gpu/drm/radeon/radeon_uvd.c?id=v5.16&id2=v5.17-rc1
> >
> >
> > Thanks!
>
> Could somebody take a look into this? Or was this discussed somewhere
> else already? Or even fixed?

This is a fix on the bug report.

Alex


>
> Anyway, to get this tracked:
>
> #regzbot introduced: v5.16..v5.17-rc1
> #regzbot from:  Richard Herbert 
> #regzbot title: drm: radeon: no sound on video, *ERROR* Failed waiting
> for UVD message
> #regzbot link: https://bugzilla.kernel.org/show_bug.cgi?id=215600
>
> Ciao, Thorsten (wearing his 'the Linux kernel's regression tracker' hat)
>
> P.S.: As the Linux kernel's regression tracker I'm getting a lot of
> reports on my table. I can only look briefly into most of them and lack
> knowledge about most of the areas they concern. I thus unfortunately
> will sometimes get things wrong or miss something important. I hope
> that's not the case here; if you think it is, don't hesitate to tell me
> in a public reply, it's in everyone's interest to set the public record
> straight.
>
> --
> Additional information about regzbot:
>
> If you want to know more about regzbot, check out its web-interface, the
> getting start guide, and the references documentation:
>
> https://linux-regtracking.leemhuis.info/regzbot/
> https://gitlab.com/knurd42/regzbot/-/blob/main/docs/getting_started.md
> https://gitlab.com/knurd42/regzbot/-/blob/main/docs/reference.md
>
> The last two documents will explain how you can interact with regzbot
> yourself if your want to.
>
> Hint for reporters: when reporting a regression it's in your interest to
> CC the regression list and tell regzbot about the issue, as that ensures
> the regression makes it onto the radar of the Linux kernel's regression
> tracker -- that's in your interest, as it ensures your report won't fall
> through the cracks unnoticed.
>
> Hint for developers: you normally don't need to care about regzbot once
> it's involved. Fix the issue as you normally would, just remember to
> include 'Link:' tag in the patch descriptions pointing to all reports
> about the issue. This has been expected from developers even before
> regzbot showed up for reasons explained in
> 'Documentation/process/submitting-patches.rst' and
> 'Documentation/process/5.Posting.rst'.


Re: [PATCH] drm/radeon: fix variable type

2022-02-21 Thread Deucher, Alexander
[Public]

Add:
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215600
With that:
Reviewed-by: Alex Deucher 

From: amd-gfx  on behalf of Christian 
König 
Sent: Monday, February 21, 2022 6:05 AM
To: amd-gfx@lists.freedesktop.org 
Cc: Koenig, Christian 
Subject: [PATCH] drm/radeon: fix variable type

When we switch to dma_resv_wait_timeout() the returned type changes as
well.

Signed-off-by: Christian König 
Fixes: 89aae41d740f ("drm/radeon: use dma_resv_wait_timeout() instead of 
manually waiting")
---
 drivers/gpu/drm/radeon/radeon_uvd.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c 
b/drivers/gpu/drm/radeon/radeon_uvd.c
index 377f9cdb5b53..84013faa4756 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
+++ b/drivers/gpu/drm/radeon/radeon_uvd.c
@@ -470,8 +470,8 @@ static int radeon_uvd_cs_msg(struct radeon_cs_parser *p, 
struct radeon_bo *bo,
 int32_t *msg, msg_type, handle;
 unsigned img_size = 0;
 void *ptr;
-
-   int i, r;
+   long r;
+   int i;

 if (offset & 0x3F) {
 DRM_ERROR("UVD messages must be 64 byte aligned!\n");
@@ -481,13 +481,13 @@ static int radeon_uvd_cs_msg(struct radeon_cs_parser *p, 
struct radeon_bo *bo,
 r = dma_resv_wait_timeout(bo->tbo.base.resv, false, false,
   MAX_SCHEDULE_TIMEOUT);
 if (r <= 0) {
-   DRM_ERROR("Failed waiting for UVD message (%d)!\n", r);
+   DRM_ERROR("Failed waiting for UVD message (%ld)!\n", r);
 return r ? r : -ETIME;
 }

 r = radeon_bo_kmap(bo, &ptr);
 if (r) {
-   DRM_ERROR("Failed mapping the UVD message (%d)!\n", r);
+   DRM_ERROR("Failed mapping the UVD message (%ld)!\n", r);
 return r;
 }

--
2.25.1



Re: [PATCH] drm/sched: Add device pointer to drm_gpu_scheduler

2022-02-21 Thread kernel test robot
Hi Jiawei,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on drm-intel/for-linux-next drm-exynos/exynos-drm-next 
tegra-drm/drm/tegra/for-next v5.17-rc5 next-20220217]
[cannot apply to drm-tip/drm-tip]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Jiawei-Gu/drm-sched-Add-device-pointer-to-drm_gpu_scheduler/20220221-175818
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: ia64-allmodconfig 
(https://download.01.org/0day-ci/archive/20220221/202202212330.nxcvfwee-...@intel.com/config)
compiler: ia64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/0day-ci/linux/commit/9fdafca855faca0a3b8f213f024985c4112fa0bb
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Jiawei-Gu/drm-sched-Add-device-pointer-to-drm_gpu_scheduler/20220221-175818
git checkout 9fdafca855faca0a3b8f213f024985c4112fa0bb
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross 
O=build_dir ARCH=ia64 SHELL=/bin/bash drivers/gpu/drm/msm/ drivers/gpu/drm/v3d/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   drivers/gpu/drm/msm/msm_ringbuffer.c: In function 'msm_ringbuffer_new':
>> drivers/gpu/drm/msm/msm_ringbuffer.c:90:15: error: too few arguments to 
>> function 'drm_sched_init'
  90 | ret = drm_sched_init(&ring->sched, &msm_sched_ops,
 |   ^~
   In file included from drivers/gpu/drm/msm/msm_ringbuffer.h:10,
from drivers/gpu/drm/msm/msm_ringbuffer.c:7:
   include/drm/gpu_scheduler.h:463:5: note: declared here
 463 | int drm_sched_init(struct drm_gpu_scheduler *sched,
 | ^~
--
   In file included from drivers/gpu/drm/v3d/v3d_sched.c:23:
   drivers/gpu/drm/v3d/v3d_sched.c: In function 'v3d_sched_init':
>> drivers/gpu/drm/v3d/v3d_drv.h:158:26: error: implicit declaration of 
>> function 'to_platform_device' [-Werror=implicit-function-declaration]
 158 | #define v3d_to_pdev(v3d) to_platform_device((v3d)->drm.dev)
 |  ^~
   drivers/gpu/drm/v3d/v3d_sched.c:394:49: note: in expansion of macro 
'v3d_to_pdev'
 394 |  NULL, "v3d_bin", 
&(v3d_to_pdev(v3d)->dev));
 | ^~~
>> drivers/gpu/drm/v3d/v3d_sched.c:394:65: error: invalid type argument of '->' 
>> (have 'int')
 394 |  NULL, "v3d_bin", 
&(v3d_to_pdev(v3d)->dev));
 | ^~
   drivers/gpu/drm/v3d/v3d_sched.c:404:68: error: invalid type argument of '->' 
(have 'int')
 404 |  NULL, "v3d_render", 
&(v3d_to_pdev(v3d)->dev));
 |^~
   drivers/gpu/drm/v3d/v3d_sched.c:416:65: error: invalid type argument of '->' 
(have 'int')
 416 |  NULL, "v3d_tfu", 
&(v3d_to_pdev(v3d)->dev));
 | ^~
   drivers/gpu/drm/v3d/v3d_sched.c:429:73: error: invalid type argument of '->' 
(have 'int')
 429 |  NULL, "v3d_csd", 
&(v3d_to_pdev(v3d)->dev));
 |  
   ^~
   drivers/gpu/drm/v3d/v3d_sched.c:441:81: error: invalid type argument of '->' 
(have 'int')
 441 |  NULL, "v3d_cache_clean", 
&(v3d_to_pdev(v3d)->dev));
 |  
   ^~
   cc1: some warnings being treated as errors


vim +/drm_sched_init +90 drivers/gpu/drm/msm/msm_ringbuffer.c

1d8a5ca436ee4a Rob Clark 2021-07-27   47  
f97decac5f4c2d Jordan Crouse 2017-10-20   48  struct msm_ringbuffer 
*msm_ringbuffer_new(struct msm_gpu *gpu, int id,
f97decac5f4c2d Jordan Crouse 2017-10-20   49void *memptrs, uint64_t 
memptrs_iova)
7198e6b03155f6 Rob Clark 2013-07-19   50  {
7198e6b

Re: [PATCH] drm/sched: Add device pointer to drm_gpu_scheduler

2022-02-21 Thread kernel test robot
Hi Jiawei,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on drm-intel/for-linux-next drm-exynos/exynos-drm-next 
tegra-drm/drm/tegra/for-next v5.17-rc5 next-20220217]
[cannot apply to drm-tip/drm-tip airlied/drm-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Jiawei-Gu/drm-sched-Add-device-pointer-to-drm_gpu_scheduler/20220221-175818
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: hexagon-randconfig-r004-20220221 
(https://download.01.org/0day-ci/archive/20220222/202202220034.6c0uzu5e-...@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 
d271fc04d5b97b12e6b797c6067d3c96a8d7470e)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/0day-ci/linux/commit/9fdafca855faca0a3b8f213f024985c4112fa0bb
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Jiawei-Gu/drm-sched-Add-device-pointer-to-drm_gpu_scheduler/20220221-175818
git checkout 9fdafca855faca0a3b8f213f024985c4112fa0bb
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
O=build_dir ARCH=hexagon SHELL=/bin/bash drivers/gpu/drm/v3d/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/v3d/v3d_sched.c:394:28: error: implicit declaration of 
>> function 'to_platform_device' [-Werror,-Wimplicit-function-declaration]
NULL, "v3d_bin", &(v3d_to_pdev(v3d)->dev));
   ^
   drivers/gpu/drm/v3d/v3d_drv.h:158:26: note: expanded from macro 'v3d_to_pdev'
   #define v3d_to_pdev(v3d) to_platform_device((v3d)->drm.dev)
^
>> drivers/gpu/drm/v3d/v3d_sched.c:394:46: error: member reference type 'int' 
>> is not a pointer
NULL, "v3d_bin", &(v3d_to_pdev(v3d)->dev));
     ^
   drivers/gpu/drm/v3d/v3d_sched.c:404:49: error: member reference type 'int' 
is not a pointer
NULL, "v3d_render", &(v3d_to_pdev(v3d)->dev));
    ^
   drivers/gpu/drm/v3d/v3d_sched.c:416:46: error: member reference type 'int' 
is not a pointer
NULL, "v3d_tfu", &(v3d_to_pdev(v3d)->dev));
     ^
   drivers/gpu/drm/v3d/v3d_sched.c:429:47: error: member reference type 'int' 
is not a pointer
NULL, "v3d_csd", 
&(v3d_to_pdev(v3d)->dev));
     ^
   drivers/gpu/drm/v3d/v3d_sched.c:441:55: error: member reference type 'int' 
is not a pointer
NULL, "v3d_cache_clean", 
&(v3d_to_pdev(v3d)->dev));
   
  ^
   6 errors generated.


vim +/to_platform_device +394 drivers/gpu/drm/v3d/v3d_sched.c

   381  
   382  int
   383  v3d_sched_init(struct v3d_dev *v3d)
   384  {
   385  int hw_jobs_limit = 1;
   386  int job_hang_limit = 0;
   387  int hang_limit_ms = 500;
   388  int ret;
   389  
   390  ret = drm_sched_init(&v3d->queue[V3D_BIN].sched,
   391   &v3d_bin_sched_ops,
   392   hw_jobs_limit, job_hang_limit,
   393   msecs_to_jiffies(hang_limit_ms), NULL,
 > 394   NULL, "v3d_bin", &(v3d_to_pdev(v3d)->dev));
   395  if (ret) {
   396  dev_err(v3d->drm.dev, "Failed to create bin scheduler: 
%d.", ret);
   397  return ret;
   398  }
   399  
   400  ret = drm_sched_init(&v3d->queue[V3D_RENDER].sched,
   401   &v3d_render_sched_ops,
   402   hw_jobs_limit, job_hang_limit,
   403   msecs_to_jiffies(hang_limit_ms), NULL,
   404   NULL, "v3d_render", 
&(v3d_to_pdev(v3d)->dev));
   405  

[PATCH v13 1/5] drm: improve drm_buddy_alloc function

2022-02-21 Thread Arunpravin
- Make drm_buddy_alloc a single function to handle
  range allocation and non-range allocation demands

- Implemented a new function alloc_range() which allocates
  the requested power-of-two block comply with range limitations

- Moved order computation and memory alignment logic from
  i915 driver to drm buddy

v2:
  merged below changes to keep the build unbroken
   - drm_buddy_alloc_range() becomes obsolete and may be removed
   - enable ttm range allocation (fpfn / lpfn) support in i915 driver
   - apply enhanced drm_buddy_alloc() function to i915 driver

v3(Matthew Auld):
  - Fix alignment issues and remove unnecessary list_empty check
  - add more validation checks for input arguments
  - make alloc_range() block allocations as bottom-up
  - optimize order computation logic
  - replace uint64_t with u64, which is preferred in the kernel

v4(Matthew Auld):
  - keep drm_buddy_alloc_range() function implementation for generic
actual range allocations
  - keep alloc_range() implementation for end bias allocations

v5(Matthew Auld):
  - modify drm_buddy_alloc() passing argument place->lpfn to lpfn
as place->lpfn will currently always be zero for i915

v6(Matthew Auld):
  - fixup potential uaf - If we are unlucky and can't allocate
enough memory when splitting blocks, where we temporarily
end up with the given block and its buddy on the respective
free list, then we need to ensure we delete both blocks,
and no just the buddy, before potentially freeing them

  - fix warnings reported by kernel test robot 

v7(Matthew Auld):
  - revert fixup potential uaf
  - keep __alloc_range() add node to the list logic same as
drm_buddy_alloc_blocks() by having a temporary list variable
  - at drm_buddy_alloc_blocks() keep i915 range_overflows macro
and add a new check for end variable

v8:
  - fix warnings reported by kernel test robot 

v9(Matthew Auld):
  - remove DRM_BUDDY_RANGE_ALLOCATION flag
  - remove unnecessary function description

v10:
   - keep DRM_BUDDY_RANGE_ALLOCATION flag as removing the flag
 and replacing with (end < size) logic fails amdgpu driver load

Signed-off-by: Arunpravin 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/drm_buddy.c   | 292 +-
 drivers/gpu/drm/i915/i915_ttm_buddy_manager.c |  67 ++--
 drivers/gpu/drm/i915/i915_ttm_buddy_manager.h |   2 +
 include/drm/drm_buddy.h   |  13 +-
 4 files changed, 257 insertions(+), 117 deletions(-)

diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
index d60878bc9c20..1d801c88b286 100644
--- a/drivers/gpu/drm/drm_buddy.c
+++ b/drivers/gpu/drm/drm_buddy.c
@@ -282,23 +282,97 @@ void drm_buddy_free_list(struct drm_buddy *mm, struct 
list_head *objects)
 }
 EXPORT_SYMBOL(drm_buddy_free_list);
 
-/**
- * drm_buddy_alloc_blocks - allocate power-of-two blocks
- *
- * @mm: DRM buddy manager to allocate from
- * @order: size of the allocation
- *
- * The order value here translates to:
- *
- * 0 = 2^0 * mm->chunk_size
- * 1 = 2^1 * mm->chunk_size
- * 2 = 2^2 * mm->chunk_size
- *
- * Returns:
- * allocated ptr to the &drm_buddy_block on success
- */
-struct drm_buddy_block *
-drm_buddy_alloc_blocks(struct drm_buddy *mm, unsigned int order)
+static inline bool overlaps(u64 s1, u64 e1, u64 s2, u64 e2)
+{
+   return s1 <= e2 && e1 >= s2;
+}
+
+static inline bool contains(u64 s1, u64 e1, u64 s2, u64 e2)
+{
+   return s1 <= s2 && e1 >= e2;
+}
+
+static struct drm_buddy_block *
+alloc_range_bias(struct drm_buddy *mm,
+u64 start, u64 end,
+unsigned int order)
+{
+   struct drm_buddy_block *block;
+   struct drm_buddy_block *buddy;
+   LIST_HEAD(dfs);
+   int err;
+   int i;
+
+   end = end - 1;
+
+   for (i = 0; i < mm->n_roots; ++i)
+   list_add_tail(&mm->roots[i]->tmp_link, &dfs);
+
+   do {
+   u64 block_start;
+   u64 block_end;
+
+   block = list_first_entry_or_null(&dfs,
+struct drm_buddy_block,
+tmp_link);
+   if (!block)
+   break;
+
+   list_del(&block->tmp_link);
+
+   if (drm_buddy_block_order(block) < order)
+   continue;
+
+   block_start = drm_buddy_block_offset(block);
+   block_end = block_start + drm_buddy_block_size(mm, block) - 1;
+
+   if (!overlaps(start, end, block_start, block_end))
+   continue;
+
+   if (drm_buddy_block_is_allocated(block))
+   continue;
+
+   if (contains(start, end, block_start, block_end) &&
+   order == drm_buddy_block_order(block)) {
+   /*
+* Find the free block within the range.
+*/
+   if (drm_buddy_block_is_free(block))
+ 

[PATCH v13 3/5] drm: implement a method to free unused pages

2022-02-21 Thread Arunpravin
On contiguous allocation, we round up the size
to the *next* power of 2, implement a function
to free the unused pages after the newly allocate block.

v2(Matthew Auld):
  - replace function name 'drm_buddy_free_unused_pages' with
drm_buddy_block_trim
  - replace input argument name 'actual_size' with 'new_size'
  - add more validation checks for input arguments
  - add overlaps check to avoid needless searching and splitting
  - merged the below patch to see the feature in action
 - add free unused pages support to i915 driver
  - lock drm_buddy_block_trim() function as it calls mark_free/mark_split
are all globally visible

v3(Matthew Auld):
  - remove trim method error handling as we address the failure case
at drm_buddy_block_trim() function

v4:
  - in case of trim, at __alloc_range() split_block failure path
marks the block as free and removes it from the original list,
potentially also freeing it, to overcome this problem, we turn
the drm_buddy_block_trim() input node into a temporary node to
prevent recursively freeing itself, but still retain the
un-splitting/freeing of the other nodes(Matthew Auld)

  - modify the drm_buddy_block_trim() function return type

v5(Matthew Auld):
  - revert drm_buddy_block_trim() function return type changes in v4
  - modify drm_buddy_block_trim() passing argument n_pages to original_size
as n_pages has already been rounded up to the next power-of-two and
passing n_pages results noop

v6:
  - fix warnings reported by kernel test robot 

v7:
  - modify drm_buddy_block_trim() function doc description
  - at drm_buddy_block_trim() handle non-allocated block as
a serious programmer error
  - fix a typo

Signed-off-by: Arunpravin 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/drm_buddy.c   | 69 +++
 drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 10 +++
 include/drm/drm_buddy.h   |  4 ++
 3 files changed, 83 insertions(+)

diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
index 72ee3cd96a24..edef30be8304 100644
--- a/drivers/gpu/drm/drm_buddy.c
+++ b/drivers/gpu/drm/drm_buddy.c
@@ -525,6 +525,75 @@ static int __drm_buddy_alloc_range(struct drm_buddy *mm,
return __alloc_range(mm, &dfs, start, size, blocks);
 }
 
+/**
+ * drm_buddy_block_trim - free unused pages
+ *
+ * @mm: DRM buddy manager
+ * @new_size: original size requested
+ * @blocks: Input and output list of allocated blocks.
+ * MUST contain single block as input to be trimmed.
+ * On success will contain the newly allocated blocks
+ * making up the @new_size. Blocks always appear in
+ * ascending order
+ *
+ * For contiguous allocation, we round up the size to the nearest
+ * power of two value, drivers consume *actual* size, so remaining
+ * portions are unused and can be optionally freed with this function
+ *
+ * Returns:
+ * 0 on success, error code on failure.
+ */
+int drm_buddy_block_trim(struct drm_buddy *mm,
+u64 new_size,
+struct list_head *blocks)
+{
+   struct drm_buddy_block *parent;
+   struct drm_buddy_block *block;
+   LIST_HEAD(dfs);
+   u64 new_start;
+   int err;
+
+   if (!list_is_singular(blocks))
+   return -EINVAL;
+
+   block = list_first_entry(blocks,
+struct drm_buddy_block,
+link);
+
+   if (WARN_ON(!drm_buddy_block_is_allocated(block)))
+   return -EINVAL;
+
+   if (new_size > drm_buddy_block_size(mm, block))
+   return -EINVAL;
+
+   if (!new_size || !IS_ALIGNED(new_size, mm->chunk_size))
+   return -EINVAL;
+
+   if (new_size == drm_buddy_block_size(mm, block))
+   return 0;
+
+   list_del(&block->link);
+   mark_free(mm, block);
+   mm->avail += drm_buddy_block_size(mm, block);
+
+   /* Prevent recursively freeing this node */
+   parent = block->parent;
+   block->parent = NULL;
+
+   new_start = drm_buddy_block_offset(block);
+   list_add(&block->tmp_link, &dfs);
+   err =  __alloc_range(mm, &dfs, new_start, new_size, blocks);
+   if (err) {
+   mark_allocated(block);
+   mm->avail -= drm_buddy_block_size(mm, block);
+   list_add(&block->link, blocks);
+   }
+
+   block->parent = parent;
+   return err;
+}
+EXPORT_SYMBOL(drm_buddy_block_trim);
+
 /**
  * drm_buddy_alloc_blocks - allocate power-of-two blocks
  *
diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c 
b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
index 7f553cceb6c0..76d5211c25eb 100644
--- a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
+++ b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
@@ -97,6 +97,16 @@ static int i915_ttm_buddy_man_alloc(struct 
ttm_resource_manager *man,
if (unlikely(err))
goto err_free_blocks;
 
+   if (place->flags & TTM_PL_FLAG_CO

[PATCH v13 2/5] drm: implement top-down allocation method

2022-02-21 Thread Arunpravin
Implemented a function which walk through the order list,
compares the offset and returns the maximum offset block,
this method is unpredictable in obtaining the high range
address blocks which depends on allocation and deallocation.
for instance, if driver requests address at a low specific
range, allocator traverses from the root block and splits
the larger blocks until it reaches the specific block and
in the process of splitting, lower orders in the freelist
are occupied with low range address blocks and for the
subsequent TOPDOWN memory request we may return the low
range blocks.To overcome this issue, we may go with the
below approach.

The other approach, sorting each order list entries in
ascending order and compares the last entry of each
order list in the freelist and return the max block.
This creates sorting overhead on every drm_buddy_free()
request and split up of larger blocks for a single page
request.

v2:
  - Fix alignment issues(Matthew Auld)
  - Remove unnecessary list_empty check(Matthew Auld)
  - merged the below patch to see the feature in action
 - add top-down alloc support to i915 driver

Signed-off-by: Arunpravin 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/drm_buddy.c   | 36 ---
 drivers/gpu/drm/i915/i915_ttm_buddy_manager.c |  3 ++
 include/drm/drm_buddy.h   |  1 +
 3 files changed, 35 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
index 1d801c88b286..72ee3cd96a24 100644
--- a/drivers/gpu/drm/drm_buddy.c
+++ b/drivers/gpu/drm/drm_buddy.c
@@ -369,6 +369,26 @@ alloc_range_bias(struct drm_buddy *mm,
return ERR_PTR(err);
 }
 
+static struct drm_buddy_block *
+get_maxblock(struct list_head *head)
+{
+   struct drm_buddy_block *max_block = NULL, *node;
+
+   max_block = list_first_entry_or_null(head,
+struct drm_buddy_block,
+link);
+   if (!max_block)
+   return NULL;
+
+   list_for_each_entry(node, head, link) {
+   if (drm_buddy_block_offset(node) >
+   drm_buddy_block_offset(max_block))
+   max_block = node;
+   }
+
+   return max_block;
+}
+
 static struct drm_buddy_block *
 alloc_from_freelist(struct drm_buddy *mm,
unsigned int order,
@@ -379,11 +399,17 @@ alloc_from_freelist(struct drm_buddy *mm,
int err;
 
for (i = order; i <= mm->max_order; ++i) {
-   block = list_first_entry_or_null(&mm->free_list[i],
-struct drm_buddy_block,
-link);
-   if (block)
-   break;
+   if (flags & DRM_BUDDY_TOPDOWN_ALLOCATION) {
+   block = get_maxblock(&mm->free_list[i]);
+   if (block)
+   break;
+   } else {
+   block = list_first_entry_or_null(&mm->free_list[i],
+struct drm_buddy_block,
+link);
+   if (block)
+   break;
+   }
}
 
if (!block)
diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c 
b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
index a328a38fab07..7f553cceb6c0 100644
--- a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
+++ b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
@@ -53,6 +53,9 @@ static int i915_ttm_buddy_man_alloc(struct 
ttm_resource_manager *man,
INIT_LIST_HEAD(&bman_res->blocks);
bman_res->mm = mm;
 
+   if (place->flags & TTM_PL_FLAG_TOPDOWN)
+   bman_res->flags |= DRM_BUDDY_TOPDOWN_ALLOCATION;
+
if (place->fpfn || lpfn != man->size)
bman_res->flags |= DRM_BUDDY_RANGE_ALLOCATION;
 
diff --git a/include/drm/drm_buddy.h b/include/drm/drm_buddy.h
index 54f25a372f27..f0378fb48d06 100644
--- a/include/drm/drm_buddy.h
+++ b/include/drm/drm_buddy.h
@@ -23,6 +23,7 @@
 })
 
 #define DRM_BUDDY_RANGE_ALLOCATION (1 << 0)
+#define DRM_BUDDY_TOPDOWN_ALLOCATION (1 << 1)
 
 struct drm_buddy_block {
 #define DRM_BUDDY_HEADER_OFFSET GENMASK_ULL(63, 12)
-- 
2.25.1



[PATCH v13 4/5] drm/amdgpu: move vram inline functions into a header

2022-02-21 Thread Arunpravin
Move shared vram inline functions and structs
into a header file

Signed-off-by: Arunpravin 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 51 
 1 file changed, 51 insertions(+)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
new file mode 100644
index ..59983464cce5
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: MIT
+ * Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __AMDGPU_VRAM_MGR_H__
+#define __AMDGPU_VRAM_MGR_H__
+
+#include 
+
+struct amdgpu_vram_mgr_node {
+   struct ttm_resource base;
+   struct list_head blocks;
+   unsigned long flags;
+};
+
+static inline u64 amdgpu_node_start(struct drm_buddy_block *block)
+{
+   return drm_buddy_block_offset(block);
+}
+
+static inline u64 amdgpu_node_size(struct drm_buddy_block *block)
+{
+   return PAGE_SIZE << drm_buddy_block_order(block);
+}
+
+static inline struct amdgpu_vram_mgr_node *
+to_amdgpu_vram_mgr_node(struct ttm_resource *res)
+{
+   return container_of(res, struct amdgpu_vram_mgr_node, base);
+}
+
+#endif
-- 
2.25.1



[PATCH v13 5/5] drm/amdgpu: add drm buddy support to amdgpu

2022-02-21 Thread Arunpravin
- Remove drm_mm references and replace with drm buddy functionalities
- Add res cursor support for drm buddy

v2(Matthew Auld):
  - replace spinlock with mutex as we call kmem_cache_zalloc
(..., GFP_KERNEL) in drm_buddy_alloc() function

  - lock drm_buddy_block_trim() function as it calls
mark_free/mark_split are all globally visible

v3(Matthew Auld):
  - remove trim method error handling as we address the failure case
at drm_buddy_block_trim() function

v4:
  - fix warnings reported by kernel test robot 

v5:
  - fix merge conflict issue

v6:
  - fix warnings reported by kernel test robot 

v7:
  - remove DRM_BUDDY_RANGE_ALLOCATION flag usage

v8:
  - keep DRM_BUDDY_RANGE_ALLOCATION flag usage
  - resolve conflicts created by drm/amdgpu: remove VRAM accounting v2

Signed-off-by: Arunpravin 
---
 drivers/gpu/drm/Kconfig   |   1 +
 .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h|  97 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h   |   7 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c  | 256 ++
 4 files changed, 229 insertions(+), 132 deletions(-)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 763355330b17..019ec0440ced 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -279,6 +279,7 @@ config DRM_AMDGPU
select HWMON
select BACKLIGHT_CLASS_DEVICE
select INTERVAL_TREE
+   select DRM_BUDDY
help
  Choose this option if you have a recent AMD Radeon graphics card.
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index acfa207cf970..da12b4ff2e45 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -30,12 +30,15 @@
 #include 
 #include 
 
+#include "amdgpu_vram_mgr.h"
+
 /* state back for walking over vram_mgr and gtt_mgr allocations */
 struct amdgpu_res_cursor {
uint64_tstart;
uint64_tsize;
uint64_tremaining;
-   struct drm_mm_node  *node;
+   void*node;
+   uint32_tmem_type;
 };
 
 /**
@@ -52,27 +55,63 @@ static inline void amdgpu_res_first(struct ttm_resource 
*res,
uint64_t start, uint64_t size,
struct amdgpu_res_cursor *cur)
 {
+   struct drm_buddy_block *block;
+   struct list_head *head, *next;
struct drm_mm_node *node;
 
-   if (!res || res->mem_type == TTM_PL_SYSTEM) {
-   cur->start = start;
-   cur->size = size;
-   cur->remaining = size;
-   cur->node = NULL;
-   WARN_ON(res && start + size > res->num_pages << PAGE_SHIFT);
-   return;
-   }
+   if (!res)
+   goto err_out;
 
BUG_ON(start + size > res->num_pages << PAGE_SHIFT);
 
-   node = to_ttm_range_mgr_node(res)->mm_nodes;
-   while (start >= node->size << PAGE_SHIFT)
-   start -= node++->size << PAGE_SHIFT;
+   cur->mem_type = res->mem_type;
+
+   switch (cur->mem_type) {
+   case TTM_PL_VRAM:
+   head = &to_amdgpu_vram_mgr_node(res)->blocks;
+
+   block = list_first_entry_or_null(head,
+struct drm_buddy_block,
+link);
+   if (!block)
+   goto err_out;
+
+   while (start >= amdgpu_node_size(block)) {
+   start -= amdgpu_node_size(block);
+
+   next = block->link.next;
+   if (next != head)
+   block = list_entry(next, struct 
drm_buddy_block, link);
+   }
+
+   cur->start = amdgpu_node_start(block) + start;
+   cur->size = min(amdgpu_node_size(block) - start, size);
+   cur->remaining = size;
+   cur->node = block;
+   break;
+   case TTM_PL_TT:
+   node = to_ttm_range_mgr_node(res)->mm_nodes;
+   while (start >= node->size << PAGE_SHIFT)
+   start -= node++->size << PAGE_SHIFT;
+
+   cur->start = (node->start << PAGE_SHIFT) + start;
+   cur->size = min((node->size << PAGE_SHIFT) - start, size);
+   cur->remaining = size;
+   cur->node = node;
+   break;
+   default:
+   goto err_out;
+   }
 
-   cur->start = (node->start << PAGE_SHIFT) + start;
-   cur->size = min((node->size << PAGE_SHIFT) - start, size);
+   return;
+
+err_out:
+   cur->start = start;
+   cur->size = size;
cur->remaining = size;
-   cur->node = node;
+   cur->node = NULL;
+   WARN_ON(res && start + size > res->num_pages << PAGE_SHIFT);
+   return;
 }
 
 /**
@@ -85,7 +124,9 @@ static inli

Re: [PATCH] drm/sched: Add device pointer to drm_gpu_scheduler

2022-02-21 Thread kernel test robot
Hi Jiawei,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on drm-intel/for-linux-next drm-exynos/exynos-drm-next 
tegra-drm/drm/tegra/for-next v5.17-rc5 next-20220217]
[cannot apply to drm-tip/drm-tip]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Jiawei-Gu/drm-sched-Add-device-pointer-to-drm_gpu_scheduler/20220221-175818
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: hexagon-allmodconfig 
(https://download.01.org/0day-ci/archive/20220222/202202220108.kzxhno9i-...@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 
d271fc04d5b97b12e6b797c6067d3c96a8d7470e)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/0day-ci/linux/commit/9fdafca855faca0a3b8f213f024985c4112fa0bb
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Jiawei-Gu/drm-sched-Add-device-pointer-to-drm_gpu_scheduler/20220221-175818
git checkout 9fdafca855faca0a3b8f213f024985c4112fa0bb
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
O=build_dir ARCH=hexagon SHELL=/bin/bash drivers/gpu/drm/msm/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/msm/msm_ringbuffer.c:92:41: error: too few arguments to 
>> function call, expected 9, have 8
   NULL, NULL, to_msm_bo(ring->bo)->name);
^
   include/drm/gpu_scheduler.h:463:5: note: 'drm_sched_init' declared here
   int drm_sched_init(struct drm_gpu_scheduler *sched,
   ^
   1 error generated.


vim +92 drivers/gpu/drm/msm/msm_ringbuffer.c

1d8a5ca436ee4a Rob Clark 2021-07-27   47  
f97decac5f4c2d Jordan Crouse 2017-10-20   48  struct msm_ringbuffer 
*msm_ringbuffer_new(struct msm_gpu *gpu, int id,
f97decac5f4c2d Jordan Crouse 2017-10-20   49void *memptrs, uint64_t 
memptrs_iova)
7198e6b03155f6 Rob Clark 2013-07-19   50  {
7198e6b03155f6 Rob Clark 2013-07-19   51struct msm_ringbuffer *ring;
1d8a5ca436ee4a Rob Clark 2021-07-27   52long sched_timeout;
f97decac5f4c2d Jordan Crouse 2017-10-20   53char name[32];
7198e6b03155f6 Rob Clark 2013-07-19   54int ret;
7198e6b03155f6 Rob Clark 2013-07-19   55  
f97decac5f4c2d Jordan Crouse 2017-10-20   56/* We assume everwhere that 
MSM_GPU_RINGBUFFER_SZ is a power of 2 */
f97decac5f4c2d Jordan Crouse 2017-10-20   57
BUILD_BUG_ON(!is_power_of_2(MSM_GPU_RINGBUFFER_SZ));
7198e6b03155f6 Rob Clark 2013-07-19   58  
7198e6b03155f6 Rob Clark 2013-07-19   59ring = kzalloc(sizeof(*ring), 
GFP_KERNEL);
7198e6b03155f6 Rob Clark 2013-07-19   60if (!ring) {
7198e6b03155f6 Rob Clark 2013-07-19   61ret = -ENOMEM;
7198e6b03155f6 Rob Clark 2013-07-19   62goto fail;
7198e6b03155f6 Rob Clark 2013-07-19   63}
7198e6b03155f6 Rob Clark 2013-07-19   64  
7198e6b03155f6 Rob Clark 2013-07-19   65ring->gpu = gpu;
f97decac5f4c2d Jordan Crouse 2017-10-20   66ring->id = id;
84c6127580c1ce Jordan Crouse 2018-11-07   67  
f97decac5f4c2d Jordan Crouse 2017-10-20   68ring->start = 
msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ,
604234f33658cd Jordan Crouse 2020-09-03   69check_apriv(gpu, 
MSM_BO_WC | MSM_BO_GPU_READONLY),
604234f33658cd Jordan Crouse 2020-09-03   70gpu->aspace, &ring->bo, 
&ring->iova);
8223286d62e296 Jordan Crouse 2017-07-27   71  
69a834c28fb514 Rob Clark 2016-05-24   72if (IS_ERR(ring->start)) {
69a834c28fb514 Rob Clark 2016-05-24   73ret = 
PTR_ERR(ring->start);
375f9a63a66bae Rob Clark 2021-07-27   74ring->start = NULL;
69a834c28fb514 Rob Clark 2016-05-24   75goto fail;
69a834c28fb514 Rob Clark 2016-05-24   76}
0815d7749a6852 Jordan Crouse 2018-11-07   77  
0815d7749a6852 Jordan Crouse 2018-11-07   78
msm_gem_object_set_name(ring->bo, "ring%d", id);
0815d7749a6852 Jordan Crouse 2018-11-07   79  
f97decac5f4c2d Jordan Crouse 2017-10-20   80ring->end   = ring->start + 
(MSM_GPU_RINGBUFFER_SZ >> 2);
4c7085a5d581a5 Jordan Crouse 2017-10-20   81ring->next  = ring->start;
7198e6b03155f6 Rob Clark 2013-07-19   82ring->cur   = ring->start;
7198e6b03155f6 Rob Clark 2013-07-19   83  
f97decac5f4c2d Jorda

Re: [PATCH v9 1/2] drm/amdgpu: add debugfs for reset registers list

2022-02-21 Thread Somalapuram, Amaranath
[AMD Official Use Only]



On 2/21/2022 7:58 PM, Christian König wrote:
Am 21.02.22 um 15:19 schrieb Somalapuram, Amaranath:

[AMD Official Use Only]


On 2/21/2022 7:09 PM, Christian König wrote:


Am 21.02.22 um 14:34 schrieb Somalapuram Amaranath:

List of register populated for dump collection during the GPU reset.

Signed-off-by: Somalapuram Amaranath 

---
   drivers/gpu/drm/amd/amdgpu/amdgpu.h |  4 +
   drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 96 +
   2 files changed, 100 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b85b67a88a3d..6e35f2c4c869 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1097,6 +1097,10 @@ struct amdgpu_device {
 struct amdgpu_reset_control *reset_cntl;
   uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
+
+/* reset dump register */
+uint32_t*reset_dump_reg_list;
+int num_regs;
   };
 static inline struct amdgpu_device *drm_to_adev(struct drm_device
*ddev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 164d6a9e9fbb..69c0a28deeac 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1609,6 +1609,100 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
   DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
   amdgpu_debugfs_sclk_set, "%llu\n");
   +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
+char __user *buf, size_t size, loff_t *pos)
+{
+struct amdgpu_device *adev = (struct amdgpu_device
*)file_inode(f)->i_private;
+char reg_offset[11];
+int i, ret, len = 0;
+
+if (*pos)
+return 0;
+
+ret = down_read_killable(&adev->reset_sem);
+
+if (ret)
+return ret;
We usually don't have an empty line between function call and checking
the return code.


+
+for (i = 0; i < adev->num_regs; i++) {
+down_read(&adev->reset_sem);
That here will just crash because we have already locked the semaphore
before the loop.
unfortunately it did not crash. Sorry I misunderstood your earlier comments.

+sprintf(reg_offset, "0x%x ", adev->reset_dump_reg_list[i]);
+up_read(&adev->reset_sem);
+ret = copy_to_user(buf + len, reg_offset, strlen(reg_offset));
+
+if (ret)
+goto error;
+
+len += strlen(reg_offset);
And here the down_read_killable() is missing.


+}
+
+up_read(&adev->reset_sem);
+ret = copy_to_user(buf + len, "\n", 1);
+
+if (ret)
+return -EFAULT;
+
+len++;
+*pos += len;
+
+return len;
+error:
+up_read(&adev->reset_sem);
+return -EFAULT;
+}
+
+static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
+const char __user *buf, size_t size, loff_t *pos)
+{
+struct amdgpu_device *adev = (struct amdgpu_device
*)file_inode(f)->i_private;
+char *reg_offset, *reg, reg_temp[11];
+uint32_t *tmp;
+int ret, i = 0, len = 0;
+
+do {
+reg_offset = reg_temp;
I think you can just drop the reg_offset variable;
strsep takes only pointer as input, this is workaround.

Ah, now I see what you are doing here.

Please don't do it like that. Better use memchr() instead.

memchr will not work. I couldn't find any other string API I can use.

other references similar to code:
static void amdgpu_device_enable_virtual_display(struct amdgpu_device *adev)
{
adev->enable_virtual_display = false;

if (amdgpu_virtual_display) {
const char *pci_address_name = pci_name(adev->pdev);
char *pciaddstr, *pciaddstr_tmp, *pciaddname_tmp, *pciaddname;

pciaddstr = kstrdup(amdgpu_virtual_display, GFP_KERNEL);
pciaddstr_tmp = pciaddstr;
while ((pciaddname_tmp = strsep(&pciaddstr_tmp, ";"))) {
pciaddname = strsep(&pciaddname_tmp, ",");


+memset(reg_offset, 0, 11);
+ret = copy_from_user(reg_offset, buf + len, min(11,
((int)size-len)));
+
+if (ret)
+goto error_free;
+
+reg = strsep(®_offset, " ");
+tmp = krealloc_array(tmp, 1, sizeof(uint32_t), GFP_KERNEL);
That must be krealloc_array(tmp, i, ... not krealloc_array(tmp, 1, ... !
I thought it will append (if not it should have crashed or some kernel dump)

No, krealloc_array works similar to realloc() in userspace.

You need to give it the full size of the necessary space.

Regards,
Christian.


Regards,
Christian.


+ret = kstrtouint(reg, 16, &tmp[i]);
+
+if (ret)
+goto error_free;
+
+len += strlen(reg) + 1;
+i++;
+
+} while (len < size);
+
+ret = down_write_killable(&adev->reset_sem);
+
+if (ret)
+goto error_free;
+
+swap(adev->reset_dump_reg_list, tmp);
+adev->num_regs = i;
+up_write(&adev->reset_sem);
+   

Re: [PATCH 7/7] drm/amdgpu: drop testing module parameter

2022-02-21 Thread Michel Dänzer
On 2022-02-18 23:26, Alex Deucher wrote:
> This was always duplicate functionality with the benchmark tests.

Not really. The purpose of amdgpu_do_test_moves is testing that copies between 
GTT & VRAM work across the whole GTT aperture (when I originally wrote 
radeon_do_test_moves, they didn't on the PowerBook I was using at the time).


-- 
Earthling Michel Dänzer|  https://redhat.com
Libre software enthusiast  | Mesa and Xwayland developer


[PATCH] drm/amdgpu: fix printk format for size_t variable

2022-02-21 Thread trix
From: Tom Rix 

On mips64 allyesconfig, there is this build break
amdgpu_discovery.c:671:35: error: format '%ld' expects
  argument of type 'long int', but argument 4 has
  type 'size_t' {aka 'unsigned int'}
  DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);

For size_t, use %zu.

Fixes: a6c40b178092 ("drm/amdgpu: Show IP discovery in sysfs")
Signed-off-by: Tom Rix 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 7c7e28fd912e..58238f67b1d3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -668,7 +668,7 @@ static int amdgpu_discovery_sysfs_ips(struct amdgpu_device 
*adev,
le16_to_cpu(ip->hw_id) != ii)
goto next_ip;
 
-   DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);
+   DRM_DEBUG("match:%d @ ip_offset:%zu", ii, ip_offset);
 
/* We have a hw_id match; register the hw
 * block if not yet registered.
-- 
2.26.3



Re: [PATCH v12 1/5] drm: improve drm_buddy_alloc function

2022-02-21 Thread Arunpravin



On 16/02/22 1:37 pm, Arunpravin wrote:
> 
> 
> On 14/02/22 2:42 pm, Christian König wrote:
>>
>>
>> Am 14.02.22 um 09:36 schrieb Matthew Auld:
>>> On Mon, 14 Feb 2022 at 06:32, Christian König
>>>  wrote:
 Am 13.02.22 um 09:52 schrieb Arunpravin:
> - Make drm_buddy_alloc a single function to handle
> range allocation and non-range allocation demands
>
> - Implemented a new function alloc_range() which allocates
> the requested power-of-two block comply with range limitations
>
> - Moved order computation and memory alignment logic from
> i915 driver to drm buddy
>
> v2:
> merged below changes to keep the build unbroken
>  - drm_buddy_alloc_range() becomes obsolete and may be removed
>  - enable ttm range allocation (fpfn / lpfn) support in i915 driver
>  - apply enhanced drm_buddy_alloc() function to i915 driver
>
> v3(Matthew Auld):
> - Fix alignment issues and remove unnecessary list_empty check
> - add more validation checks for input arguments
> - make alloc_range() block allocations as bottom-up
> - optimize order computation logic
> - replace uint64_t with u64, which is preferred in the kernel
>
> v4(Matthew Auld):
> - keep drm_buddy_alloc_range() function implementation for generic
>   actual range allocations
> - keep alloc_range() implementation for end bias allocations
>
> v5(Matthew Auld):
> - modify drm_buddy_alloc() passing argument place->lpfn to lpfn
>   as place->lpfn will currently always be zero for i915
>
> v6(Matthew Auld):
> - fixup potential uaf - If we are unlucky and can't allocate
>   enough memory when splitting blocks, where we temporarily
>   end up with the given block and its buddy on the respective
>   free list, then we need to ensure we delete both blocks,
>   and no just the buddy, before potentially freeing them
>
> - fix warnings reported by kernel test robot 
>
> v7(Matthew Auld):
> - revert fixup potential uaf
> - keep __alloc_range() add node to the list logic same as
>   drm_buddy_alloc_blocks() by having a temporary list variable
> - at drm_buddy_alloc_blocks() keep i915 range_overflows macro
>   and add a new check for end variable
>
> v8:
> - fix warnings reported by kernel test robot 
>
> v9(Matthew Auld):
> - remove DRM_BUDDY_RANGE_ALLOCATION flag
> - remove unnecessary function description
>
> Signed-off-by: Arunpravin 
> Reviewed-by: Matthew Auld 
 As long as nobody objects I'm going to push patches 1-3 to drm-misc-next
 in the next hour or so:
>>> As part of this could you also push
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F99842%2F&data=04%7C01%7CArunpravin.PaneerSelvam%40amd.com%7Cc50a2b13b2a0425e596f08d9ef9a2d60%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637804268194961068%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=ENxu%2BSquLubBYLkNYV1SIUau1u7aZMdjz22izvv3FvM%3D&reserved=0
>>>  ?
>>
>> Sure, but Arun said in our internal chat that I should wait with that 
>> anyway since he wanted to sort out one more issue.
>>
>> Christian.
>>
> 
> working on 2 issues,
> 1. I think we need to keep DRM_BUDDY_RANGE_ALLOCATION flag, some corner
> case didnt allow amdgpu driver load
> 
> 2. rebasing the existing amdgpu_vram_mgr.c and resolving all conflicts
> as there are many changes merged in with the below patch
> - drm/amdgpu: remove VRAM accounting v2

Hi Christian,
I sent the v13 patches, selftest cases are passed.

Thanks,
Arun
>>>
 Then going to take a deeper look into patches 4 and 5 to get them reviewed.

 Thanks,
 Christian.

> ---
>drivers/gpu/drm/drm_buddy.c   | 292 +-
>drivers/gpu/drm/i915/i915_ttm_buddy_manager.c |  63 ++--
>drivers/gpu/drm/i915/i915_ttm_buddy_manager.h |   2 +
>include/drm/drm_buddy.h   |  11 +-
>4 files changed, 250 insertions(+), 118 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
> index d60878bc9c20..e0c0d786a572 100644
> --- a/drivers/gpu/drm/drm_buddy.c
> +++ b/drivers/gpu/drm/drm_buddy.c
> @@ -282,23 +282,97 @@ void drm_buddy_free_list(struct drm_buddy *mm, 
> struct list_head *objects)
>}
>EXPORT_SYMBOL(drm_buddy_free_list);
>
> -/**
> - * drm_buddy_alloc_blocks - allocate power-of-two blocks
> - *
> - * @mm: DRM buddy manager to allocate from
> - * @order: size of the allocation
> - *
> - * The order value here translates to:
> - *
> - * 0 = 2^0 * mm->chunk_size
> - * 1 = 2^1 * mm->chunk_size
> - * 2 = 2^2 * 

Re: [PATCH] drm/amd/display: add GTT domain support for dcn 3.1.5

2022-02-21 Thread Christian König




Am 21.02.22 um 15:27 schrieb Alex Deucher:

On Mon, Feb 21, 2022 at 5:15 AM Yifan Zhang  wrote:

From: "Tianci.Yin" 

this patch adds GTT domain support for dcn 3.1.5

Signed-off-by: Tianci.Yin 
Signed-off-by: Yifan Zhang 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 1 +
  1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 9709368b4915..88ee1224541c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -523,6 +523,7 @@ uint32_t amdgpu_display_supported_domains(struct 
amdgpu_device *adev,
 case IP_VERSION(3, 0, 1):
 case IP_VERSION(3, 1, 2):
 case IP_VERSION(3, 1, 3):
+   case IP_VERSION(3, 1, 5):

Should also add 3.1.6 as well?


I'm really wondering if that check shouldn't be something like >= 
IP_VERSION(3, 1, 0) instead.


Christian.



Alex



 domain |= AMDGPU_GEM_DOMAIN_GTT;
 break;
 default:
--
2.25.1





Re: [PATCH v13 1/5] drm: improve drm_buddy_alloc function

2022-02-21 Thread Christian König
Going to let that sit on the mailing list till tomorrow, if I don't get 
any objections till then I will push it to drm-misc-next.


Thanks,
Christian.

Am 21.02.22 um 17:45 schrieb Arunpravin:

- Make drm_buddy_alloc a single function to handle
   range allocation and non-range allocation demands

- Implemented a new function alloc_range() which allocates
   the requested power-of-two block comply with range limitations

- Moved order computation and memory alignment logic from
   i915 driver to drm buddy

v2:
   merged below changes to keep the build unbroken
- drm_buddy_alloc_range() becomes obsolete and may be removed
- enable ttm range allocation (fpfn / lpfn) support in i915 driver
- apply enhanced drm_buddy_alloc() function to i915 driver

v3(Matthew Auld):
   - Fix alignment issues and remove unnecessary list_empty check
   - add more validation checks for input arguments
   - make alloc_range() block allocations as bottom-up
   - optimize order computation logic
   - replace uint64_t with u64, which is preferred in the kernel

v4(Matthew Auld):
   - keep drm_buddy_alloc_range() function implementation for generic
 actual range allocations
   - keep alloc_range() implementation for end bias allocations

v5(Matthew Auld):
   - modify drm_buddy_alloc() passing argument place->lpfn to lpfn
 as place->lpfn will currently always be zero for i915

v6(Matthew Auld):
   - fixup potential uaf - If we are unlucky and can't allocate
 enough memory when splitting blocks, where we temporarily
 end up with the given block and its buddy on the respective
 free list, then we need to ensure we delete both blocks,
 and no just the buddy, before potentially freeing them

   - fix warnings reported by kernel test robot 

v7(Matthew Auld):
   - revert fixup potential uaf
   - keep __alloc_range() add node to the list logic same as
 drm_buddy_alloc_blocks() by having a temporary list variable
   - at drm_buddy_alloc_blocks() keep i915 range_overflows macro
 and add a new check for end variable

v8:
   - fix warnings reported by kernel test robot 

v9(Matthew Auld):
   - remove DRM_BUDDY_RANGE_ALLOCATION flag
   - remove unnecessary function description

v10:
- keep DRM_BUDDY_RANGE_ALLOCATION flag as removing the flag
  and replacing with (end < size) logic fails amdgpu driver load

Signed-off-by: Arunpravin 
Reviewed-by: Matthew Auld 
---
  drivers/gpu/drm/drm_buddy.c   | 292 +-
  drivers/gpu/drm/i915/i915_ttm_buddy_manager.c |  67 ++--
  drivers/gpu/drm/i915/i915_ttm_buddy_manager.h |   2 +
  include/drm/drm_buddy.h   |  13 +-
  4 files changed, 257 insertions(+), 117 deletions(-)

diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
index d60878bc9c20..1d801c88b286 100644
--- a/drivers/gpu/drm/drm_buddy.c
+++ b/drivers/gpu/drm/drm_buddy.c
@@ -282,23 +282,97 @@ void drm_buddy_free_list(struct drm_buddy *mm, struct 
list_head *objects)
  }
  EXPORT_SYMBOL(drm_buddy_free_list);
  
-/**

- * drm_buddy_alloc_blocks - allocate power-of-two blocks
- *
- * @mm: DRM buddy manager to allocate from
- * @order: size of the allocation
- *
- * The order value here translates to:
- *
- * 0 = 2^0 * mm->chunk_size
- * 1 = 2^1 * mm->chunk_size
- * 2 = 2^2 * mm->chunk_size
- *
- * Returns:
- * allocated ptr to the &drm_buddy_block on success
- */
-struct drm_buddy_block *
-drm_buddy_alloc_blocks(struct drm_buddy *mm, unsigned int order)
+static inline bool overlaps(u64 s1, u64 e1, u64 s2, u64 e2)
+{
+   return s1 <= e2 && e1 >= s2;
+}
+
+static inline bool contains(u64 s1, u64 e1, u64 s2, u64 e2)
+{
+   return s1 <= s2 && e1 >= e2;
+}
+
+static struct drm_buddy_block *
+alloc_range_bias(struct drm_buddy *mm,
+u64 start, u64 end,
+unsigned int order)
+{
+   struct drm_buddy_block *block;
+   struct drm_buddy_block *buddy;
+   LIST_HEAD(dfs);
+   int err;
+   int i;
+
+   end = end - 1;
+
+   for (i = 0; i < mm->n_roots; ++i)
+   list_add_tail(&mm->roots[i]->tmp_link, &dfs);
+
+   do {
+   u64 block_start;
+   u64 block_end;
+
+   block = list_first_entry_or_null(&dfs,
+struct drm_buddy_block,
+tmp_link);
+   if (!block)
+   break;
+
+   list_del(&block->tmp_link);
+
+   if (drm_buddy_block_order(block) < order)
+   continue;
+
+   block_start = drm_buddy_block_offset(block);
+   block_end = block_start + drm_buddy_block_size(mm, block) - 1;
+
+   if (!overlaps(start, end, block_start, block_end))
+   continue;
+
+   if (drm_buddy_block_is_allocated(block))
+   continue;
+
+   if (contains(start, end, block_start, block_end) &&
+ 

[PATCH 2/2] drm/amdgpu: derive GTT display support from DM

2022-02-21 Thread Alex Deucher
Rather than duplicating the logic in two places,
consolidate the logic in the display manager.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 30 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h  |  1 +
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  8 +
 3 files changed, 12 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index ec4c9ef5f795..1847cb92a98c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -506,33 +506,9 @@ uint32_t amdgpu_display_supported_domains(struct 
amdgpu_device *adev,
 */
if ((bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
amdgpu_bo_support_uswc(bo_flags) &&
-   amdgpu_device_asic_has_dc_support(adev->asic_type)) {
-   switch (adev->asic_type) {
-   case CHIP_CARRIZO:
-   case CHIP_STONEY:
-   domain |= AMDGPU_GEM_DOMAIN_GTT;
-   break;
-   default:
-   switch (adev->ip_versions[DCE_HWIP][0]) {
-   case IP_VERSION(1, 0, 0):
-   case IP_VERSION(1, 0, 1):
-   /* enable S/G on PCO and RV2 */
-   if ((adev->apu_flags & AMD_APU_IS_RAVEN2) ||
-   (adev->apu_flags & AMD_APU_IS_PICASSO))
-   domain |= AMDGPU_GEM_DOMAIN_GTT;
-   break;
-   case IP_VERSION(2, 1, 0):
-   case IP_VERSION(3, 0, 1):
-   case IP_VERSION(3, 1, 2):
-   case IP_VERSION(3, 1, 3):
-   domain |= AMDGPU_GEM_DOMAIN_GTT;
-   break;
-   default:
-   break;
-   }
-   break;
-   }
-   }
+   amdgpu_device_asic_has_dc_support(adev->asic_type) &&
+   adev->mode_info.gpu_vm_support)
+   domain |= AMDGPU_GEM_DOMAIN_GTT;
 #endif
 
return domain;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 902235fae4cd..a546cb3cfa18 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -341,6 +341,7 @@ struct amdgpu_mode_info {
int num_crtc; /* number of crtcs */
int num_hpd; /* number of hpd pins */
int num_dig; /* number of dig blocks */
+   boolgpu_vm_support; /* supports display from GTT */
int disp_priority;
const struct amdgpu_display_funcs *funcs;
const enum drm_plane_type *plane_type;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 306b321bb70d..d73ec30c5bb7 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1471,6 +1471,11 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
switch (adev->ip_versions[DCE_HWIP][0]) {
case IP_VERSION(1, 0, 0):
case IP_VERSION(1, 0, 1):
+   /* enable S/G on PCO and RV2 */
+   if ((adev->apu_flags & AMD_APU_IS_RAVEN2) ||
+   (adev->apu_flags & AMD_APU_IS_PICASSO))
+   init_data.flags.gpu_vm_support = true;
+   break;
case IP_VERSION(2, 1, 0):
case IP_VERSION(3, 0, 1):
case IP_VERSION(3, 1, 2):
@@ -1484,6 +1489,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
break;
}
 
+   if (init_data.flags.gpu_vm_support)
+   adev->mode_info.gpu_vm_support = true;
+
if (amdgpu_dc_feature_mask & DC_FBC_MASK)
init_data.flags.fbc_support = true;
 
-- 
2.35.1



[PATCH 1/2] drm/amdgpu/display: split dmcu and gpuvm handling logic

2022-02-21 Thread Alex Deucher
Separate the logic for each of these features to make the
code easier to understand and update in the future.

Signed-off-by: Alex Deucher 
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 +++
 1 file changed, 20 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 8cfe18b92c99..306b321bb70d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1443,6 +1443,25 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
 
init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
 
+   switch (adev->ip_versions[DCE_HWIP][0]) {
+   case IP_VERSION(2, 1, 0):
+   switch (adev->dm.dmcub_fw_version) {
+   case 0: /* development */
+   case 0x1: /* linux-firmware.git hash 6d9f399 */
+   case 0x0100: /* linux-firmware.git hash 9a0b0f4 */
+   init_data.flags.disable_dmcu = false;
+   break;
+   default:
+   init_data.flags.disable_dmcu = true;
+   }
+   break;
+   case IP_VERSION(2, 0, 3):
+   init_data.flags.disable_dmcu = true;
+   break;
+   default:
+   break;
+   }
+
switch (adev->asic_type) {
case CHIP_CARRIZO:
case CHIP_STONEY:
@@ -1450,29 +1469,15 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
break;
default:
switch (adev->ip_versions[DCE_HWIP][0]) {
-   case IP_VERSION(2, 1, 0):
-   init_data.flags.gpu_vm_support = true;
-   switch (adev->dm.dmcub_fw_version) {
-   case 0: /* development */
-   case 0x1: /* linux-firmware.git hash 6d9f399 */
-   case 0x0100: /* linux-firmware.git hash 9a0b0f4 */
-   init_data.flags.disable_dmcu = false;
-   break;
-   default:
-   init_data.flags.disable_dmcu = true;
-   }
-   break;
case IP_VERSION(1, 0, 0):
case IP_VERSION(1, 0, 1):
+   case IP_VERSION(2, 1, 0):
case IP_VERSION(3, 0, 1):
case IP_VERSION(3, 1, 2):
case IP_VERSION(3, 1, 3):
case IP_VERSION(3, 1, 5):
init_data.flags.gpu_vm_support = true;
break;
-   case IP_VERSION(2, 0, 3):
-   init_data.flags.disable_dmcu = true;
-   break;
default:
break;
}
-- 
2.35.1



Re: [PATCH] drm/amdgpu: fix printk format for size_t variable

2022-02-21 Thread Luben Tuikov
Hi Tom,

This was already fixed with this patch, and LKML was CC-ed. See the CC tags in 
the patch below,

commit 4f7d7cda90cbd7
Author: Luben Tuikov 
Date:   Wed Feb 16 16:47:32 2022 -0500

drm/amdgpu: Fix ARM compilation warning

Fix this ARM warning:

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:664:35: warning: format '%ld'
expects argument of type 'long int', but argument 4 has type 'size_t' {aka
'unsigned int'} [-Wformat=]

Cc: Alex Deucher 
Cc: kbuild-...@lists.01.org
Cc: linux-ker...@vger.kernel.org
Reported-by: kernel test robot 
Fixes: 7e60fbfbdc10a0 ("drm/amdgpu: Show IP discovery in sysfs")
Signed-off-by: Luben Tuikov 
Acked-by: Alex Deucher 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 2506bcf36c870c..6c7ec058125e1d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -668,7 +668,7 @@ static int amdgpu_discovery_sysfs_ips(struct amdgpu_device 
*adev,
le16_to_cpu(ip->hw_id) != ii)
goto next_ip;
 
-   DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);
+   DRM_DEBUG("match:%d @ ip_offset:%zu", ii, ip_offset);
 
/* We have a hw_id match; register the hw
 * block if not yet registered.

Regards,
Luben

On 2022-02-21 12:37, t...@redhat.com wrote:
> From: Tom Rix 
> 
> On mips64 allyesconfig, there is this build break
> amdgpu_discovery.c:671:35: error: format '%ld' expects
>   argument of type 'long int', but argument 4 has
>   type 'size_t' {aka 'unsigned int'}
>   DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);
> 
> For size_t, use %zu.
> 
> Fixes: a6c40b178092 ("drm/amdgpu: Show IP discovery in sysfs")
> Signed-off-by: Tom Rix 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> index 7c7e28fd912e..58238f67b1d3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> @@ -668,7 +668,7 @@ static int amdgpu_discovery_sysfs_ips(struct 
> amdgpu_device *adev,
>   le16_to_cpu(ip->hw_id) != ii)
>   goto next_ip;
>  
> - DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);
> + DRM_DEBUG("match:%d @ ip_offset:%zu", ii, ip_offset);
>  
>   /* We have a hw_id match; register the hw
>* block if not yet registered.

Regards,
-- 
Luben


Re: [PATCH] drm/amdgpu: fix printk format for size_t variable

2022-02-21 Thread Luben Tuikov
On 2022-02-21 15:36, Tom Rix wrote:
> 
> On 2/21/22 11:57 AM, Luben Tuikov wrote:
>> Hi Tom,
>>
>> This was already fixed with this patch, and LKML was CC-ed. See the CC tags 
>> in the patch below,
>>
>> commit 4f7d7cda90cbd7
>> Author: Luben Tuikov 
>> Date:   Wed Feb 16 16:47:32 2022 -0500
>>
>>  drm/amdgpu: Fix ARM compilation warning
>>  
>>  Fix this ARM warning:
> 
> I glad it wasn't just mips ;)
> 
> There have been a couple of build breaks with amdgpu recently.
> 
> Nick asked about adding clang to your ci.
> 
> Could at least one non x86_64 gcc also be added, maybe aarch64 ?

Yeah, that's a great idea. I tried the make.cross (for ARM) as per
the initial breakage report, but when I tried it, it got into a loop of
"make ARCH=arm mrproper" --> "make prepare" --> "make ARCH=arm mrproper" --> 
"make prepare" --> ...
and I couldn't figure out why.

I don't mind adding ARM cross compilation into my local setup.

Regards,
Luben


> 
> Tom
> 
>>  
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:664:35: warning: format 
>> '%ld'
>>  expects argument of type 'long int', but argument 4 has type 'size_t' 
>> {aka
>>  'unsigned int'} [-Wformat=]
>>  
>>  Cc: Alex Deucher 
>>  Cc: kbuild-...@lists.01.org
>>  Cc: linux-ker...@vger.kernel.org
>>  Reported-by: kernel test robot 
>>  Fixes: 7e60fbfbdc10a0 ("drm/amdgpu: Show IP discovery in sysfs")
>>  Signed-off-by: Luben Tuikov 
>>  Acked-by: Alex Deucher 
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
>> index 2506bcf36c870c..6c7ec058125e1d 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
>> @@ -668,7 +668,7 @@ static int amdgpu_discovery_sysfs_ips(struct 
>> amdgpu_device *adev,
>>  le16_to_cpu(ip->hw_id) != ii)
>>  goto next_ip;
>>   
>> -   DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);
>> +   DRM_DEBUG("match:%d @ ip_offset:%zu", ii, ip_offset);
>>   
>>  /* We have a hw_id match; register the hw
>>   * block if not yet registered.
>>
>> Regards,
>> Luben
>>
>> On 2022-02-21 12:37, t...@redhat.com wrote:
>>> From: Tom Rix 
>>>
>>> On mips64 allyesconfig, there is this build break
>>> amdgpu_discovery.c:671:35: error: format '%ld' expects
>>>argument of type 'long int', but argument 4 has
>>>type 'size_t' {aka 'unsigned int'}
>>>DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);
>>>
>>> For size_t, use %zu.
>>>
>>> Fixes: a6c40b178092 ("drm/amdgpu: Show IP discovery in sysfs")
>>> Signed-off-by: Tom Rix 
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
>>> index 7c7e28fd912e..58238f67b1d3 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
>>> @@ -668,7 +668,7 @@ static int amdgpu_discovery_sysfs_ips(struct 
>>> amdgpu_device *adev,
>>> le16_to_cpu(ip->hw_id) != ii)
>>> goto next_ip;
>>>   
>>> -   DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);
>>> +   DRM_DEBUG("match:%d @ ip_offset:%zu", ii, ip_offset);
>>>   
>>> /* We have a hw_id match; register the hw
>>>  * block if not yet registered.
>> Regards,
> 

Regards,
-- 
Luben


Re: [PATCH 7/7] drm/amdgpu: drop testing module parameter

2022-02-21 Thread Alex Deucher
On Mon, Feb 21, 2022 at 12:44 PM Michel Dänzer
 wrote:
>
> On 2022-02-18 23:26, Alex Deucher wrote:
> > This was always duplicate functionality with the benchmark tests.
>
> Not really. The purpose of amdgpu_do_test_moves is testing that copies 
> between GTT & VRAM work across the whole GTT aperture (when I originally 
> wrote radeon_do_test_moves, they didn't on the PowerBook I was using at the 
> time).
>

Fair enough.  I'll drop it for now.  Might be useful to convert to
debugfs at some point as well.

Alex

>
> --
> Earthling Michel Dänzer|  https://redhat.com
> Libre software enthusiast  | Mesa and Xwayland developer


Re: [PATCH] drm/amdgpu: fix printk format for size_t variable

2022-02-21 Thread Tom Rix



On 2/21/22 11:57 AM, Luben Tuikov wrote:

Hi Tom,

This was already fixed with this patch, and LKML was CC-ed. See the CC tags in 
the patch below,

commit 4f7d7cda90cbd7
Author: Luben Tuikov 
Date:   Wed Feb 16 16:47:32 2022 -0500

 drm/amdgpu: Fix ARM compilation warning
 
 Fix this ARM warning:


I glad it wasn't just mips ;)

There have been a couple of build breaks with amdgpu recently.

Nick asked about adding clang to your ci.

Could at least one non x86_64 gcc also be added, maybe aarch64 ?

Tom

 
 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:664:35: warning: format '%ld'

 expects argument of type 'long int', but argument 4 has type 'size_t' {aka
 'unsigned int'} [-Wformat=]
 
 Cc: Alex Deucher 

 Cc: kbuild-...@lists.01.org
 Cc: linux-ker...@vger.kernel.org
 Reported-by: kernel test robot 
 Fixes: 7e60fbfbdc10a0 ("drm/amdgpu: Show IP discovery in sysfs")
 Signed-off-by: Luben Tuikov 
 Acked-by: Alex Deucher 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 2506bcf36c870c..6c7ec058125e1d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -668,7 +668,7 @@ static int amdgpu_discovery_sysfs_ips(struct amdgpu_device 
*adev,
 le16_to_cpu(ip->hw_id) != ii)
 goto next_ip;
  
-   DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);

+   DRM_DEBUG("match:%d @ ip_offset:%zu", ii, ip_offset);
  
 /* We have a hw_id match; register the hw

  * block if not yet registered.

Regards,
Luben

On 2022-02-21 12:37, t...@redhat.com wrote:

From: Tom Rix 

On mips64 allyesconfig, there is this build break
amdgpu_discovery.c:671:35: error: format '%ld' expects
   argument of type 'long int', but argument 4 has
   type 'size_t' {aka 'unsigned int'}
   DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);

For size_t, use %zu.

Fixes: a6c40b178092 ("drm/amdgpu: Show IP discovery in sysfs")
Signed-off-by: Tom Rix 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 7c7e28fd912e..58238f67b1d3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -668,7 +668,7 @@ static int amdgpu_discovery_sysfs_ips(struct amdgpu_device 
*adev,
le16_to_cpu(ip->hw_id) != ii)
goto next_ip;
  
-			DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);

+   DRM_DEBUG("match:%d @ ip_offset:%zu", ii, ip_offset);
  
  			/* We have a hw_id match; register the hw

 * block if not yet registered.

Regards,




Re: [PATCH] drm/amdgpu: fix printk format for size_t variable

2022-02-21 Thread Tom Rix



On 2/21/22 12:53 PM, Luben Tuikov wrote:

On 2022-02-21 15:36, Tom Rix wrote:

On 2/21/22 11:57 AM, Luben Tuikov wrote:

Hi Tom,

This was already fixed with this patch, and LKML was CC-ed. See the CC tags in 
the patch below,

commit 4f7d7cda90cbd7
Author: Luben Tuikov 
Date:   Wed Feb 16 16:47:32 2022 -0500

  drm/amdgpu: Fix ARM compilation warning
  
  Fix this ARM warning:

I glad it wasn't just mips ;)

There have been a couple of build breaks with amdgpu recently.

Nick asked about adding clang to your ci.

Could at least one non x86_64 gcc also be added, maybe aarch64 ?

Yeah, that's a great idea. I tried the make.cross (for ARM) as per
the initial breakage report, but when I tried it, it got into a loop of
"make ARCH=arm mrproper" --> "make prepare" --> "make ARCH=arm mrproper" --> "make 
prepare" --> ...
and I couldn't figure out why.

Maybe need to set CROSS_COMPILE ?

I don't mind adding ARM cross compilation into my local setup.


For crosses, I generate a 'make' script like

#!/bin/sh

export PATH=/bin:$PATH

make ARCH=arm64 CROSS_COMPILE=aarch64-elf- $@

so workflow looks like normal, replacing make with ./make

Tom



Regards,
Luben



Tom

  
  drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:664:35: warning: format '%ld'

  expects argument of type 'long int', but argument 4 has type 'size_t' {aka
  'unsigned int'} [-Wformat=]
  
  Cc: Alex Deucher 

  Cc: kbuild-...@lists.01.org
  Cc: linux-ker...@vger.kernel.org
  Reported-by: kernel test robot 
  Fixes: 7e60fbfbdc10a0 ("drm/amdgpu: Show IP discovery in sysfs")
  Signed-off-by: Luben Tuikov 
  Acked-by: Alex Deucher 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 2506bcf36c870c..6c7ec058125e1d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -668,7 +668,7 @@ static int amdgpu_discovery_sysfs_ips(struct amdgpu_device 
*adev,
  le16_to_cpu(ip->hw_id) != ii)
  goto next_ip;
   
-   DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);

+   DRM_DEBUG("match:%d @ ip_offset:%zu", ii, ip_offset);
   
  /* We have a hw_id match; register the hw

   * block if not yet registered.

Regards,
Luben

On 2022-02-21 12:37, t...@redhat.com wrote:

From: Tom Rix 

On mips64 allyesconfig, there is this build break
amdgpu_discovery.c:671:35: error: format '%ld' expects
argument of type 'long int', but argument 4 has
type 'size_t' {aka 'unsigned int'}
DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);

For size_t, use %zu.

Fixes: a6c40b178092 ("drm/amdgpu: Show IP discovery in sysfs")
Signed-off-by: Tom Rix 
---
   drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 7c7e28fd912e..58238f67b1d3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -668,7 +668,7 @@ static int amdgpu_discovery_sysfs_ips(struct amdgpu_device 
*adev,
le16_to_cpu(ip->hw_id) != ii)
goto next_ip;
   
-			DRM_DEBUG("match:%d @ ip_offset:%ld", ii, ip_offset);

+   DRM_DEBUG("match:%d @ ip_offset:%zu", ii, ip_offset);
   
   			/* We have a hw_id match; register the hw

 * block if not yet registered.

Regards,

Regards,




[PATCH] drm/amdgpu/test: convert amdgpu_test.c to use dev_info

2022-02-21 Thread Alex Deucher
Rather than the old DRM_INFO/ERROR macros.  This makes it
easier to differentiate the output when there are multiple
GPUs in a system.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c | 69 
 1 file changed, 35 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
index 909d830b513e..2c212b740a17 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
@@ -51,7 +51,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
 
gtt_obj = kcalloc(n, sizeof(*gtt_obj), GFP_KERNEL);
if (!gtt_obj) {
-   DRM_ERROR("Failed to allocate %d pointers\n", n);
+   dev_info(adev->dev, "Failed to allocate %d pointers\n", n);
r = 1;
goto out_cleanup;
}
@@ -66,7 +66,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
 
r = amdgpu_bo_create(adev, &bp, &vram_obj);
if (r) {
-   DRM_ERROR("Failed to create VRAM object\n");
+   dev_info(adev->dev, "Failed to create VRAM object\n");
goto out_cleanup;
}
r = amdgpu_bo_reserve(vram_obj, false);
@@ -74,7 +74,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
goto out_unref;
r = amdgpu_bo_pin(vram_obj, AMDGPU_GEM_DOMAIN_VRAM);
if (r) {
-   DRM_ERROR("Failed to pin VRAM object\n");
+   dev_info(adev->dev, "Failed to pin VRAM object\n");
goto out_unres;
}
vram_addr = amdgpu_bo_gpu_offset(vram_obj);
@@ -87,7 +87,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
bp.domain = AMDGPU_GEM_DOMAIN_GTT;
r = amdgpu_bo_create(adev, &bp, gtt_obj + i);
if (r) {
-   DRM_ERROR("Failed to create GTT object %d\n", i);
+   dev_info(adev->dev, "Failed to create GTT object %d\n", 
i);
goto out_lclean;
}
 
@@ -96,19 +96,19 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
goto out_lclean_unref;
r = amdgpu_bo_pin(gtt_obj[i], AMDGPU_GEM_DOMAIN_GTT);
if (r) {
-   DRM_ERROR("Failed to pin GTT object %d\n", i);
+   dev_info(adev->dev, "Failed to pin GTT object %d\n", i);
goto out_lclean_unres;
}
r = amdgpu_ttm_alloc_gart(>t_obj[i]->tbo);
if (r) {
-   DRM_ERROR("%p bind failed\n", gtt_obj[i]);
+   dev_info(adev->dev, "%p bind failed\n", gtt_obj[i]);
goto out_lclean_unpin;
}
gart_addr = amdgpu_bo_gpu_offset(gtt_obj[i]);
 
r = amdgpu_bo_kmap(gtt_obj[i], >t_map);
if (r) {
-   DRM_ERROR("Failed to map GTT object %d\n", i);
+   dev_info(adev->dev, "Failed to map GTT object %d\n", i);
goto out_lclean_unpin;
}
 
@@ -123,13 +123,13 @@ static void amdgpu_do_test_moves(struct amdgpu_device 
*adev)
   size, NULL, &fence, false, false, false);
 
if (r) {
-   DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
+   dev_info(adev->dev, "Failed GTT->VRAM copy %d\n", i);
goto out_lclean_unpin;
}
 
r = dma_fence_wait(fence, false);
if (r) {
-   DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
+   dev_info(adev->dev, "Failed to wait for GTT->VRAM fence 
%d\n", i);
goto out_lclean_unpin;
}
 
@@ -138,7 +138,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
 
r = amdgpu_bo_kmap(vram_obj, &vram_map);
if (r) {
-   DRM_ERROR("Failed to map VRAM object after copy %d\n", 
i);
+   dev_info(adev->dev, "Failed to map VRAM object after 
copy %d\n", i);
goto out_lclean_unpin;
}
 
@@ -147,16 +147,16 @@ static void amdgpu_do_test_moves(struct amdgpu_device 
*adev)
 vram_start < vram_end;
 gart_start++, vram_start++) {
if (*vram_start != gart_start) {
-   DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 
0x%p, "
- "expected 0x%p (GTT/VRAM offset "
- "0x%16llx/0x%16llx)\n",
- i, *vram_start, gart_start,
- (unsigned long long)
- (gart_addr - ad

[PATCH 1/2] drm/amdgpu: use kernel BO API for benchmark buffer management

2022-02-21 Thread Alex Deucher
Simplifies the code quite a bit.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 78 ---
 1 file changed, 17 insertions(+), 61 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
index 4f3cdd8cfb6a..92a2ffefe62e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
@@ -75,57 +75,25 @@ static int amdgpu_benchmark_move(struct amdgpu_device 
*adev, unsigned size,
 {
struct amdgpu_bo *dobj = NULL;
struct amdgpu_bo *sobj = NULL;
-   struct amdgpu_bo_param bp;
uint64_t saddr, daddr;
int r, n;
 
-   memset(&bp, 0, sizeof(bp));
-   bp.size = size;
-   bp.byte_align = PAGE_SIZE;
-   bp.domain = sdomain;
-   bp.flags = 0;
-   bp.type = ttm_bo_type_kernel;
-   bp.resv = NULL;
-   bp.bo_ptr_size = sizeof(struct amdgpu_bo);
-
n = AMDGPU_BENCHMARK_ITERATIONS;
-   r = amdgpu_bo_create(adev, &bp, &sobj);
-   if (r) {
-   goto out_cleanup;
-   }
-   r = amdgpu_bo_reserve(sobj, false);
-   if (unlikely(r != 0))
-   goto out_cleanup;
-   r = amdgpu_bo_pin(sobj, sdomain);
-   if (r) {
-   amdgpu_bo_unreserve(sobj);
-   goto out_cleanup;
-   }
-   r = amdgpu_ttm_alloc_gart(&sobj->tbo);
-   amdgpu_bo_unreserve(sobj);
-   if (r) {
-   goto out_cleanup;
-   }
-   saddr = amdgpu_bo_gpu_offset(sobj);
-   bp.domain = ddomain;
-   r = amdgpu_bo_create(adev, &bp, &dobj);
-   if (r) {
-   goto out_cleanup;
-   }
-   r = amdgpu_bo_reserve(dobj, false);
-   if (unlikely(r != 0))
+
+   r = amdgpu_bo_create_kernel(adev, size,
+   PAGE_SIZE, sdomain,
+   &sobj,
+   &saddr,
+   NULL);
+   if (r)
goto out_cleanup;
-   r = amdgpu_bo_pin(dobj, ddomain);
-   if (r) {
-   amdgpu_bo_unreserve(sobj);
+   r = amdgpu_bo_create_kernel(adev, size,
+   PAGE_SIZE, ddomain,
+   &dobj,
+   &daddr,
+   NULL);
+   if (r)
goto out_cleanup;
-   }
-   r = amdgpu_ttm_alloc_gart(&dobj->tbo);
-   amdgpu_bo_unreserve(dobj);
-   if (r) {
-   goto out_cleanup;
-   }
-   daddr = amdgpu_bo_gpu_offset(dobj);
 
if (adev->mman.buffer_funcs) {
r = amdgpu_benchmark_do_move(adev, size, saddr, daddr, n);
@@ -141,22 +109,10 @@ static int amdgpu_benchmark_move(struct amdgpu_device 
*adev, unsigned size,
if (r < 0)
dev_info(adev->dev, "Error while benchmarking BO move.\n");
 
-   if (sobj) {
-   r = amdgpu_bo_reserve(sobj, true);
-   if (likely(r == 0)) {
-   amdgpu_bo_unpin(sobj);
-   amdgpu_bo_unreserve(sobj);
-   }
-   amdgpu_bo_unref(&sobj);
-   }
-   if (dobj) {
-   r = amdgpu_bo_reserve(dobj, true);
-   if (likely(r == 0)) {
-   amdgpu_bo_unpin(dobj);
-   amdgpu_bo_unreserve(dobj);
-   }
-   amdgpu_bo_unref(&dobj);
-   }
+   if (sobj)
+   amdgpu_bo_free_kernel(&sobj, &saddr, NULL);
+   if (dobj)
+   amdgpu_bo_free_kernel(&dobj, &daddr, NULL);
return r;
 }
 
-- 
2.35.1



[PATCH 2/2] drm/amdgpu: use ktime rather than jiffies for benchmark results

2022-02-21 Thread Alex Deucher
To protect against wraparounds.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 31 ++-
 1 file changed, 17 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
index 92a2ffefe62e..3136a9ad2d54 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
@@ -29,14 +29,13 @@
 #define AMDGPU_BENCHMARK_COMMON_MODES_N 17
 
 static int amdgpu_benchmark_do_move(struct amdgpu_device *adev, unsigned size,
-   uint64_t saddr, uint64_t daddr, int n)
+   uint64_t saddr, uint64_t daddr, int n, s64 
*time_ms)
 {
-   unsigned long start_jiffies;
-   unsigned long end_jiffies;
+   ktime_t stime, etime;
struct dma_fence *fence;
int i, r;
 
-   start_jiffies = jiffies;
+   stime = ktime_get();
for (i = 0; i < n; i++) {
struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
r = amdgpu_copy_buffer(ring, saddr, daddr, size, NULL, &fence,
@@ -48,25 +47,28 @@ static int amdgpu_benchmark_do_move(struct amdgpu_device 
*adev, unsigned size,
if (r)
goto exit_do_move;
}
-   end_jiffies = jiffies;
-   r = jiffies_to_msecs(end_jiffies - start_jiffies);
 
 exit_do_move:
+   etime = ktime_get();
+   *time_ms = ktime_ms_delta(etime, stime);
+
return r;
 }
 
 
 static void amdgpu_benchmark_log_results(struct amdgpu_device *adev,
 int n, unsigned size,
-unsigned int time,
+s64 time_ms,
 unsigned sdomain, unsigned ddomain,
 char *kind)
 {
-   unsigned int throughput = (n * (size >> 10)) / time;
+   s64 throughput = (n * (size >> 10));
+
+   throughput = div64_s64(throughput, time_ms);
 
dev_info(adev->dev, "amdgpu: %s %u bo moves of %u kB from"
-" %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
-kind, n, size >> 10, sdomain, ddomain, time,
+" %d to %d in %lld ms, throughput: %lld Mb/s or %lld MB/s\n",
+kind, n, size >> 10, sdomain, ddomain, time_ms,
 throughput * 8, throughput);
 }
 
@@ -76,6 +78,7 @@ static int amdgpu_benchmark_move(struct amdgpu_device *adev, 
unsigned size,
struct amdgpu_bo *dobj = NULL;
struct amdgpu_bo *sobj = NULL;
uint64_t saddr, daddr;
+   s64 time_ms;
int r, n;
 
n = AMDGPU_BENCHMARK_ITERATIONS;
@@ -96,11 +99,11 @@ static int amdgpu_benchmark_move(struct amdgpu_device 
*adev, unsigned size,
goto out_cleanup;
 
if (adev->mman.buffer_funcs) {
-   r = amdgpu_benchmark_do_move(adev, size, saddr, daddr, n);
-   if (r < 0)
+   r = amdgpu_benchmark_do_move(adev, size, saddr, daddr, n, 
&time_ms);
+   if (r)
goto out_cleanup;
-   if (r > 0)
-   amdgpu_benchmark_log_results(adev, n, size, r,
+   else
+   amdgpu_benchmark_log_results(adev, n, size, time_ms,
 sdomain, ddomain, "dma");
}
 
-- 
2.35.1



Re: [PATCH] drm/amdgpu: Fix typo in *whether* in comment

2022-02-21 Thread Alex Deucher
Applied.  Thanks!

On Fri, Feb 18, 2022 at 11:56 PM Paul Menzel  wrote:
>
> Signed-off-by: Paul Menzel 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 63a089992645..430e56583751 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -740,7 +740,7 @@ MODULE_PARM_DESC(debug_largebar,
>   * systems with a broken CRAT table.
>   *
>   * Default is auto (according to asic type, iommu_v2, and crat table, to 
> decide
> - * whehter use CRAT)
> + * whether use CRAT)
>   */
>  int ignore_crat;
>  module_param(ignore_crat, int, 0444);
> --
> 2.35.1
>


Re: [PATCH] drm/amdkfd: make CRAT table missing message informational only

2022-02-21 Thread Alex Deucher
On Fri, Feb 18, 2022 at 11:25 PM Paul Menzel  wrote:
>
> Dear Alex,
>
>
> Thank you for the patch.
>
> Am 18.02.22 um 21:42 schrieb Alex Deucher:
> > The driver has a fallback, to make the message informational
>
> s/to/so/?

fixed up locally.

>
> > rather than a warning.
>
> Maybe extend it a little?

Done.

>
> Component Resource Association Table (CRAT) are only applicable on some
> AMD APUs. The message is perfectly expected. Even on AMD APUs we can now
> fall back to treating it like a dGPU when the CRAT table is missing.
>
> > Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1906
> > Signed-off-by: Alex Deucher 
> > ---
> >   drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c 
> > b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> > index 24898238b024..1eaabd2cb41b 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> > @@ -1569,7 +1569,7 @@ int kfd_create_crat_image_acpi(void **crat_image, 
> > size_t *size)
> >   /* Fetch the CRAT table from ACPI */
> >   status = acpi_get_table(CRAT_SIGNATURE, 0, &crat_table);
> >   if (status == AE_NOT_FOUND) {
> > - pr_warn("CRAT table not found\n");
> > + pr_info("CRAT table not found\n");
>
> Maybe make it even a debug message, or only print it, when a
> corresponding AMD APU is found like in `kfd_is_acpi_crat_invalid()`?
> Especially since Linux logs
>
>  amdgpu: Virtual CRAT table created for CPU
>
>  later on.
>

I think it's still valid so you know that no CRAT table was found on
the platform.  @Kuehling, Felix any opinion?

Alex

> >   return -ENODATA;
> >   } else if (ACPI_FAILURE(status)) {
> >   const char *err = acpi_format_exception(status);
>
>
> Kind regards,
>
> Paul


[PATCH] drm/amdgpu: config HDP_MISC_CNTL.READ_BUFFER_WATERMARK to fix applications running across multiple GPU config hang.

2022-02-21 Thread Xiaogang . Chen
From: Xiaogang Chen 

Signed-off-by: Xiaogang Chen 
---
 drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c  | 1 +
 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
index d7811e0327cb..aa2c7c3f721f 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
@@ -145,6 +145,7 @@ static void hdp_v4_0_init_registers(struct amdgpu_device 
*adev)
}
 
WREG32_FIELD15(HDP, 0, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 1);
+   WREG32_FIELD15(HDP, 0, HDP_MISC_CNTL, READ_BUFFER_WATERMARK, 2);
 
WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 
8));
WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 
40));
diff --git a/drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h 
b/drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h
index 25e28691d62d..65c91b0102e4 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h
@@ -104,6 +104,7 @@
 #define HDP_MISC_CNTL__OUTSTANDING_WRITE_COUNT_1024__SHIFT 0x5
 #define HDP_MISC_CNTL__MULTIPLE_READS__SHIFT   0x6
 #define HDP_MISC_CNTL__SIMULTANEOUS_READS_WRITES__SHIFT0xb
+#define HDP_MISC_CNTL__READ_BUFFER_WATERMARK__SHIFT 0xe
 #define HDP_MISC_CNTL__FED_ENABLE__SHIFT   0x15
 #define HDP_MISC_CNTL__SYSHUB_CHANNEL_PRIORITY__SHIFT  0x17
 #define HDP_MISC_CNTL__MMHUB_WRBURST_ENABLE__SHIFT 0x18
@@ -118,6 +119,7 @@
 #define HDP_MISC_CNTL__OUTSTANDING_WRITE_COUNT_1024_MASK   0x0020L
 #define HDP_MISC_CNTL__MULTIPLE_READS_MASK 0x0040L
 #define HDP_MISC_CNTL__SIMULTANEOUS_READS_WRITES_MASK  0x0800L
+#define HDP_MISC_CNTL__READ_BUFFER_WATERMARK_MASK   0xc000L
 #define HDP_MISC_CNTL__FED_ENABLE_MASK 0x0020L
 #define HDP_MISC_CNTL__SYSHUB_CHANNEL_PRIORITY_MASK0x0080L
 #define HDP_MISC_CNTL__MMHUB_WRBURST_ENABLE_MASK   0x0100L
-- 
2.25.1



2022 X.Org Board of Directors Elections Nomination period is NOW

2022-02-21 Thread Lyude Paul
We are seeking nominations for candidates for election to the X.Org Foundation
Board of Directors. All X.Org Foundation members are eligible for election to
the board.

Nominations for the 2022 election are now open and will remain open until
23:59 UTC on 06 March 2022.

The Board consists of directors elected from the membership. Each year, an
election is held to bring the total number of directors to eight. The four
members receiving the highest vote totals will serve as directors for two year
terms.

The directors who received two year terms starting in 2021 were Lyude Paul,
Samuel Iglesias Gonsálvez, Manasi D Navare and Daniel Vetter. They will
continue to serve until their term ends in 2023. Current directors whose term
expires in 2022 are Emma Anholt, Keith Packard, Harry Wentland and Mark
Filion.

A director is expected to participate in the fortnightly IRC meeting to
discuss current business and to attend the annual meeting of the X.Org
Foundation, which will be held at a location determined in advance by the
Board of Directors.

A member may nominate themselves or any other member they feel is qualified.
Nominations should be sent to the Election Committee at elections at x.org.

Nominees shall be required to be current members of the X.Org Foundation, and
submit a personal statement of up to 200 words that will be provided to
prospective voters. The collected statements, along with the statement of
contribution to the X.Org Foundation in the member's account page on
http://members.x.org, will be made available to all voters to help them make
their voting decisions.

Nominations, membership applications or renewals and completed personal
statements must be received no later than 23:59 UTC on 6th March 2022.

The slate of candidates will be published 14 March 2022 and candidate Q&A will
begin then. The deadline for Xorg membership applications and renewals is 17
March 2022.

Cheers, Lyude Paul, on behalf of the X.Org BoD




RE: [PATCH] drm/amd/pm: new v3 SmuMetrics data structure for Sienna Cichlid

2022-02-21 Thread Quan, Evan
[AMD Official Use Only]

Acked-by: Evan Quan 

> -Original Message-
> From: amd-gfx  On Behalf Of
> Danijel Slivka
> Sent: Friday, February 18, 2022 8:36 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Slivka, Danijel 
> Subject: [PATCH] drm/amd/pm: new v3 SmuMetrics data structure for
> Sienna Cichlid
> 
> structure changed in smc_fw_version >= 0x3A4900,
> "uint16_t VcnActivityPercentage" replaced with
> "uint16_t VcnUsagePercentage0" and "uint16_t VcnUsagePercentage1"
> 
> Signed-off-by: Danijel Slivka 
> ---
>  .../pmfw_if/smu11_driver_if_sienna_cichlid.h  |  58 ++
>  .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c   | 181 --
>  2 files changed, 178 insertions(+), 61 deletions(-)
> 
> diff --git
> a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_
> cichlid.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_
> cichlid.h
> index b253be602cc2..3e4a314ef925 100644
> ---
> a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_
> cichlid.h
> +++
> b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_
> cichlid.h
> @@ -1480,10 +1480,68 @@ typedef struct {
> 
>  } SmuMetrics_V2_t;
> 
> +typedef struct {
> +  uint32_t CurrClock[PPCLK_COUNT];
> +
> +  uint16_t AverageGfxclkFrequencyPreDs;
> +  uint16_t AverageGfxclkFrequencyPostDs;
> +  uint16_t AverageFclkFrequencyPreDs;
> +  uint16_t AverageFclkFrequencyPostDs;
> +  uint16_t AverageUclkFrequencyPreDs;
> +  uint16_t AverageUclkFrequencyPostDs;
> +
> +
> +  uint16_t AverageGfxActivity;
> +  uint16_t AverageUclkActivity;
> +  uint8_t  CurrSocVoltageOffset;
> +  uint8_t  CurrGfxVoltageOffset;
> +  uint8_t  CurrMemVidOffset;
> +  uint8_t  Padding8;
> +  uint16_t AverageSocketPower;
> +  uint16_t TemperatureEdge;
> +  uint16_t TemperatureHotspot;
> +  uint16_t TemperatureMem;
> +  uint16_t TemperatureVrGfx;
> +  uint16_t TemperatureVrMem0;
> +  uint16_t TemperatureVrMem1;
> +  uint16_t TemperatureVrSoc;
> +  uint16_t TemperatureLiquid0;
> +  uint16_t TemperatureLiquid1;
> +  uint16_t TemperaturePlx;
> +  uint16_t Padding16;
> +  uint32_t AccCnt;
> +  uint8_t  ThrottlingPercentage[THROTTLER_COUNT];
> +
> +
> +  uint8_t  LinkDpmLevel;
> +  uint8_t  CurrFanPwm;
> +  uint16_t CurrFanSpeed;
> +
> +  //BACO metrics, PMFW-1721
> +  //metrics for D3hot entry/exit and driver ARM msgs
> +  uint8_t D3HotEntryCountPerMode[D3HOT_SEQUENCE_COUNT];
> +  uint8_t D3HotExitCountPerMode[D3HOT_SEQUENCE_COUNT];
> +  uint8_t ArmMsgReceivedCountPerMode[D3HOT_SEQUENCE_COUNT];
> +
> +  //PMFW-4362
> +  uint32_t EnergyAccumulator;
> +  uint16_t AverageVclk0Frequency;
> +  uint16_t AverageDclk0Frequency;
> +  uint16_t AverageVclk1Frequency;
> +  uint16_t AverageDclk1Frequency;
> +  uint16_t VcnUsagePercentage0;
> +  uint16_t VcnUsagePercentage1;
> +  uint8_t  PcieRate;
> +  uint8_t  PcieWidth;
> +  uint16_t AverageGfxclkFrequencyTarget;
> +
> +} SmuMetrics_V3_t;
> +
>  typedef struct {
>union {
>  SmuMetrics_t SmuMetrics;
>  SmuMetrics_V2_t SmuMetrics_V2;
> +SmuMetrics_V3_t SmuMetrics_V3;
>};
>uint32_t Spare[1];
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> index d9d634ce9575..38f04836c82f 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> @@ -554,6 +554,11 @@ static uint32_t
> sienna_cichlid_get_throttler_status_locked(struct smu_context *s
>   int i;
> 
>   if ((smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(11, 0, 7))
> &&
> +  (smu->smc_fw_version >= 0x3A4900)) {
> + for (i = 0; i < THROTTLER_COUNT; i++)
> + throttler_status |=
> + (metrics_ext-
> >SmuMetrics_V3.ThrottlingPercentage[i] ? 1U << i : 0);
> + } else if ((smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(11,
> 0, 7)) &&
>(smu->smc_fw_version >= 0x3A4300)) {
>   for (i = 0; i < THROTTLER_COUNT; i++)
>   throttler_status |=
> @@ -574,11 +579,20 @@ static int
> sienna_cichlid_get_smu_metrics_data(struct smu_context *smu,
>   &(((SmuMetricsExternal_t *)(smu_table->metrics_table))-
> >SmuMetrics);
>   SmuMetrics_V2_t *metrics_v2 =
>   &(((SmuMetricsExternal_t *)(smu_table->metrics_table))-
> >SmuMetrics_V2);
> - bool use_metrics_v2 = ((smu->adev->ip_versions[MP1_HWIP][0] ==
> IP_VERSION(11, 0, 7)) &&
> - (smu->smc_fw_version >= 0x3A4300)) ? true : false;
> + SmuMetrics_V3_t *metrics_v3 =
> + &(((SmuMetricsExternal_t *)(smu_table->metrics_table))-
> >SmuMetrics_V3);
> + bool use_metrics_v2 = false;
> + bool use_metrics_v3 = false;
>   uint16_t average_gfx_activity;
>   int ret = 0;
> 
> + if ((smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(11, 0, 7))
> &&
> + (smu->smc_fw_version >= 0x3A4900))
> + use_metrics_v3 = true;
> + 

[PATCH v2] drm/amdgpu: check vm ready by amdgpu_vm->evicting flag

2022-02-21 Thread Qiang Yu
Workstation application ANSA/META v21.1.4 get this error dmesg when
running CI test suite provided by ANSA/META:
[drm:amdgpu_gem_va_ioctl [amdgpu]] *ERROR* Couldn't update BO_VA (-16)

This is caused by:
1. create a 256MB buffer in invisible VRAM
2. CPU map the buffer and access it causes vm_fault and try to move
   it to visible VRAM
3. force visible VRAM space and traverse all VRAM bos to check if
   evicting this bo is valuable
4. when checking a VM bo (in invisible VRAM), amdgpu_vm_evictable()
   will set amdgpu_vm->evicting, but latter due to not in visible
   VRAM, won't really evict it so not add it to amdgpu_vm->evicted
5. before next CS to clear the amdgpu_vm->evicting, user VM ops
   ioctl will pass amdgpu_vm_ready() (check amdgpu_vm->evicted)
   but fail in amdgpu_vm_bo_update_mapping() (check
   amdgpu_vm->evicting) and get this error log

This error won't affect functionality as next CS will finish the
waiting VM ops. But we'd better clear the error log by checking
the amdgpu_vm->evicting flag in amdgpu_vm_ready() to stop calling
amdgpu_vm_bo_update_mapping() latter.

Another reason is amdgpu_vm->evicted list holds all BOs (both
user buffer and page table), but only page table BOs' eviction
prevent VM ops. amdgpu_vm->evicting flag is set only for page
table BOs, so we should use evicting flag instead of evicted list
in amdgpu_vm_ready().

The side effect of This change is: previously blocked VM op (user
buffer in "evicted" list but no page table in it) gets done
immediately.

v2: update commit comments.

Reviewed-by: Christian König 
Signed-off-by: Qiang Yu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 37acd8911168..2cd9f1a2e5fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -770,11 +770,16 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, 
struct amdgpu_vm *vm,
  * Check if all VM PDs/PTs are ready for updates
  *
  * Returns:
- * True if eviction list is empty.
+ * True if VM is not evicting.
  */
 bool amdgpu_vm_ready(struct amdgpu_vm *vm)
 {
-   return list_empty(&vm->evicted);
+   bool ret;
+
+   amdgpu_vm_eviction_lock(vm);
+   ret = !vm->evicting;
+   amdgpu_vm_eviction_unlock(vm);
+   return ret;
 }
 
 /**
-- 
2.25.1



RE: [PATCH] drm/amd/display: add GTT domain support for dcn 3.1.5

2022-02-21 Thread Zhang, Yifan
[AMD Official Use Only]

Hi Christian,

We'd like to enable display S/G only for APUs which have smaller VRAM. If >= 
IP_VERSION(3, 1, 0) is used, new dGPUs will be included. That's not our 
intention.

BRs,
Yifan

-Original Message-
From: Christian König  
Sent: Tuesday, February 22, 2022 2:15 AM
To: Alex Deucher ; Zhang, Yifan 
Cc: Li, Sun peng (Leo) ; Yin, Tianci (Rico) 
; Wentland, Harry ; amd-gfx list 

Subject: Re: [PATCH] drm/amd/display: add GTT domain support for dcn 3.1.5



Am 21.02.22 um 15:27 schrieb Alex Deucher:
> On Mon, Feb 21, 2022 at 5:15 AM Yifan Zhang  wrote:
>> From: "Tianci.Yin" 
>>
>> this patch adds GTT domain support for dcn 3.1.5
>>
>> Signed-off-by: Tianci.Yin 
>> Signed-off-by: Yifan Zhang 
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>> index 9709368b4915..88ee1224541c 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>> @@ -523,6 +523,7 @@ uint32_t amdgpu_display_supported_domains(struct 
>> amdgpu_device *adev,
>>  case IP_VERSION(3, 0, 1):
>>  case IP_VERSION(3, 1, 2):
>>  case IP_VERSION(3, 1, 3):
>> +   case IP_VERSION(3, 1, 5):
> Should also add 3.1.6 as well?

I'm really wondering if that check shouldn't be something like >= IP_VERSION(3, 
1, 0) instead.

Christian.

>
> Alex
>
>
>>  domain |= AMDGPU_GEM_DOMAIN_GTT;
>>  break;
>>  default:
>> --
>> 2.25.1
>>


[PATCH v2] drm/amd/display: add GTT domain support for dcn 3.1.5 and 3.1.6

2022-02-21 Thread Yifan Zhang
From: "Tianci.Yin" 

this patch adds GTT domain support for dcn 3.1.5 and 3.1.6

Signed-off-by: Tianci.Yin 
Signed-off-by: Yifan Zhang 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 9709368b4915..37f4da219a5f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -523,6 +523,8 @@ uint32_t amdgpu_display_supported_domains(struct 
amdgpu_device *adev,
case IP_VERSION(3, 0, 1):
case IP_VERSION(3, 1, 2):
case IP_VERSION(3, 1, 3):
+   case IP_VERSION(3, 1, 5):
+   case IP_VERSION(3, 1, 6):
domain |= AMDGPU_GEM_DOMAIN_GTT;
break;
default:
-- 
2.25.1



[PATCH] drm/amdgpu: Fixed warning reported by kernel test robot

2022-02-21 Thread yipechai
Fixed warning reported by kernel test robot:
1.warning: no previous prototype for function 
'amdgpu_ras_block_late_init_default'.
2.warning: variable 'ras_obj' is used uninitialized whenever '||' condition is 
true.

Signed-off-by: yipechai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index e5874df3c9ca..a73567ea03d5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2400,7 +2400,7 @@ bool amdgpu_ras_is_poison_mode_supported(struct 
amdgpu_device *adev)
 int amdgpu_ras_block_late_init(struct amdgpu_device *adev,
 struct ras_common_if *ras_block)
 {
-   struct amdgpu_ras_block_object *ras_obj;
+   struct amdgpu_ras_block_object *ras_obj = NULL;
struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
unsigned long ue_count, ce_count;
int r;
@@ -2456,7 +2456,7 @@ int amdgpu_ras_block_late_init(struct amdgpu_device *adev,
return r;
 }
 
-int amdgpu_ras_block_late_init_default(struct amdgpu_device *adev,
+static int amdgpu_ras_block_late_init_default(struct amdgpu_device *adev,
 struct ras_common_if *ras_block)
 {
return amdgpu_ras_block_late_init(adev, ras_block);
-- 
2.25.1