[linux-next:master] BUILD REGRESSION 4d80748d16c82a9c2c4ea5feea96e476de3cd876
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: 4d80748d16c82a9c2c4ea5feea96e476de3cd876 Add linux-next specific files for 20221004 Error/Warning reports: https://lore.kernel.org/linux-mm/202209150141.wgbakqmx-...@intel.com https://lore.kernel.org/linux-mm/202209251400.1tmn7rde-...@intel.com https://lore.kernel.org/linux-mm/202210010718.2kavangb-...@intel.com https://lore.kernel.org/llvm/202209200834.efwatsij-...@intel.com https://lore.kernel.org/llvm/202209220019.yr2vuxhg-...@intel.com Error/Warning: (recently discovered and may have been fixed) ERROR: modpost: "devm_ioremap_resource" [drivers/dma/fsl-edma.ko] undefined! ERROR: modpost: "devm_ioremap_resource" [drivers/dma/idma64.ko] undefined! ERROR: modpost: "devm_ioremap_resource" [drivers/dma/qcom/hdma.ko] undefined! ERROR: modpost: "devm_memremap" [drivers/misc/open-dice.ko] undefined! ERROR: modpost: "devm_memunmap" [drivers/misc/open-dice.ko] undefined! ERROR: modpost: "devm_platform_ioremap_resource" [drivers/char/xillybus/xillybus_of.ko] undefined! ERROR: modpost: "devm_platform_ioremap_resource" [drivers/clk/xilinx/clk-xlnx-clock-wizard.ko] undefined! ERROR: modpost: "ioremap" [drivers/tty/ipwireless/ipwireless.ko] undefined! ERROR: modpost: "iounmap" [drivers/net/ethernet/8390/pcnet_cs.ko] undefined! ERROR: modpost: "iounmap" [drivers/tty/ipwireless/ipwireless.ko] undefined! arch/arm64/kernel/alternative.c:199:6: warning: no previous prototype for 'apply_alternatives_vdso' [-Wmissing-prototypes] arch/arm64/kernel/alternative.c:295:14: warning: no previous prototype for 'alt_cb_patch_nops' [-Wmissing-prototypes] arch/loongarch/kernel/traps.c:250 die() warn: variable dereferenced before check 'regs' (see line 244) arch/loongarch/mm/init.c:166:24: warning: variable 'new' set but not used [-Wunused-but-set-variable] drivers/platform/loongarch/loongson-laptop.c:377 loongson_laptop_get_brightness() warn: impossible condition '(level < 0) => (0-255 < 0)' drivers/spi/spi.c:4215:33: warning: use of uninitialized value '((int *)_38 = PHI <(2), _91(3)>)[11]' [CWE-457] [-Wanalyzer-use-of-uninitialized-value] include/linux/compiler_types.h:357:45: error: call to '__compiletime_assert_417' declared with attribute error: FIELD_GET: mask is not constant kernel/bpf/memalloc.c:500 bpf_mem_alloc_destroy() error: potentially dereferencing uninitialized 'c'. net/dsa/port.c:1684 dsa_port_phylink_create() warn: passing zero to 'PTR_ERR' pahole: .tmp_vmlinux.btf: No such file or directory Error/Warning ids grouped by kconfigs: gcc_recent_errors |-- arm-randconfig-c002-20221002 | `-- drivers-spi-spi.c:warning:use-of-uninitialized-value-((int-)_38-PHI-x()-_91()-)-CWE |-- arm64-allyesconfig | |-- arch-arm64-kernel-alternative.c:warning:no-previous-prototype-for-alt_cb_patch_nops | `-- arch-arm64-kernel-alternative.c:warning:no-previous-prototype-for-apply_alternatives_vdso |-- arm64-randconfig-r004-20221002 | |-- arch-arm64-kernel-alternative.c:warning:no-previous-prototype-for-alt_cb_patch_nops | `-- arch-arm64-kernel-alternative.c:warning:no-previous-prototype-for-apply_alternatives_vdso |-- arm64-randconfig-r016-20221003 | |-- arch-arm64-kernel-alternative.c:warning:no-previous-prototype-for-alt_cb_patch_nops | `-- arch-arm64-kernel-alternative.c:warning:no-previous-prototype-for-apply_alternatives_vdso |-- i386-randconfig-m021-20221003 | `-- net-dsa-port.c-dsa_port_phylink_create()-warn:passing-zero-to-PTR_ERR |-- loongarch-buildonly-randconfig-r006-20221003 | `-- arch-loongarch-mm-init.c:warning:variable-new-set-but-not-used |-- loongarch-randconfig-m031-20221002 | `-- arch-loongarch-mm-init.c:warning:variable-new-set-but-not-used |-- loongarch-randconfig-m041-20221002 | |-- arch-loongarch-kernel-traps.c-die()-warn:variable-dereferenced-before-check-regs-(see-line-) | |-- arch-loongarch-mm-init.c:warning:variable-new-set-but-not-used | |-- drivers-platform-loongarch-loongson-laptop.c-loongson_laptop_get_brightness()-warn:impossible-condition-(level-)-(-) | `-- kernel-bpf-memalloc.c-bpf_mem_alloc_destroy()-error:potentially-dereferencing-uninitialized-c-. |-- loongarch-randconfig-r001-20221002 | `-- arch-loongarch-mm-init.c:warning:variable-new-set-but-not-used |-- m68k-randconfig-r004-20221003 | `-- pahole:.tmp_vmlinux.btf:No-such-file-or-directory |-- s390-allmodconfig | |-- ERROR:devm_ioremap_resource-drivers-dma-fsl-edma.ko-undefined | |-- ERROR:devm_ioremap_resource-drivers-dma-idma64.ko-undefined | |-- ERROR:devm_ioremap_resource-drivers-dma-qcom-hdma.ko-undefined | |-- ERROR:devm_memremap-drivers-misc-open-dice.ko-undefined | |-- ERROR:devm_memunmap-drivers-misc-open-dice.ko-undefined | |-- ERROR:devm_platform_ioremap_resource-drivers-char-xillybus-xillybus_of.ko-undefined | |-- ERROR:devm_platform_ioremap_resour
[RFC PATCH 5/5] drm/amd/display: Fill 3D LUT from userspace
Implement the 3D LUT interface, convert and pass the data for amdgpu
driver.
Note: A patchset "IGT tests for pre-blending 3D LUT interfaces" for this
proposal is sent to IGT mailing list.
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 ++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 +
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 181 ++
3 files changed, 195 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 7094578a683f..10e6dc5c8552 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -5656,6 +5656,19 @@ static int fill_dc_plane_attributes(struct amdgpu_device
*adev,
dc_plane_state->in_transfer_func->type = TF_TYPE_HWPWL;
}
+ /* 3D LUT from userspace */
+ if (plane_state->color_mgmt_changed) {
+ if (plane_state->lut_3d && dc_plane_state->lut3d_func) {
+ ret = amdgpu_dm_fill_3dlut_data(plane_state,
_plane_state->lut3d_func->lut_3d);
+ if (!ret)
+
dc_plane_state->lut3d_func->state.bits.initialized = 1;
+ else
+ return ret;
+ } else {
+ /* TODO disable 3D LUT */
+ }
+ }
+
return 0;
}
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index 667957087ccf..644c5ff6ee9a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -726,6 +726,7 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state
*crtc,
struct dc_plane_state *dc_plane_state);
void amdgpu_dm_fill_pwl_data(struct drm_property_blob *lut_blob, struct
pwl_params *lut_params, struct drm_color_lut_range *pwl_definition, int
pwl_size);
+int amdgpu_dm_fill_3dlut_data(const struct drm_plane_state *plane_state,
struct tetrahedral_params *param);
void amdgpu_dm_update_connector_after_detect(
struct amdgpu_dm_connector *aconnector);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index ae633fe52525..705852bf63e7 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -22,6 +22,7 @@
* Authors: AMD
*
*/
+ #include
#include "amdgpu.h"
#include "amdgpu_mode.h"
#include "amdgpu_dm.h"
@@ -469,6 +470,186 @@ int amdgpu_dm_verify_lut_sizes(const struct
drm_crtc_state *crtc_state)
return 0;
}
+#define R_3DLUT0
+#define G_3DLUT1
+#define B_3DLUT2
+
+static __u16 extract_rgb_value(void *lut_3d, __u32 color_format, __u8 color)
+{
+ __u64 val = *(__u64 *) lut_3d;
+
+ switch (color_format) {
+ case DRM_FORMAT_XRGB16161616:
+ if (color == R_3DLUT)
+ return val & 0x;
+ else if (color == G_3DLUT)
+ return (val >> 16) & 0x;
+ else if (color == B_3DLUT)
+ return (val >> 32) & 0x;
+ break;
+ case DRM_FORMAT_XBGR16161616:
+ if (color == B_3DLUT)
+ return val & 0x;
+ else if (color == G_3DLUT)
+ return (val >> 16) & 0x;
+ else if (color == R_3DLUT)
+ return (val >> 32) & 0x;
+ break;
+ case DRM_FORMAT_XRGB:
+ if (color == R_3DLUT)
+ return val & 0xFF;
+ else if (color == G_3DLUT)
+ return (val >> 8) & 0xFF;
+ else if (color == B_3DLUT)
+ return (val >> 16) & 0xFF;
+ break;
+ case DRM_FORMAT_XBGR:
+ if (color == B_3DLUT)
+ return val & 0xFF;
+ else if (color == G_3DLUT)
+ return (val >> 8) & 0xFF;
+ else if (color == R_3DLUT)
+ return (val >> 16) & 0xFF;
+ break;
+ default:
+ return 0;
+ }
+
+ return 0;
+}
+
+static bool extract_rgb_data(const struct drm_plane_state *plane_state, struct
drm_mode_3dlut_mode *mode, __u16 *lut_data)
+{
+ __u16 i, lut_volume;
+ void *lut_3d = plane_state->lut_3d->data;
+ __u32 cfmt = mode->color_format;
+
+ /* copy RGB accordingly */
+ lut_volume = mode->lut_size * mode->lut_size * mode->lut_size;
+ for (i = 0; i < lut_volume; i += 3) {
+ lut_data[i] = extract_rgb_value(lut_3d, cfmt, R_3DLUT);
+ lut_data[i+1] = extract_rgb_value(lut_3d, cfmt,
[RFC PATCH 4/5] drm/amd/display: Enable plane 3DLUT mode
Enable the 3D LUT mode supported by amdgpu.
Note: A patchset "IGT tests for pre-blending 3D LUT interfaces" for this
proposal is sent to IGT mailing list.
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++
drivers/gpu/drm/drm_color_mgmt.c | 31 +++
include/drm/drm_plane.h | 2 ++
3 files changed, 36 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ee277f357140..7094578a683f 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8008,6 +8008,9 @@ static int amdgpu_dm_plane_init(struct
amdgpu_display_manager *dm,
/* TODO need to check ASICs */
drm_plane_create_3d_lut_properties(plane->dev, plane, 1);
+ res = drm_plane_color_add_3dlut_mode(plane, "3dlut_17_12bit",
_3d_mode_17_12bit, sizeof(lut_3d_mode_17_12bit));
+ if (res)
+ return res;
drm_plane_attach_3dlut_properties(plane);
/* Create (reset) the plane state */
diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
index 4bfe5b5c9670..5418ca24db73 100644
--- a/drivers/gpu/drm/drm_color_mgmt.c
+++ b/drivers/gpu/drm/drm_color_mgmt.c
@@ -743,6 +743,37 @@ void drm_plane_attach_3dlut_properties(struct drm_plane
*plane)
}
EXPORT_SYMBOL(drm_plane_attach_3dlut_properties);
+int drm_plane_color_add_3dlut_mode(struct drm_plane *plane,
+const char *name,
+const struct
drm_mode_3dlut_mode *mode_3dlut,
+size_t length)
+{
+ struct drm_property_blob *blob;
+ struct drm_property *prop = NULL;
+ int ret;
+
+ prop = plane->lut_3d_mode_property;
+
+ if (!prop)
+ return -EINVAL;
+
+ if (length == 0 && name)
+ return drm_property_add_enum(prop, 0, name);
+
+ blob = drm_property_create_blob(plane->dev, length, mode_3dlut);
+ if (IS_ERR(blob))
+ return PTR_ERR(blob);
+
+ ret = drm_property_add_enum(prop, blob->base.id, name);
+ if (ret) {
+ drm_property_blob_put(blob);
+ return ret;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_plane_color_add_3dlut_mode);
+
int drm_plane_color_add_gamma_degamma_mode_range(struct drm_plane *plane,
const char *name,
const struct
drm_color_lut_range *ranges,
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index 4e272144170f..f94f91466675 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -946,6 +946,8 @@ int drm_plane_create_3d_lut_properties(struct drm_device
*dev,
struct drm_plane *plane,
int num_values);
void drm_plane_attach_3dlut_properties(struct drm_plane *plane);
+int drm_plane_color_add_3dlut_mode(struct drm_plane *plane, const char *name,
+const struct
drm_mode_3dlut_mode *mode_3dlut, size_t length);
int drm_plane_color_add_gamma_degamma_mode_range(struct drm_plane *plane,
const char *name,
const struct
drm_color_lut_range *ranges,
--
2.37.3
[RFC PATCH 3/5] drm/amd/display: Define 3D LUT struct for HDR planes
Add a 3D LUT mode supported by amdgpu driver.
Note: A patchset "IGT tests for pre-blending 3D LUT interfaces" for this
proposal is sent to IGT mailing list.
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/modules/color/color_gamma.h | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/color/color_gamma.h
b/drivers/gpu/drm/amd/display/modules/color/color_gamma.h
index e06e0a8effc8..aceb23b03a4b 100644
--- a/drivers/gpu/drm/amd/display/modules/color/color_gamma.h
+++ b/drivers/gpu/drm/amd/display/modules/color/color_gamma.h
@@ -27,6 +27,7 @@
#define COLOR_MOD_COLOR_GAMMA_H_
#include "color_table.h"
+#include
struct dc_transfer_func;
struct dc_gamma;
@@ -35,6 +36,17 @@ struct dc_rgb_fixed;
struct dc_color_caps;
enum dc_transfer_func_predefined;
+/*
+ * 3D LUT mode for 17x17x17 LUT and 12 bits of color depth
+ */
+static const struct drm_mode_3dlut_mode lut_3d_mode_17_12bit = {
+ .lut_size = 17,
+ .lut_stride = {17, 17, 18},
+ .bit_depth = 12,
+ .color_format = DRM_FORMAT_XRGB16161616,
+ .flags = 0,
+};
+
static const struct drm_color_lut_range nonlinear_pwl[] = {
{
.flags = (DRM_MODE_LUT_GAMMA | DRM_MODE_LUT_REFLECT_NEGATIVE |
DRM_MODE_LUT_INTERPOLATE | DRM_MODE_LUT_REUSE_LAST |
DRM_MODE_LUT_NON_DECREASING),
--
2.37.3
[RFC PATCH 2/5] drm: Add Plane 3DLUT and 3DLUT mode properties
Add plane lut_3d mode and lut_3d as blob properties.
lut_3d mode is an enum property with values as blob_ids.
Userspace can get supported modes and also set one of the modes.
Note: A patchset "IGT tests for pre-blending 3D LUT interfaces" for this
proposal is sent to IGT mailing list.
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++
drivers/gpu/drm/drm_atomic_state_helper.c | 3 ++
drivers/gpu/drm/drm_atomic_uapi.c | 11 ++
drivers/gpu/drm/drm_color_mgmt.c | 37 +++
include/drm/drm_mode_object.h | 2 +-
include/drm/drm_plane.h | 31
6 files changed, 87 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index f546c1326db3..ee277f357140 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8006,6 +8006,10 @@ static int amdgpu_dm_plane_init(struct
amdgpu_display_manager *dm,
drm_plane_attach_gamma_properties(plane);
drm_plane_attach_ctm_property(plane);
+ /* TODO need to check ASICs */
+ drm_plane_create_3d_lut_properties(plane->dev, plane, 1);
+ drm_plane_attach_3dlut_properties(plane);
+
/* Create (reset) the plane state */
if (plane->funcs->reset)
plane->funcs->reset(plane);
diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c
b/drivers/gpu/drm/drm_atomic_state_helper.c
index 7ddf6e4b956b..85900cd1bffe 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -318,6 +318,8 @@ void __drm_atomic_helper_plane_duplicate_state(struct
drm_plane *plane,
drm_property_blob_get(state->ctm);
if (state->gamma_lut)
drm_property_blob_get(state->gamma_lut);
+ if (state->lut_3d)
+ drm_property_blob_get(state->lut_3d);
state->color_mgmt_changed = false;
}
@@ -369,6 +371,7 @@ void __drm_atomic_helper_plane_destroy_state(struct
drm_plane_state *state)
drm_property_blob_put(state->degamma_lut);
drm_property_blob_put(state->ctm);
drm_property_blob_put(state->gamma_lut);
+ drm_property_blob_put(state->lut_3d);
}
EXPORT_SYMBOL(__drm_atomic_helper_plane_destroy_state);
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
b/drivers/gpu/drm/drm_atomic_uapi.c
index ba3e64cb184a..66e59e7c194d 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -622,6 +622,13 @@ static int drm_atomic_plane_set_property(struct drm_plane
*plane,
);
state->color_mgmt_changed |= replaced;
return ret;
+ } else if (property == plane->lut_3d_property) {
+ ret = drm_atomic_replace_property_blob_from_id(dev,
+ >lut_3d, val, -1, 8, );
+ state->color_mgmt_changed |= replaced;
+ return 0;
+ } else if (property == plane->lut_3d_mode_property) {
+ state->lut_3d_mode = val;
} else if (property == config->prop_fb_damage_clips) {
ret = drm_atomic_replace_property_blob_from_id(dev,
>fb_damage_clips,
@@ -700,6 +707,10 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
} else if (property == plane->gamma_lut_property) {
*val = (state->gamma_lut) ?
state->gamma_lut->base.id : 0;
+ } else if (property == plane->lut_3d_property) {
+ *val = (state->lut_3d) ? state->lut_3d->base.id : 0;
+ } else if (property == plane->lut_3d_mode_property) {
+ *val = state->lut_3d_mode;
} else if (property == config->prop_fb_damage_clips) {
*val = (state->fb_damage_clips) ?
state->fb_damage_clips->base.id : 0;
diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
index b5b3ff7f654d..4bfe5b5c9670 100644
--- a/drivers/gpu/drm/drm_color_mgmt.c
+++ b/drivers/gpu/drm/drm_color_mgmt.c
@@ -706,6 +706,43 @@ void drm_plane_attach_gamma_properties(struct drm_plane
*plane)
}
EXPORT_SYMBOL(drm_plane_attach_gamma_properties);
+int drm_plane_create_3d_lut_properties(struct drm_device *dev,
+ struct drm_plane *plane,
+ int num_values)
+{
+ struct drm_property *mode;
+ struct drm_property *blob;
+
+ mode = drm_property_create(dev, DRM_MODE_PROP_ENUM,
"PLANE_3D_LUT_MODE", num_values);
+ if (!mode)
+ return -ENOMEM;
+
+ plane->lut_3d_mode_property = mode;
+
+ blob = drm_property_create(dev, DRM_MODE_PROP_BLOB, "PLANE_3D_LUT", 0);
+ if (!blob)
+ return -ENOMEM;
+
+
[RFC PATCH 1/5] drm: Add 3D LUT mode and its attributes
A struct is defined for 3D LUT modes to be supported by hardware.
The elements includes lut_isze, lut_stride, bit_depth, color_format
and flags.
Note: A patchset "IGT tests for pre-blending 3D LUT interfaces" for this
proposal is sent to IGT mailing list.
Signed-off-by: Alex Hung
---
include/uapi/drm/drm_mode.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index d0ce48d2e732..334e8a9b49cc 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -877,6 +877,23 @@ struct drm_color_lut_ext {
__u64 reserved;
};
+/*
+ * struct drm_mode_3dlut_mode - 3D LUT mode information.
+ * @lut_size: number of valid points on every dimension of 3D LUT.
+ * @lut_stride: number of points on every dimension of 3D LUT.
+ * @bit_depth: number of bits of RGB. If color_mode defines entries with higher
+ * bit_depth the least significant bits will be truncated.
+ * @color_format: fourcc values, ex. DRM_FORMAT_XRGB16161616 or
DRM_FORMAT_XBGR16161616.
+ * @flags: flags for hardware-sepcific features
+ */
+struct drm_mode_3dlut_mode {
+ __u16 lut_size;
+ __u16 lut_stride[3];
+ __u16 bit_depth;
+ __u32 color_format;
+ __u32 flags;
+};
+
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
--
2.37.3
[RFC PATCH 0/5] Proposal for Pre-blending 3D LUT interfaces
This is an proposal and a draft implementation to enable 3D LUT on
drm_plane. This proposal defines a new interface for userspace
applications to query hardware capabilities and to pass/enable 3D LUT
functions via this DRM/KMS APIs.
Overviews:
┌─┐┌─┐┌───┐┌──┐ ┌┐
│Userspace│◄──►│3DLUT API│◄──►│DRM│◄──►│GPU driver├──►│hardware│
└─┘└─┘└───┘└──┘ └┘
1. Userspace queries the 3DLUT mode (defined by drm_mode_3dlut_mode)
from the GPU drivers (ex. amdgpu).
2. The GPU Driver replies sizes and the color depth of the
3DLUT modes, such as defined by struct lut_3d_mode_17_12bit.
3. If applicable, userspace selects and sets one of preferred 3DLUT
modes by "lut_3d_mode" to driver.
4. Userspace passes 3D LUT via drm_property_blob "lut_3d". In the case
of the mode "lut_3d_mode_17_12bit", the 3D LUT should have a cube
size = 17x17x17 (lut_size), color depth = 12 bits (bit_depth), and
X/Y/Z axis = R/G/B (color_format).
5. The GPU driver parses 3D LUT and passes it to hardware pipeline, and
enables 3D LUT accordingly.
Notes:
1. The patchset is based on the previous work on
https://gitlab.freedesktop.org/hwentland/linux/-/tree/color-and-hdr
2. This interface can be part of the newly proposed DRM/KMS color pipeline
API (https://gitlab.freedesktop.org/pq/color-and-hdr/-/issues/11). A
future integration to the new API may be required or preferred, such
as the followings:
struct drm_color_pipeline_element {
drm_color_pipeline_element_type;
drm_color_pipeline_element_lut3d
};
struct drm_mode_3dlut_mode -> struct drm_color_pipeline_lut3d_config
struct drm_color_pipeline_lut3d {
lut_3d_mode_17_12bit;
};
struct drm_color_pipeline_lut3d_data {
*lut_3d;
};
and etc.
3. A patchset "IGT tests for pre-blending 3D LUT interfaces" for this
proposal is sent to IGT mailing list.
Related Work:
- Enable 3D LUT to AMD display drivers
(https://www.spinics.net/lists/amd-gfx/msg83032.html)
Alex Hung (5):
drm: Add 3D LUT mode and its attributes
drm: Add Plane 3DLUT and 3DLUT mode properties
drm/amd/display: Define 3D LUT struct for HDR planes
drm/amd/display: Enable plane 3DLUT mode
drm/amd/display: Fill 3D LUT from userspace
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 20 ++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 +
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 181 ++
.../amd/display/modules/color/color_gamma.h | 12 ++
drivers/gpu/drm/drm_atomic_state_helper.c | 3 +
drivers/gpu/drm/drm_atomic_uapi.c | 11 ++
drivers/gpu/drm/drm_color_mgmt.c | 68 +++
include/drm/drm_mode_object.h | 2 +-
include/drm/drm_plane.h | 33
include/uapi/drm/drm_mode.h | 17 ++
10 files changed, 347 insertions(+), 1 deletion(-)
--
2.37.3
Re: [PATCH] drm/amdgpu/dm/mst: Fix incorrect usage of drm_dp_add_payload_part2()
On 2022-10-04 16:24, Lyude Paul wrote:
Yikes, it appears somehow I totally made a mistake here. We're currently
checking to see if drm_dp_add_payload_part2() returns a non-zero value to
indicate success. That's totally wrong though, as this function only
returns a zero value on success - not the other way around.
So, fix that.
Signed-off-by: Lyude Paul
Issue: https://gitlab.freedesktop.org/drm/amd/-/issues/2171
Fixes: 4d07b0bc4034 ("drm/display/dp_mst: Move all payload info into the atomic
state")
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index b8077fcd4651..00598def5b39 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -297,7 +297,7 @@ bool dm_helpers_dp_mst_send_payload_allocation(
clr_flag = MST_ALLOCATE_NEW_PAYLOAD;
}
- if (enable && drm_dp_add_payload_part2(mst_mgr, mst_state->base.state, payload)) {
+ if (enable && drm_dp_add_payload_part2(mst_mgr, mst_state->base.state,
payload) == 0) {
amdgpu_dm_set_mst_status(>mst_status,
set_flag, false);
} else {
Hi Lyude,
Maybe I'm missing something, but I can't find the
drm_dp_add_payload_part2() function on amd-staging-drm-next. Which repo
are you using?
Thanks
Siqueira
[PATCH] drm/amdgpu/dm/mst: Fix incorrect usage of drm_dp_add_payload_part2()
Yikes, it appears somehow I totally made a mistake here. We're currently
checking to see if drm_dp_add_payload_part2() returns a non-zero value to
indicate success. That's totally wrong though, as this function only
returns a zero value on success - not the other way around.
So, fix that.
Signed-off-by: Lyude Paul
Issue: https://gitlab.freedesktop.org/drm/amd/-/issues/2171
Fixes: 4d07b0bc4034 ("drm/display/dp_mst: Move all payload info into the atomic
state")
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index b8077fcd4651..00598def5b39 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -297,7 +297,7 @@ bool dm_helpers_dp_mst_send_payload_allocation(
clr_flag = MST_ALLOCATE_NEW_PAYLOAD;
}
- if (enable && drm_dp_add_payload_part2(mst_mgr, mst_state->base.state,
payload)) {
+ if (enable && drm_dp_add_payload_part2(mst_mgr, mst_state->base.state,
payload) == 0) {
amdgpu_dm_set_mst_status(>mst_status,
set_flag, false);
} else {
--
2.37.3
Re: [PATCH 1/1] drm/amdgpu: Correct amdgpu_amdkfd_total_mem_size calculation
I'd prefer a separate patch and code review for the fini-case, because that addresses a different (potential) problem. Thanks, Felix On 2022-10-04 15:43, Philip Yang wrote: On 2022-10-04 15:16, Felix Kuehling wrote: On 2022-10-04 12:41, Philip Yang wrote: amdkfd_total_mem_size is the size of total GPUs vram plus system memory to estimate page tables memory usage and leave enough VRAM room for page tables allocation. Calculate amdkfd_total_mem_size in amdgpu_amdkfd_device_probe is incorrect because adev->gmc.real_vram_size is still 0 called from amdgpu_device_ip_early_init. Move the calculation to amdgpu_amdkfd_device_init to get the correct VRAM size. Signed-off-by: Philip Yang Reviewed-by: Felix Kuehling Semi-related to this, there should probably be a reverse calculation in amdgpu_amdkfd_device_fini_sw to support hot-unplugging GPUs. I will add the reverse calculation then submit. Regards, Philip Regards, Felix --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c index 9e98f3866edc..049d192c7cdf 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c @@ -75,9 +75,6 @@ void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) return; adev->kfd.dev = kgd2kfd_probe(adev, vf); - - if (adev->kfd.dev) - amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; } /** @@ -201,6 +198,8 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) adev->kfd.init_complete = kgd2kfd_device_init(adev->kfd.dev, adev_to_drm(adev), _resources); + amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; + INIT_WORK(>kfd.reset_work, amdgpu_amdkfd_reset_work); } }
Re: [PATCH 1/1] drm/amdgpu: Correct amdgpu_amdkfd_total_mem_size calculation
On 2022-10-04 15:16, Felix Kuehling wrote: On 2022-10-04 12:41, Philip Yang wrote: amdkfd_total_mem_size is the size of total GPUs vram plus system memory to estimate page tables memory usage and leave enough VRAM room for page tables allocation. Calculate amdkfd_total_mem_size in amdgpu_amdkfd_device_probe is incorrect because adev->gmc.real_vram_size is still 0 called from amdgpu_device_ip_early_init. Move the calculation to amdgpu_amdkfd_device_init to get the correct VRAM size. Signed-off-by: Philip Yang Reviewed-by: Felix Kuehling Semi-related to this, there should probably be a reverse calculation in amdgpu_amdkfd_device_fini_sw to support hot-unplugging GPUs. I will add the reverse calculation then submit. Regards, Philip Regards, Felix --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c index 9e98f3866edc..049d192c7cdf 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c @@ -75,9 +75,6 @@ void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) return; adev->kfd.dev = kgd2kfd_probe(adev, vf); - - if (adev->kfd.dev) - amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; } /** @@ -201,6 +198,8 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) adev->kfd.init_complete = kgd2kfd_device_init(adev->kfd.dev, adev_to_drm(adev), _resources); + amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; + INIT_WORK(>kfd.reset_work, amdgpu_amdkfd_reset_work); } }
Re: [PATCH 1/1] drm/amdgpu: Correct amdgpu_amdkfd_total_mem_size calculation
On 2022-10-04 12:41, Philip Yang wrote: amdkfd_total_mem_size is the size of total GPUs vram plus system memory to estimate page tables memory usage and leave enough VRAM room for page tables allocation. Calculate amdkfd_total_mem_size in amdgpu_amdkfd_device_probe is incorrect because adev->gmc.real_vram_size is still 0 called from amdgpu_device_ip_early_init. Move the calculation to amdgpu_amdkfd_device_init to get the correct VRAM size. Signed-off-by: Philip Yang Reviewed-by: Felix Kuehling Semi-related to this, there should probably be a reverse calculation in amdgpu_amdkfd_device_fini_sw to support hot-unplugging GPUs. Regards, Felix --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c index 9e98f3866edc..049d192c7cdf 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c @@ -75,9 +75,6 @@ void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) return; adev->kfd.dev = kgd2kfd_probe(adev, vf); - - if (adev->kfd.dev) - amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; } /** @@ -201,6 +198,8 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) adev->kfd.init_complete = kgd2kfd_device_init(adev->kfd.dev, adev_to_drm(adev), _resources); + amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; + INIT_WORK(>kfd.reset_work, amdgpu_amdkfd_reset_work); } }
[PATCH 1/1] drm/amdgpu: Correct amdgpu_amdkfd_total_mem_size calculation
amdkfd_total_mem_size is the size of total GPUs vram plus system memory to estimate page tables memory usage and leave enough VRAM room for page tables allocation. Calculate amdkfd_total_mem_size in amdgpu_amdkfd_device_probe is incorrect because adev->gmc.real_vram_size is still 0 called from amdgpu_device_ip_early_init. Move the calculation to amdgpu_amdkfd_device_init to get the correct VRAM size. Signed-off-by: Philip Yang --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c index 9e98f3866edc..049d192c7cdf 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c @@ -75,9 +75,6 @@ void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) return; adev->kfd.dev = kgd2kfd_probe(adev, vf); - - if (adev->kfd.dev) - amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; } /** @@ -201,6 +198,8 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) adev->kfd.init_complete = kgd2kfd_device_init(adev->kfd.dev, adev_to_drm(adev), _resources); + amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; + INIT_WORK(>kfd.reset_work, amdgpu_amdkfd_reset_work); } } -- 2.35.1
Re: [PATCH] Set vm_update_mode=0 as default for Sienna Cichlid in SRIOV case
Am 04.10.22 um 16:08 schrieb Danijel Slivka:
CPU pagetable updates have issues with HDP flush as VF MMIO access
protection is not allowing write during sriov runtime to
mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL
The subject should have a drm/amdgpu prefix and in general Felix need to
take a look at this.
Regards,
Christian.
Signed-off-by: Danijel Slivka
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 83b0c5d86e48..32088ac0666c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2338,7 +2338,9 @@ void amdgpu_vm_manager_init(struct amdgpu_device *adev)
*/
#ifdef CONFIG_X86_64
if (amdgpu_vm_update_mode == -1) {
- if (amdgpu_gmc_vram_full_visible(>gmc))
+ if (amdgpu_gmc_vram_full_visible(>gmc) &&
+ !(adev->asic_type == CHIP_SIENNA_CICHLID &&
+ amdgpu_sriov_vf(adev)))
adev->vm_manager.vm_update_mode =
AMDGPU_VM_USE_CPU_FOR_COMPUTE;
else
Re: [PATCH] drm/amd/display: Remove unused struct i2c_id_config_access
On 2022-09-27 09:39, Yuan Can wrote:
After commit 5a8132b9f606("drm/amd/display: remove dead dc vbios code"), no one
use struct i2c_id_config_access, so remove it.
Signed-off-by: Yuan Can
---
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
index 5d70f9901d13..d380cf98b844 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
@@ -50,13 +50,6 @@
#define LAST_RECORD_TYPE 0xff
#define SMU9_SYSPLL0_ID 0
-struct i2c_id_config_access {
- uint8_t bfI2C_LineMux:4;
- uint8_t bfHW_EngineID:3;
- uint8_t bfHW_Capable:1;
- uint8_t ucAccess;
-};
-
static enum bp_result get_gpio_i2c_info(struct bios_parser *bp,
struct atom_i2c_record *record,
struct graphics_object_i2c_info *info);
Reviewed-by: Rodrigo Siqueira
and applied to amd-staging-drm-next.
Thanks
Siqueira
Re: [PATCH -next] drm/amd/display: Removed unused variable 'sdp_stream_enable'
On 2022-09-30 02:38, Dong Chenchen wrote:
Kernel test robot throws below warning ->
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c:
In function 'dcn31_hpo_dp_stream_enc_update_dp_info_packets':
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c:439:14:
warning: variable 'sdp_stream_enable' set but not used
[-Wunused-but-set-variable]
439 | bool sdp_stream_enable = false;
Removed unused variable 'sdp_stream_enable'.
Reported-by: kernel test robot
Signed-off-by: Dong Chenchen
---
.../dc/dcn31/dcn31_hpo_dp_stream_encoder.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c
b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c
index 23621ff08c90..7daafbab98da 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c
@@ -436,32 +436,28 @@ static void
dcn31_hpo_dp_stream_enc_update_dp_info_packets(
{
struct dcn31_hpo_dp_stream_encoder *enc3 =
DCN3_1_HPO_DP_STREAM_ENC_FROM_HPO_STREAM_ENC(enc);
uint32_t dmdata_packet_enabled = 0;
- bool sdp_stream_enable = false;
- if (info_frame->vsc.valid) {
+ if (info_frame->vsc.valid)
enc->vpg->funcs->update_generic_info_packet(
enc->vpg,
0, /* packetIndex */
_frame->vsc,
true);
- sdp_stream_enable = true;
- }
- if (info_frame->spd.valid) {
+
+ if (info_frame->spd.valid)
enc->vpg->funcs->update_generic_info_packet(
enc->vpg,
2, /* packetIndex */
_frame->spd,
true);
- sdp_stream_enable = true;
- }
- if (info_frame->hdrsmd.valid) {
+
+ if (info_frame->hdrsmd.valid)
enc->vpg->funcs->update_generic_info_packet(
enc->vpg,
3, /* packetIndex */
_frame->hdrsmd,
true);
- sdp_stream_enable = true;
- }
+
/* enable/disable transmission of packet(s).
* If enabled, packet transmission begins on the next frame
*/
Thanks a lot for your patch,
Reviewed-by: Rodrigo Siqueira
and applied to amd-staging-drm-next.
Thanks
Siqueira
[PATCH] Set vm_update_mode=0 as default for Sienna Cichlid in SRIOV case
CPU pagetable updates have issues with HDP flush as VF MMIO access
protection is not allowing write during sriov runtime to
mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL
Signed-off-by: Danijel Slivka
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 83b0c5d86e48..32088ac0666c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2338,7 +2338,9 @@ void amdgpu_vm_manager_init(struct amdgpu_device *adev)
*/
#ifdef CONFIG_X86_64
if (amdgpu_vm_update_mode == -1) {
- if (amdgpu_gmc_vram_full_visible(>gmc))
+ if (amdgpu_gmc_vram_full_visible(>gmc) &&
+ !(adev->asic_type == CHIP_SIENNA_CICHLID &&
+ amdgpu_sriov_vf(adev)))
adev->vm_manager.vm_update_mode =
AMDGPU_VM_USE_CPU_FOR_COMPUTE;
else
--
2.25.1
[PATCH 2/2] drm/amd/pm: smu7_hwmgr: fix potential off-by-one overflow in 'performance_levels'
Since 'hardwareActivityPerformanceLevels' is set to the size of the
'performance_levels' array in smu7_hwmgr_backend_init(), using the
'<=' assertion to check for the next index value is incorrect.
Replace it with '<'.
Detected using the static analysis tool - Svace.
Fixes: 599a7e9fe1b6 ("drm/amd/powerplay: implement smu7 hwmgr to manager asics
with smu ip version 7.")
Signed-off-by: Alexey Kodanev
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index e4fcbf8a7eb5..7ef7e81525a3 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -3603,7 +3603,7 @@ static int
smu7_get_pp_table_entry_callback_func_v1(struct pp_hwmgr *hwmgr,
return -EINVAL);
PP_ASSERT_WITH_CODE(
- (smu7_power_state->performance_level_count <=
+ (smu7_power_state->performance_level_count <
hwmgr->platform_descriptor.hardwareActivityPerformanceLevels),
"Performance levels exceeds Driver limit!",
return -EINVAL);
--
2.25.1
[PATCH 1/2] drm/amd/pm: vega10_hwmgr: fix potential off-by-one overflow in 'performance_levels'
Since 'hardwareActivityPerformanceLevels' is set to the size of the
'performance_levels' array in vega10_hwmgr_backend_init(), using the
'<=' assertion to check for the next index value is incorrect.
Replace it with '<'.
Detected using the static analysis tool - Svace.
Fixes: f83a9991648b ("drm/amd/powerplay: add Vega10 powerplay support (v5)")
Signed-off-by: Alexey Kodanev
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
index 99bfe5efe171..c8c9fb827bda 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
@@ -3155,7 +3155,7 @@ static int vega10_get_pp_table_entry_callback_func(struct
pp_hwmgr *hwmgr,
return -1);
PP_ASSERT_WITH_CODE(
- (vega10_ps->performance_level_count <=
+ (vega10_ps->performance_level_count <
hwmgr->platform_descriptor.
hardwareActivityPerformanceLevels),
"Performance levels exceeds Driver limit!",
--
2.25.1
[Bug report] Possible wrong condition
Hello,
It seems there is some dead or not-needed code. Either the if condition
isn't needed or condition is wrong. As this
greater-than-or-equal-to-zero comparison of an unsigned value is always
true. "version_minor >= 0". Please have a look at it.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
index 012b72d00e04..be9a6aad8541 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
@@ -526,6 +526,8 @@ int amdgpu_gfx_rlc_init_microcode(struct
amdgpu_device *adev,
if (version_major == 2 && version_minor == 1)
adev->gfx.rlc.is_rlc_v2_1 = true;
+ // The following condition is always true as version_minor is
unsigned.
+ // Why is this condition needed at all?
if (version_minor >= 0) {
err = amdgpu_gfx_rlc_init_microcode_v2_0(adev);
if (err) {
--
Muhammad Usama Anjum
Re: [PATCH 1/1] drm/amdgpu: Set vmbo destroy after pt bo is created
Am 03.10.22 um 19:20 schrieb Philip Yang: Under VRAM usage pression, map to GPU may fail to create pt bo and vmbo->shadow_list is not initialized, then ttm_bo_release calling amdgpu_bo_vm_destroy to access vmbo->shadow_list generates below dmesg and NULL pointer access backtrace: Set vmbo destroy callback to amdgpu_bo_vm_destroy only after creating pt bo successfully, otherwise use default callback amdgpu_bo_destroy. amdgpu: amdgpu_vm_bo_update failed amdgpu: update_gpuvm_pte() failed amdgpu: Failed to map bo to gpuvm amdgpu :43:00.0: amdgpu: Failed to map peer::43:00.0 mem_domain:2 BUG: kernel NULL pointer dereference, address: RIP: 0010:amdgpu_bo_vm_destroy+0x4d/0x80 [amdgpu] Call Trace: ttm_bo_release+0x207/0x320 [amdttm] amdttm_bo_init_reserved+0x1d6/0x210 [amdttm] amdgpu_bo_create+0x1ba/0x520 [amdgpu] amdgpu_bo_create_vm+0x3a/0x80 [amdgpu] amdgpu_vm_pt_create+0xde/0x270 [amdgpu] amdgpu_vm_ptes_update+0x63b/0x710 [amdgpu] amdgpu_vm_update_range+0x2e7/0x6e0 [amdgpu] amdgpu_vm_bo_update+0x2bd/0x600 [amdgpu] update_gpuvm_pte+0x160/0x420 [amdgpu] amdgpu_amdkfd_gpuvm_map_memory_to_gpu+0x313/0x1130 [amdgpu] kfd_ioctl_map_memory_to_gpu+0x115/0x390 [amdgpu] kfd_ioctl+0x24a/0x5b0 [amdgpu] Signed-off-by: Philip Yang Mhm, quite some hack because or init and fini sequence is still not ideal. Please add a code comment explaining why we do this. With that done the patch is Reviewed-by: Christian König . Thanks, Christian. --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 4570ad449390..ae924db72b62 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -688,11 +688,11 @@ int amdgpu_bo_create_vm(struct amdgpu_device *adev, * num of amdgpu_vm_pt entries. */ BUG_ON(bp->bo_ptr_size < sizeof(struct amdgpu_bo_vm)); - bp->destroy = _bo_vm_destroy; r = amdgpu_bo_create(adev, bp, _ptr); if (r) return r; + bo_ptr->tbo.destroy = _bo_vm_destroy; *vmbo_ptr = to_amdgpu_bo_vm(bo_ptr); INIT_LIST_HEAD(&(*vmbo_ptr)->shadow_list); return r;
