RE: [PATCH] drm/amdkfd: fix warning in SVM debug statement
[AMD Official Use Only - General]
Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: Tuesday, March 7, 2023 6:43 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH] drm/amdkfd: fix warning in SVM debug statement
>
> Print a long long value.
>
> In file included
> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_object.h:32,
> from drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_migrate.c:29:
> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_migrate.c: In function
> ‘svm_migrate_copy_to_vram’:
> ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:35:21: warning:
> format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 6
> has type ‘uint64_t’ {aka ‘long long unsigned int’} [-Wformat=]
>35 | #define pr_fmt(fmt) "amdgpu: " fmt
> | ^~
> ./include/linux/dynamic_debug.h:223:29: note: in expansion of macro
> ‘pr_fmt’
> 223 | func(, ##__VA_ARGS__); \
> | ^~~
> ./include/linux/dynamic_debug.h:247:9: note: in expansion of macro
> ‘__dynamic_func_call_cls’
> 247 | __dynamic_func_call_cls(__UNIQUE_ID(ddebug), cls, fmt, func,
> ##__VA_ARGS__)
> | ^~~
> ./include/linux/dynamic_debug.h:249:9: note: in expansion of macro
> ‘_dynamic_func_call_cls’
> 249 | _dynamic_func_call_cls(_DPRINTK_CLASS_DFLT, fmt, func,
> ##__VA_ARGS__)
> | ^~
> ./include/linux/dynamic_debug.h:268:9: note: in expansion of macro
> ‘_dynamic_func_call’
> 268 | _dynamic_func_call(fmt, __dynamic_pr_debug, \
> | ^~
> ./include/linux/printk.h:581:9: note: in expansion of macro
> ‘dynamic_pr_debug’
> 581 | dynamic_pr_debug(fmt, ##__VA_ARGS__)
> | ^~~~
> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_migrate.c:302:9: note: in
> expansion of macro ‘pr_debug’
> 302 | pr_debug("svms 0x%p [0x%lx 0x%lx 0x%lx]\n", prange->svms,
> prange->start,
> | ^~~~
>
> Fixes: b752374fdf3a ("drm/amdkfd: Fix BO offset for multi-VMA page
> migration")
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> index ad109403b5cc..391da6acb3e5 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> @@ -299,7 +299,7 @@ svm_migrate_copy_to_vram(struct amdgpu_device
> *adev, struct svm_range *prange,
> uint64_t i, j;
> int r;
>
> - pr_debug("svms 0x%p [0x%lx 0x%lx 0x%lx]\n", prange->svms,
> prange->start,
> + pr_debug("svms 0x%p [0x%lx 0x%lx 0x%llx]\n", prange->svms,
> prange->start,
>prange->last, ttm_res_offset);
>
> src = scratch;
> --
> 2.39.2
Re: [PATCH] drm/amdgpu: Force signal hw_fences that are embedded in non-sched jobs
Am 07.03.23 um 08:02 schrieb YuBiao Wang:
[Why]
For engines not supporting soft reset, i.e. VCN, there will be a failed
ib test before mode 1 reset during asic reset. The fences in this case
are never signaled and next time when we try to free the sa_bo, kernel
will hang.
[How]
During pre_asic_reset, driver will clear job fences and afterwards the
fences' refcount will be reduced to 1. For drm_sched_jobs it will be
released in job_free_cb, and for non-sched jobs like ib_test, it's meant
to be released in sa_bo_free but only when the fences are signaled. So
we have to force signal the non_sched bad job's fence during
pre_asic_reset or the clear is not complete.
Well NAK for now. It looks once more like one of those not very well
thought through changes.
Luben can you please take a look at this and double check it.
Thanks,
Christian.
Signed-off-by: YuBiao Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index faff4a3f96e6..2e549bd50990 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -673,6 +673,7 @@ void amdgpu_fence_driver_clear_job_fences(struct
amdgpu_ring *ring)
{
int i;
struct dma_fence *old, **ptr;
+ struct amdgpu_job *job;
for (i = 0; i <= ring->fence_drv.num_fences_mask; i++) {
ptr = >fence_drv.fences[i];
@@ -680,6 +681,9 @@ void amdgpu_fence_driver_clear_job_fences(struct
amdgpu_ring *ring)
if (old && old->ops == _job_fence_ops) {
RCU_INIT_POINTER(*ptr, NULL);
dma_fence_put(old);
+ job = container_of(old, struct amdgpu_job, hw_fence);
+ if (!job->base.s_fence && !dma_fence_is_signaled(old))
+ dma_fence_signal(old);
}
}
}
Re: [PATCH] drm/amdkfd: Fixed kfd_process cleanup on module exit.
Am 06.03.23 um 22:58 schrieb David Belanger:
Handle case when module is unloaded (kfd_exit) before a process space
(mm_struct) is released.
Well that should never ever happen in the first place. It sounds like we
are missing grabbing module references.
Regards,
Christian.
Signed-off-by: David Belanger
---
drivers/gpu/drm/amd/amdkfd/kfd_module.c | 4 ++
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 57
2 files changed, 61 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_module.c
b/drivers/gpu/drm/amd/amdkfd/kfd_module.c
index 09b966dc3768..8ef4bd9e4f7d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_module.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_module.c
@@ -26,6 +26,9 @@
#include "kfd_priv.h"
#include "amdgpu_amdkfd.h"
+void kfd_cleanup_processes(void);
+
+
static int kfd_init(void)
{
int err;
@@ -77,6 +80,7 @@ static int kfd_init(void)
static void kfd_exit(void)
{
+ kfd_cleanup_processes();
kfd_debugfs_fini();
kfd_process_destroy_wq();
kfd_procfs_shutdown();
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
index ebabe92f7edb..b5b28a32639d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
@@ -1181,6 +1181,17 @@ static void kfd_process_notifier_release(struct
mmu_notifier *mn,
return;
mutex_lock(_processes_mutex);
+ /*
+* Do early return if p is not in the table.
+*
+* This could potentially happen if this function is called concurrently
+* by mmu_notifier and by kfd_cleanup_pocesses.
+*
+*/
+ if (!hash_hashed(>kfd_processes)) {
+ mutex_unlock(_processes_mutex);
+ return;
+ }
hash_del_rcu(>kfd_processes);
mutex_unlock(_processes_mutex);
synchronize_srcu(_processes_srcu);
@@ -1200,6 +1211,52 @@ static const struct mmu_notifier_ops
kfd_process_mmu_notifier_ops = {
.free_notifier = kfd_process_free_notifier,
};
+
+void kfd_cleanup_processes(void)
+{
+ struct kfd_process *p;
+ unsigned int temp;
+
+ /*
+* Iterate over remaining processes in table, calling notifier release
+* to free up notifier and process resources.
+*
+* This code handles the case when driver is unloaded before all
mm_struct
+* are released.
+*/
+ int idx = srcu_read_lock(_processes_srcu);
+
+ hash_for_each_rcu(kfd_processes_table, temp, p, kfd_processes) {
+ if (p) {
+ /*
+* Obtain a reference on p to avoid a late mmu_notifier
release
+* call triggering freeing the process.
+*/
+
+ kref_get(>ref);
+
+ srcu_read_unlock(_processes_srcu, idx);
+
+ kfd_process_notifier_release(>mmu_notifier, p->mm);
+
+ kfd_unref_process(p);
+
+ idx = srcu_read_lock(_processes_srcu);
+ }
+ }
+ srcu_read_unlock(_processes_srcu, idx);
+
+ /*
+* Must be called after all mmu_notifier_put are done and before
+* kfd_process_wq is released.
+*
+* Ensures that all outstanding free_notifier gets called, triggering
the release
+* of the process.
+*/
+ mmu_notifier_synchronize();
+}
+
+
static int kfd_process_init_cwsr_apu(struct kfd_process *p, struct file
*filep)
{
unsigned long offset;
[PATCH] drm/amdgpu: Force signal hw_fences that are embedded in non-sched jobs
[Why]
For engines not supporting soft reset, i.e. VCN, there will be a failed
ib test before mode 1 reset during asic reset. The fences in this case
are never signaled and next time when we try to free the sa_bo, kernel
will hang.
[How]
During pre_asic_reset, driver will clear job fences and afterwards the
fences' refcount will be reduced to 1. For drm_sched_jobs it will be
released in job_free_cb, and for non-sched jobs like ib_test, it's meant
to be released in sa_bo_free but only when the fences are signaled. So
we have to force signal the non_sched bad job's fence during
pre_asic_reset or the clear is not complete.
Signed-off-by: YuBiao Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index faff4a3f96e6..2e549bd50990 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -673,6 +673,7 @@ void amdgpu_fence_driver_clear_job_fences(struct
amdgpu_ring *ring)
{
int i;
struct dma_fence *old, **ptr;
+ struct amdgpu_job *job;
for (i = 0; i <= ring->fence_drv.num_fences_mask; i++) {
ptr = >fence_drv.fences[i];
@@ -680,6 +681,9 @@ void amdgpu_fence_driver_clear_job_fences(struct
amdgpu_ring *ring)
if (old && old->ops == _job_fence_ops) {
RCU_INIT_POINTER(*ptr, NULL);
dma_fence_put(old);
+ job = container_of(old, struct amdgpu_job, hw_fence);
+ if (!job->base.s_fence && !dma_fence_is_signaled(old))
+ dma_fence_signal(old);
}
}
}
--
2.25.1
RE: [PATCH] drm/amdgpu: Fix the warning info when removing amdgpu device
[AMD Official Use Only - General]
Thanks, will update it.
Regards,
Lyndon
> -Original Message-
> From: Christian König
> Sent: Tuesday, March 7, 2023 2:22 PM
> To: Chen, Guchun ; Li, Lyndon
> ; amd-gfx@lists.freedesktop.org
> Cc: Xu, Feifei ; Ma, Jun ;
> Prosyak, Vitaly ; Deucher, Alexander
> ; Koenig, Christian
>
> Subject: Re: [PATCH] drm/amdgpu: Fix the warning info when removing
> amdgpu device
>
> The commit message reads a bit bumpy. Generally best practice are:
>
> Short (72 chars or less) summary
>
> More detailed explanatory text. Wrap it to 72 characters. The blank line
> separating the summary from the body is critical (unless you omit the body
> entirely).
>
> Write your commit message in the imperative: "Fix bug" and not "Fixed bug"
> or "Fixes bug." This convention matches up with commit messages
> generated by commands like git merge and git revert.
>
> Further paragraphs come after blank lines.
>
> - Bullet points are okay, too.
> - Typically a hyphen or asterisk is used for the bullet, followed by a
> single space. Use a hanging indent.
>
> Apart from that the patch is Acked-by: Christian König
>
>
> Regards,
> Christian.
>
> Am 07.03.23 um 03:23 schrieb Chen, Guchun:
> > Reviewed-by: Guchun Chen
> >
> > Regards,
> > Guchun
> >
> > -Original Message-
> > From: lyndonli
> > Sent: Tuesday, March 7, 2023 10:12 AM
> > To: amd-gfx@lists.freedesktop.org
> > Cc: Prosyak, Vitaly ; Koenig, Christian
> > ; Deucher, Alexander
> > ; Chen, Guchun
> ; Xu,
> > Feifei ; Ma, Jun ; Li, Lyndon
> >
> > Subject: [PATCH] drm/amdgpu: Fix the warning info when removing
> amdgpu
> > device
> >
> > Actually, the drm_dev_enter in psp_cmd_submit_buf does not protect
> anything.
> > And it is not used to prevent concurrent access.
> > If DRM device is unplugged, it will always check the condition in WARN_ON.
> > We'd better not keep adding commands to the list.
> > Simply moving the drm_dev_enter/drm_dev_exit higher level will not
> solve the issue.
> > Because psp_cmd_submit_buf is called in many places, such as
> psp_hw_init-->psp_load_fw, psp_suspend-->psp_xgmi_terminate,
> amdgpu_device_gpu_recover-->amdgpu_ras_suspend.
> > So drop drm_dev_enter/drm_dev_exit in psp_cmd_submit_buf.
> >
> > When removing amdgpu, the calling order as follows:
> > amdgpu_pci_remove
> > drm_dev_unplug
> > amdgpu_driver_unload_kms
> > amdgpu_device_fini_hw
> > amdgpu_device_ip_fini_early
> > psp_hw_fini
> > psp_ras_terminate
> > psp_ta_unloadye
> >
> psp_cmd_submit_buf
> >
> > [ 4507.740388] Call Trace:
> > [ 4507.740389]
> > [ 4507.740391] psp_ta_unload+0x44/0x70 [amdgpu] [ 4507.740485]
> > psp_ras_terminate+0x4d/0x70 [amdgpu] [ 4507.740575]
> > psp_hw_fini+0x28/0xa0 [amdgpu] [ 4507.740662]
> > amdgpu_device_fini_hw+0x328/0x442 [amdgpu] [ 4507.740791]
> > amdgpu_driver_unload_kms+0x51/0x60 [amdgpu] [ 4507.740875]
> > amdgpu_pci_remove+0x5a/0x140 [amdgpu] [ 4507.740962] ?
> > _raw_spin_unlock_irqrestore+0x27/0x43
> > [ 4507.740965] ? __pm_runtime_resume+0x60/0x90 [ 4507.740968]
> > pci_device_remove+0x39/0xb0 [ 4507.740971] device_remove+0x46/0x70
> [
> > 4507.740972] device_release_driver_internal+0xd1/0x160
> > [ 4507.740974] driver_detach+0x4a/0x90 [ 4507.740975]
> > bus_remove_driver+0x6c/0xf0 [ 4507.740976]
> > driver_unregister+0x31/0x50 [ 4507.740977]
> > pci_unregister_driver+0x40/0x90 [ 4507.740978] amdgpu_exit+0x15/0x120
> > [amdgpu]
> >
> > Signed-off-by: lyndonli
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 17 +
> > 1 file changed, 1 insertion(+), 16 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> > index 4c617faaa7c9..02f948adae72 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> > @@ -603,27 +603,14 @@ psp_cmd_submit_buf(struct psp_context *psp,
> >struct psp_gfx_cmd_resp *cmd, uint64_t fence_mc_addr)
> {
> > int ret;
> > - int index, idx;
> > + int index;
> > int timeout = 2;
> > bool ras_intr = false;
> > bool skip_unsupport = false;
> > - bool dev_entered;
> >
> > if (psp->adev->no_hw_access)
> > return 0;
> >
> > - dev_entered = drm_dev_enter(adev_to_drm(psp->adev), );
> > - /*
> > -* We allow sending PSP messages LOAD_ASD and UNLOAD_TA
> without acquiring
> > -* a lock in drm_dev_enter during driver unload because we must call
> > -* drm_dev_unplug as the beginning of unload driver sequence . It is
> very
> > -* crucial that userspace can't access device instances anymore.
> > -*/
> > - if (!dev_entered)
> > - WARN_ON(psp->cmd_buf_mem->cmd_id !=
> GFX_CMD_ID_LOAD_ASD &&
> > - psp->cmd_buf_mem->cmd_id !=
> GFX_CMD_ID_UNLOAD_TA &&
> > -
Re: [PATCH] drm/amdgpu: Fix the warning info when removing amdgpu device
The commit message reads a bit bumpy. Generally best practice are:
Short (72 chars or less) summary
More detailed explanatory text. Wrap it to 72 characters. The blank
line separating the summary from the body is critical (unless you omit
the body entirely).
Write your commit message in the imperative: "Fix bug" and not "Fixed
bug" or "Fixes bug." This convention matches up with commit messages
generated by commands like git merge and git revert.
Further paragraphs come after blank lines.
- Bullet points are okay, too.
- Typically a hyphen or asterisk is used for the bullet, followed by a
single space. Use a hanging indent.
Apart from that the patch is Acked-by: Christian König
Regards,
Christian.
Am 07.03.23 um 03:23 schrieb Chen, Guchun:
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: lyndonli
Sent: Tuesday, March 7, 2023 10:12 AM
To: amd-gfx@lists.freedesktop.org
Cc: Prosyak, Vitaly ; Koenig, Christian ; Deucher,
Alexander ; Chen, Guchun ; Xu, Feifei
; Ma, Jun ; Li, Lyndon
Subject: [PATCH] drm/amdgpu: Fix the warning info when removing amdgpu device
Actually, the drm_dev_enter in psp_cmd_submit_buf does not protect anything.
And it is not used to prevent concurrent access.
If DRM device is unplugged, it will always check the condition in WARN_ON.
We'd better not keep adding commands to the list.
Simply moving the drm_dev_enter/drm_dev_exit higher level will not solve the
issue.
Because psp_cmd_submit_buf is called in many places, such as
psp_hw_init-->psp_load_fw, psp_suspend-->psp_xgmi_terminate,
amdgpu_device_gpu_recover-->amdgpu_ras_suspend.
So drop drm_dev_enter/drm_dev_exit in psp_cmd_submit_buf.
When removing amdgpu, the calling order as follows:
amdgpu_pci_remove
drm_dev_unplug
amdgpu_driver_unload_kms
amdgpu_device_fini_hw
amdgpu_device_ip_fini_early
psp_hw_fini
psp_ras_terminate
psp_ta_unloadye
psp_cmd_submit_buf
[ 4507.740388] Call Trace:
[ 4507.740389]
[ 4507.740391] psp_ta_unload+0x44/0x70 [amdgpu] [ 4507.740485]
psp_ras_terminate+0x4d/0x70 [amdgpu] [ 4507.740575] psp_hw_fini+0x28/0xa0
[amdgpu] [ 4507.740662] amdgpu_device_fini_hw+0x328/0x442 [amdgpu] [
4507.740791] amdgpu_driver_unload_kms+0x51/0x60 [amdgpu] [ 4507.740875]
amdgpu_pci_remove+0x5a/0x140 [amdgpu] [ 4507.740962] ?
_raw_spin_unlock_irqrestore+0x27/0x43
[ 4507.740965] ? __pm_runtime_resume+0x60/0x90 [ 4507.740968]
pci_device_remove+0x39/0xb0 [ 4507.740971] device_remove+0x46/0x70 [
4507.740972] device_release_driver_internal+0xd1/0x160
[ 4507.740974] driver_detach+0x4a/0x90
[ 4507.740975] bus_remove_driver+0x6c/0xf0 [ 4507.740976]
driver_unregister+0x31/0x50 [ 4507.740977] pci_unregister_driver+0x40/0x90 [
4507.740978] amdgpu_exit+0x15/0x120 [amdgpu]
Signed-off-by: lyndonli
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 17 +
1 file changed, 1 insertion(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 4c617faaa7c9..02f948adae72 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -603,27 +603,14 @@ psp_cmd_submit_buf(struct psp_context *psp,
struct psp_gfx_cmd_resp *cmd, uint64_t fence_mc_addr) {
int ret;
- int index, idx;
+ int index;
int timeout = 2;
bool ras_intr = false;
bool skip_unsupport = false;
- bool dev_entered;
if (psp->adev->no_hw_access)
return 0;
- dev_entered = drm_dev_enter(adev_to_drm(psp->adev), );
- /*
-* We allow sending PSP messages LOAD_ASD and UNLOAD_TA without
acquiring
-* a lock in drm_dev_enter during driver unload because we must call
-* drm_dev_unplug as the beginning of unload driver sequence . It is
very
-* crucial that userspace can't access device instances anymore.
-*/
- if (!dev_entered)
- WARN_ON(psp->cmd_buf_mem->cmd_id != GFX_CMD_ID_LOAD_ASD &&
- psp->cmd_buf_mem->cmd_id != GFX_CMD_ID_UNLOAD_TA &&
- psp->cmd_buf_mem->cmd_id != GFX_CMD_ID_INVOKE_CMD);
-
memset(psp->cmd_buf_mem, 0, PSP_CMD_BUFFER_SIZE);
memcpy(psp->cmd_buf_mem, cmd, sizeof(struct psp_gfx_cmd_resp)); @@ -687,8 +674,6 @@ psp_cmd_submit_buf(struct psp_context *psp,
}
exit:
- if (dev_entered)
- drm_dev_exit(idx);
return ret;
}
--
2.34.1
Re: [PATCH v6 32/57] nouveau: adapt NV_DEBUG, NV_ATOMIC to use DRM.debug
On Mon, Mar 6, 2023 at 11:50 AM Timur Tabi wrote:
>
> On Sun, Sep 4, 2022 at 4:48 PM Jim Cromie wrote:
> >
> > These 2 macros used drm_debug_enabled() on DRM_UT_{DRIVER,ATOMIC}
> > respectively, replace those with drm_dbg_##cat invocations.
> >
> > this results in new class'd prdbg callsites:
> >
> > :#> grep nouveau /proc/dynamic_debug/control | grep class | wc
> > 1161130 15584
> > :#> grep nouveau /proc/dynamic_debug/control | grep class | grep DRIVER | wc
> > 74 7049709
> > :#> grep nouveau /proc/dynamic_debug/control | grep class | grep ATOMIC | wc
> > 31 3074237
> > :#> grep nouveau /proc/dynamic_debug/control | grep class | grep KMS | wc
> > 11 1191638
> >
> > the KMS entries are due to existing uses of drm_dbg_kms().
> >
> > Signed-off-by: Jim Cromie
>
> Has this patch set been forgotten? It was posted six months ago and
> there's no sign that it was picked up.
Not forgotten, but chicken-egg problems with initializing prdbgs/drm-dbgs
in drm.ko & dependent drivers pushed it down in priority.
I have a fix for them, which needs Jasons "lets use notifier-chain" patches,
which is now in Luis' modules-next.
After that fix lands, I can revisit this one.
> The changes to drm_debug_enabled have impacted NV_DEBUG and NV_ATOMIC
> and something needs to be fixed. I posted a simpler patch a few weeks
> ago, but maybe Jim's is better.
I couldnt find it on lore, can you post a link ?
But I do recall something about chatty logs, caused by
#define drm_debug_enabled_instrumented(category)\
({ \
pr_debug("todo: is this frequent enough to optimize ?\n"); \
drm_debug_enabled_raw(category);\
})
If thats the case, it does seem to be frequent enough to silence.
Before you do so, could you turn on the "mfl" flags,
and count occurrences of each callsite ?
echo module nouveau +mfl > /proc/dynamic_debug/control
the numbers and duration of enablement would inform any optimization,
including those available in the subject patchset.
thanks,
Jim
RE: [PATCH 2/2] drm/amdgpu: fix error checking in amdgpu_read_mm_registers for soc21
We need another one to fix the same issue in nv_read_register. The series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Monday, March 6, 2023 23:54
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH 2/2] drm/amdgpu: fix error checking in amdgpu_read_mm_registers
for soc21
Properly skip non-existent registers as well.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2442
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc21.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 620f7409825d..9df2236007ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -291,9 +291,10 @@ static int soc21_read_register(struct amdgpu_device *adev,
u32 se_num,
*value = 0;
for (i = 0; i < ARRAY_SIZE(soc21_allowed_read_registers); i++) {
en = _allowed_read_registers[i];
- if (adev->reg_offset[en->hwip][en->inst] &&
- reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
- + en->reg_offset))
+ if (!adev->reg_offset[en->hwip][en->inst])
+ continue;
+ else if (reg_offset !=
(adev->reg_offset[en->hwip][en->inst][en->seg]
+ + en->reg_offset))
continue;
*value = soc21_get_register_value(adev,
--
2.39.2
RE: [PATCH] drm/amdgpu: Fix the warning info when removing amdgpu device
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: lyndonli
Sent: Tuesday, March 7, 2023 10:12 AM
To: amd-gfx@lists.freedesktop.org
Cc: Prosyak, Vitaly ; Koenig, Christian
; Deucher, Alexander ;
Chen, Guchun ; Xu, Feifei ; Ma, Jun
; Li, Lyndon
Subject: [PATCH] drm/amdgpu: Fix the warning info when removing amdgpu device
Actually, the drm_dev_enter in psp_cmd_submit_buf does not protect anything.
And it is not used to prevent concurrent access.
If DRM device is unplugged, it will always check the condition in WARN_ON.
We'd better not keep adding commands to the list.
Simply moving the drm_dev_enter/drm_dev_exit higher level will not solve the
issue.
Because psp_cmd_submit_buf is called in many places, such as
psp_hw_init-->psp_load_fw, psp_suspend-->psp_xgmi_terminate,
amdgpu_device_gpu_recover-->amdgpu_ras_suspend.
So drop drm_dev_enter/drm_dev_exit in psp_cmd_submit_buf.
When removing amdgpu, the calling order as follows:
amdgpu_pci_remove
drm_dev_unplug
amdgpu_driver_unload_kms
amdgpu_device_fini_hw
amdgpu_device_ip_fini_early
psp_hw_fini
psp_ras_terminate
psp_ta_unloadye
psp_cmd_submit_buf
[ 4507.740388] Call Trace:
[ 4507.740389]
[ 4507.740391] psp_ta_unload+0x44/0x70 [amdgpu] [ 4507.740485]
psp_ras_terminate+0x4d/0x70 [amdgpu] [ 4507.740575] psp_hw_fini+0x28/0xa0
[amdgpu] [ 4507.740662] amdgpu_device_fini_hw+0x328/0x442 [amdgpu] [
4507.740791] amdgpu_driver_unload_kms+0x51/0x60 [amdgpu] [ 4507.740875]
amdgpu_pci_remove+0x5a/0x140 [amdgpu] [ 4507.740962] ?
_raw_spin_unlock_irqrestore+0x27/0x43
[ 4507.740965] ? __pm_runtime_resume+0x60/0x90 [ 4507.740968]
pci_device_remove+0x39/0xb0 [ 4507.740971] device_remove+0x46/0x70 [
4507.740972] device_release_driver_internal+0xd1/0x160
[ 4507.740974] driver_detach+0x4a/0x90
[ 4507.740975] bus_remove_driver+0x6c/0xf0 [ 4507.740976]
driver_unregister+0x31/0x50 [ 4507.740977] pci_unregister_driver+0x40/0x90 [
4507.740978] amdgpu_exit+0x15/0x120 [amdgpu]
Signed-off-by: lyndonli
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 17 +
1 file changed, 1 insertion(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 4c617faaa7c9..02f948adae72 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -603,27 +603,14 @@ psp_cmd_submit_buf(struct psp_context *psp,
struct psp_gfx_cmd_resp *cmd, uint64_t fence_mc_addr) {
int ret;
- int index, idx;
+ int index;
int timeout = 2;
bool ras_intr = false;
bool skip_unsupport = false;
- bool dev_entered;
if (psp->adev->no_hw_access)
return 0;
- dev_entered = drm_dev_enter(adev_to_drm(psp->adev), );
- /*
-* We allow sending PSP messages LOAD_ASD and UNLOAD_TA without
acquiring
-* a lock in drm_dev_enter during driver unload because we must call
-* drm_dev_unplug as the beginning of unload driver sequence . It is
very
-* crucial that userspace can't access device instances anymore.
-*/
- if (!dev_entered)
- WARN_ON(psp->cmd_buf_mem->cmd_id != GFX_CMD_ID_LOAD_ASD &&
- psp->cmd_buf_mem->cmd_id != GFX_CMD_ID_UNLOAD_TA &&
- psp->cmd_buf_mem->cmd_id != GFX_CMD_ID_INVOKE_CMD);
-
memset(psp->cmd_buf_mem, 0, PSP_CMD_BUFFER_SIZE);
memcpy(psp->cmd_buf_mem, cmd, sizeof(struct psp_gfx_cmd_resp)); @@
-687,8 +674,6 @@ psp_cmd_submit_buf(struct psp_context *psp,
}
exit:
- if (dev_entered)
- drm_dev_exit(idx);
return ret;
}
--
2.34.1
[PATCH] drm/amdgpu: Fix the warning info when removing amdgpu device
Actually, the drm_dev_enter in psp_cmd_submit_buf
does not protect anything.
And it is not used to prevent concurrent access.
If DRM device is unplugged, it will always check the condition in WARN_ON.
We'd better not keep adding commands to the list.
Simply moving the drm_dev_enter/drm_dev_exit higher level
will not solve the issue.
Because psp_cmd_submit_buf is called in many places, such as
psp_hw_init-->psp_load_fw, psp_suspend-->psp_xgmi_terminate,
amdgpu_device_gpu_recover-->amdgpu_ras_suspend.
So drop drm_dev_enter/drm_dev_exit in psp_cmd_submit_buf.
When removing amdgpu, the calling order as follows:
amdgpu_pci_remove
drm_dev_unplug
amdgpu_driver_unload_kms
amdgpu_device_fini_hw
amdgpu_device_ip_fini_early
psp_hw_fini
psp_ras_terminate
psp_ta_unloadye
psp_cmd_submit_buf
[ 4507.740388] Call Trace:
[ 4507.740389]
[ 4507.740391] psp_ta_unload+0x44/0x70 [amdgpu]
[ 4507.740485] psp_ras_terminate+0x4d/0x70 [amdgpu]
[ 4507.740575] psp_hw_fini+0x28/0xa0 [amdgpu]
[ 4507.740662] amdgpu_device_fini_hw+0x328/0x442 [amdgpu]
[ 4507.740791] amdgpu_driver_unload_kms+0x51/0x60 [amdgpu]
[ 4507.740875] amdgpu_pci_remove+0x5a/0x140 [amdgpu]
[ 4507.740962] ? _raw_spin_unlock_irqrestore+0x27/0x43
[ 4507.740965] ? __pm_runtime_resume+0x60/0x90
[ 4507.740968] pci_device_remove+0x39/0xb0
[ 4507.740971] device_remove+0x46/0x70
[ 4507.740972] device_release_driver_internal+0xd1/0x160
[ 4507.740974] driver_detach+0x4a/0x90
[ 4507.740975] bus_remove_driver+0x6c/0xf0
[ 4507.740976] driver_unregister+0x31/0x50
[ 4507.740977] pci_unregister_driver+0x40/0x90
[ 4507.740978] amdgpu_exit+0x15/0x120 [amdgpu]
Signed-off-by: lyndonli
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 17 +
1 file changed, 1 insertion(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 4c617faaa7c9..02f948adae72 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -603,27 +603,14 @@ psp_cmd_submit_buf(struct psp_context *psp,
struct psp_gfx_cmd_resp *cmd, uint64_t fence_mc_addr)
{
int ret;
- int index, idx;
+ int index;
int timeout = 2;
bool ras_intr = false;
bool skip_unsupport = false;
- bool dev_entered;
if (psp->adev->no_hw_access)
return 0;
- dev_entered = drm_dev_enter(adev_to_drm(psp->adev), );
- /*
-* We allow sending PSP messages LOAD_ASD and UNLOAD_TA without
acquiring
-* a lock in drm_dev_enter during driver unload because we must call
-* drm_dev_unplug as the beginning of unload driver sequence . It is
very
-* crucial that userspace can't access device instances anymore.
-*/
- if (!dev_entered)
- WARN_ON(psp->cmd_buf_mem->cmd_id != GFX_CMD_ID_LOAD_ASD &&
- psp->cmd_buf_mem->cmd_id != GFX_CMD_ID_UNLOAD_TA &&
- psp->cmd_buf_mem->cmd_id != GFX_CMD_ID_INVOKE_CMD);
-
memset(psp->cmd_buf_mem, 0, PSP_CMD_BUFFER_SIZE);
memcpy(psp->cmd_buf_mem, cmd, sizeof(struct psp_gfx_cmd_resp));
@@ -687,8 +674,6 @@ psp_cmd_submit_buf(struct psp_context *psp,
}
exit:
- if (dev_entered)
- drm_dev_exit(idx);
return ret;
}
--
2.34.1
Re: [PATCH] drm/amdkfd: Fixed kfd_process cleanup on module exit.
Am 2023-03-06 um 16:58 schrieb David Belanger:
Handle case when module is unloaded (kfd_exit) before a process space
(mm_struct) is released.
Signed-off-by: David Belanger
---
drivers/gpu/drm/amd/amdkfd/kfd_module.c | 4 ++
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 57
2 files changed, 61 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_module.c
b/drivers/gpu/drm/amd/amdkfd/kfd_module.c
index 09b966dc3768..8ef4bd9e4f7d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_module.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_module.c
@@ -26,6 +26,9 @@
#include "kfd_priv.h"
#include "amdgpu_amdkfd.h"
+void kfd_cleanup_processes(void);
+
+
static int kfd_init(void)
{
int err;
@@ -77,6 +80,7 @@ static int kfd_init(void)
static void kfd_exit(void)
{
+ kfd_cleanup_processes();
kfd_debugfs_fini();
kfd_process_destroy_wq();
kfd_procfs_shutdown();
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
index ebabe92f7edb..b5b28a32639d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
@@ -1181,6 +1181,17 @@ static void kfd_process_notifier_release(struct
mmu_notifier *mn,
return;
mutex_lock(_processes_mutex);
+ /*
+* Do early return if p is not in the table.
+*
+* This could potentially happen if this function is called concurrently
+* by mmu_notifier and by kfd_cleanup_pocesses.
+*
+*/
+ if (!hash_hashed(>kfd_processes)) {
+ mutex_unlock(_processes_mutex);
+ return;
+ }
hash_del_rcu(>kfd_processes);
mutex_unlock(_processes_mutex);
synchronize_srcu(_processes_srcu);
@@ -1200,6 +1211,52 @@ static const struct mmu_notifier_ops
kfd_process_mmu_notifier_ops = {
.free_notifier = kfd_process_free_notifier,
};
+
+void kfd_cleanup_processes(void)
+{
+ struct kfd_process *p;
+ unsigned int temp;
+
+ /*
+* Iterate over remaining processes in table, calling notifier release
+* to free up notifier and process resources.
+*
+* This code handles the case when driver is unloaded before all
mm_struct
+* are released.
+*/
+ int idx = srcu_read_lock(_processes_srcu);
+
+ hash_for_each_rcu(kfd_processes_table, temp, p, kfd_processes) {
+ if (p) {
+ /*
+* Obtain a reference on p to avoid a late mmu_notifier
release
+* call triggering freeing the process.
+*/
+
+ kref_get(>ref);
+
+ srcu_read_unlock(_processes_srcu, idx);
I don't think it's valid to drop the lock in the middle of the loop. You
need to hold the lock throughout the loop to protect the consistency of
the data structure. I guess you're doing this because you got a deadlock
from synchronize_srcu in kfd_process_notifier_release.
+
+ kfd_process_notifier_release(>mmu_notifier, p->mm);
This calls hash_del_rcu to remove the process from the hash table. To
make this safe, you need to hold the kfd_processes_mutex.
Since this is outside the RCU read lock, the entry in the hlist can be
freed, which can cause problems when the hash_for_each_rcu loop tries to
find the next entry in the hlist.
+
+ kfd_unref_process(p);
This schedules a worker that can free the process at any time, which
also frees the hlist_node p->kfd_processes that is still needed by
hash_for_each_rcu to find the next entry. If you're unlucky, the worker
will be scheduled before the next loop iteration, and you can get a
kernel oops.
I suggest a safer strategy: Make a loop using hash_for_each_safe to move
all the processes into a new hlist. You can do that while holding the
kfd_processes_mutex, so you can safely remove all entries from the hash
table and move them into your own private hlist.
Then you can safely release all the processes from your private hlist
without having to hold either the srcu read lock or the mutex.
Regards,
Felix
+
+ idx = srcu_read_lock(_processes_srcu);
+ }
+ }
+ srcu_read_unlock(_processes_srcu, idx);
+
+ /*
+* Must be called after all mmu_notifier_put are done and before
+* kfd_process_wq is released.
+*
+* Ensures that all outstanding free_notifier gets called, triggering
the release
+* of the process.
+*/
+ mmu_notifier_synchronize();
+}
+
+
static int kfd_process_init_cwsr_apu(struct kfd_process *p, struct file
*filep)
{
unsigned long offset;
[PATCH] drm/amdkfd: fix warning in SVM debug statement
Print a long long value.
In file included from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_object.h:32,
from drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_migrate.c:29:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_migrate.c: In function
‘svm_migrate_copy_to_vram’:
./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:35:21: warning: format ‘%lx’
expects argument of type ‘long unsigned int’, but argument 6 has type
‘uint64_t’ {aka ‘long long unsigned int’} [-Wformat=]
35 | #define pr_fmt(fmt) "amdgpu: " fmt
| ^~
./include/linux/dynamic_debug.h:223:29: note: in expansion of macro ‘pr_fmt’
223 | func(, ##__VA_ARGS__); \
| ^~~
./include/linux/dynamic_debug.h:247:9: note: in expansion of macro
‘__dynamic_func_call_cls’
247 | __dynamic_func_call_cls(__UNIQUE_ID(ddebug), cls, fmt, func,
##__VA_ARGS__)
| ^~~
./include/linux/dynamic_debug.h:249:9: note: in expansion of macro
‘_dynamic_func_call_cls’
249 | _dynamic_func_call_cls(_DPRINTK_CLASS_DFLT, fmt, func,
##__VA_ARGS__)
| ^~
./include/linux/dynamic_debug.h:268:9: note: in expansion of macro
‘_dynamic_func_call’
268 | _dynamic_func_call(fmt, __dynamic_pr_debug, \
| ^~
./include/linux/printk.h:581:9: note: in expansion of macro ‘dynamic_pr_debug’
581 | dynamic_pr_debug(fmt, ##__VA_ARGS__)
| ^~~~
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_migrate.c:302:9: note: in expansion of
macro ‘pr_debug’
302 | pr_debug("svms 0x%p [0x%lx 0x%lx 0x%lx]\n", prange->svms,
prange->start,
| ^~~~
Fixes: b752374fdf3a ("drm/amdkfd: Fix BO offset for multi-VMA page migration")
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
index ad109403b5cc..391da6acb3e5 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
@@ -299,7 +299,7 @@ svm_migrate_copy_to_vram(struct amdgpu_device *adev, struct
svm_range *prange,
uint64_t i, j;
int r;
- pr_debug("svms 0x%p [0x%lx 0x%lx 0x%lx]\n", prange->svms, prange->start,
+ pr_debug("svms 0x%p [0x%lx 0x%lx 0x%llx]\n", prange->svms,
prange->start,
prange->last, ttm_res_offset);
src = scratch;
--
2.39.2
Re: [v2] drm/amd/pm: Fix sienna cichlid incorrect OD volage after resume
+ Evan, Kenneth
On Mon, Mar 6, 2023 at 2:49 PM Limonciello, Mario
wrote:
>
> On 3/4/2023 17:44, Błażej Szczygieł wrote:
> > Always setup overdrive tables after resume. Preserve only some
> > user-defined settings in user_overdrive_table if they're set.
> >
> > Copy restored user_overdrive_table into od_table to get correct
> > values.
> >
> > Signed-off-by: Błażej Szczygieł
Please add a link to the bug tracker as well:
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1897
Alex
> > ---
> > .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 43 ++-
> > 1 file changed, 33 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> > b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> > index 697e98a0a20a..75f18681e984 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> > @@ -2143,16 +2143,9 @@ static int
> > sienna_cichlid_set_default_od_settings(struct smu_context *smu)
> > (OverDriveTable_t *)smu->smu_table.boot_overdrive_table;
> > OverDriveTable_t *user_od_table =
> > (OverDriveTable_t *)smu->smu_table.user_overdrive_table;
> > + OverDriveTable_t user_od_table_bak;
> > int ret = 0;
> >
> > - /*
> > - * For S3/S4/Runpm resume, no need to setup those overdrive tables
> > again as
> > - * - either they already have the default OD settings got during
> > cold bootup
> > - * - or they have some user customized OD settings which cannot be
> > overwritten
> > - */
> > - if (smu->adev->in_suspend)
> > - return 0;
> > -
> > ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE,
> > 0, (void *)boot_od_table, false);
> > if (ret) {
> > @@ -2163,7 +2156,23 @@ static int
> > sienna_cichlid_set_default_od_settings(struct smu_context *smu)
> > sienna_cichlid_dump_od_table(smu, boot_od_table);
> >
> > memcpy(od_table, boot_od_table, sizeof(OverDriveTable_t));
> > - memcpy(user_od_table, boot_od_table, sizeof(OverDriveTable_t));
> > +
> > + /*
> > + * For S3/S4/Runpm resume, we need to setup those overdrive tables
> > again,
> > + * but we have to preserve user defined values in "user_od_table".
> > + */
> > + if (!smu->adev->in_suspend) {
> > + memcpy(user_od_table, boot_od_table,
> > sizeof(OverDriveTable_t));
> > + smu->user_dpm_profile.user_od = false;
> > + } else if (smu->user_dpm_profile.user_od) {
> > + memcpy(_od_table_bak, user_od_table,
> > sizeof(OverDriveTable_t));
> > + memcpy(user_od_table, boot_od_table,
> > sizeof(OverDriveTable_t));
> > + user_od_table->GfxclkFmin = user_od_table_bak.GfxclkFmin;
> > + user_od_table->GfxclkFmax = user_od_table_bak.GfxclkFmax;
> > + user_od_table->UclkFmin = user_od_table_bak.UclkFmin;
> > + user_od_table->UclkFmax = user_od_table_bak.UclkFmax;
> > + user_od_table->VddGfxOffset = user_od_table_bak.VddGfxOffset;
> > + }
> >
> > return 0;
> > }
> > @@ -2373,6 +2382,20 @@ static int sienna_cichlid_od_edit_dpm_table(struct
> > smu_context *smu,
> > return ret;
> > }
> >
> > +static int sienna_cichlid_restore_user_od_settings(struct smu_context *smu)
> > +{
> > + struct smu_table_context *table_context = >smu_table;
> > + OverDriveTable_t *od_table = table_context->overdrive_table;
> > + OverDriveTable_t *user_od_table = table_context->user_overdrive_table;
> > + int res;
> > +
> > + res = smu_v11_0_restore_user_od_settings(smu);
> > + if (res == 0)
> > + memcpy(od_table, user_od_table, sizeof(OverDriveTable_t));
> > +
> > + return res;
> > +}
> > +
> > static int sienna_cichlid_run_btc(struct smu_context *smu)
> > {
> > int res;
> > @@ -4400,7 +4423,7 @@ static const struct pptable_funcs
> > sienna_cichlid_ppt_funcs = {
> > .set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,
> > .set_default_od_settings = sienna_cichlid_set_default_od_settings,
> > .od_edit_dpm_table = sienna_cichlid_od_edit_dpm_table,
> > - .restore_user_od_settings = smu_v11_0_restore_user_od_settings,
> > + .restore_user_od_settings = sienna_cichlid_restore_user_od_settings,
>
> Rather than introduce a new static function perhaps it would be better
> to just change 'smu_v11_0_restore_user_od_settings'.
>
> That could help this issue if it also occurs on Navi10 as well.
>
> > .run_btc = sienna_cichlid_run_btc,
> > .set_power_source = smu_v11_0_set_power_source,
> > .get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
>
[PATCH] drm/amdkfd: Fixed kfd_process cleanup on module exit.
Handle case when module is unloaded (kfd_exit) before a process space
(mm_struct) is released.
Signed-off-by: David Belanger
---
drivers/gpu/drm/amd/amdkfd/kfd_module.c | 4 ++
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 57
2 files changed, 61 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_module.c
b/drivers/gpu/drm/amd/amdkfd/kfd_module.c
index 09b966dc3768..8ef4bd9e4f7d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_module.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_module.c
@@ -26,6 +26,9 @@
#include "kfd_priv.h"
#include "amdgpu_amdkfd.h"
+void kfd_cleanup_processes(void);
+
+
static int kfd_init(void)
{
int err;
@@ -77,6 +80,7 @@ static int kfd_init(void)
static void kfd_exit(void)
{
+ kfd_cleanup_processes();
kfd_debugfs_fini();
kfd_process_destroy_wq();
kfd_procfs_shutdown();
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
index ebabe92f7edb..b5b28a32639d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
@@ -1181,6 +1181,17 @@ static void kfd_process_notifier_release(struct
mmu_notifier *mn,
return;
mutex_lock(_processes_mutex);
+ /*
+* Do early return if p is not in the table.
+*
+* This could potentially happen if this function is called concurrently
+* by mmu_notifier and by kfd_cleanup_pocesses.
+*
+*/
+ if (!hash_hashed(>kfd_processes)) {
+ mutex_unlock(_processes_mutex);
+ return;
+ }
hash_del_rcu(>kfd_processes);
mutex_unlock(_processes_mutex);
synchronize_srcu(_processes_srcu);
@@ -1200,6 +1211,52 @@ static const struct mmu_notifier_ops
kfd_process_mmu_notifier_ops = {
.free_notifier = kfd_process_free_notifier,
};
+
+void kfd_cleanup_processes(void)
+{
+ struct kfd_process *p;
+ unsigned int temp;
+
+ /*
+* Iterate over remaining processes in table, calling notifier release
+* to free up notifier and process resources.
+*
+* This code handles the case when driver is unloaded before all
mm_struct
+* are released.
+*/
+ int idx = srcu_read_lock(_processes_srcu);
+
+ hash_for_each_rcu(kfd_processes_table, temp, p, kfd_processes) {
+ if (p) {
+ /*
+* Obtain a reference on p to avoid a late mmu_notifier
release
+* call triggering freeing the process.
+*/
+
+ kref_get(>ref);
+
+ srcu_read_unlock(_processes_srcu, idx);
+
+ kfd_process_notifier_release(>mmu_notifier, p->mm);
+
+ kfd_unref_process(p);
+
+ idx = srcu_read_lock(_processes_srcu);
+ }
+ }
+ srcu_read_unlock(_processes_srcu, idx);
+
+ /*
+* Must be called after all mmu_notifier_put are done and before
+* kfd_process_wq is released.
+*
+* Ensures that all outstanding free_notifier gets called, triggering
the release
+* of the process.
+*/
+ mmu_notifier_synchronize();
+}
+
+
static int kfd_process_init_cwsr_apu(struct kfd_process *p, struct file *filep)
{
unsigned long offset;
--
2.38.1
Re: [PATCH v2 RESEND] drm/amdgpu: register a vga_switcheroo client for MacBooks with apple-gmux
Applied. Thanks!
Alex
On Fri, Mar 3, 2023 at 6:35 AM Orlando Chamberlain
wrote:
>
> Commit 3840c5bcc245 ("drm/amdgpu: disentangle runtime pm and
> vga_switcheroo") made amdgpu only register a vga_switcheroo client for
> GPU's with PX, however AMD GPUs in dual gpu Apple Macbooks do need to
> register, but don't have PX. Instead of AMD's PX, they use apple-gmux.
>
> Use apple_gmux_detect() to identify these gpus, and
> pci_is_thunderbolt_attached() to ensure eGPUs connected to Dual GPU
> Macbooks don't register with vga_switcheroo.
>
> Fixes: 3840c5bcc245 ("drm/amdgpu: disentangle runtime pm and vga_switcheroo")
> Link:
> https://lore.kernel.org/amd-gfx/20230210044826.9834-10-orlandoch@gmail.com/
> Signed-off-by: Orlando Chamberlain
> ---
> v1->v2: Use apple_gmux_detect()
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 21 -
> 1 file changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 2f28a8c02f64..ef8b996f0622 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -35,6 +35,7 @@
> #include
> #include
> #include
> +#include
>
> #include
> #include
> @@ -3919,12 +3920,15 @@ int amdgpu_device_init(struct amdgpu_device *adev,
> if ((adev->pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
> vga_client_register(adev->pdev, amdgpu_device_vga_set_decode);
>
> - if (amdgpu_device_supports_px(ddev)) {
> - px = true;
> + px = amdgpu_device_supports_px(ddev);
> +
> + if (px || (!pci_is_thunderbolt_attached(adev->pdev) &&
> + apple_gmux_detect(NULL, NULL)))
> vga_switcheroo_register_client(adev->pdev,
>_switcheroo_ops, px);
> +
> + if (px)
> vga_switcheroo_init_domain_pm_ops(adev->dev,
> >vga_pm_domain);
> - }
>
> if (adev->gmc.xgmi.pending_reset)
> queue_delayed_work(system_wq, _info.delayed_reset_work,
> @@ -4029,6 +4033,7 @@ void amdgpu_device_fini_hw(struct amdgpu_device *adev)
> void amdgpu_device_fini_sw(struct amdgpu_device *adev)
> {
> int idx;
> + bool px;
>
> amdgpu_fence_driver_sw_fini(adev);
> amdgpu_device_ip_fini(adev);
> @@ -4048,10 +4053,16 @@ void amdgpu_device_fini_sw(struct amdgpu_device *adev)
>
> kfree(adev->bios);
> adev->bios = NULL;
> - if (amdgpu_device_supports_px(adev_to_drm(adev))) {
> +
> + px = amdgpu_device_supports_px(adev_to_drm(adev));
> +
> + if (px || (!pci_is_thunderbolt_attached(adev->pdev) &&
> + apple_gmux_detect(NULL, NULL)))
> vga_switcheroo_unregister_client(adev->pdev);
> +
> + if (px)
> vga_switcheroo_fini_domain_pm_ops(adev->dev);
> - }
> +
> if ((adev->pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
> vga_client_unregister(adev->pdev);
>
> --
> 2.39.1
>
Re: [v2] drm/amd/pm: Fix sienna cichlid incorrect OD volage after resume
On 3/4/2023 17:44, Błażej Szczygieł wrote:
Always setup overdrive tables after resume. Preserve only some
user-defined settings in user_overdrive_table if they're set.
Copy restored user_overdrive_table into od_table to get correct
values.
Signed-off-by: Błażej Szczygieł
---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 43 ++-
1 file changed, 33 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 697e98a0a20a..75f18681e984 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -2143,16 +2143,9 @@ static int sienna_cichlid_set_default_od_settings(struct
smu_context *smu)
(OverDriveTable_t *)smu->smu_table.boot_overdrive_table;
OverDriveTable_t *user_od_table =
(OverDriveTable_t *)smu->smu_table.user_overdrive_table;
+ OverDriveTable_t user_od_table_bak;
int ret = 0;
- /*
-* For S3/S4/Runpm resume, no need to setup those overdrive tables
again as
-* - either they already have the default OD settings got during cold
bootup
-* - or they have some user customized OD settings which cannot be
overwritten
-*/
- if (smu->adev->in_suspend)
- return 0;
-
ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE,
0, (void *)boot_od_table, false);
if (ret) {
@@ -2163,7 +2156,23 @@ static int sienna_cichlid_set_default_od_settings(struct
smu_context *smu)
sienna_cichlid_dump_od_table(smu, boot_od_table);
memcpy(od_table, boot_od_table, sizeof(OverDriveTable_t));
- memcpy(user_od_table, boot_od_table, sizeof(OverDriveTable_t));
+
+ /*
+* For S3/S4/Runpm resume, we need to setup those overdrive tables
again,
+* but we have to preserve user defined values in "user_od_table".
+*/
+ if (!smu->adev->in_suspend) {
+ memcpy(user_od_table, boot_od_table, sizeof(OverDriveTable_t));
+ smu->user_dpm_profile.user_od = false;
+ } else if (smu->user_dpm_profile.user_od) {
+ memcpy(_od_table_bak, user_od_table,
sizeof(OverDriveTable_t));
+ memcpy(user_od_table, boot_od_table, sizeof(OverDriveTable_t));
+ user_od_table->GfxclkFmin = user_od_table_bak.GfxclkFmin;
+ user_od_table->GfxclkFmax = user_od_table_bak.GfxclkFmax;
+ user_od_table->UclkFmin = user_od_table_bak.UclkFmin;
+ user_od_table->UclkFmax = user_od_table_bak.UclkFmax;
+ user_od_table->VddGfxOffset = user_od_table_bak.VddGfxOffset;
+ }
return 0;
}
@@ -2373,6 +2382,20 @@ static int sienna_cichlid_od_edit_dpm_table(struct
smu_context *smu,
return ret;
}
+static int sienna_cichlid_restore_user_od_settings(struct smu_context *smu)
+{
+ struct smu_table_context *table_context = >smu_table;
+ OverDriveTable_t *od_table = table_context->overdrive_table;
+ OverDriveTable_t *user_od_table = table_context->user_overdrive_table;
+ int res;
+
+ res = smu_v11_0_restore_user_od_settings(smu);
+ if (res == 0)
+ memcpy(od_table, user_od_table, sizeof(OverDriveTable_t));
+
+ return res;
+}
+
static int sienna_cichlid_run_btc(struct smu_context *smu)
{
int res;
@@ -4400,7 +4423,7 @@ static const struct pptable_funcs
sienna_cichlid_ppt_funcs = {
.set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,
.set_default_od_settings = sienna_cichlid_set_default_od_settings,
.od_edit_dpm_table = sienna_cichlid_od_edit_dpm_table,
- .restore_user_od_settings = smu_v11_0_restore_user_od_settings,
+ .restore_user_od_settings = sienna_cichlid_restore_user_od_settings,
Rather than introduce a new static function perhaps it would be better
to just change 'smu_v11_0_restore_user_od_settings'.
That could help this issue if it also occurs on Navi10 as well.
.run_btc = sienna_cichlid_run_btc,
.set_power_source = smu_v11_0_set_power_source,
.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
Re: [PATCH] drm/amd/display: change several dcn30 variables storage-class-specifier to static
Applied. Thanks!
Alex
On Sun, Mar 5, 2023 at 7:52 AM Tom Rix wrote:
>
> smatch reports these similar problems in dcn30
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dwb.c:223:25:
> warning: symbol 'dcn30_dwbc_funcs' was not declared. Should it be static?
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mmhubbub.c:214:28:
> warning: symbol 'dcn30_mmhubbub_funcs' was not declared. Should it be
> static?
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:1402:24:
> warning: symbol 'dcn30_mpc_funcs' was not declared. Should it be static?
>
> All of these are only used in their definition file, so they should be static
>
> Signed-off-by: Tom Rix
> ---
> drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c | 2 +-
> drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c | 2 +-
> drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c
> b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c
> index f14f69616692..0d98918bf0fc 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c
> @@ -220,7 +220,7 @@ void dwb3_set_denorm(struct dwbc *dwbc, struct
> dc_dwb_params *params)
> }
>
>
> -const struct dwbc_funcs dcn30_dwbc_funcs = {
> +static const struct dwbc_funcs dcn30_dwbc_funcs = {
> .get_caps = dwb3_get_caps,
> .enable = dwb3_enable,
> .disable= dwb3_disable,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c
> b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c
> index 7a93eff183d9..6f2a0d5d963b 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c
> @@ -211,7 +211,7 @@ static void mmhubbub3_config_mcif_arb(struct mcif_wb
> *mcif_wb,
> REG_UPDATE(MCIF_WB_ARBITRATION_CONTROL,
> MCIF_WB_CLIENT_ARBITRATION_SLICE, params->arbitration_slice);
> }
>
> -const struct mcif_wb_funcs dcn30_mmhubbub_funcs = {
> +static const struct mcif_wb_funcs dcn30_mmhubbub_funcs = {
> .warmup_mcif= mmhubbub3_warmup_mcif,
> .enable_mcif= mmhubbub2_enable_mcif,
> .disable_mcif = mmhubbub2_disable_mcif,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
> b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
> index ad1c1b703874..6cf40c1332bc 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
> @@ -1399,7 +1399,7 @@ static void mpc3_set_mpc_mem_lp_mode(struct mpc *mpc)
> }
> }
>
> -const struct mpc_funcs dcn30_mpc_funcs = {
> +static const struct mpc_funcs dcn30_mpc_funcs = {
> .read_mpcc_state = mpc1_read_mpcc_state,
> .insert_plane = mpc1_insert_plane,
> .remove_mpcc = mpc1_remove_mpcc,
> --
> 2.27.0
>
Re: [PATCH] drm/amd/display: change several dcn20 variables storage-class-specifier to static
Applied. Thanks!
Alex
On Sat, Mar 4, 2023 at 11:22 AM Tom Rix wrote:
>
> smatch reports these similar problems in dcn20
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.c:53:24:
> warning: symbol 'dcn20_dsc_funcs' was not declared. Should it be static?
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dwb.c:304:25:
> warning: symbol 'dcn20_dwbc_funcs' was not declared. Should it be static?
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mmhubbub.c:300:28:
> warning: symbol 'dcn20_mmhubbub_funcs' was not declared. Should it be
> static?
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.c:545:24:
> warning: symbol 'dcn20_mpc_funcs' was not declared. Should it be static?
>
> All of these are only used in their definition file, so they should be static
>
> Signed-off-by: Tom Rix
> ---
> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 2 +-
> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c | 2 +-
> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c | 2 +-
> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c | 2 +-
> 4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
> b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
> index 42344aec60d6..5bd698cd6d20 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
> @@ -50,7 +50,7 @@ static void dsc2_enable(struct display_stream_compressor
> *dsc, int opp_pipe);
> static void dsc2_disable(struct display_stream_compressor *dsc);
> static void dsc2_disconnect(struct display_stream_compressor *dsc);
>
> -const struct dsc_funcs dcn20_dsc_funcs = {
> +static const struct dsc_funcs dcn20_dsc_funcs = {
> .dsc_get_enc_caps = dsc2_get_enc_caps,
> .dsc_read_state = dsc2_read_state,
> .dsc_validate_stream = dsc2_validate_stream,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
> b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
> index f1490e97b6ce..f8667be57046 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
> @@ -301,7 +301,7 @@ void dwb2_set_scaler(struct dwbc *dwbc, struct
> dc_dwb_params *params)
>
> }
>
> -const struct dwbc_funcs dcn20_dwbc_funcs = {
> +static const struct dwbc_funcs dcn20_dwbc_funcs = {
> .get_caps = dwb2_get_caps,
> .enable = dwb2_enable,
> .disable= dwb2_disable,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c
> b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c
> index ccd91792991b..259a98e4ee2c 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c
> @@ -297,7 +297,7 @@ void mcifwb2_dump_frame(struct mcif_wb *mcif_wb,
> dump_info->size = dest_height * (mcif_params->luma_pitch +
> mcif_params->chroma_pitch);
> }
>
> -const struct mcif_wb_funcs dcn20_mmhubbub_funcs = {
> +static const struct mcif_wb_funcs dcn20_mmhubbub_funcs = {
> .enable_mcif= mmhubbub2_enable_mcif,
> .disable_mcif = mmhubbub2_disable_mcif,
> .config_mcif_buf= mmhubbub2_config_mcif_buf,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
> b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
> index 116f67a0b989..5da6e44f284a 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
> @@ -542,7 +542,7 @@ static struct mpcc *mpc2_get_mpcc_for_dpp(struct mpc_tree
> *tree, int dpp_id)
> return NULL;
> }
>
> -const struct mpc_funcs dcn20_mpc_funcs = {
> +static const struct mpc_funcs dcn20_mpc_funcs = {
> .read_mpcc_state = mpc1_read_mpcc_state,
> .insert_plane = mpc1_insert_plane,
> .remove_mpcc = mpc1_remove_mpcc,
> --
> 2.27.0
>
Re: [PATCH] drm/amd/display: change several dcn201 variables storage-class-specifier to static
Applied. Thanks!
Alex
On Sat, Mar 4, 2023 at 10:26 AM Tom Rix wrote:
>
> smatch reports these similar problems in dcn201
> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c:165:22:
> warning: symbol 'dcn201_funcs' was not declared. Should it be static?
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:77:30:
> warning: symbol 'dcn201_ip' was not declared. Should it be static?
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:139:37:
> warning: symbol 'dcn201_soc' was not declared. Should it be static?
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_mpc.c:79:24:
> warning: symbol 'dcn201_mpc_funcs' was not declared. Should it be static?
>
> All of these are only used in their definition file, so they should be static
>
> Signed-off-by: Tom Rix
> ---
> .../gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c| 2 +-
> drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c| 2 +-
> drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c | 4 ++--
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
> b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
> index f0577dcd1af6..811720749faf 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
> @@ -162,7 +162,7 @@ static void dcn201_update_clocks(struct clk_mgr
> *clk_mgr_base,
> }
> }
>
> -struct clk_mgr_funcs dcn201_funcs = {
> +static struct clk_mgr_funcs dcn201_funcs = {
> .get_dp_ref_clk_frequency = dce12_get_dp_ref_freq_khz,
> .update_clocks = dcn201_update_clocks,
> .init_clocks = dcn201_init_clocks,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c
> b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c
> index 95c4c55f067c..1af03a86ec9b 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c
> @@ -76,7 +76,7 @@ static void mpc201_init_mpcc(struct mpcc *mpcc, int
> mpcc_inst)
> mpcc->shared_bottom = false;
> }
>
> -const struct mpc_funcs dcn201_mpc_funcs = {
> +static const struct mpc_funcs dcn201_mpc_funcs = {
> .read_mpcc_state = mpc1_read_mpcc_state,
> .insert_plane = mpc1_insert_plane,
> .remove_mpcc = mpc1_remove_mpcc,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c
> b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c
> index 407d995bfa99..cd46701398d9 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c
> @@ -74,7 +74,7 @@
> #define MIN_DISP_CLK_KHZ 10
> #define MIN_DPP_CLK_KHZ 10
>
> -struct _vcs_dpi_ip_params_st dcn201_ip = {
> +static struct _vcs_dpi_ip_params_st dcn201_ip = {
> .gpuvm_enable = 0,
> .hostvm_enable = 0,
> .gpuvm_max_page_table_levels = 4,
> @@ -136,7 +136,7 @@ struct _vcs_dpi_ip_params_st dcn201_ip = {
> .number_of_cursors = 1,
> };
>
> -struct _vcs_dpi_soc_bounding_box_st dcn201_soc = {
> +static struct _vcs_dpi_soc_bounding_box_st dcn201_soc = {
> .clock_limits = {
> {
> .state = 0,
> --
> 2.27.0
>
Re: [PATCH v6 32/57] nouveau: adapt NV_DEBUG, NV_ATOMIC to use DRM.debug
On Sun, Sep 4, 2022 at 4:48 PM Jim Cromie wrote:
>
> These 2 macros used drm_debug_enabled() on DRM_UT_{DRIVER,ATOMIC}
> respectively, replace those with drm_dbg_##cat invocations.
>
> this results in new class'd prdbg callsites:
>
> :#> grep nouveau /proc/dynamic_debug/control | grep class | wc
> 1161130 15584
> :#> grep nouveau /proc/dynamic_debug/control | grep class | grep DRIVER | wc
> 74 7049709
> :#> grep nouveau /proc/dynamic_debug/control | grep class | grep ATOMIC | wc
> 31 3074237
> :#> grep nouveau /proc/dynamic_debug/control | grep class | grep KMS | wc
> 11 1191638
>
> the KMS entries are due to existing uses of drm_dbg_kms().
>
> Signed-off-by: Jim Cromie
Has this patch set been forgotten? It was posted six months ago and
there's no sign that it was picked up.
The changes to drm_debug_enabled have impacted NV_DEBUG and NV_ATOMIC
and something needs to be fixed. I posted a simpler patch a few weeks
ago, but maybe Jim's is better.
RE: [PATCH] drm/amdgpu: disable cstate properly for driver reloading scenario
[AMD Official Use Only - General] > -Original Message- > From: Lazar, Lijo > Sent: Monday, March 6, 2023 12:42 AM > To: Deucher, Alexander ; Quan, Evan > ; amd-gfx@lists.freedesktop.org > Subject: Re: [PATCH] drm/amdgpu: disable cstate properly for driver > reloading scenario > > > > On 3/2/2023 9:05 PM, Lazar, Lijo wrote: > > > > > > On 3/2/2023 8:56 PM, Deucher, Alexander wrote: > >> [AMD Official Use Only - General] > >> > >>> -Original Message- > >>> From: Quan, Evan > >>> Sent: Thursday, March 2, 2023 4:31 AM > >>> To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org; > >>> Deucher, Alexander > >>> Subject: RE: [PATCH] drm/amdgpu: disable cstate properly for driver > >>> reloading scenario > >>> > >>> [AMD Official Use Only - General] > >>> > >>> > >>> > -Original Message- > From: Lazar, Lijo > Sent: Thursday, March 2, 2023 5:21 PM > To: Quan, Evan ; amd- > g...@lists.freedesktop.org > Cc: Deucher, Alexander > Subject: Re: [PATCH] drm/amdgpu: disable cstate properly for driver > reloading scenario > > > > On 3/2/2023 2:43 PM, Quan, Evan wrote: > > [AMD Official Use Only - General] > > > > > > > >> -Original Message- > >> From: Lazar, Lijo > >> Sent: Thursday, March 2, 2023 4:28 PM > >> To: Quan, Evan ; amd- > >>> g...@lists.freedesktop.org > >> Cc: Deucher, Alexander > >> Subject: Re: [PATCH] drm/amdgpu: disable cstate properly for > >> driver reloading scenario > >> > >> > >> > >> On 3/2/2023 12:28 PM, Evan Quan wrote: > >>> Gpu reset might be needed during driver reloading. To guard > >>> that(gpu > >>> reset) work, df cstate needs to be disabled properly. > >>> > >>> Signed-off-by: Evan Quan > >>> Change-Id: I5c074c265c0b08a67b6934ae1ad9aa3fed245461 > >>> --- > >>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 > + > >>> 1 file changed, 9 insertions(+) > >>> > >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > >>> index 51bbeaa1f311..3c854461ef32 100644 > >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > >>> @@ -2816,6 +2816,15 @@ static int > >>> amdgpu_device_ip_fini_early(struct > >> amdgpu_device *adev) > >>> amdgpu_device_set_pg_state(adev, > >>> AMD_PG_STATE_UNGATE); > >>> amdgpu_device_set_cg_state(adev, > >>> AMD_CG_STATE_UNGATE); > >>> > >>> + /* > >>> + * Get df cstate disabled properly on driver unloading. > >>> + * Since on the succeeding driver reloading, gpu reset > >>> +might > >>> + * be required. And cstate disabled is a prerequisite for > >>> + * that(gpu reset). > >>> + */ > >>> + if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW)) > >>> + dev_warn(adev->dev, "Failed to disallow df cstate"); > >>> + > >> > >> This looks more like a firmware bug. Driver sends the Unload > >> message to > FW. > >> In that case FW should disable all features including C-state. > > Driver does not send the Unload message. We want PMFM alive and > > ready > for handling possible gpu reset on reloading. > > > > Actually, soc21_need_reset_on_init code itself has a bug. PSP won't > get unloaded by default on ring destruction. Even if PSP stops, it > could just keep the heartbeat value as non-zero (just that it won't > >>> increment). > > Probably, that needs to be fixed first rather than keeping PMFW > alive for a reset. > >>> As I remembered, the change(asic reset during reloading) seemed > >>> introduced to address some sriov issues. > >>> @Deucher, Alexander might share more backgrounds about this. > >>> To be honest, I'm not a fan of this(perform asic reset during > >>> reloading). > >> > >> I'm open to doing it a better way. We did it for two reasons: > >> 1. often times the device was left in a weird state after the driver > >> unload/VM killed. Etc. We needed a way to put the device into a > >> known good state so the driver could re-initialize it. Plus, IIRC, > >> on some of the older ASICS, once the SMU or PSP firmware was loaded, > >> there was no way to reload it without a reset so you needed one > >> anyway. This is largely why we have to reset for S4 as well. > >> 2. Some large servers didn't power off PCI devices on reboots to save > >> time. This left the devices with whatever state they had before the > >> system was rebooted which led to driver initialization problems on > >> subsequent boots because the device was in an unknown state. > >> > >> If there is a better way to handle these situations, I'm all for it. > > Hi Alex, > > There is a part of FW running to handle generic reset requests on SOC21 > SOCs. Can we remove the reset-on-reload for
Re: [PATCH] amdgpu: Avoid building on UML
Looks like this patch got lost over the holidays. Alex, are you OK with applying this patch? Or are people looking for a more general solution to not build HW drivers for UML? FWIW: Acked-by: Felix Kuehling Am 2023-01-12 um 23:30 schrieb Peter Foley: The amdgpu driver tries to use fields not supported by UML's cpuinfo struct. Disable the driver when targeting UML to avoid tripping up allyesconfig. e.g. ../drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.c: In function ‘intel_core_rkl_chk’: ../drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.c:1742:33: error: initialization of ‘struct cpuinfo_x86 *’ from incompatible pointer type ‘struct cpuinfo_um *’ [-Werror=incompatible-pointer-types ] ../drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c: In function ‘kfd_cpumask_to_apic_id’: ../drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:2157:48: error: ‘struct cpuinfo_um’ has no member named ‘apicid’ Signed-off-by: Peter Foley --- drivers/gpu/drm/amd/amdgpu/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/Kconfig b/drivers/gpu/drm/amd/amdgpu/Kconfig index 5fcd510f1abb..aa0008ff8712 100644 --- a/drivers/gpu/drm/amd/amdgpu/Kconfig +++ b/drivers/gpu/drm/amd/amdgpu/Kconfig @@ -3,6 +3,7 @@ config DRM_AMDGPU tristate "AMD GPU" depends on DRM && PCI && MMU + depends on !UML select FW_LOADER select DRM_DISPLAY_DP_HELPER select DRM_DISPLAY_HDMI_HELPER --- base-commit: 1b929c02afd37871d5afb9d498426f83432e71c2 change-id: 20230112-amduml-565935d34bfb Best regards,
[linux-next:master] BUILD REGRESSION dc837c1a5137a8cf2e9432c1891392b6a66f4d8d
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: dc837c1a5137a8cf2e9432c1891392b6a66f4d8d Add linux-next specific files for 20230306 Error/Warning reports: https://lore.kernel.org/oe-kbuild-all/202302100744.d1zzxxfn-...@intel.com https://lore.kernel.org/oe-kbuild-all/202302111601.jty4lkra-...@intel.com https://lore.kernel.org/oe-kbuild-all/202302201555.oi4n54jb-...@intel.com https://lore.kernel.org/oe-kbuild-all/202302242257.4w4myb9z-...@intel.com https://lore.kernel.org/oe-kbuild-all/202303061725.wv3p5rdb-...@intel.com Error/Warning: (recently discovered and may have been fixed) FAILED: load BTF from vmlinux: No data available drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:294:6: warning: no previous prototype for 'optc3_wait_drr_doublebuffer_pending_clear' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:1600:5: warning: no previous prototype for function 'vangogh_set_apu_thermal_limit' [-Wmissing-prototypes] drivers/soc/renesas/pwc-rzv2m.c:124:34: warning: unused variable 'rzv2m_pwc_of_match' [-Wunused-const-variable] Unverified Error/Warning (likely false positive, please contact us if interested): drivers/platform/x86/mlx-platform.c:6013 mlxplat_mlxcpld_verify_bus_topology() error: uninitialized symbol 'shift'. drivers/usb/gadget/composite.c:2082:33: sparse: sparse: restricted __le16 degrades to integer drivers/watchdog/imx2_wdt.c:442:22: sparse: sparse: symbol 'imx_wdt' was not declared. Should it be static? drivers/watchdog/imx2_wdt.c:446:22: sparse: sparse: symbol 'imx_wdt_legacy' was not declared. Should it be static? Error/Warning ids grouped by kconfigs: gcc_recent_errors |-- arm64-allyesconfig | `-- drivers-gpu-drm-amd-amdgpu-..-display-dc-dcn30-dcn30_optc.c:warning:no-previous-prototype-for-optc3_wait_drr_doublebuffer_pending_clear |-- csky-randconfig-s031-20230305 | |-- drivers-usb-gadget-composite.c:sparse:sparse:restricted-__le16-degrades-to-integer | |-- drivers-watchdog-imx2_wdt.c:sparse:sparse:symbol-imx_wdt-was-not-declared.-Should-it-be-static | `-- drivers-watchdog-imx2_wdt.c:sparse:sparse:symbol-imx_wdt_legacy-was-not-declared.-Should-it-be-static |-- i386-allyesconfig | `-- drivers-gpu-drm-amd-amdgpu-..-display-dc-dcn30-dcn30_optc.c:warning:no-previous-prototype-for-optc3_wait_drr_doublebuffer_pending_clear |-- openrisc-randconfig-r024-20230306 | `-- FAILED:load-BTF-from-vmlinux:No-data-available |-- sparc-randconfig-s032-20230305 | |-- drivers-watchdog-imx2_wdt.c:sparse:sparse:symbol-imx_wdt-was-not-declared.-Should-it-be-static | `-- drivers-watchdog-imx2_wdt.c:sparse:sparse:symbol-imx_wdt_legacy-was-not-declared.-Should-it-be-static |-- sparc64-randconfig-s051-20230305 | |-- drivers-watchdog-imx2_wdt.c:sparse:sparse:symbol-imx_wdt-was-not-declared.-Should-it-be-static | `-- drivers-watchdog-imx2_wdt.c:sparse:sparse:symbol-imx_wdt_legacy-was-not-declared.-Should-it-be-static |-- x86_64-allyesconfig | `-- drivers-gpu-drm-amd-amdgpu-..-display-dc-dcn30-dcn30_optc.c:warning:no-previous-prototype-for-optc3_wait_drr_doublebuffer_pending_clear |-- x86_64-randconfig-m001-20230306 | `-- drivers-platform-x86-mlx-platform.c-mlxplat_mlxcpld_verify_bus_topology()-error:uninitialized-symbol-shift-. `-- x86_64-randconfig-s021 `-- drivers-usb-gadget-composite.c:sparse:sparse:restricted-__le16-degrades-to-integer clang_recent_errors |-- hexagon-randconfig-r045-20230306 | `-- drivers-soc-renesas-pwc-rzv2m.c:warning:unused-variable-rzv2m_pwc_of_match |-- mips-randconfig-r035-20230306 | `-- drivers-gpu-drm-amd-amdgpu-..-pm-swsmu-smu11-vangogh_ppt.c:warning:no-previous-prototype-for-function-vangogh_set_apu_thermal_limit |-- powerpc-xes_mpc85xx_defconfig | `-- error:unknown-target-CPU `-- riscv-randconfig-r042-20230306 `-- drivers-gpu-drm-amd-amdgpu-..-pm-swsmu-smu11-vangogh_ppt.c:warning:no-previous-prototype-for-function-vangogh_set_apu_thermal_limit elapsed time: 850m configs tested: 151 configs skipped: 8 tested configs: alphaallyesconfig gcc alpha defconfig gcc alpharandconfig-r004-20230305 gcc alpharandconfig-r005-20230306 gcc alpharandconfig-r025-20230306 gcc arc allyesconfig gcc arc buildonly-randconfig-r005-20230306 gcc arc defconfig gcc archsdk_defconfig gcc arc randconfig-r002-20230306 gcc arc randconfig-r022-20230305 gcc arc randconfig-r022-20230306 gcc arc randconfig-r043-20230305 gcc arc randconfig-r043-20230306 gcc arm allmodconfig gcc arm allnoconfig gcc arm allyesconfig gcc
[PATCH 2/2] drm/amdgpu: fix error checking in amdgpu_read_mm_registers for soc21
Properly skip non-existent registers as well.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2442
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc21.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 620f7409825d..9df2236007ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -291,9 +291,10 @@ static int soc21_read_register(struct amdgpu_device *adev,
u32 se_num,
*value = 0;
for (i = 0; i < ARRAY_SIZE(soc21_allowed_read_registers); i++) {
en = _allowed_read_registers[i];
- if (adev->reg_offset[en->hwip][en->inst] &&
- reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
- + en->reg_offset))
+ if (!adev->reg_offset[en->hwip][en->inst])
+ continue;
+ else if (reg_offset !=
(adev->reg_offset[en->hwip][en->inst][en->seg]
+ + en->reg_offset))
continue;
*value = soc21_get_register_value(adev,
--
2.39.2
[PATCH 1/2] drm/amdgpu: fix error checking in amdgpu_read_mm_registers for soc15
Properly skip non-existent registers as well.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2442
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 7cd17dda32ce..2eddd7f6cd41 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -439,8 +439,9 @@ static int soc15_read_register(struct amdgpu_device *adev,
u32 se_num,
*value = 0;
for (i = 0; i < ARRAY_SIZE(soc15_allowed_read_registers); i++) {
en = _allowed_read_registers[i];
- if (adev->reg_offset[en->hwip][en->inst] &&
- reg_offset !=
(adev->reg_offset[en->hwip][en->inst][en->seg]
+ if (!adev->reg_offset[en->hwip][en->inst])
+ continue;
+ else if (reg_offset !=
(adev->reg_offset[en->hwip][en->inst][en->seg]
+ en->reg_offset))
continue;
--
2.39.2
Re: Build regressions/improvements in v6.3-rc1
On Mon, 6 Mar 2023, Geert Uytterhoeven wrote:
Below is the list of build error/warning regressions/improvements in
v6.3-rc1[1] compared to v6.2[2].
Summarized:
- build errors: +9/-14
- build warnings: +4/-1447
Happy fixing! ;-)
Thanks to the linux-next team for providing the build service.
[1]
http://kisskb.ellerman.id.au/kisskb/branch/linus/head/fe15c26ee26efa11741a7b632e9f23b01aca4cc6/
(all 152 configs)
[2]
http://kisskb.ellerman.id.au/kisskb/branch/linus/head/c9c3395d5e3dcc6daee66c6908354d47bf98cb0c/
(all 152 configs)
*** ERRORS ***
9 error regressions:
+ /kisskb/src/drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c: error: 'struct
cpuinfo_um' has no member named 'apicid': => 2157:41, 2157:48
um-x86_64/um-all{mod,yes}config
um-x86_64-gcc12/um-all{mod,yes}config
+
/kisskb/src/drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:
error: the frame size of 2208 bytes is larger than 2048 bytes
[-Werror=frame-larger-than=]: => 7086:1
arm64-gcc5/arm64-allmodconfig
(Already improved from 2224 to 2208 bytes)
+ /kisskb/src/drivers/gpu/drm/msm/msm_mdss.c: error: case label does not reduce
to an integer constant: => 299:2, 300:2, 296:2
powerpc-gcc5/{ppc32,ppc64_book3e,ppc64le}_allmodconfig
powerpc-gcc5/powerpc-all{mod,yes}config
arm64-gcc5/arm64-allmodconfig
+ /kisskb/src/drivers/media/i2c/imx290.c: error: 'imx290_runtime_resume' defined
but not used [-Werror=unused-function]: => 1082:12
+ /kisskb/src/drivers/media/i2c/imx290.c: error: 'imx290_runtime_suspend' defined
but not used [-Werror=unused-function]: => 1090:12
m68k-gcc{8,11}/m68k-allmodconfig
parisc-gcc{8,11}/parisc-allmodconfig
s390x-gcc11/s390-all{mod,yes}config
Fix available since Feb 7.
+ /kisskb/src/fs/btrfs/inode.c: error: 'location.type' may be used uninitialized
[-Werror=maybe-uninitialized]: => 5730:21
sparc64-gcc11/sparc{,64}-allmodconfig
parisc-gcc11/parisc-allmodconfig
+ /kisskb/src/fs/btrfs/send.c: error: 'right_gen' may be used uninitialized in
this function [-Werror=maybe-uninitialized]: => 1909:13, 1902:23
powerpc-gcc5/powerpc-all{mod,yes}config
powerpc-gcc5/{ppc32,ppc64_book3e,ppc64le}_allmodconfig
powerpc-gcc5/{ppc64,ppc64le,pseries,pseries_le,skiroot}_defconfig
+
/opt/cross/kisskb/fe-x86-64-core-i7-2017.05/x86_64-buildroot-linux-gnu/sysroot/usr/include/bits/stdlib-float.h:
error: SSE register return with SSE disabled: => 27:1
um-x86_64/um-allyesconfig
+ {standard input}: Error: unknown pseudo-op: `.': => 1118
sh4-gcc11/sh-all{mod,yes}config (ICE)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH] drm/amd/display: remove an unnecessary NULL check
The 'pipe' can't be NULL because it points to an element of array.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixed: 7cf2c840c6b5 (drm/amd/display: Commit validation set from state)
Signed-off-by: Danila Chernetsov
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 0cb8d1f934d1..d3b850372eb3 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1854,7 +1854,7 @@ static enum dc_status dc_commit_state_no_check(struct dc
*dc, struct dc_state *c
for (k = 0; k < MAX_PIPES; k++) {
pipe = >res_ctx.pipe_ctx[k];
- for (l = 0 ; pipe && l < context->stream_count; l++) {
+ for (l = 0 ; l < context->stream_count; l++) {
if (context->streams[l] &&
context->streams[l] == pipe->stream &&
dc->hwss.setup_stereo)
--
2.25.1
Re: [PATCH 1/2] drm/amdgpu: Move to common indirect reg access helper
Am 06.03.23 um 09:04 schrieb Hawking Zhang:
Replace soc15, nv, soc21 specific callbacks with common
one. so we don't need to duplicate code when introduce
new asics.
Nice cleanup. Is pcie_rreg/pcie_wreg/... now still set to anything else
than the common functions? If not we might also remove the callback.
Signed-off-by: Hawking Zhang
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 4 --
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 32 +++---
drivers/gpu/drm/amd/amdgpu/nv.c| 49 ++
drivers/gpu/drm/amd/amdgpu/soc15.c | 49 ++
drivers/gpu/drm/amd/amdgpu/soc21.c | 48 ++---
5 files changed, 30 insertions(+), 152 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 07e846510005..9387731afb8b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1142,16 +1142,12 @@ void amdgpu_mm_wreg8(struct amdgpu_device *adev,
uint32_t offset, uint8_t value)
uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
- u32 pcie_index, u32 pcie_data,
u32 reg_addr);
u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev,
- u32 pcie_index, u32 pcie_data,
u32 reg_addr);
void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
-u32 pcie_index, u32 pcie_data,
u32 reg_addr, u32 reg_data);
void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
- u32 pcie_index, u32 pcie_data,
u32 reg_addr, u64 reg_data);
bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 77e6c8bf7190..b1b815dc69b3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -676,20 +676,20 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev,
u32 index, u64 v)
* amdgpu_device_indirect_rreg - read an indirect register
*
* @adev: amdgpu_device pointer
- * @pcie_index: mmio register offset
- * @pcie_data: mmio register offset
* @reg_addr: indirect register address to read from
*
* Returns the value of indirect register @reg_addr
*/
u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
- u32 pcie_index, u32 pcie_data,
u32 reg_addr)
{
- unsigned long flags;
- u32 r;
+ unsigned long flags, pcie_index, pcie_data;
void __iomem *pcie_index_offset;
void __iomem *pcie_data_offset;
+ u32 r;
+
+ pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);
+ pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);
spin_lock_irqsave(>pcie_idx_lock, flags);
pcie_index_offset = (void __iomem *)adev->rmmio + pcie_index * 4;
@@ -707,20 +707,20 @@ u32 amdgpu_device_indirect_rreg(struct amdgpu_device
*adev,
* amdgpu_device_indirect_rreg64 - read a 64bits indirect register
*
* @adev: amdgpu_device pointer
- * @pcie_index: mmio register offset
- * @pcie_data: mmio register offset
* @reg_addr: indirect register address to read from
*
* Returns the value of indirect register @reg_addr
*/
u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev,
- u32 pcie_index, u32 pcie_data,
u32 reg_addr)
{
- unsigned long flags;
- u64 r;
+ unsigned long flags, pcie_index, pcie_data;
void __iomem *pcie_index_offset;
void __iomem *pcie_data_offset;
+ u64 r;
+
+ pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);
+ pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);
spin_lock_irqsave(>pcie_idx_lock, flags);
pcie_index_offset = (void __iomem *)adev->rmmio + pcie_index * 4;
@@ -750,13 +750,15 @@ u64 amdgpu_device_indirect_rreg64(struct amdgpu_device
*adev,
*
*/
void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
-u32 pcie_index, u32 pcie_data,
u32 reg_addr, u32 reg_data)
{
- unsigned long flags;
+ unsigned long flags, pcie_index, pcie_data;
void __iomem *pcie_index_offset;
void __iomem *pcie_data_offset;
+ pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);
+ pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);
+
spin_lock_irqsave(>pcie_idx_lock, flags);
pcie_index_offset = (void __iomem *)adev->rmmio + pcie_index * 4;
pcie_data_offset = (void __iomem
[PATCH v2] drm/ttm: Change the meaning of the fields in the ttm_place structure from pfn to bytes
The ttm_plac structure allows page-based allocation,
to support byte-based allocation using default or custom
ttm_resource_manager_func function like
ttm_range_man_alloc, amdgpu_gtt_mgr_new,
i915_ttm_buddy_man_alloc,nouveau_vram_manager_new etc.
Change the ttm_place structure member fpfn, lpfn, mem_type to
res_start, res_end, res_type.
Change the unsigned to u64.
Fix the dependence in all the DRM drivers and
clean up PAGE_SHIFT operation.
v1 -> v2: fix the bug reviewed by Michel, addressing Stanislaw
missing justification.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 11 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c| 66 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 22 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 17 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 40 ---
drivers/gpu/drm/drm_gem_vram_helper.c | 10 +-
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 22 ++--
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +-
drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 102 --
drivers/gpu/drm/i915/i915_ttm_buddy_manager.h | 2 +-
drivers/gpu/drm/i915/intel_region_ttm.c | 12 +--
drivers/gpu/drm/nouveau/nouveau_bo.c | 41 +++
drivers/gpu/drm/nouveau/nouveau_mem.c | 10 +-
drivers/gpu/drm/qxl/qxl_object.c | 14 +--
drivers/gpu/drm/qxl/qxl_ttm.c | 8 +-
drivers/gpu/drm/radeon/radeon_object.c| 50 -
drivers/gpu/drm/radeon/radeon_ttm.c | 20 ++--
drivers/gpu/drm/radeon/radeon_uvd.c | 8 +-
drivers/gpu/drm/ttm/ttm_bo.c | 20 ++--
drivers/gpu/drm/ttm/ttm_range_manager.c | 21 ++--
drivers/gpu/drm/ttm/ttm_resource.c| 8 +-
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c| 46
drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c| 30 +++---
include/drm/ttm/ttm_placement.h | 12 +--
25 files changed, 293 insertions(+), 305 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index 44367f03316f..2cf1e3697250 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -131,11 +131,12 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager
*man,
goto err_free;
}
- if (place->lpfn) {
+ if (place->res_end) {
spin_lock(>lock);
r = drm_mm_insert_node_in_range(>mm, >mm_nodes[0],
- num_pages, tbo->page_alignment,
- 0, place->fpfn, place->lpfn,
+ num_pages, tbo->page_alignment,
0,
+ place->res_start >> PAGE_SHIFT,
+ place->res_end >> PAGE_SHIFT,
DRM_MM_INSERT_BEST);
spin_unlock(>lock);
if (unlikely(r))
@@ -219,7 +220,7 @@ static bool amdgpu_gtt_mgr_intersects(struct
ttm_resource_manager *man,
const struct ttm_place *place,
size_t size)
{
- return !place->lpfn || amdgpu_gtt_mgr_has_gart_addr(res);
+ return !place->res_end || amdgpu_gtt_mgr_has_gart_addr(res);
}
/**
@@ -237,7 +238,7 @@ static bool amdgpu_gtt_mgr_compatible(struct
ttm_resource_manager *man,
const struct ttm_place *place,
size_t size)
{
- return !place->lpfn || amdgpu_gtt_mgr_has_gart_addr(res);
+ return !place->res_end || amdgpu_gtt_mgr_has_gart_addr(res);
}
/**
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 283e8fe608ce..2926389e21d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -130,15 +130,15 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo
*abo, u32 domain)
u32 c = 0;
if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
- unsigned visible_pfn = adev->gmc.visible_vram_size >>
PAGE_SHIFT;
+ u64 visible_pfn = adev->gmc.visible_vram_size;
- places[c].fpfn = 0;
- places[c].lpfn = 0;
- places[c].mem_type = TTM_PL_VRAM;
+ places[c].res_start = 0;
+ places[c].res_end = 0;
+ places[c].res_type = TTM_PL_VRAM;
places[c].flags = 0;
if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)
- places[c].lpfn = visible_pfn;
+ places[c].res_end = visible_pfn;
else
places[c].flags |= TTM_PL_FLAG_TOPDOWN;
@@
Re: [PATCH] drm/amdgpu: Retire pcie_gen3_enable function
[AMD Official Use Only - General]
This patch is Reviewed-by: Likun Gao .
Regards,
Likun
发件人: amd-gfx 代表 Hawking Zhang
发送时间: 2023年3月6日星期一 下午7:38
收件人: amd-gfx@lists.freedesktop.org ; Gao, Likun
抄送: Zhang, Hawking
主题: [PATCH] drm/amdgpu: Retire pcie_gen3_enable function
Not needed since from vi. drop the function so
we don't duplicate code when introduce new asics.
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/nv.c| 17 -
drivers/gpu/drm/amd/amdgpu/soc15.c | 20
drivers/gpu/drm/amd/amdgpu/soc21.c | 17 -
drivers/gpu/drm/amd/amdgpu/vi.c| 20
4 files changed, 74 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 492a8b148227..d56cba10cd5a 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -519,21 +519,6 @@ static int nv_set_vce_clocks(struct amdgpu_device *adev,
u32 evclk, u32 ecclk)
return 0;
}
-static void nv_pcie_gen3_enable(struct amdgpu_device *adev)
-{
- if (pci_is_root_bus(adev->pdev->bus))
- return;
-
- if (amdgpu_pcie_gen2 == 0)
- return;
-
- if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
- CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)))
- return;
-
- /* todo */
-}
-
static void nv_program_aspm(struct amdgpu_device *adev)
{
if (!amdgpu_device_should_use_aspm(adev))
@@ -1041,8 +1026,6 @@ static int nv_common_hw_init(void *handle)
if (adev->nbio.funcs->apply_l1_link_width_reconfig_wa)
adev->nbio.funcs->apply_l1_link_width_reconfig_wa(adev);
- /* enable pcie gen2/3 link */
- nv_pcie_gen3_enable(adev);
/* enable aspm */
nv_program_aspm(adev);
/* setup nbio registers */
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 2c37b49f5c00..1064972dc558 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -609,24 +609,6 @@ static int soc15_set_vce_clocks(struct amdgpu_device
*adev, u32 evclk, u32 ecclk
return 0;
}
-static void soc15_pcie_gen3_enable(struct amdgpu_device *adev)
-{
- if (pci_is_root_bus(adev->pdev->bus))
- return;
-
- if (amdgpu_pcie_gen2 == 0)
- return;
-
- if (adev->flags & AMD_IS_APU)
- return;
-
- if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
- CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)))
- return;
-
- /* todo */
-}
-
static void soc15_program_aspm(struct amdgpu_device *adev)
{
if (!amdgpu_device_should_use_aspm(adev))
@@ -1183,8 +1165,6 @@ static int soc15_common_hw_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- /* enable pcie gen2/3 link */
- soc15_pcie_gen3_enable(adev);
/* enable aspm */
soc15_program_aspm(adev);
/* setup nbio registers */
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 21e271877c4c..e56f2bc73930 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -370,21 +370,6 @@ static int soc21_set_vce_clocks(struct amdgpu_device
*adev, u32 evclk, u32 ecclk
return 0;
}
-static void soc21_pcie_gen3_enable(struct amdgpu_device *adev)
-{
- if (pci_is_root_bus(adev->pdev->bus))
- return;
-
- if (amdgpu_pcie_gen2 == 0)
- return;
-
- if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
- CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)))
- return;
-
- /* todo */
-}
-
static void soc21_program_aspm(struct amdgpu_device *adev)
{
if (!amdgpu_device_should_use_aspm(adev))
@@ -714,8 +699,6 @@ static int soc21_common_hw_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- /* enable pcie gen2/3 link */
- soc21_pcie_gen3_enable(adev);
/* enable aspm */
soc21_program_aspm(adev);
/* setup nbio registers */
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 12ef782eb478..2512b70ea992 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1105,24 +1105,6 @@ static int vi_set_vce_clocks(struct amdgpu_device *adev,
u32 evclk, u32 ecclk)
return 0;
}
-static void vi_pcie_gen3_enable(struct amdgpu_device *adev)
-{
- if (pci_is_root_bus(adev->pdev->bus))
- return;
-
- if (amdgpu_pcie_gen2 == 0)
- return;
-
- if (adev->flags & AMD_IS_APU)
- return;
-
- if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
-
[PATCH] drm/amdgpu: Retire pcie_gen3_enable function
Not needed since from vi. drop the function so
we don't duplicate code when introduce new asics.
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/nv.c| 17 -
drivers/gpu/drm/amd/amdgpu/soc15.c | 20
drivers/gpu/drm/amd/amdgpu/soc21.c | 17 -
drivers/gpu/drm/amd/amdgpu/vi.c| 20
4 files changed, 74 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 492a8b148227..d56cba10cd5a 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -519,21 +519,6 @@ static int nv_set_vce_clocks(struct amdgpu_device *adev,
u32 evclk, u32 ecclk)
return 0;
}
-static void nv_pcie_gen3_enable(struct amdgpu_device *adev)
-{
- if (pci_is_root_bus(adev->pdev->bus))
- return;
-
- if (amdgpu_pcie_gen2 == 0)
- return;
-
- if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
- CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)))
- return;
-
- /* todo */
-}
-
static void nv_program_aspm(struct amdgpu_device *adev)
{
if (!amdgpu_device_should_use_aspm(adev))
@@ -1041,8 +1026,6 @@ static int nv_common_hw_init(void *handle)
if (adev->nbio.funcs->apply_l1_link_width_reconfig_wa)
adev->nbio.funcs->apply_l1_link_width_reconfig_wa(adev);
- /* enable pcie gen2/3 link */
- nv_pcie_gen3_enable(adev);
/* enable aspm */
nv_program_aspm(adev);
/* setup nbio registers */
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 2c37b49f5c00..1064972dc558 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -609,24 +609,6 @@ static int soc15_set_vce_clocks(struct amdgpu_device
*adev, u32 evclk, u32 ecclk
return 0;
}
-static void soc15_pcie_gen3_enable(struct amdgpu_device *adev)
-{
- if (pci_is_root_bus(adev->pdev->bus))
- return;
-
- if (amdgpu_pcie_gen2 == 0)
- return;
-
- if (adev->flags & AMD_IS_APU)
- return;
-
- if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
- CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)))
- return;
-
- /* todo */
-}
-
static void soc15_program_aspm(struct amdgpu_device *adev)
{
if (!amdgpu_device_should_use_aspm(adev))
@@ -1183,8 +1165,6 @@ static int soc15_common_hw_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- /* enable pcie gen2/3 link */
- soc15_pcie_gen3_enable(adev);
/* enable aspm */
soc15_program_aspm(adev);
/* setup nbio registers */
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 21e271877c4c..e56f2bc73930 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -370,21 +370,6 @@ static int soc21_set_vce_clocks(struct amdgpu_device
*adev, u32 evclk, u32 ecclk
return 0;
}
-static void soc21_pcie_gen3_enable(struct amdgpu_device *adev)
-{
- if (pci_is_root_bus(adev->pdev->bus))
- return;
-
- if (amdgpu_pcie_gen2 == 0)
- return;
-
- if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
- CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)))
- return;
-
- /* todo */
-}
-
static void soc21_program_aspm(struct amdgpu_device *adev)
{
if (!amdgpu_device_should_use_aspm(adev))
@@ -714,8 +699,6 @@ static int soc21_common_hw_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- /* enable pcie gen2/3 link */
- soc21_pcie_gen3_enable(adev);
/* enable aspm */
soc21_program_aspm(adev);
/* setup nbio registers */
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 12ef782eb478..2512b70ea992 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1105,24 +1105,6 @@ static int vi_set_vce_clocks(struct amdgpu_device *adev,
u32 evclk, u32 ecclk)
return 0;
}
-static void vi_pcie_gen3_enable(struct amdgpu_device *adev)
-{
- if (pci_is_root_bus(adev->pdev->bus))
- return;
-
- if (amdgpu_pcie_gen2 == 0)
- return;
-
- if (adev->flags & AMD_IS_APU)
- return;
-
- if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
- CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)))
- return;
-
- /* todo */
-}
-
static void vi_enable_aspm(struct amdgpu_device *adev)
{
u32 data, orig;
@@ -1743,8 +1725,6 @@ static int vi_common_hw_init(void *handle)
/* move the golden regs per IP block */
Re: [PATCH] drm/amdgpu: Use uncached ioremap() for LoongArch
On 2023/3/6 10:49, Huacai Chen wrote: Hi, Christian, On Mon, Mar 6, 2023 at 12:40 AM Christian König wrote: Am 05.03.23 um 06:21 schrieb Huacai Chen: LoongArch maintains cache coherency in hardware, but its WUC attribute (Weak-ordered UnCached, which is similar to WC) is out of the scope of cache coherency machanism. This means WUC can only used for write-only memory regions. So use uncached ioremap() for LoongArch in the amdgpu driver. Well NAK. This is leaking platform dependencies into the driver code. Then is it acceptable to let ioremap() depend on drm_arch_can_wc_memory()? Note: he's likely meaning "is it acceptable to use drm_arch_can_wc_memory() to decide between ioremap() and ioremap_wc()". Although I doubt it's acceptable to you (driver) folks either, because while drm_arch_can_wc_memory() does isolate platform details from driver proper, it's still papering over platform PCIe violation in VRAM domain. Still better than having platform defines though. Also making use of drm_arch_can_wc_memory might fix this fdo issue [1] on aarch64 too (where I replied earlier). It seems people simply can't stop inventing such micro-architectures sadly... [1]: https://gitlab.freedesktop.org/drm/amd/-/issues/2313 When you have a limitation that ioremap_wc() can't guarantee read/write ordering then that's pretty clearly a platform bug and you would need to apply this workaround to all drivers using ioremap_wc() which isn't really feasible. I agree in this case perhaps all of ioremap_wc() usages would have to degrade into ioremap() for correctness on such platforms. In which case amdgpu wouldn't have to be individually called out / touched anyway. Whether this is easily doable/upstreamable is another question though... -- WANG "xen0n" Xuerui Linux/LoongArch mailing list: https://lore.kernel.org/loongarch/
[PATCH] drivers/gpu: fix typo in comment
Replace "isntance" with "instance".
Signed-off-by: Husain Alshehhi
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h| 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 007d6bdc3e39..734b34902fa7 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -1971,7 +1971,7 @@ struct dmub_cmd_psr_copy_settings_data {
uint8_t cmd_version;
/**
* Panel Instance.
-* Panel isntance to identify which psr_state to use
+* Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
@@ -2029,7 +2029,7 @@ struct dmub_cmd_psr_set_level_data {
uint8_t cmd_version;
/**
* Panel Instance.
-* Panel isntance to identify which psr_state to use
+* Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
@@ -2056,7 +2056,7 @@ struct dmub_rb_cmd_psr_enable_data {
uint8_t cmd_version;
/**
* Panel Instance.
-* Panel isntance to identify which psr_state to use
+* Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
@@ -2100,7 +2100,7 @@ struct dmub_cmd_psr_set_version_data {
uint8_t cmd_version;
/**
* Panel Instance.
-* Panel isntance to identify which psr_state to use
+* Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
@@ -2131,7 +2131,7 @@ struct dmub_cmd_psr_force_static_data {
uint8_t cmd_version;
/**
* Panel Instance.
-* Panel isntance to identify which psr_state to use
+* Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
@@ -2206,7 +2206,7 @@ struct dmub_cmd_update_dirty_rect_data {
uint8_t cmd_version;
/**
* Panel Instance.
-* Panel isntance to identify which psr_state to use
+* Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
@@ -2344,7 +2344,7 @@ struct dmub_cmd_update_cursor_payload0 {
uint8_t cmd_version;
/**
* Panel Instance.
-* Panel isntance to identify which psr_state to use
+* Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
@@ -2391,7 +2391,7 @@ struct dmub_cmd_psr_set_vtotal_data {
uint8_t cmd_version;
/**
* Panel Instance.
-* Panel isntance to identify which psr_state to use
+* Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
@@ -2429,7 +2429,7 @@ struct dmub_cmd_psr_set_power_opt_data {
uint8_t cmd_version;
/**
* Panel Instance.
-* Panel isntance to identify which psr_state to use
+* Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
--
2.39.2
[PATCH] drm/amd/display: change several dcn30 variables storage-class-specifier to static
smatch reports these similar problems in dcn30
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dwb.c:223:25:
warning: symbol 'dcn30_dwbc_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mmhubbub.c:214:28:
warning: symbol 'dcn30_mmhubbub_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:1402:24:
warning: symbol 'dcn30_mpc_funcs' was not declared. Should it be static?
All of these are only used in their definition file, so they should be static
Signed-off-by: Tom Rix
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c
index f14f69616692..0d98918bf0fc 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c
@@ -220,7 +220,7 @@ void dwb3_set_denorm(struct dwbc *dwbc, struct
dc_dwb_params *params)
}
-const struct dwbc_funcs dcn30_dwbc_funcs = {
+static const struct dwbc_funcs dcn30_dwbc_funcs = {
.get_caps = dwb3_get_caps,
.enable = dwb3_enable,
.disable= dwb3_disable,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c
index 7a93eff183d9..6f2a0d5d963b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c
@@ -211,7 +211,7 @@ static void mmhubbub3_config_mcif_arb(struct mcif_wb
*mcif_wb,
REG_UPDATE(MCIF_WB_ARBITRATION_CONTROL,
MCIF_WB_CLIENT_ARBITRATION_SLICE, params->arbitration_slice);
}
-const struct mcif_wb_funcs dcn30_mmhubbub_funcs = {
+static const struct mcif_wb_funcs dcn30_mmhubbub_funcs = {
.warmup_mcif= mmhubbub3_warmup_mcif,
.enable_mcif= mmhubbub2_enable_mcif,
.disable_mcif = mmhubbub2_disable_mcif,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
index ad1c1b703874..6cf40c1332bc 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
@@ -1399,7 +1399,7 @@ static void mpc3_set_mpc_mem_lp_mode(struct mpc *mpc)
}
}
-const struct mpc_funcs dcn30_mpc_funcs = {
+static const struct mpc_funcs dcn30_mpc_funcs = {
.read_mpcc_state = mpc1_read_mpcc_state,
.insert_plane = mpc1_insert_plane,
.remove_mpcc = mpc1_remove_mpcc,
--
2.27.0
[PATCH] drm/amd/display: change several dcn20 variables storage-class-specifier to static
smatch reports these similar problems in dcn20
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.c:53:24:
warning: symbol 'dcn20_dsc_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dwb.c:304:25:
warning: symbol 'dcn20_dwbc_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mmhubbub.c:300:28:
warning: symbol 'dcn20_mmhubbub_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.c:545:24:
warning: symbol 'dcn20_mpc_funcs' was not declared. Should it be static?
All of these are only used in their definition file, so they should be static
Signed-off-by: Tom Rix
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
index 42344aec60d6..5bd698cd6d20 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
@@ -50,7 +50,7 @@ static void dsc2_enable(struct display_stream_compressor
*dsc, int opp_pipe);
static void dsc2_disable(struct display_stream_compressor *dsc);
static void dsc2_disconnect(struct display_stream_compressor *dsc);
-const struct dsc_funcs dcn20_dsc_funcs = {
+static const struct dsc_funcs dcn20_dsc_funcs = {
.dsc_get_enc_caps = dsc2_get_enc_caps,
.dsc_read_state = dsc2_read_state,
.dsc_validate_stream = dsc2_validate_stream,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
index f1490e97b6ce..f8667be57046 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
@@ -301,7 +301,7 @@ void dwb2_set_scaler(struct dwbc *dwbc, struct
dc_dwb_params *params)
}
-const struct dwbc_funcs dcn20_dwbc_funcs = {
+static const struct dwbc_funcs dcn20_dwbc_funcs = {
.get_caps = dwb2_get_caps,
.enable = dwb2_enable,
.disable= dwb2_disable,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c
index ccd91792991b..259a98e4ee2c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c
@@ -297,7 +297,7 @@ void mcifwb2_dump_frame(struct mcif_wb *mcif_wb,
dump_info->size = dest_height * (mcif_params->luma_pitch +
mcif_params->chroma_pitch);
}
-const struct mcif_wb_funcs dcn20_mmhubbub_funcs = {
+static const struct mcif_wb_funcs dcn20_mmhubbub_funcs = {
.enable_mcif= mmhubbub2_enable_mcif,
.disable_mcif = mmhubbub2_disable_mcif,
.config_mcif_buf= mmhubbub2_config_mcif_buf,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
index 116f67a0b989..5da6e44f284a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
@@ -542,7 +542,7 @@ static struct mpcc *mpc2_get_mpcc_for_dpp(struct mpc_tree
*tree, int dpp_id)
return NULL;
}
-const struct mpc_funcs dcn20_mpc_funcs = {
+static const struct mpc_funcs dcn20_mpc_funcs = {
.read_mpcc_state = mpc1_read_mpcc_state,
.insert_plane = mpc1_insert_plane,
.remove_mpcc = mpc1_remove_mpcc,
--
2.27.0
[PATCH] drm/amd/display: add prefix to amdgpu_dm_plane.h functions
From: David Tadokoro
The amdgpu_dm_plane.h functions didn't have names that indicated where
they were declared.
To better filter results in debug tools like ftrace, prefix these
functions with 'amdgpu_dm_plane_'.
Note that we may want to make this same change in other files like
amdgpu_dm_crtc.h.
Signed-off-by: David Tadokoro
---
.../gpu/amdgpu/display/display-manager.rst| 2 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 ++---
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 20 +--
.../amd/display/amdgpu_dm/amdgpu_dm_plane.h | 12 +--
4 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/Documentation/gpu/amdgpu/display/display-manager.rst
b/Documentation/gpu/amdgpu/display/display-manager.rst
index b7abb18cfc82..be2651ecdd7f 100644
--- a/Documentation/gpu/amdgpu/display/display-manager.rst
+++ b/Documentation/gpu/amdgpu/display/display-manager.rst
@@ -173,7 +173,7 @@ The alpha blending equation is configured from DRM to DC
interface by the
following path:
1. When updating a :c:type:`drm_plane_state `, DM calls
- :c:type:`fill_blending_from_plane_state()` that maps
+ :c:type:`amdgpu_dm_plane_fill_blending_from_plane_state()` that maps
:c:type:`drm_plane_state ` attributes to
:c:type:`dc_plane_info ` struct to be handled in the
OS-agnostic component (DC).
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 4217ebe6391b..f7111acd45cc 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2923,7 +2923,7 @@ const struct amdgpu_ip_block_version dm_ip_block =
static const struct drm_mode_config_funcs amdgpu_dm_mode_funcs = {
.fb_create = amdgpu_display_user_framebuffer_create,
- .get_format_info = amd_get_format_info,
+ .get_format_info = amdgpu_dm_plane_get_format_info,
.output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = amdgpu_dm_atomic_check,
.atomic_commit = drm_atomic_helper_commit,
@@ -4948,7 +4948,7 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev,
if (ret)
return ret;
- ret = fill_plane_buffer_attributes(adev, afb, plane_info->format,
+ ret = amdgpu_dm_plane_fill_plane_buffer_attributes(adev, afb,
plane_info->format,
plane_info->rotation, tiling_flags,
_info->tiling_info,
_info->plane_size,
@@ -4957,7 +4957,7 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev,
if (ret)
return ret;
- fill_blending_from_plane_state(
+ amdgpu_dm_plane_fill_blending_from_plane_state(
plane_state, _info->per_pixel_alpha,
_info->pre_multiplied_alpha,
_info->global_alpha, _info->global_alpha_value);
@@ -4976,7 +4976,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device
*adev,
int ret;
bool force_disable_dcc = false;
- ret = fill_dc_scaling_info(adev, plane_state, _info);
+ ret = amdgpu_dm_plane_fill_dc_scaling_info(adev, plane_state,
_info);
if (ret)
return ret;
@@ -7882,7 +7882,7 @@ static void amdgpu_dm_commit_cursors(struct
drm_atomic_state *state)
*/
for_each_old_plane_in_state(state, plane, old_plane_state, i)
if (plane->type == DRM_PLANE_TYPE_CURSOR)
- handle_cursor_update(plane, old_plane_state);
+ amdgpu_dm_plane_handle_cursor_update(plane,
old_plane_state);
}
static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
@@ -7967,7 +7967,7 @@ static void amdgpu_dm_commit_planes(struct
drm_atomic_state *state,
bundle->surface_updates[planes_count].gamut_remap_matrix =
_plane->gamut_remap_matrix;
}
- fill_dc_scaling_info(dm->adev, new_plane_state,
+ amdgpu_dm_plane_fill_dc_scaling_info(dm->adev, new_plane_state,
>scaling_infos[planes_count]);
bundle->surface_updates[planes_count].scaling_info =
@@ -9634,7 +9634,7 @@ static int dm_update_plane_state(struct dc *dc,
if (!needs_reset)
return 0;
- ret = dm_plane_helper_check_state(new_plane_state,
new_crtc_state);
+ ret = amdgpu_dm_plane_helper_check_state(new_plane_state,
new_crtc_state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index 28fb1f02591a..dc23c788cdba 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -90,12 +90,12 @@ enum dm_micro_swizzle {
[PATCH] drm/amd/display: change several dcn201 variables storage-class-specifier to static
smatch reports these similar problems in dcn201
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c:165:22:
warning: symbol 'dcn201_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:77:30:
warning: symbol 'dcn201_ip' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:139:37:
warning: symbol 'dcn201_soc' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_mpc.c:79:24:
warning: symbol 'dcn201_mpc_funcs' was not declared. Should it be static?
All of these are only used in their definition file, so they should be static
Signed-off-by: Tom Rix
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c| 2 +-
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c| 2 +-
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
index f0577dcd1af6..811720749faf 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
@@ -162,7 +162,7 @@ static void dcn201_update_clocks(struct clk_mgr
*clk_mgr_base,
}
}
-struct clk_mgr_funcs dcn201_funcs = {
+static struct clk_mgr_funcs dcn201_funcs = {
.get_dp_ref_clk_frequency = dce12_get_dp_ref_freq_khz,
.update_clocks = dcn201_update_clocks,
.init_clocks = dcn201_init_clocks,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c
b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c
index 95c4c55f067c..1af03a86ec9b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c
@@ -76,7 +76,7 @@ static void mpc201_init_mpcc(struct mpcc *mpcc, int mpcc_inst)
mpcc->shared_bottom = false;
}
-const struct mpc_funcs dcn201_mpc_funcs = {
+static const struct mpc_funcs dcn201_mpc_funcs = {
.read_mpcc_state = mpc1_read_mpcc_state,
.insert_plane = mpc1_insert_plane,
.remove_mpcc = mpc1_remove_mpcc,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c
index 407d995bfa99..cd46701398d9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c
@@ -74,7 +74,7 @@
#define MIN_DISP_CLK_KHZ 10
#define MIN_DPP_CLK_KHZ 10
-struct _vcs_dpi_ip_params_st dcn201_ip = {
+static struct _vcs_dpi_ip_params_st dcn201_ip = {
.gpuvm_enable = 0,
.hostvm_enable = 0,
.gpuvm_max_page_table_levels = 4,
@@ -136,7 +136,7 @@ struct _vcs_dpi_ip_params_st dcn201_ip = {
.number_of_cursors = 1,
};
-struct _vcs_dpi_soc_bounding_box_st dcn201_soc = {
+static struct _vcs_dpi_soc_bounding_box_st dcn201_soc = {
.clock_limits = {
{
.state = 0,
--
2.27.0
Re: [PATCH] drm/amd/display: Simplify same effect if/else blocks
On Fri, 2023-03-03 at 15:35 -0500, Harry Wentland wrote: > Actually I was wrong. Too many similar-looking snippets in this > function made me look at the wrong thing. This change is fine and > Reviewed-by: Harry Wentland
[PATCH] drm/amdgpu: Use uncached ioremap() for LoongArch
LoongArch maintains cache coherency in hardware, but its WUC attribute (Weak-ordered UnCached, which is similar to WC) is out of the scope of cache coherency machanism. This means WUC can only used for write-only memory regions. So use uncached ioremap() for LoongArch in the amdgpu driver. Signed-off-by: Huacai Chen --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index c5ef7f7bdc15..c6888a58819a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -1750,8 +1750,13 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) else #endif +#ifdef CONFIG_LOONGARCH + adev->mman.aper_base_kaddr = ioremap(adev->gmc.aper_base, + adev->gmc.visible_vram_size); +#else adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base, adev->gmc.visible_vram_size); +#endif #endif /* -- 2.39.1
RE: [PATCH 2/2] drm/amdgpu: Move to common helper to query soc rev_id
Series is Reviewed-by: Likun Gao .
Regards,
Likun
-Original Message-
From: amd-gfx On Behalf Of Hawking Zhang
Sent: Monday, March 6, 2023 4:04 PM
To: amd-gfx@lists.freedesktop.org; Gao, Likun
Cc: Zhang, Hawking
Subject: [PATCH 2/2] drm/amdgpu: Move to common helper to query soc rev_id
Replace soc15, nv, soc21 get_rev_id callback with common helper so we don't
need to duplicate code when introduce new asics.
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12
drivers/gpu/drm/amd/amdgpu/nv.c| 7 +--
drivers/gpu/drm/amd/amdgpu/soc15.c | 7 +--
drivers/gpu/drm/amd/amdgpu/soc21.c | 7 +--
5 files changed, 16 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9387731afb8b..527795f921a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1149,7 +1149,7 @@ void amdgpu_device_indirect_wreg(struct amdgpu_device
*adev,
u32 reg_addr, u32 reg_data);
void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
u32 reg_addr, u64 reg_data);
-
+u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev);
bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type); bool
amdgpu_device_has_dc_support(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index b1b815dc69b3..13fa8a2709c9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -807,6 +807,18 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device
*adev,
spin_unlock_irqrestore(>pcie_idx_lock, flags); }
+/**
+ * amdgpu_device_get_rev_id - query device rev_id
+ *
+ * @adev: amdgpu_device pointer
+ *
+ * Return device rev_id
+ */
+u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev) {
+ return adev->nbio.funcs->get_rev_id(adev);
+}
+
/**
* amdgpu_invalid_rreg - dummy reg read function
*
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 60c10132ed32..492a8b148227 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -566,11 +566,6 @@ void nv_set_virt_ops(struct amdgpu_device *adev)
adev->virt.ops = _nv_virt_ops;
}
-static uint32_t nv_get_rev_id(struct amdgpu_device *adev) -{
- return adev->nbio.funcs->get_rev_id(adev);
-}
-
static bool nv_need_full_reset(struct amdgpu_device *adev) {
return true;
@@ -712,7 +707,7 @@ static int nv_common_early_init(void *handle)
adev->asic_funcs = _asic_funcs;
- adev->rev_id = nv_get_rev_id(adev);
+ adev->rev_id = amdgpu_device_get_rev_id(adev);
adev->external_rev_id = 0xff;
/* TODO: split the GC and PG flags based on the relevant IP version for
which
* they are relevant.
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 6392d10e6eaf..2c37b49f5c00 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -653,11 +653,6 @@ const struct amdgpu_ip_block_version
vega10_common_ip_block =
.funcs = _common_ip_funcs,
};
-static uint32_t soc15_get_rev_id(struct amdgpu_device *adev) -{
- return adev->nbio.funcs->get_rev_id(adev);
-}
-
static void soc15_reg_base_init(struct amdgpu_device *adev) {
/* Set IP register base before any HW register access */ @@ -907,7
+902,7 @@ static int soc15_common_early_init(void *handle)
adev->se_cac_rreg = _se_cac_rreg;
adev->se_cac_wreg = _se_cac_wreg;
- adev->rev_id = soc15_get_rev_id(adev);
+ adev->rev_id = amdgpu_device_get_rev_id(adev);
adev->external_rev_id = 0xFF;
/* TODO: split the GC and PG flags based on the relevant IP version for
which
* they are relevant.
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 9d91e20a22bb..21e271877c4c 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -411,11 +411,6 @@ const struct amdgpu_ip_block_version soc21_common_ip_block
=
.funcs = _common_ip_funcs,
};
-static uint32_t soc21_get_rev_id(struct amdgpu_device *adev) -{
- return adev->nbio.funcs->get_rev_id(adev);
-}
-
static bool soc21_need_full_reset(struct amdgpu_device *adev) {
switch (adev->ip_versions[GC_HWIP][0]) { @@ -557,7 +552,7 @@ static int
soc21_common_early_init(void *handle)
adev->asic_funcs = _asic_funcs;
- adev->rev_id = soc21_get_rev_id(adev);
+ adev->rev_id = amdgpu_device_get_rev_id(adev);
adev->external_rev_id = 0xff;
switch (adev->ip_versions[GC_HWIP][0]) {
case IP_VERSION(11, 0, 0):
--
2.17.1
[PATCH 2/2] drm/amdgpu: Move to common helper to query soc rev_id
Replace soc15, nv, soc21 get_rev_id callback with common
helper so we don't need to duplicate code when introduce
new asics.
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12
drivers/gpu/drm/amd/amdgpu/nv.c| 7 +--
drivers/gpu/drm/amd/amdgpu/soc15.c | 7 +--
drivers/gpu/drm/amd/amdgpu/soc21.c | 7 +--
5 files changed, 16 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9387731afb8b..527795f921a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1149,7 +1149,7 @@ void amdgpu_device_indirect_wreg(struct amdgpu_device
*adev,
u32 reg_addr, u32 reg_data);
void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
u32 reg_addr, u64 reg_data);
-
+u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev);
bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index b1b815dc69b3..13fa8a2709c9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -807,6 +807,18 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device
*adev,
spin_unlock_irqrestore(>pcie_idx_lock, flags);
}
+/**
+ * amdgpu_device_get_rev_id - query device rev_id
+ *
+ * @adev: amdgpu_device pointer
+ *
+ * Return device rev_id
+ */
+u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev)
+{
+ return adev->nbio.funcs->get_rev_id(adev);
+}
+
/**
* amdgpu_invalid_rreg - dummy reg read function
*
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 60c10132ed32..492a8b148227 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -566,11 +566,6 @@ void nv_set_virt_ops(struct amdgpu_device *adev)
adev->virt.ops = _nv_virt_ops;
}
-static uint32_t nv_get_rev_id(struct amdgpu_device *adev)
-{
- return adev->nbio.funcs->get_rev_id(adev);
-}
-
static bool nv_need_full_reset(struct amdgpu_device *adev)
{
return true;
@@ -712,7 +707,7 @@ static int nv_common_early_init(void *handle)
adev->asic_funcs = _asic_funcs;
- adev->rev_id = nv_get_rev_id(adev);
+ adev->rev_id = amdgpu_device_get_rev_id(adev);
adev->external_rev_id = 0xff;
/* TODO: split the GC and PG flags based on the relevant IP version for
which
* they are relevant.
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 6392d10e6eaf..2c37b49f5c00 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -653,11 +653,6 @@ const struct amdgpu_ip_block_version
vega10_common_ip_block =
.funcs = _common_ip_funcs,
};
-static uint32_t soc15_get_rev_id(struct amdgpu_device *adev)
-{
- return adev->nbio.funcs->get_rev_id(adev);
-}
-
static void soc15_reg_base_init(struct amdgpu_device *adev)
{
/* Set IP register base before any HW register access */
@@ -907,7 +902,7 @@ static int soc15_common_early_init(void *handle)
adev->se_cac_rreg = _se_cac_rreg;
adev->se_cac_wreg = _se_cac_wreg;
- adev->rev_id = soc15_get_rev_id(adev);
+ adev->rev_id = amdgpu_device_get_rev_id(adev);
adev->external_rev_id = 0xFF;
/* TODO: split the GC and PG flags based on the relevant IP version for
which
* they are relevant.
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 9d91e20a22bb..21e271877c4c 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -411,11 +411,6 @@ const struct amdgpu_ip_block_version soc21_common_ip_block
=
.funcs = _common_ip_funcs,
};
-static uint32_t soc21_get_rev_id(struct amdgpu_device *adev)
-{
- return adev->nbio.funcs->get_rev_id(adev);
-}
-
static bool soc21_need_full_reset(struct amdgpu_device *adev)
{
switch (adev->ip_versions[GC_HWIP][0]) {
@@ -557,7 +552,7 @@ static int soc21_common_early_init(void *handle)
adev->asic_funcs = _asic_funcs;
- adev->rev_id = soc21_get_rev_id(adev);
+ adev->rev_id = amdgpu_device_get_rev_id(adev);
adev->external_rev_id = 0xff;
switch (adev->ip_versions[GC_HWIP][0]) {
case IP_VERSION(11, 0, 0):
--
2.17.1
[PATCH 1/2] drm/amdgpu: Move to common indirect reg access helper
Replace soc15, nv, soc21 specific callbacks with common
one. so we don't need to duplicate code when introduce
new asics.
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 4 --
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 32 +++---
drivers/gpu/drm/amd/amdgpu/nv.c| 49 ++
drivers/gpu/drm/amd/amdgpu/soc15.c | 49 ++
drivers/gpu/drm/amd/amdgpu/soc21.c | 48 ++---
5 files changed, 30 insertions(+), 152 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 07e846510005..9387731afb8b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1142,16 +1142,12 @@ void amdgpu_mm_wreg8(struct amdgpu_device *adev,
uint32_t offset, uint8_t value)
uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
- u32 pcie_index, u32 pcie_data,
u32 reg_addr);
u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev,
- u32 pcie_index, u32 pcie_data,
u32 reg_addr);
void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
-u32 pcie_index, u32 pcie_data,
u32 reg_addr, u32 reg_data);
void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
- u32 pcie_index, u32 pcie_data,
u32 reg_addr, u64 reg_data);
bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 77e6c8bf7190..b1b815dc69b3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -676,20 +676,20 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev,
u32 index, u64 v)
* amdgpu_device_indirect_rreg - read an indirect register
*
* @adev: amdgpu_device pointer
- * @pcie_index: mmio register offset
- * @pcie_data: mmio register offset
* @reg_addr: indirect register address to read from
*
* Returns the value of indirect register @reg_addr
*/
u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
- u32 pcie_index, u32 pcie_data,
u32 reg_addr)
{
- unsigned long flags;
- u32 r;
+ unsigned long flags, pcie_index, pcie_data;
void __iomem *pcie_index_offset;
void __iomem *pcie_data_offset;
+ u32 r;
+
+ pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);
+ pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);
spin_lock_irqsave(>pcie_idx_lock, flags);
pcie_index_offset = (void __iomem *)adev->rmmio + pcie_index * 4;
@@ -707,20 +707,20 @@ u32 amdgpu_device_indirect_rreg(struct amdgpu_device
*adev,
* amdgpu_device_indirect_rreg64 - read a 64bits indirect register
*
* @adev: amdgpu_device pointer
- * @pcie_index: mmio register offset
- * @pcie_data: mmio register offset
* @reg_addr: indirect register address to read from
*
* Returns the value of indirect register @reg_addr
*/
u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev,
- u32 pcie_index, u32 pcie_data,
u32 reg_addr)
{
- unsigned long flags;
- u64 r;
+ unsigned long flags, pcie_index, pcie_data;
void __iomem *pcie_index_offset;
void __iomem *pcie_data_offset;
+ u64 r;
+
+ pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);
+ pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);
spin_lock_irqsave(>pcie_idx_lock, flags);
pcie_index_offset = (void __iomem *)adev->rmmio + pcie_index * 4;
@@ -750,13 +750,15 @@ u64 amdgpu_device_indirect_rreg64(struct amdgpu_device
*adev,
*
*/
void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
-u32 pcie_index, u32 pcie_data,
u32 reg_addr, u32 reg_data)
{
- unsigned long flags;
+ unsigned long flags, pcie_index, pcie_data;
void __iomem *pcie_index_offset;
void __iomem *pcie_data_offset;
+ pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);
+ pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);
+
spin_lock_irqsave(>pcie_idx_lock, flags);
pcie_index_offset = (void __iomem *)adev->rmmio + pcie_index * 4;
pcie_data_offset = (void __iomem *)adev->rmmio + pcie_data * 4;
@@ -779,13 +781,15 @@ void amdgpu_device_indirect_wreg(struct amdgpu_device
*adev,
*
*/
void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
- u32 pcie_index, u32
