[PATCH] drm/amdgpu: Program xcp_ctl registers as needed
XCP_CTL register is expected to be programmed by firmware. Under certain
conditions FW may not have programmed it correctly. As a workaround,
program it when FW has not programmed the right values.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index 738226ed6e50..c567be88c47d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -621,7 +621,7 @@ static int gfx_v9_4_3_switch_compute_partition(struct
amdgpu_device *adev,
int num_xccs_per_xcp)
{
int ret, i, num_xcc;
- u32 tmp = 0;
+ u32 tmp = 0, regval;
if (adev->psp.funcs) {
ret = psp_spatial_partition(>psp,
@@ -629,23 +629,24 @@ static int gfx_v9_4_3_switch_compute_partition(struct
amdgpu_device *adev,
num_xccs_per_xcp);
if (ret)
return ret;
- } else {
- num_xcc = NUM_XCC(adev->gfx.xcc_mask);
+ }
+
+ num_xcc = NUM_XCC(adev->gfx.xcc_mask);
- for (i = 0; i < num_xcc; i++) {
- tmp = REG_SET_FIELD(tmp, CP_HYP_XCP_CTL, NUM_XCC_IN_XCP,
- num_xccs_per_xcp);
- tmp = REG_SET_FIELD(tmp, CP_HYP_XCP_CTL, VIRTUAL_XCC_ID,
- i % num_xccs_per_xcp);
+ for (i = 0; i < num_xcc; i++) {
+ tmp = REG_SET_FIELD(tmp, CP_HYP_XCP_CTL, NUM_XCC_IN_XCP,
+ num_xccs_per_xcp);
+ tmp = REG_SET_FIELD(tmp, CP_HYP_XCP_CTL, VIRTUAL_XCC_ID,
+ i % num_xccs_per_xcp);
+ regval = RREG32_SOC15(GC, GET_INST(GC, i), regCP_HYP_XCP_CTL);
+ if (regval != tmp)
WREG32_SOC15(GC, GET_INST(GC, i), regCP_HYP_XCP_CTL,
tmp);
- }
- ret = 0;
}
adev->gfx.num_xcc_per_xcp = num_xccs_per_xcp;
- return ret;
+ return 0;
}
static int gfx_v9_4_3_ih_to_xcc_inst(struct amdgpu_device *adev, int ih_node)
--
2.25.1
RE: [PATCH 2/2] drm/amdgpu: fix incorrect vmhub index
[AMD Official Use Only - General]
OK, will do.
-
Best Regards,
Thomas
-Original Message-
From: Zhang, Hawking
Sent: Thursday, July 20, 2023 1:44 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao ; Li, Candice ; Yang,
Stanley
Subject: RE: [PATCH 2/2] drm/amdgpu: fix incorrect vmhub index
[AMD Official Use Only - General]
Please apply the same change to gmc_v10_0_process_interrupt.
Might be better to check the client_id == VMC to decide vmhub.
Regards,
Hawking
-Original Message-
From: Chai, Thomas
Sent: Thursday, July 20, 2023 13:42
To: amd-gfx@lists.freedesktop.org
Cc: Chai, Thomas ; Zhang, Hawking ;
Zhou1, Tao ; Li, Candice ; Yang, Stanley
; Chai, Thomas
Subject: [PATCH 2/2] drm/amdgpu: fix incorrect vmhub index
Fix incorrect vmhub index.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index d04fc0f19a29..c0b588e5d6aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -97,10 +97,13 @@ static int gmc_v11_0_process_interrupt(struct amdgpu_device
*adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry) {
- struct amdgpu_vmhub *hub = >vmhub[entry->vmid_src];
+ struct amdgpu_vmhub *hub;
uint32_t status = 0;
u64 addr;
+ hub = entry->vmid_src ?
+ >vmhub[AMDGPU_MMHUB0(0)] : >vmhub[AMDGPU_GFXHUB(0)];
+
addr = (u64)entry->src_data[0] << 12;
addr |= ((u64)entry->src_data[1] & 0xf) << 44;
--
2.34.1
RE: [PATCH 2/2] drm/amdgpu: fix incorrect vmhub index
[AMD Official Use Only - General]
Please apply the same change to gmc_v10_0_process_interrupt.
Might be better to check the client_id == VMC to decide vmhub.
Regards,
Hawking
-Original Message-
From: Chai, Thomas
Sent: Thursday, July 20, 2023 13:42
To: amd-gfx@lists.freedesktop.org
Cc: Chai, Thomas ; Zhang, Hawking ;
Zhou1, Tao ; Li, Candice ; Yang, Stanley
; Chai, Thomas
Subject: [PATCH 2/2] drm/amdgpu: fix incorrect vmhub index
Fix incorrect vmhub index.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index d04fc0f19a29..c0b588e5d6aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -97,10 +97,13 @@ static int gmc_v11_0_process_interrupt(struct amdgpu_device
*adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry) {
- struct amdgpu_vmhub *hub = >vmhub[entry->vmid_src];
+ struct amdgpu_vmhub *hub;
uint32_t status = 0;
u64 addr;
+ hub = entry->vmid_src ?
+ >vmhub[AMDGPU_MMHUB0(0)] : >vmhub[AMDGPU_GFXHUB(0)];
+
addr = (u64)entry->src_data[0] << 12;
addr |= ((u64)entry->src_data[1] & 0xf) << 44;
--
2.34.1
RE: [PATCH 2/2] drm/amdgpu: Program xcp_ctl registers as needed
[AMD Official Use Only - General]
Please ignore this series. I will send a fresh one.
Thanks,
Lijo
-Original Message-
From: amd-gfx On Behalf Of Lijo Lazar
Sent: Thursday, July 20, 2023 11:10 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Morris
; Zhang, Hawking
Subject: [PATCH 2/2] drm/amdgpu: Program xcp_ctl registers as needed
XCP_CTL register is expected to be programmed by firmware. Under certain
conditions FW may not have programmed it correctly. As a workaround, program
only when FW has not programmed the right values.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 28 ++---
1 file changed, 11 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index c0855c3769d4..084ba50924e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -1037,26 +1037,20 @@ static void gfx_v9_4_3_xcc_disable_gpa_mode(struct
amdgpu_device *adev, int xcc_ static void gfx_v9_4_3_xcc_program_xcc_id(struct
amdgpu_device *adev,
int xcc_id)
{
- uint32_t tmp = 0;
- int num_xcc;
+ uint32_t expval, regval;
+ int num_xcc, i;
num_xcc = NUM_XCC(adev->gfx.xcc_mask);
- switch (num_xcc) {
- /* directly config VIRTUAL_XCC_ID to 0 for 1-XCC */
- case 1:
- WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, 0x8);
- break;
- case 2:
- case 4:
- case 6:
- case 8:
- tmp = (xcc_id % adev->gfx.num_xcc_per_xcp) <<
REG_FIELD_SHIFT(CP_HYP_XCP_CTL, VIRTUAL_XCC_ID);
- tmp = tmp | (adev->gfx.num_xcc_per_xcp <<
REG_FIELD_SHIFT(CP_HYP_XCP_CTL, NUM_XCC_IN_XCP));
- WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, tmp);
+ for (i = 0; i < num_xcc; i++) {
+ expval = REG_SET_FIELD(expval, CP_HYP_XCP_CTL, NUM_XCC_IN_XCP,
+ adev->gfx.num_xcc_per_xcp);
+ expval = REG_SET_FIELD(expval, CP_HYP_XCP_CTL, VIRTUAL_XCC_ID,
+ i % adev->gfx.num_xcc_per_xcp);
- break;
- default:
- break;
+ regval = RREG32_SOC15(GC, GET_INST(GC, i), regCP_HYP_XCP_CTL);
+ if (regval != expval)
+ WREG32_SOC15(GC, GET_INST(GC, i), regCP_HYP_XCP_CTL,
+expval);
}
}
--
2.25.1
[PATCH 2/2] drm/amdgpu: fix incorrect vmhub index
Fix incorrect vmhub index.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index d04fc0f19a29..c0b588e5d6aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -97,10 +97,13 @@ static int gmc_v11_0_process_interrupt(struct amdgpu_device
*adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
- struct amdgpu_vmhub *hub = >vmhub[entry->vmid_src];
+ struct amdgpu_vmhub *hub;
uint32_t status = 0;
u64 addr;
+ hub = entry->vmid_src ?
+ >vmhub[AMDGPU_MMHUB0(0)] : >vmhub[AMDGPU_GFXHUB(0)];
+
addr = (u64)entry->src_data[0] << 12;
addr |= ((u64)entry->src_data[1] & 0xf) << 44;
--
2.34.1
[PATCH 1/2] drm/amdgpu: fix printing empty string array
Fix printing empty string array. Signed-off-by: YiPeng Chai --- drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c index c571f0d95994..d04fc0f19a29 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c @@ -128,8 +128,9 @@ static int gmc_v11_0_process_interrupt(struct amdgpu_device *adev, "for process %s pid %d thread %s pid %d)\n", entry->vmid_src ? "mmhub" : "gfxhub", entry->src_id, entry->ring_id, entry->vmid, - entry->pasid, task_info.process_name, task_info.tgid, - task_info.task_name, task_info.pid); + entry->pasid, + task_info.process_name[0] ? task_info.process_name : "NULL", task_info.tgid, + task_info.task_name[0] ? task_info.task_name : "NULL", task_info.pid); dev_err(adev->dev, " in page starting at address 0x%016llx from client %d\n", addr, entry->client_id); if (!amdgpu_sriov_vf(adev)) -- 2.34.1
[PATCH 2/2] drm/amdgpu: Program xcp_ctl registers as needed
XCP_CTL register is expected to be programmed by firmware. Under certain
conditions FW may not have programmed it correctly. As a workaround,
program only when FW has not programmed the right values.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 28 ++---
1 file changed, 11 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index c0855c3769d4..084ba50924e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -1037,26 +1037,20 @@ static void gfx_v9_4_3_xcc_disable_gpa_mode(struct
amdgpu_device *adev, int xcc_
static void gfx_v9_4_3_xcc_program_xcc_id(struct amdgpu_device *adev,
int xcc_id)
{
- uint32_t tmp = 0;
- int num_xcc;
+ uint32_t expval, regval;
+ int num_xcc, i;
num_xcc = NUM_XCC(adev->gfx.xcc_mask);
- switch (num_xcc) {
- /* directly config VIRTUAL_XCC_ID to 0 for 1-XCC */
- case 1:
- WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, 0x8);
- break;
- case 2:
- case 4:
- case 6:
- case 8:
- tmp = (xcc_id % adev->gfx.num_xcc_per_xcp) <<
REG_FIELD_SHIFT(CP_HYP_XCP_CTL, VIRTUAL_XCC_ID);
- tmp = tmp | (adev->gfx.num_xcc_per_xcp <<
REG_FIELD_SHIFT(CP_HYP_XCP_CTL, NUM_XCC_IN_XCP));
- WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, tmp);
+ for (i = 0; i < num_xcc; i++) {
+ expval = REG_SET_FIELD(expval, CP_HYP_XCP_CTL, NUM_XCC_IN_XCP,
+ adev->gfx.num_xcc_per_xcp);
+ expval = REG_SET_FIELD(expval, CP_HYP_XCP_CTL, VIRTUAL_XCC_ID,
+ i % adev->gfx.num_xcc_per_xcp);
- break;
- default:
- break;
+ regval = RREG32_SOC15(GC, GET_INST(GC, i), regCP_HYP_XCP_CTL);
+ if (regval != expval)
+ WREG32_SOC15(GC, GET_INST(GC, i), regCP_HYP_XCP_CTL,
+expval);
}
}
--
2.25.1
[PATCH 1/2] Revert "drm/amdgpu: Remove redundant GFX v9.4.3 sequence"
This reverts commit cd65f5547f06b8c144063b1744011a135157e364.
FW programming is not yet functional fully. Revert till the programming
is in place in FW.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index 738226ed6e50..c0855c3769d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -1034,6 +1034,32 @@ static void gfx_v9_4_3_xcc_disable_gpa_mode(struct
amdgpu_device *adev, int xcc_
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPC_PSP_DEBUG, data);
}
+static void gfx_v9_4_3_xcc_program_xcc_id(struct amdgpu_device *adev,
+ int xcc_id)
+{
+ uint32_t tmp = 0;
+ int num_xcc;
+
+ num_xcc = NUM_XCC(adev->gfx.xcc_mask);
+ switch (num_xcc) {
+ /* directly config VIRTUAL_XCC_ID to 0 for 1-XCC */
+ case 1:
+ WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, 0x8);
+ break;
+ case 2:
+ case 4:
+ case 6:
+ case 8:
+ tmp = (xcc_id % adev->gfx.num_xcc_per_xcp) <<
REG_FIELD_SHIFT(CP_HYP_XCP_CTL, VIRTUAL_XCC_ID);
+ tmp = tmp | (adev->gfx.num_xcc_per_xcp <<
REG_FIELD_SHIFT(CP_HYP_XCP_CTL, NUM_XCC_IN_XCP));
+ WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, tmp);
+
+ break;
+ default:
+ break;
+ }
+}
+
static bool gfx_v9_4_3_is_rlc_enabled(struct amdgpu_device *adev)
{
uint32_t rlc_setting;
@@ -1910,6 +1936,9 @@ static int gfx_v9_4_3_xcc_cp_resume(struct amdgpu_device
*adev, int xcc_id)
return r;
}
+ /* set the virtual and physical id based on partition_mode */
+ gfx_v9_4_3_xcc_program_xcc_id(adev, xcc_id);
+
r = gfx_v9_4_3_xcc_kiq_resume(adev, xcc_id);
if (r)
return r;
--
2.25.1
[PATCH v2] drm/amd/amdgpu: Fix warnings in amdgpu/amdgpu_display.c
Fixes the below checkpatch.pl warnings:
WARNING: Block comments use * on subsequent lines
WARNING: Block comments use a trailing */ on a separate line
WARNING: suspect code indent for conditional statements (8, 12)
WARNING: braces {} are not necessary for single statement blocks
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 42 -
1 file changed, 25 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index b702f499f5fb..9a74eae50ad4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -124,7 +124,7 @@ static void amdgpu_display_flip_work_func(struct
work_struct *__work)
struct drm_crtc *crtc = _crtc->base;
unsigned long flags;
- unsigned i;
+ unsigned int i;
int vpos, hpos;
for (i = 0; i < work->shared_count; ++i)
@@ -201,7 +201,7 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc
*crtc,
u64 tiling_flags;
int i, r;
- work = kzalloc(sizeof *work, GFP_KERNEL);
+ work = kzalloc(sizeof(*work), GFP_KERNEL);
if (work == NULL)
return -ENOMEM;
@@ -332,13 +332,15 @@ int amdgpu_display_crtc_set_config(struct drm_mode_set
*set,
adev = drm_to_adev(dev);
/* if we have active crtcs and we don't have a power ref,
- take the current one */
+* take the current one
+*/
if (active && !adev->have_disp_power_ref) {
adev->have_disp_power_ref = true;
return ret;
}
/* if we have no active crtcs, then drop the power ref
- we got before */
+* we got before
+*/
if (!active && adev->have_disp_power_ref) {
pm_runtime_put_autosuspend(dev->dev);
adev->have_disp_power_ref = false;
@@ -507,11 +509,10 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector
*amdgpu_connector,
if (amdgpu_connector->router.ddc_valid)
amdgpu_i2c_router_select_ddc_port(amdgpu_connector);
- if (use_aux) {
+ if (use_aux)
ret = i2c_transfer(_connector->ddc_bus->aux.ddc, msgs,
2);
- } else {
+ else
ret = i2c_transfer(_connector->ddc_bus->adapter, msgs,
2);
- }
if (ret != 2)
/* Couldn't find an accessible DDC on this connector */
@@ -520,10 +521,12 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector
*amdgpu_connector,
* EDID header starts with:
* 0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00.
* Only the first 6 bytes must be valid as
-* drm_edid_block_valid() can fix the last 2 bytes */
+* drm_edid_block_valid() can fix the last 2 bytes
+*/
if (drm_edid_header_is_valid(buf) < 6) {
/* Couldn't find an accessible EDID on this
-* connector */
+* connector
+*/
return false;
}
return true;
@@ -1216,8 +1219,10 @@ amdgpu_display_user_framebuffer_create(struct drm_device
*dev,
obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
if (obj == NULL) {
- drm_dbg_kms(dev, "No GEM object associated to handle 0x%08X, "
- "can't create framebuffer\n", mode_cmd->handles[0]);
+ drm_dbg_kms(dev, "No GEM object associated to handle 0x%08X\n",
+ mode_cmd->handles[0]);
+ drm_dbg_kms(dev, " - Can't create framebuffer\n");
+
return ERR_PTR(-ENOENT);
}
@@ -1410,6 +1415,7 @@ bool amdgpu_display_crtc_scaling_mode_fixup(struct
drm_crtc *crtc,
}
if (amdgpu_crtc->rmx_type != RMX_OFF) {
fixed20_12 a, b;
+
a.full = dfixed_const(src_v);
b.full = dfixed_const(dst_v);
amdgpu_crtc->vsc.full = dfixed_div(a, b);
@@ -1429,7 +1435,7 @@ bool amdgpu_display_crtc_scaling_mode_fixup(struct
drm_crtc *crtc,
*
* \param dev Device to query.
* \param pipe Crtc to query.
- * \param flags Flags from caller (DRM_CALLED_FROM_VBLIRQ or 0).
+ * \param flags from caller (DRM_CALLED_FROM_VBLIRQ or 0).
* For driver internal use only also supports these flags:
*
* USE_REAL_VBLANKSTART to use the real start of vblank instead
@@ -1504,8 +1510,8 @@ int amdgpu_display_get_crtc_scanoutpos(struct drm_device
*dev,
/* Called from driver internal vblank counter query code? */
if (flags & GET_DISTANCE_TO_VBLANKSTART) {
- /* Caller wants distance from real vbl_start in *hpos */
- *hpos = *vpos - vbl_start;
+ /* Caller wants distance from real vbl_start in *hpos */
+ *hpos = *vpos - vbl_start;
}
/* Fudge
RE: [PATCH] drm/radeon: Fix style issues in radeon _encoders.c & _gart.c
[Public]
> -Original Message-
> From: amd-gfx On Behalf Of
> Srinivasan Shanmugam
> Sent: Saturday, July 15, 2023 11:27 PM
> To: Koenig, Christian ; Deucher, Alexander
>
> Cc: SHANMUGAM, SRINIVASAN ;
> amd-gfx@lists.freedesktop.org
> Subject: [PATCH] drm/radeon: Fix style issues in radeon _encoders.c &
> _gart.c
>
> Conform to Linux kernel coding style.
>
> Fixes the following & other checks in radeon_encoders.c & radeon_gart.c:
>
> WARNING: Missing a blank line after declarations
> WARNING: Block comments use * on subsequent lines
> WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
> WARNING: braces {} are not necessary for single statement blocks
>
> Cc: Christian König
> Cc: Alex Deucher
> Signed-off-by: Srinivasan Shanmugam
> ---
> drivers/gpu/drm/radeon/radeon_encoders.c | 22 +++--
> drivers/gpu/drm/radeon/radeon_gart.c | 39
> 2 files changed, 32 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
> b/drivers/gpu/drm/radeon/radeon_encoders.c
> index b3518a8f95a0..9cb6401fe97e 100644
> --- a/drivers/gpu/drm/radeon/radeon_encoders.c
> +++ b/drivers/gpu/drm/radeon/radeon_encoders.c
> @@ -58,6 +58,7 @@ static uint32_t radeon_encoder_clones(struct
> drm_encoder *encoder)
> count = -1;
> list_for_each_entry(clone_encoder, >mode_config.encoder_list,
> head) {
> struct radeon_encoder *radeon_clone =
> to_radeon_encoder(clone_encoder);
> +
> count++;
>
> if (clone_encoder == encoder)
> @@ -108,9 +109,10 @@ radeon_get_encoder_enum(struct drm_device *dev,
> uint32_t supported_device, uint8
> if (ASIC_IS_AVIVO(rdev))
> ret =
> ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1;
> else {
> - /*if (rdev->family == CHIP_R200)
> - ret =
> ENCODER_INTERNAL_DVO1_ENUM_ID1;
> - else*/
> + /* if (rdev->family == CHIP_R200)
> + * ret =
> ENCODER_INTERNAL_DVO1_ENUM_ID1;
> + * else
> + */
> ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
> }
> break;
> @@ -234,6 +236,7 @@ void radeon_encoder_set_active_device(struct
> drm_encoder *encoder)
> list_for_each_entry(connector, >mode_config.connector_list,
> head) {
> if (connector->encoder == encoder) {
> struct radeon_connector *radeon_connector =
> to_radeon_connector(connector);
> +
> radeon_encoder->active_device = radeon_encoder-
> >devices & radeon_connector->devices;
> DRM_DEBUG_KMS("setting active device to %08x
> from %08x %08x for encoder %d\n",
> radeon_encoder->active_device,
> radeon_encoder->devices, @@ -320,12 +323,12 @@ void
> radeon_panel_mode_fixup(struct drm_encoder *encoder,
> struct drm_device *dev = encoder->dev;
> struct radeon_device *rdev = dev->dev_private;
> struct drm_display_mode *native_mode = _encoder-
> >native_mode;
> - unsigned hblank = native_mode->htotal - native_mode->hdisplay;
> - unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
> - unsigned hover = native_mode->hsync_start - native_mode-
> >hdisplay;
> - unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
> - unsigned hsync_width = native_mode->hsync_end - native_mode-
> >hsync_start;
> - unsigned vsync_width = native_mode->vsync_end - native_mode-
> >vsync_start;
> + unsigned int hblank = native_mode->htotal - native_mode->hdisplay;
> + unsigned int vblank = native_mode->vtotal - native_mode->vdisplay;
> + unsigned int hover = native_mode->hsync_start - native_mode-
> >hdisplay;
> + unsigned int vover = native_mode->vsync_start - native_mode-
> >vdisplay;
> + unsigned int hsync_width = native_mode->hsync_end - native_mode-
> >hsync_start;
> + unsigned int vsync_width = native_mode->vsync_end -
> +native_mode->vsync_start;
>
> adjusted_mode->clock = native_mode->clock;
> adjusted_mode->flags = native_mode->flags; @@ -424,6 +427,7 @@
> bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, bool
> radeon_encoder_is_digital(struct drm_encoder *encoder) {
> struct radeon_encoder *radeon_encoder =
> to_radeon_encoder(encoder);
> +
> switch (radeon_encoder->encoder_id) {
> case ENCODER_OBJECT_ID_INTERNAL_LVDS:
> case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
> diff --git a/drivers/gpu/drm/radeon/radeon_gart.c
> b/drivers/gpu/drm/radeon/radeon_gart.c
> index 04109a2a6fd7..96de98be65f4 100644
> --- a/drivers/gpu/drm/radeon/radeon_gart.c
> +++ b/drivers/gpu/drm/radeon/radeon_gart.c
> @@ -74,9 +74,9 @@ int radeon_gart_table_ram_alloc(struct radeon_device
> *rdev)
>
> ptr =
Re: [PATCH v3 4/9] PCI/VGA: Improve the default VGA device selection
On 2023/7/20 03:32, Bjorn Helgaas wrote: but I think it's just confusing to mention this in the commit log, so I would just remove it. Ok, will be done at the next version.
Re: [PATCH v3 4/9] PCI/VGA: Improve the default VGA device selection
Hi, On 2023/7/20 03:32, Bjorn Helgaas wrote: [+cc linux-pci (please cc in the future since the bulk of this patch is in drivers/pci/)] On Wed, Jul 12, 2023 at 12:43:05AM +0800, Sui Jingfeng wrote: From: Sui Jingfeng Currently, the strategy of selecting the default boot on a multiple video card coexistence system is not perfect. Potential problems are: 1) This function is a no-op on non-x86 architectures. Which function in particular is a no-op for non-x86? I refer to the vga_is_firmware_default() function, I will improve the commit message at the next version. (To make it more human readable). Thanks you point it out. 2) It does not take the PCI Bar may get relocated into consideration. 3) It is not effective for the PCI device without a dedicated VRAM Bar. 4) It is device-agnostic, thus it has to waste the effort to iterate all of the PCI Bar to find the VRAM aperture. 5) It has invented lots of methods to determine which one is the default boot device, but this is still a policy because it doesn't give the user a choice to override. I don't think we need a list of *potential* problems. We need an example of the specific problem this will solve, i.e., what currently does not work? 1) The selection of primary GPU on Non-x86 platform. (Arm64, risc-v, powerpc etc) Mostly server platforms have equipped with aspeed bmc, and such hardware platforms have a lot PCIe slot. So I think, aspeed bmc V.S (P.K) radeon(or amdgpu) is very common. 2) The ability to pass the control back to the end user. Convert the *device driven* to the "driver driven" or "human driven". Currently, it is the machine making the decision. Emm, I probably will be able to give some examples at the next version. The drm/ast and maybe drm/loongson patches are the only ones that use the new callback, so I assume there are real problems with those drivers. CONFIG_DRM_AST is a tristate. We're talking about identifying the boot-time console device. So if CONFIG_DRM_AST=m, I guess we don't get the benefit of the new callback unless the module gets loaded? Since, this patch set is mostly for the user of X server. It is actually okey if CONFIG_DRM_AST=m. (it will be works no matter CONFIG_DRM_AST=m or CONFIG_DRM_AST=y) As the device and the driver bound at a latter time. So we are lucky, we need this behavior to implement the override.
Re: [Intel-gfx] [PATCH v3 3/9] PCI/VGA: Switch to aperture_contain_firmware_fb_nonreloc()
Hi,
On 2023/7/20 04:43, Bjorn Helgaas wrote:
[+cc linux-pci; I don't apply or ack PCI patches unless they appear there]
On Wed, Jul 12, 2023 at 12:43:04AM +0800, Sui Jingfeng wrote:
From: Sui Jingfeng
The observation behind this is that we should avoid accessing the global
screen_info directly. Call the aperture_contain_firmware_fb_nonreloc()
function to implement the detection of whether an aperture contains the
firmware FB.
Because it's better to access the global screen_info from
aperture_contain_firmware_fb_nonreloc()? The reasoning here is not
super clear to me.
Yes, honestly the benefits of this patch is not obvious.
But I do have some (may not practical) ideas in my mind when I create
this patch.
See my explanation at the end.
This patch helps to decouple the determination from the implementation.
Or, in other words, we intend to make the determination opaque to the
caller. The determination may choose to be arch-dependent or
arch-independent. But vgaarb, as a consumer of the determination,
shouldn't care how the does determination is implemented.
"how the determination ..." (drop the "does")
Ok, will be fixed at the next version.
Are you saying that aperture_contain_firmware_fb_nonreloc() might be
arch-dependent? Are there multiple callers? Or does this just move
code from one place to a more appropriate place?
1) To form a unify approach, and drop the screen_info.h header.
There are similar cleanup patch at patchwork.
screen_info.h is definitely arch-dependent, while vgaarb is just
device-dependent.
I think, they do have subtle difference.
2) Convert the *device driven* to the "driver driven".
Move it from vgaarb.c to video/apperture allow code sharing.
While this function are not going to be shared in vgaarb.
Previous it is the device make the decision,
after applied this patch it allow driver make the decision.
They do have subtle difference.
Emm, I will try to give some examples at the next version.
3) I was imagine to drag platform display controllers in (get platform
devices involved in the arbitration).
As Alex seem hint to implement something platform-independent.
The aperture_contain_firmware_fb_nonreloc() actually is possible be shared.
The aperture of platform device will be not moved.
So it seems that platform device driver could call this function to do
something else.
Signed-off-by: Sui Jingfeng
---
drivers/pci/vgaarb.c | 19 ---
1 file changed, 4 insertions(+), 15 deletions(-)
diff --git a/drivers/pci/vgaarb.c b/drivers/pci/vgaarb.c
index bf96e085751d..953daf731b2c 100644
--- a/drivers/pci/vgaarb.c
+++ b/drivers/pci/vgaarb.c
@@ -14,6 +14,7 @@
#define vgaarb_info(dev, fmt, arg...) dev_info(dev, "vgaarb: " fmt, ##arg)
#define vgaarb_err(dev, fmt, arg...) dev_err(dev, "vgaarb: " fmt, ##arg)
+#include
#include
#include
#include
@@ -26,7 +27,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -558,20 +558,11 @@ void vga_put(struct pci_dev *pdev, unsigned int rsrc)
}
EXPORT_SYMBOL(vga_put);
+/* Select the device owning the boot framebuffer if there is one */
static bool vga_is_firmware_default(struct pci_dev *pdev)
{
#if defined(CONFIG_X86) || defined(CONFIG_IA64)
- u64 base = screen_info.lfb_base;
- u64 size = screen_info.lfb_size;
struct resource *r;
- u64 limit;
-
- /* Select the device owning the boot framebuffer if there is one */
-
- if (screen_info.capabilities & VIDEO_CAPABILITY_64BIT_BASE)
- base |= (u64)screen_info.ext_lfb_base << 32;
-
- limit = base + size;
/* Does firmware framebuffer belong to us? */
pci_dev_for_each_resource(pdev, r) {
@@ -581,10 +572,8 @@ static bool vga_is_firmware_default(struct pci_dev *pdev)
if (!r->start || !r->end)
continue;
- if (base < r->start || limit >= r->end)
- continue;
-
- return true;
+ if (aperture_contain_firmware_fb_nonreloc(r->start, r->end))
+ return true;
}
#endif
return false;
--
2.25.1
Re: [PATCH] drm/amdkfd: avoid svm dump when dynamic debug disabled
Am 2023-07-19 um 17:22 schrieb Alex Sierra:
Set dynamic_svm_range_dump macro to avoid iterating over SVM lists
from svm_range_debug_dump when dynamic debug is disabled. Otherwise,
it could drop performance, specially with big number of SVM ranges.
Make sure both svm_range_set_attr and svm_range_debug_dump functions
are dynamically enabled to print svm_range_debug_dump debug traces.
Signed-off-by: Alex Sierra
Tested-by: Alex Sierra
Signed-off-by: Philip Yang
Signed-off-by: Felix Kuehling
I don't think my name on a Signed-off-by is appropriate here. I didn't
write the patch. And I'm not submitting it. However, the patch is
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
index 479c4f66afa7..1b50eae051a4 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
@@ -46,6 +46,8 @@
* page table is updated.
*/
#define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC)
+#define dynamic_svm_range_dump(svms) \
+ _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
/* Giant svm range split into smaller ranges based on this, it is decided using
* minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to
@@ -3563,7 +3565,7 @@ svm_range_set_attr(struct kfd_process *p, struct
mm_struct *mm,
break;
}
- svm_range_debug_dump(svms);
+ dynamic_svm_range_dump(svms);
mutex_unlock(>lock);
mmap_read_unlock(mm);
[PATCH] drm/amdkfd: avoid svm dump when dynamic debug disabled
Set dynamic_svm_range_dump macro to avoid iterating over SVM lists
from svm_range_debug_dump when dynamic debug is disabled. Otherwise,
it could drop performance, specially with big number of SVM ranges.
Make sure both svm_range_set_attr and svm_range_debug_dump functions
are dynamically enabled to print svm_range_debug_dump debug traces.
Signed-off-by: Alex Sierra
Tested-by: Alex Sierra
Signed-off-by: Philip Yang
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
index 479c4f66afa7..1b50eae051a4 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
@@ -46,6 +46,8 @@
* page table is updated.
*/
#define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC)
+#define dynamic_svm_range_dump(svms) \
+ _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
/* Giant svm range split into smaller ranges based on this, it is decided using
* minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to
@@ -3563,7 +3565,7 @@ svm_range_set_attr(struct kfd_process *p, struct
mm_struct *mm,
break;
}
- svm_range_debug_dump(svms);
+ dynamic_svm_range_dump(svms);
mutex_unlock(>lock);
mmap_read_unlock(mm);
--
2.32.0
Re: [PATCH v3 1/9] video/aperture: Add a helper to detect if an aperture contains firmware FB
Hi, On 2023/7/20 04:43, Bjorn Helgaas wrote: On Wed, Jul 12, 2023 at 12:43:02AM +0800, Sui Jingfeng wrote: From: Sui Jingfeng This patch adds the aperture_contain_firmware_fb() function to do the determination. Unfortunately, due to the fact that the apertures list will be freed dynamically, the location and size information of the firmware FB will be lost after dedicated drivers call aperture_remove_conflicting_devices(), aperture_remove_conflicting_pci_devices() or aperture_remove_all_conflicting_devices() functions We solve this problem by introducing two static variables that record the firmware framebuffer's start addrness and end addrness. It assumes that the system has only one active firmware framebuffer driver at a time. We don't use the global structure screen_info here, because PCI resources may get reallocated (the VRAM BAR could be moved) during the kernel boot stage. s/addrness/address/ (twice) Will be fixed at the next version, thanks.
Re: [PATCH v3 1/9] video/aperture: Add a helper to detect if an aperture contains firmware FB
On Wed, Jul 12, 2023 at 12:43:02AM +0800, Sui Jingfeng wrote: > From: Sui Jingfeng > > This patch adds the aperture_contain_firmware_fb() function to do the > determination. Unfortunately, due to the fact that the apertures list > will be freed dynamically, the location and size information of the > firmware FB will be lost after dedicated drivers call > aperture_remove_conflicting_devices(), > aperture_remove_conflicting_pci_devices() or > aperture_remove_all_conflicting_devices() functions > We solve this problem by introducing two static variables that record the > firmware framebuffer's start addrness and end addrness. It assumes that the > system has only one active firmware framebuffer driver at a time. We don't > use the global structure screen_info here, because PCI resources may get > reallocated (the VRAM BAR could be moved) during the kernel boot stage. s/addrness/address/ (twice)
Re: [Intel-gfx] [PATCH v3 3/9] PCI/VGA: Switch to aperture_contain_firmware_fb_nonreloc()
[+cc linux-pci; I don't apply or ack PCI patches unless they appear there]
On Wed, Jul 12, 2023 at 12:43:04AM +0800, Sui Jingfeng wrote:
> From: Sui Jingfeng
>
> The observation behind this is that we should avoid accessing the global
> screen_info directly. Call the aperture_contain_firmware_fb_nonreloc()
> function to implement the detection of whether an aperture contains the
> firmware FB.
Because it's better to access the global screen_info from
aperture_contain_firmware_fb_nonreloc()? The reasoning here is not
super clear to me.
> This patch helps to decouple the determination from the implementation.
> Or, in other words, we intend to make the determination opaque to the
> caller. The determination may choose to be arch-dependent or
> arch-independent. But vgaarb, as a consumer of the determination,
> shouldn't care how the does determination is implemented.
"how the determination ..." (drop the "does")
Are you saying that aperture_contain_firmware_fb_nonreloc() might be
arch-dependent? Are there multiple callers? Or does this just move
code from one place to a more appropriate place?
> Signed-off-by: Sui Jingfeng
> ---
> drivers/pci/vgaarb.c | 19 ---
> 1 file changed, 4 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/pci/vgaarb.c b/drivers/pci/vgaarb.c
> index bf96e085751d..953daf731b2c 100644
> --- a/drivers/pci/vgaarb.c
> +++ b/drivers/pci/vgaarb.c
> @@ -14,6 +14,7 @@
> #define vgaarb_info(dev, fmt, arg...)dev_info(dev, "vgaarb: " fmt,
> ##arg)
> #define vgaarb_err(dev, fmt, arg...) dev_err(dev, "vgaarb: " fmt, ##arg)
>
> +#include
> #include
> #include
> #include
> @@ -26,7 +27,6 @@
> #include
> #include
> #include
> -#include
> #include
> #include
> #include
> @@ -558,20 +558,11 @@ void vga_put(struct pci_dev *pdev, unsigned int rsrc)
> }
> EXPORT_SYMBOL(vga_put);
>
> +/* Select the device owning the boot framebuffer if there is one */
> static bool vga_is_firmware_default(struct pci_dev *pdev)
> {
> #if defined(CONFIG_X86) || defined(CONFIG_IA64)
> - u64 base = screen_info.lfb_base;
> - u64 size = screen_info.lfb_size;
> struct resource *r;
> - u64 limit;
> -
> - /* Select the device owning the boot framebuffer if there is one */
> -
> - if (screen_info.capabilities & VIDEO_CAPABILITY_64BIT_BASE)
> - base |= (u64)screen_info.ext_lfb_base << 32;
> -
> - limit = base + size;
>
> /* Does firmware framebuffer belong to us? */
> pci_dev_for_each_resource(pdev, r) {
> @@ -581,10 +572,8 @@ static bool vga_is_firmware_default(struct pci_dev *pdev)
> if (!r->start || !r->end)
> continue;
>
> - if (base < r->start || limit >= r->end)
> - continue;
> -
> - return true;
> + if (aperture_contain_firmware_fb_nonreloc(r->start, r->end))
> + return true;
> }
> #endif
> return false;
> --
> 2.25.1
>
Re: [PATCH] drm/amdkfd: avoid svm dump when dynamic debug disabled
Am 2023-07-19 um 14:03 schrieb Alex Sierra:
Set dynamic_svm_range_dump macro to avoid iterating over SVM lists
from svm_range_debug_dump when dynamic debug is disabled. Otherwise,
it could drop performance, specially with big number of SVM ranges.
Make sure both svm_range_set_attr and svm_range_debug_dump functions
are dynamically enabled to print svm_range_debug_dump debug traces.
Signed-off-by: Alex Sierra
Tested-by: Alex Sierra
Signed-off-by: Philip Yang
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_svm.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
index 479c4f66afa7..0687f27f506c 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
@@ -3563,7 +3563,7 @@ svm_range_set_attr(struct kfd_process *p, struct
mm_struct *mm,
break;
}
- svm_range_debug_dump(svms);
+ dynamic_svm_range_dump(svms);
mutex_unlock(>lock);
mmap_read_unlock(mm);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.h
b/drivers/gpu/drm/amd/amdkfd/kfd_svm.h
index 21b14510882b..ed4cd501fafe 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.h
@@ -39,6 +39,9 @@
#define SVM_ADEV_PGMAP_OWNER(adev)\
((adev)->hive ? (void *)(adev)->hive : (void *)(adev))
+#define dynamic_svm_range_dump(svms) \
+ _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
+
This should be in kfd_svm.c. The function svm_range_debug_dump is a
static function in that file. This macro is not useful outside of it.
Regards,
Felix
struct svm_range_bo {
struct amdgpu_bo*bo;
struct kref kref;
Re: [PATCH 00/10] Freesync Panel Replay V2
With my comments on patches 6 and 10 addressed this series is Reviewed-by: Harry Wentland Harry On 2023-07-10 15:27, Bhawanpreet Lakha wrote: > This patch set introduces Freesync Panel Replay capability on DCN 3.1.4 > and newer. Replay has been verified to be working with these patches (in > house) > > These patches are enabling panel replay in static screen use-cases. > Other use cases will be added as they are ready > > > The importance of Replay > > > In some instances, the GPU is transmitting repeated frames to the sink > without any updates or changes in the content. These repeat transmission > are wasteful, resulting in power draw in different aspects of the system > > 1. DCN is fetching the frame of data from DF/UMC/DRAM. This memory traffic > prevents power down of parts of this HW path. > > 2. GPU is transmitting pixel data to the display through the main link of > the DisplayPort interface. This prevents power down of both the Source > transmitter (TX) and the Sink receiver (RX) > > > > How it improves on PSR > > > The concepts of utilizing replay is similar to PSR, but there is a benefit of: > Source and Sink remaining synchronized which allows for > - lower latency when switching from replay to live frames > - enable the possibility of more use cases > - easy control of the sink's refresh rate during replay > > Due to Source and Sink remaining timing synchronized, Replay can be activated > in more UI scenarios. > > > V2: Bug fixes, V1 had some issues which have all been fixed. > - Invisible Cursor > - Random Hang > - Laggy System > > Regards, > Bhawan > > Bhawanpreet Lakha (10): > drm/amd/display: Add structs for Freesync Panel Replay > drm/amd/display: Add Functions to enable Freesync Panel Replay > drm/amd/display: Add Freesync Panel DM code > drm/amd/display: Read replay data from sink > drm/amd/display: Get replay info from VSDB > drm/amd/display: Add Replay supported/enabled checks > drm/amd/display: Update replay for clk_mgr optimizations > drm/amd/display: Update adaptive sync infopackets for replay > drm/amd/display: Handle Replay related hpd irq > drm/amd/display: Enable Replay for static screen use cases > > .../gpu/drm/amd/display/amdgpu_dm/Makefile| 2 +- > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 71 ++- > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 14 + > .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c| 9 +- > .../amd/display/amdgpu_dm/amdgpu_dm_replay.c | 183 > .../amd/display/amdgpu_dm/amdgpu_dm_replay.h | 46 ++ > .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 3 + > drivers/gpu/drm/amd/display/dc/core/dc.c | 6 + > .../drm/amd/display/dc/core/dc_link_exports.c | 5 + > drivers/gpu/drm/amd/display/dc/dc.h | 6 + > drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 3 + > drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 29 ++ > drivers/gpu/drm/amd/display/dc/dc_types.h | 41 ++ > drivers/gpu/drm/amd/display/dc/dce/Makefile | 2 +- > .../gpu/drm/amd/display/dc/dce/dmub_replay.c | 303 + > .../gpu/drm/amd/display/dc/dce/dmub_replay.h | 58 +++ > .../display/dc/dce110/dce110_hw_sequencer.c | 6 + > .../drm/amd/display/dc/dcn21/dcn21_resource.c | 1 + > .../drm/amd/display/dc/dcn30/dcn30_resource.c | 1 + > .../amd/display/dc/dcn302/dcn302_resource.c | 1 + > .../amd/display/dc/dcn303/dcn303_resource.c | 1 + > .../drm/amd/display/dc/dcn31/dcn31_resource.c | 13 + > .../amd/display/dc/dcn314/dcn314_resource.c | 14 + > .../amd/display/dc/dcn315/dcn315_resource.c | 1 + > .../amd/display/dc/dcn316/dcn316_resource.c | 1 + > .../gpu/drm/amd/display/dc/inc/core_types.h | 19 + > drivers/gpu/drm/amd/display/dc/inc/link.h | 14 + > .../drm/amd/display/dc/link/link_factory.c| 7 + > .../dc/link/protocols/link_dp_capability.c| 10 + > .../dc/link/protocols/link_dp_irq_handler.c | 66 +++ > .../link/protocols/link_edp_panel_control.c | 165 +++ > .../link/protocols/link_edp_panel_control.h | 8 + > .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 412 ++ > .../gpu/drm/amd/display/include/dpcd_defs.h | 5 +- > .../display/modules/info_packet/info_packet.c | 4 + > .../amd/display/modules/power/power_helpers.c | 5 + > .../amd/display/modules/power/power_helpers.h | 2 + > drivers/gpu/drm/amd/include/amd_shared.h | 2 + > 38 files changed, 1533 insertions(+), 6 deletions(-) > create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c > create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.h > create mode 100644 drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c > create mode 100644 drivers/gpu/drm/amd/display/dc/dce/dmub_replay.h >
Re: [PATCH 10/10] drm/amd/display: Enable Replay for static screen use cases
On 2023-07-10 15:27, Bhawanpreet Lakha wrote:
> - Setup replay config on device init.
> - Enable replay if feature is enabled (prioritize replay over PSR, since
> it can be enabled in more usecases)
> - Add debug masks to enable replay on supported ASICs
>
> Signed-off-by: Bhawanpreet Lakha
> ---
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 +++
> .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c| 9 +++-
> drivers/gpu/drm/amd/include/amd_shared.h | 2 ++
> 3 files changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 90bc32a29356..b5aeae693417 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -65,6 +65,7 @@
> #include "amdgpu_dm_debugfs.h"
> #endif
> #include "amdgpu_dm_psr.h"
> +#include "amdgpu_dm_replay.h"
>
> #include "ivsrcid/ivsrcid_vislands30.h"
>
> @@ -4315,6 +4316,7 @@ static int amdgpu_dm_initialize_drm_device(struct
> amdgpu_device *adev)
> enum dc_connection_type new_connection_type = dc_connection_none;
> const struct dc_plane_cap *plane;
> bool psr_feature_enabled = false;
> + bool replay_feature_enabled = false;
> int max_overlay = dm->dc->caps.max_slave_planes;
>
> dm->display_indexes_num = dm->dc->caps.max_streams;
> @@ -4424,6 +4426,20 @@ static int amdgpu_dm_initialize_drm_device(struct
> amdgpu_device *adev)
> }
> }
>
> + if (!(amdgpu_dc_debug_mask & DC_DISABLE_REPLAY)) {
> + switch (adev->ip_versions[DCE_HWIP][0]) {
> + case IP_VERSION(3, 1, 4):
> + case IP_VERSION(3, 1, 5):
> + case IP_VERSION(3, 1, 6):
> + case IP_VERSION(3, 2, 0):
> + case IP_VERSION(3, 2, 1):
I imagine we'll want to support replay on all generations going forward. Can
was just do a check for >= IP_VERSION(3, 1, 4)?
> + replay_feature_enabled = true;
> + break;
> + default:
> + replay_feature_enabled = amdgpu_dc_feature_mask &
> DC_REPLAY_MASK;
> + break;
> + }
> + }
> /* loops over all connectors on the board */
> for (i = 0; i < link_cnt; i++) {
> struct dc_link *link = NULL;
> @@ -4472,6 +4488,12 @@ static int amdgpu_dm_initialize_drm_device(struct
> amdgpu_device *adev)
>
> amdgpu_dm_update_connector_after_detect(aconnector);
> setup_backlight_device(dm, aconnector);
>
> + /*
> + * Disable psr if replay can be enabled
> + */
> + if (replay_feature_enabled &&
> amdgpu_dm_setup_replay(link, aconnector))
> + psr_feature_enabled = false;
> +
> if (psr_feature_enabled)
> amdgpu_dm_set_psr_caps(link);
>
> @@ -4480,6 +4502,7 @@ static int amdgpu_dm_initialize_drm_device(struct
> amdgpu_device *adev)
>*/
> if (link->psr_settings.psr_feature_enabled)
>
> adev_to_drm(adev)->vblank_disable_immediate = false;
> +
nit: stray newline
> }
> }
> amdgpu_set_panel_orientation(>base);
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> index 440fc0869a34..fb51ec4f8d31 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> @@ -29,6 +29,7 @@
> #include "dc.h"
> #include "amdgpu.h"
> #include "amdgpu_dm_psr.h"
> +#include "amdgpu_dm_replay.h"
> #include "amdgpu_dm_crtc.h"
> #include "amdgpu_dm_plane.h"
> #include "amdgpu_dm_trace.h"
> @@ -123,7 +124,12 @@ static void vblank_control_worker(struct work_struct
> *work)
>* fill_dc_dirty_rects().
>*/
> if (vblank_work->stream && vblank_work->stream->link) {
> - if (vblank_work->enable) {
> + /*
> + * Prioritize replay, instead of psr
> + */
> + if
> (vblank_work->stream->link->replay_settings.replay_feature_enabled)
> + amdgpu_dm_replay_enable(vblank_work->stream, false);
> + else if (vblank_work->enable) {
> if (vblank_work->stream->link->psr_settings.psr_version
> < DC_PSR_VERSION_SU_1 &&
>
> vblank_work->stream->link->psr_settings.psr_allow_active)
> amdgpu_dm_psr_disable(vblank_work->stream);
> @@ -132,6 +138,7 @@ static void vblank_control_worker(struct work_struct
> *work)
> #ifdef
Re: [PATCH v3 0/9] PCI/VGA: Improve the default VGA device selection
[+cc linux-pci] On Wed, Jul 12, 2023 at 12:43:01AM +0800, Sui Jingfeng wrote: > From: Sui Jingfeng > > Currently, the default VGA device selection is not perfect. Potential > problems are: > > 1) This function is a no-op on non-x86 architectures. > 2) It does not take the PCI Bar may get relocated into consideration. > 3) It is not effective for the PCI device without a dedicated VRAM Bar. > 4) It is device-agnostic, thus it has to waste the effort to iterate all >of the PCI Bar to find the VRAM aperture. > 5) It has invented lots of methods to determine which one is the default >boot device on a multiple video card coexistence system. But this is >still a policy because it doesn't give the user a choice to override. > > With the observation that device drivers or video aperture helpers may > have better knowledge about which PCI bar contains the firmware FB, > > This patch tries to solve the above problems by introducing a function > callback to the vga_client_register() function interface. DRM device > drivers for the PCI device need to register the is_boot_device() function > callback during the driver loading time. Once the driver binds the device > successfully, VRAARB will call back to the driver. This gives the device > drivers a chance to provide accurate boot device identification. Which in > turn unlock the abitration service to non-x86 architectures. A device > driver can also pass a NULL pointer to keep the original behavior. I skimmed all these patches, but the only one that seems to mention an actual problem being solved, i.e., something that doesn't work for an end user, is "drm/ast: Register as a vga client ..." Maybe "drm/loongson: Add an implement for ..." also solves a problem, but it lacks a commit log, so I don't know what the problem is. In the future, can you please cc: linux-pci with the entire series? In this posting, only the patches that touched drivers/pci/vgaarb.c went to linux-pci, but those aren't enough to make sense of the series as a whole. > video/aperture: Add a helper to detect if an aperture contains > firmware FB > video/aperture: Add a helper for determining if an unmoved aperture > contain FB > PCI/VGA: Switch to aperture_contain_firmware_fb_nonreloc() Since this subject includes the function name (which is nice!), it would also be helpful if the "Add a helper ..." subject included the same function name. > PCI/VGA: Improve the default VGA device selection If you can make this subject any more specific, that would be useful. There's more to say about that patch, so I'll respond there. > drm/amdgpu: Implement the is_primary_gpu callback of > vga_client_register() > drm/radeon: Add an implement for the is_primary_gpu function callback > drm/i915: Add an implement for the is_primary_gpu hook > drm/ast: Register as a vga client to vgaarb by calling > vga_client_register() > drm/loongson: Add an implement for the is_primary_gpu function > callback There's unnecessary variation in the subject lines (and the commit logs) of these patches. If they all do the same thing but in different drivers, it's useful if the patches all *look* the same. You might be able to write these subjects as "Implement .is_primary_gpu() callback" for brevity. Bjorn
Re: [PATCH v3 4/9] PCI/VGA: Improve the default VGA device selection
[+cc linux-pci (please cc in the future since the bulk of this patch
is in drivers/pci/)]
On Wed, Jul 12, 2023 at 12:43:05AM +0800, Sui Jingfeng wrote:
> From: Sui Jingfeng
>
> Currently, the strategy of selecting the default boot on a multiple video
> card coexistence system is not perfect. Potential problems are:
>
> 1) This function is a no-op on non-x86 architectures.
Which function in particular is a no-op for non-x86?
> 2) It does not take the PCI Bar may get relocated into consideration.
> 3) It is not effective for the PCI device without a dedicated VRAM Bar.
> 4) It is device-agnostic, thus it has to waste the effort to iterate all
>of the PCI Bar to find the VRAM aperture.
> 5) It has invented lots of methods to determine which one is the default
>boot device, but this is still a policy because it doesn't give the
>user a choice to override.
I don't think we need a list of *potential* problems. We need an
example of the specific problem this will solve, i.e., what currently
does not work?
The drm/ast and maybe drm/loongson patches are the only ones that use
the new callback, so I assume there are real problems with those
drivers.
CONFIG_DRM_AST is a tristate. We're talking about identifying the
boot-time console device. So if CONFIG_DRM_AST=m, I guess we don't
get the benefit of the new callback unless the module gets loaded?
> Also honor the comment: "Clients have *TWO* callback mechanisms they
> can use"
This refers to the existing vga_client_register() function comment:
* vga_client_register - register or unregister a VGA arbitration client
* @pdev: pci device of the VGA client
* @set_decode: vga decode change callback
*
* Clients have two callback mechanisms they can use.
*
* @set_decode callback: If a client can disable its GPU VGA resource, it
* will get a callback from this to set the encode/decode state.
and the fact that struct vga_device currently only contains *one*
callback function pointer:
unsigned int (*set_decode)(struct pci_dev *pdev, bool decode);
Adding the .is_primary_gpu() callback does mean there will now be two
callbacks, as the comment says, but I think it's just confusing to
mention this in the commit log, so I would just remove it.
> @@ -1509,13 +1543,24 @@ static int pci_notify(struct notifier_block *nb,
> unsigned long action,
>* cases of hotplugable vga cards.
>*/
>
> - if (action == BUS_NOTIFY_ADD_DEVICE)
> + switch (action) {
> + case BUS_NOTIFY_ADD_DEVICE:
> notify = vga_arbiter_add_pci_device(pdev);
> - else if (action == BUS_NOTIFY_DEL_DEVICE)
> + if (notify)
> + vga_arbiter_notify_clients();
> + break;
> + case BUS_NOTIFY_DEL_DEVICE:
> notify = vga_arbiter_del_pci_device(pdev);
> + if (notify)
> + vga_arbiter_notify_clients();
> + break;
> + case BUS_NOTIFY_BOUND_DRIVER:
> + vga_arbiter_do_arbitration(pdev);
> + break;
> + default:
> + break;
> + }
Changing from if/else to switch makes the patch bigger than necessary
for no real benefit and obscures what is really changing.
Bjorn
Re: [PATCH 06/10] drm/amd/display: Add Replay supported/enabled checks
On 2023-07-10 15:27, Bhawanpreet Lakha wrote:
> - Add checks for Cursor update and dirty rects (sending updates to dmub)
> - Add checks for dc_notify_vsync, and fbc and subvp
>
> Signed-off-by: Bhawanpreet Lakha
> ---
> drivers/gpu/drm/amd/display/dc/core/dc.c| 6 ++
> drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c| 3 +++
> drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 6 ++
> 3 files changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
> b/drivers/gpu/drm/amd/display/dc/core/dc.c
> index dd3a9d06c6e2..dccb49e27f35 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
> @@ -3367,6 +3367,9 @@ static bool dc_dmub_should_send_dirty_rect_cmd(struct
> dc *dc, struct dc_stream_s
> && stream->ctx->dce_version >= DCN_VERSION_3_1)
> return true;
>
> +if (stream->link->replay_settings.config.replay_supported)
> +return true;
> +
> return false;
> }
>
> @@ -5116,6 +5119,9 @@ void dc_notify_vsync_int_state(struct dc *dc, struct
> dc_stream_state *stream, bo
> if (link->psr_settings.psr_feature_enabled)
> return;
>
> +if (link->replay_settings.replay_feature_enabled)
> +return;
Use tabs, not spaces. I just noticed it here but it's elsewhere in this patch.
Please check the other patches as well.
> +
> /*find primary pipe associated with stream*/
> for (i = 0; i < MAX_PIPES; i++) {
> pipe = >current_state->res_ctx.pipe_ctx[i];
> diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
> b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
> index c52c40b16387..706c49e015f6 100644
> --- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
> +++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
> @@ -894,6 +894,9 @@ static bool dc_dmub_should_update_cursor_data(struct
> pipe_ctx *pipe_ctx)
> pipe_ctx->stream->ctx->dce_version >= DCN_VERSION_3_1)
> return true;
>
> + if (pipe_ctx->stream->link->replay_settings.config.replay_supported)
> +return true;
> +
> return false;
> }
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
> b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
> index 6c9ca43d1040..16b53a4c5a42 100644
> --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
> +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
> @@ -1585,6 +1585,8 @@ static enum dc_status apply_single_controller_ctx_to_hw(
>*/
> if (pipe_ctx->stream->mall_stream_config.type != SUBVP_PHANTOM) {
> pipe_ctx->stream->link->psr_settings.psr_feature_enabled =
> false;
> + printk("## %s %d\n",__func__,__LINE__);
stray debug printk
Harry
> + pipe_ctx->stream->link->replay_settings.replay_feature_enabled
> = false;
> }
> return DC_OK;
> }
> @@ -2013,6 +2015,10 @@ static bool should_enable_fbc(struct dc *dc,
> if (pipe_ctx->stream->link->psr_settings.psr_feature_enabled)
> return false;
>
> + /* Replay should not be enabled */
> +if (pipe_ctx->stream->link->replay_settings.replay_feature_enabled)
> +return false;
> +
> /* Nothing to compress */
> if (!pipe_ctx->plane_state)
> return false;
[PATCH 16/16] drm/amd/display: 3.2.244
From: Aric Cyr This version brings along following fixes: - Fix underflow issue on 175hz timing - Add interface to modify DMUB panel power options - Remove check for default eDP panel_mode - Add new sequence for 4-lane HBR3 on vendor specific retimers - Update DPG test pattern programming - Correct unit conversion for vstartup - Exit idle optimizations before attempt to access PHY - Refactor recout calculation with a more generic formula - Read down-spread percentage from lut to adjust dprefclk. - Don't apply FIFO resync W/A if rdivider = 0 - Prevent invalid pipe connections - Rearrange dmub_cmd defs order - Add VESA SCR case for default aux backlight - Guard DCN31 PHYD32CLK logic against chip family - Correct grammar mistakes Acked-by: Alex Hung Signed-off-by: Aric Cyr --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 41e68d694c17..eadb53853131 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -47,7 +47,7 @@ struct aux_payload; struct set_config_cmd_payload; struct dmub_notification; -#define DC_VER "3.2.243" +#define DC_VER "3.2.244" #define MAX_SURFACES 3 #define MAX_PLANES 6 -- 2.41.0
[PATCH 15/16] drm/amd/display: Fix underflow issue on 175hz timing
From: Leo Ma
[Why]
Screen underflows happen on 175hz timing for 3 plane overlay case.
[How]
Based on dst y prefetch value clamp to equ or oto for bandwidth
calculation.
Reviewed-by: Dillon Varone
Acked-by: Alex Hung
Signed-off-by: Leo Ma
---
.../amd/display/dc/dml/dcn32/display_mode_vba_util_32.c| 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index 890797ecf0f9..ecea008f19d3 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
@@ -3459,6 +3459,7 @@ bool dml32_CalculatePrefetchSchedule(
double TimeForFetchingMetaPTE = 0;
double TimeForFetchingRowInVBlank = 0;
double LinesToRequestPrefetchPixelData = 0;
+ double LinesForPrefetchBandwidth = 0;
unsigned int HostVMDynamicLevelsTrips;
double trip_to_mem;
double Tvm_trips;
@@ -3888,11 +3889,15 @@ bool dml32_CalculatePrefetchSchedule(
TimeForFetchingMetaPTE = Tvm_oto;
TimeForFetchingRowInVBlank = Tr0_oto;
*PrefetchBandwidth = prefetch_bw_oto;
+ /* Clamp to oto for bandwidth calculation */
+ LinesForPrefetchBandwidth = dst_y_prefetch_oto;
} else {
*DestinationLinesForPrefetch = dst_y_prefetch_equ;
TimeForFetchingMetaPTE = Tvm_equ;
TimeForFetchingRowInVBlank = Tr0_equ;
*PrefetchBandwidth = prefetch_bw_equ;
+ /* Clamp to equ for bandwidth calculation */
+ LinesForPrefetchBandwidth = dst_y_prefetch_equ;
}
*DestinationLinesToRequestVMInVBlank = dml_ceil(4.0 *
TimeForFetchingMetaPTE / LineTime, 1.0) / 4.0;
@@ -3900,7 +3905,7 @@ bool dml32_CalculatePrefetchSchedule(
*DestinationLinesToRequestRowInVBlank =
dml_ceil(4.0 * TimeForFetchingRowInVBlank /
LineTime, 1.0) / 4.0;
- LinesToRequestPrefetchPixelData = *DestinationLinesForPrefetch -
+ LinesToRequestPrefetchPixelData = LinesForPrefetchBandwidth -
*DestinationLinesToRequestVMInVBlank - 2 *
*DestinationLinesToRequestRowInVBlank;
#ifdef __DML_VBA_DEBUG__
--
2.41.0
[PATCH 14/16] drm/amd/display: Add interface to modify DMUB panel power options
From: Paul Hsieh
[Why]
This option can vary depending on the panel and may be required to be
called during sink detection phase before transmitter control.
[How]
Allow modify the bit depending on the eDP panel connected with a new
interface.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex Hung
Signed-off-by: Paul Hsieh
---
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 3 +++
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 12
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
index 53bd9bf8f0c8..2d995c87fbb9 100644
--- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
+++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
@@ -785,6 +785,9 @@ enum dmub_status dmub_srv_get_fw_boot_option(struct
dmub_srv *dmub,
enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,
union dmub_rb_cmd *cmd);
+enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,
+bool skip);
+
bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct
dmcub_trace_buf_entry *entry);
bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub, struct
dmub_diagnostic_data *diag_data);
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
index 70af110af687..93624ffe4eb8 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
@@ -861,6 +861,18 @@ enum dmub_status dmub_srv_get_fw_boot_option(struct
dmub_srv *dmub,
return DMUB_STATUS_OK;
}
+enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,
+bool skip)
+{
+ if (!dmub->sw_init)
+ return DMUB_STATUS_INVALID;
+
+ if (dmub->hw_funcs.skip_dmub_panel_power_sequence && !dmub->is_virtual)
+ dmub->hw_funcs.skip_dmub_panel_power_sequence(dmub, skip);
+
+ return DMUB_STATUS_OK;
+}
+
enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,
union dmub_rb_cmd *cmd)
{
--
2.41.0
[PATCH 13/16] drm/amd/display: Rearrange dmub_cmd defs order
From: Anthony Koo
- Rearranged defs order
Acked-by: Alex Hung
Signed-off-by: Anthony Koo
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 54 +--
1 file changed, 26 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index a81c8f7215bb..adde1d84d773 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -144,6 +144,32 @@
#define PHYSICAL_ADDRESS_LOC union large_integer
#endif
+/**
+ * OS/FW agnostic memcpy
+ */
+#ifndef dmub_memcpy
+#define dmub_memcpy(dest, source, bytes) memcpy((dest), (source), (bytes))
+#endif
+
+/**
+ * OS/FW agnostic memset
+ */
+#ifndef dmub_memset
+#define dmub_memset(dest, val, bytes) memset((dest), (val), (bytes))
+#endif
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/**
+ * OS/FW agnostic udelay
+ */
+#ifndef dmub_udelay
+#define dmub_udelay(microseconds) udelay(microseconds)
+#endif
+
+#pragma pack(push, 1)
#define ABM_NUM_OF_ACE_SEGMENTS 5
union abm_flags {
@@ -233,34 +259,6 @@ struct abm_save_restore {
};
-
-
-/**
- * OS/FW agnostic memcpy
- */
-#ifndef dmub_memcpy
-#define dmub_memcpy(dest, source, bytes) memcpy((dest), (source), (bytes))
-#endif
-
-/**
- * OS/FW agnostic memset
- */
-#ifndef dmub_memset
-#define dmub_memset(dest, val, bytes) memset((dest), (val), (bytes))
-#endif
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/**
- * OS/FW agnostic udelay
- */
-#ifndef dmub_udelay
-#define dmub_udelay(microseconds) udelay(microseconds)
-#endif
-
-#pragma pack(push, 1)
/**
* union dmub_addr - DMUB physical/virtual 64-bit address.
*/
--
2.41.0
[PATCH 12/16] drm/amd/display: Remove check for default eDP panel_mode
From: Taimur Hassan
[Why]
DPCD read is skipped first time after driver initialization.
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Taimur Hassan
---
.../link/protocols/link_edp_panel_control.c | 49 +--
1 file changed, 24 insertions(+), 25 deletions(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
index 5add2360fc94..8b360c09e0e8 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
@@ -46,43 +46,42 @@ void dp_set_panel_mode(struct dc_link *link, enum
dp_panel_mode panel_mode)
{
union dpcd_edp_config edp_config_set;
bool panel_mode_edp = false;
+ enum dc_status result;
memset(_config_set, '\0', sizeof(union dpcd_edp_config));
- if (panel_mode != DP_PANEL_MODE_DEFAULT) {
+ switch (panel_mode) {
+ case DP_PANEL_MODE_EDP:
+ case DP_PANEL_MODE_SPECIAL:
+ panel_mode_edp = true;
+ break;
- switch (panel_mode) {
- case DP_PANEL_MODE_EDP:
- case DP_PANEL_MODE_SPECIAL:
- panel_mode_edp = true;
- break;
+ default:
+ break;
+ }
- default:
- break;
- }
+ /*set edp panel mode in receiver*/
+ result = core_link_read_dpcd(
+ link,
+ DP_EDP_CONFIGURATION_SET,
+ _config_set.raw,
+ sizeof(edp_config_set.raw));
+
+ if (result == DC_OK &&
+ edp_config_set.bits.PANEL_MODE_EDP
+ != panel_mode_edp) {
- /*set edp panel mode in receiver*/
- core_link_read_dpcd(
+ edp_config_set.bits.PANEL_MODE_EDP =
+ panel_mode_edp;
+ result = core_link_write_dpcd(
link,
DP_EDP_CONFIGURATION_SET,
_config_set.raw,
sizeof(edp_config_set.raw));
- if (edp_config_set.bits.PANEL_MODE_EDP
- != panel_mode_edp) {
- enum dc_status result;
-
- edp_config_set.bits.PANEL_MODE_EDP =
- panel_mode_edp;
- result = core_link_write_dpcd(
- link,
- DP_EDP_CONFIGURATION_SET,
- _config_set.raw,
- sizeof(edp_config_set.raw));
-
- ASSERT(result == DC_OK);
- }
+ ASSERT(result == DC_OK);
}
+
link->panel_mode = panel_mode;
DC_LOG_DETECTION_DP_CAPS("Link: %d eDP panel mode supported: %d "
"eDP panel mode enabled: %d \n",
--
2.41.0
[PATCH 11/16] drm/amd/display: Add new sequence for 4-lane HBR3 on vendor specific retimers
From: Ovidiu Bunea
[Why]
In some vendor specific retimer setups for downstream 4-lane HBR3
configuration, the sink will show severe corruption (horizontal shifting)
and intermittent blanking.
[How]
Add new retimer programming sequence before clock recovery when 4 lanes
are active.
Reviewed-by: Michael Strauss
Acked-by: Alex Hung
Signed-off-by: Ovidiu Bunea
---
.../link_dp_training_fixed_vs_pe_retimer.c| 67 ++-
1 file changed, 66 insertions(+), 1 deletion(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
index 2a4f70acc7fa..ca0543e62917 100644
---
a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
+++
b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
@@ -236,6 +236,11 @@ enum link_training_result
dp_perform_fixed_vs_pe_training_sequence_legacy(
uint32_t pre_disable_intercept_delay_ms = 0;
uint8_t vendor_lttpr_write_data_vs[4] = {0x1, 0x51, 0x63, 0x0};
uint8_t vendor_lttpr_write_data_pe[4] = {0x1, 0x52, 0x63, 0x0};
+ const uint8_t vendor_lttpr_write_data_4lane_1[4] = {0x1, 0x6E, 0xF2,
0x19};
+ const uint8_t vendor_lttpr_write_data_4lane_2[4] = {0x1, 0x6B, 0xF2,
0x01};
+ const uint8_t vendor_lttpr_write_data_4lane_3[4] = {0x1, 0x6D, 0xF2,
0x18};
+ const uint8_t vendor_lttpr_write_data_4lane_4[4] = {0x1, 0x6C, 0xF2,
0x03};
+ const uint8_t vendor_lttpr_write_data_4lane_5[4] = {0x1, 0x03, 0xF3,
0x06};
uint32_t vendor_lttpr_write_address = 0xF004F;
enum link_training_result status = LINK_TRAINING_SUCCESS;
uint8_t lane = 0;
@@ -338,6 +343,34 @@ enum link_training_result
dp_perform_fixed_vs_pe_training_sequence_legacy(
DP_DOWNSPREAD_CTRL,
lt_settings->link_settings.link_spread);
+ if (lt_settings->link_settings.lane_count == LANE_COUNT_FOUR) {
+ core_link_write_dpcd(
+ link,
+ vendor_lttpr_write_address,
+ _lttpr_write_data_4lane_1[0],
+ sizeof(vendor_lttpr_write_data_4lane_1));
+ core_link_write_dpcd(
+ link,
+ vendor_lttpr_write_address,
+ _lttpr_write_data_4lane_2[0],
+ sizeof(vendor_lttpr_write_data_4lane_2));
+ core_link_write_dpcd(
+ link,
+ vendor_lttpr_write_address,
+ _lttpr_write_data_4lane_3[0],
+ sizeof(vendor_lttpr_write_data_4lane_3));
+ core_link_write_dpcd(
+ link,
+ vendor_lttpr_write_address,
+ _lttpr_write_data_4lane_4[0],
+ sizeof(vendor_lttpr_write_data_4lane_4));
+ core_link_write_dpcd(
+ link,
+ vendor_lttpr_write_address,
+ _lttpr_write_data_4lane_5[0],
+ sizeof(vendor_lttpr_write_data_4lane_5));
+ }
+
/* 2. Perform link training */
/* Perform Clock Recovery Sequence */
@@ -598,7 +631,11 @@ enum link_training_result
dp_perform_fixed_vs_pe_training_sequence(
uint32_t pre_disable_intercept_delay_ms = 0;
uint8_t vendor_lttpr_write_data_vs[4] = {0x1, 0x51, 0x63, 0x0};
uint8_t vendor_lttpr_write_data_pe[4] = {0x1, 0x52, 0x63, 0x0};
-
+ const uint8_t vendor_lttpr_write_data_4lane_1[4] = {0x1, 0x6E, 0xF2,
0x19};
+ const uint8_t vendor_lttpr_write_data_4lane_2[4] = {0x1, 0x6B, 0xF2,
0x01};
+ const uint8_t vendor_lttpr_write_data_4lane_3[4] = {0x1, 0x6D, 0xF2,
0x18};
+ const uint8_t vendor_lttpr_write_data_4lane_4[4] = {0x1, 0x6C, 0xF2,
0x03};
+ const uint8_t vendor_lttpr_write_data_4lane_5[4] = {0x1, 0x03, 0xF3,
0x06};
uint32_t vendor_lttpr_write_address = 0xF004F;
enum link_training_result status = LINK_TRAINING_SUCCESS;
uint8_t lane = 0;
@@ -701,6 +738,34 @@ enum link_training_result
dp_perform_fixed_vs_pe_training_sequence(
DP_DOWNSPREAD_CTRL,
lt_settings->link_settings.link_spread);
+ if (lt_settings->link_settings.lane_count == LANE_COUNT_FOUR) {
+ core_link_write_dpcd(
+ link,
+ vendor_lttpr_write_address,
+ _lttpr_write_data_4lane_1[0],
+ sizeof(vendor_lttpr_write_data_4lane_1));
+ core_link_write_dpcd(
+ link,
+
[PATCH 10/16] drm/amd/display: Update DPG test pattern programming
From: Wenjing Liu
[Why]
Last ODM slice could be slightly larger than other slice because it can be
including the residual.
[How]
Update DPG pattern programming sequence to use a different width for
last odm slice.
Reviewed-by: Chris Park
Acked-by: Alex Hung
Signed-off-by: Wenjing Liu
---
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 45
.../display/dc/link/accessories/link_dp_cts.c | 107 +-
2 files changed, 78 insertions(+), 74 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 5cfa37804d7c..e32d3246e82a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1054,9 +1054,9 @@ void dcn20_blank_pixel_data(
enum controller_dp_color_space test_pattern_color_space =
CONTROLLER_DP_COLOR_SPACE_UDEFINED;
struct pipe_ctx *odm_pipe;
int odm_cnt = 1;
-
- int width = stream->timing.h_addressable + stream->timing.h_border_left
+ stream->timing.h_border_right;
- int height = stream->timing.v_addressable +
stream->timing.v_border_bottom + stream->timing.v_border_top;
+ int h_active = stream->timing.h_addressable +
stream->timing.h_border_left + stream->timing.h_border_right;
+ int v_active = stream->timing.v_addressable +
stream->timing.v_border_bottom + stream->timing.v_border_top;
+ int odm_slice_width, last_odm_slice_width, offset = 0;
if (stream->link->test_pattern_enabled)
return;
@@ -1066,8 +1066,8 @@ void dcn20_blank_pixel_data(
for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe =
odm_pipe->next_odm_pipe)
odm_cnt++;
-
- width = width / odm_cnt;
+ odm_slice_width = h_active / odm_cnt;
+ last_odm_slice_width = h_active - odm_slice_width * (odm_cnt - 1);
if (blank) {
dc->hwss.set_abm_immediate_disable(pipe_ctx);
@@ -1080,29 +1080,32 @@ void dcn20_blank_pixel_data(
test_pattern = CONTROLLER_DP_TEST_PATTERN_VIDEOMODE;
}
- dc->hwss.set_disp_pattern_generator(dc,
- pipe_ctx,
- test_pattern,
- test_pattern_color_space,
- stream->timing.display_color_depth,
- _color,
- width,
- height,
- 0);
+ odm_pipe = pipe_ctx;
- for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe =
odm_pipe->next_odm_pipe) {
+ while (odm_pipe->next_odm_pipe) {
dc->hwss.set_disp_pattern_generator(dc,
- odm_pipe,
- dc->debug.visual_confirm !=
VISUAL_CONFIRM_DISABLE && blank ?
-
CONTROLLER_DP_TEST_PATTERN_COLORRAMP : test_pattern,
+ pipe_ctx,
+ test_pattern,
test_pattern_color_space,
stream->timing.display_color_depth,
_color,
- width,
- height,
- 0);
+ odm_slice_width,
+ v_active,
+ offset);
+ offset += odm_slice_width;
+ odm_pipe = odm_pipe->next_odm_pipe;
}
+ dc->hwss.set_disp_pattern_generator(dc,
+ odm_pipe,
+ test_pattern,
+ test_pattern_color_space,
+ stream->timing.display_color_depth,
+ _color,
+ last_odm_slice_width,
+ v_active,
+ offset);
+
if (!blank && dc->debug.enable_single_display_2to1_odm_policy) {
/* when exiting dynamic ODM need to reinit DPG state for unused
pipes */
struct pipe_ctx *old_odm_pipe =
dc->current_state->res_ctx.pipe_ctx[pipe_ctx->pipe_idx].next_odm_pipe;
diff --git a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
index db9f1baa27e5..bce0428ad612 100644
--- a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
+++ b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
@@ -428,15 +428,24 @@ static void set_crtc_test_pattern(struct dc_link *link,
stream->timing.display_color_depth;
struct bit_depth_reduction_params params;
struct output_pixel_processor *opp = pipe_ctx->stream_res.opp;
- int width = pipe_ctx->stream->timing.h_addressable +
+ struct pipe_ctx *odm_pipe;
+ int odm_cnt = 1;
+ int h_active = pipe_ctx->stream->timing.h_addressable +
[PATCH 09/16] drm/amd/display: Correct unit conversion for vstartup
From: Reza Amini
[Why]
vstartup is calculated to be a large number. It works because
it is within vertical blank, but it reduces region of blank that
can be used for power gating.
[How]
Calculation needs to convert micro seconds to number of
vertical lines.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex Hung
Signed-off-by: Reza Amini
---
.../amd/display/dc/dml/dcn314/dcn314_fpu.c| 25 ++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
index ed8ddb75b333..07adb614366e 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
@@ -31,6 +31,7 @@
#include "dml/dcn20/dcn20_fpu.h"
#include "dml/dcn31/dcn31_fpu.h"
#include "dml/display_mode_vba.h"
+#include "dml/dml_inline_defs.h"
struct _vcs_dpi_ip_params_st dcn3_14_ip = {
.VBlankNomDefaultUS = 668,
@@ -273,6 +274,25 @@ static bool is_dual_plane(enum surface_pixel_format format)
return format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN || format ==
SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA;
}
+/*
+ * micro_sec_to_vert_lines () - converts time to number of vertical lines for
a given timing
+ *
+ * @param: num_us: number of microseconds
+ * @return: number of vertical lines. If exact number of vertical lines is not
found then
+ * it will round up to next number of lines to guarantee num_us
+ */
+static unsigned int micro_sec_to_vert_lines(unsigned int num_us, struct
dc_crtc_timing *timing)
+{
+ unsigned int num_lines = 0;
+ unsigned int lines_time_in_ns = 1000.0 *
+ (((float)timing->h_total * 1000.0) /
+((float)timing->pix_clk_100hz / 10.0));
+
+ num_lines = dml_ceil(1000.0 * num_us / lines_time_in_ns, 1.0);
+
+ return num_lines;
+}
+
int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state
*context,
display_e2e_pipe_params_st
*pipes,
bool fast_validate)
@@ -289,19 +309,22 @@ int dcn314_populate_dml_pipes_from_context_fpu(struct dc
*dc, struct dc_state *c
for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) {
struct dc_crtc_timing *timing;
+ unsigned int num_lines = 0;
if (!res_ctx->pipe_ctx[i].stream)
continue;
pipe = _ctx->pipe_ctx[i];
timing = >stream->timing;
+ num_lines =
micro_sec_to_vert_lines(dcn3_14_ip.VBlankNomDefaultUS, timing);
+
if (pipe->stream->adjust.v_total_min != 0)
pipes[pipe_cnt].pipe.dest.vtotal =
pipe->stream->adjust.v_total_min;
else
pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total;
pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total -
pipes[pipe_cnt].pipe.dest.vactive;
- pipes[pipe_cnt].pipe.dest.vblank_nom =
min(pipes[pipe_cnt].pipe.dest.vblank_nom, dcn3_14_ip.VBlankNomDefaultUS);
+ pipes[pipe_cnt].pipe.dest.vblank_nom =
min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines);
pipes[pipe_cnt].pipe.dest.vblank_nom =
max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width);
pipes[pipe_cnt].pipe.dest.vblank_nom =
min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblank_nom);
--
2.41.0
[PATCH 08/16] drm/amd/display: Exit idle optimizations before attempt to access PHY
From: Leo Chen [Why & How] DMUB may hang when powering down pixel clocks due to no dprefclk. It is fixed by exiting idle optimization before the attempt to access PHY. Reviewed-by: Nicholas Kazlauskas Acked-by: Alex Hung Signed-off-by: Leo Chen --- drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 6c9ca43d1040..20d4d08a6a2f 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c @@ -1792,10 +1792,13 @@ void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context) hws->funcs.edp_backlight_control(edp_link_with_sink, false); } /*resume from S3, no vbios posting, no need to power down again*/ + clk_mgr_exit_optimized_pwr_state(dc, dc->clk_mgr); + power_down_all_hw_blocks(dc); disable_vga_and_power_gate_all_controllers(dc); if (edp_link_with_sink && !keep_edp_vdd_on) dc->hwss.edp_power_control(edp_link_with_sink, false); + clk_mgr_optimize_pwr_state(dc, dc->clk_mgr); } bios_set_scratch_acc_mode_change(dc->ctx->dc_bios, 1); } -- 2.41.0
[PATCH 07/16] drm/amd/display: Refactor recout calculation with a more generic formula
From: Wenjing Liu
[Why]
Current recout calculation has a few assumptions and implementation
for MPO + ODM combine calculation is very specific. The equation has
too many cases without enough comments to document the detail.
[How]
The change remove the following assumptions:
1. When MPO is enabled, we only allow ODM Combine 2:1
2. ODM Combine always has even segment width.
3. Secondary MPO plane's pipe_ctx copies pre_odm_pipe from
its top pipe.
The change applies a generic formula with more details in comment to
document this solution so it is eaiser to learn and debug later.
Reviewed-by: Dmytro Laktyushkin
Acked-by: Alex Hung
Signed-off-by: Wenjing Liu
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 560 +-
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 4 +-
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 4 +-
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4 +-
4 files changed, 404 insertions(+), 168 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index a680ae3e8577..d0f4b86cadf1 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -69,9 +69,10 @@
#include "../dcn32/dcn32_resource.h"
#include "../dcn321/dcn321_resource.h"
-#define VISUAL_CONFIRM_RECT_HEIGHT_DEFAULT 3
-#define VISUAL_CONFIRM_RECT_HEIGHT_MIN 1
-#define VISUAL_CONFIRM_RECT_HEIGHT_MAX 10
+#define VISUAL_CONFIRM_BASE_DEFAULT 3
+#define VISUAL_CONFIRM_BASE_MIN 1
+#define VISUAL_CONFIRM_BASE_MAX 10
+#define VISUAL_CONFIRM_DPP_OFFSET 3
#define DC_LOGGER_INIT(logger)
@@ -746,7 +747,12 @@ int get_num_mpc_splits(struct pipe_ctx *pipe)
int get_num_odm_splits(struct pipe_ctx *pipe)
{
int odm_split_count = 0;
- struct pipe_ctx *next_pipe = pipe->next_odm_pipe;
+ struct pipe_ctx *next_pipe = NULL;
+
+ while (pipe->top_pipe)
+ pipe = pipe->top_pipe;
+
+ next_pipe = pipe->next_odm_pipe;
while (next_pipe) {
odm_split_count++;
next_pipe = next_pipe->next_odm_pipe;
@@ -759,32 +765,35 @@ int get_num_odm_splits(struct pipe_ctx *pipe)
return odm_split_count;
}
-static void calculate_split_count_and_index(struct pipe_ctx *pipe_ctx, int
*split_count, int *split_idx)
+static int get_odm_split_index(struct pipe_ctx *pipe_ctx)
{
- *split_count = get_num_odm_splits(pipe_ctx);
- *split_idx = 0;
- if (*split_count == 0) {
- /*Check for mpc split*/
- struct pipe_ctx *split_pipe = pipe_ctx->top_pipe;
-
- *split_count = get_num_mpc_splits(pipe_ctx);
- while (split_pipe && split_pipe->plane_state ==
pipe_ctx->plane_state) {
- (*split_idx)++;
- split_pipe = split_pipe->top_pipe;
- }
+ struct pipe_ctx *split_pipe = NULL;
+ int index = 0;
- /* MPO window on right side of ODM split */
- if (split_pipe && split_pipe->prev_odm_pipe &&
!pipe_ctx->prev_odm_pipe)
- (*split_idx)++;
- } else {
- /*Get odm split index*/
- struct pipe_ctx *split_pipe = pipe_ctx->prev_odm_pipe;
+ while (pipe_ctx->top_pipe)
+ pipe_ctx = pipe_ctx->top_pipe;
- while (split_pipe) {
- (*split_idx)++;
- split_pipe = split_pipe->prev_odm_pipe;
- }
+ split_pipe = pipe_ctx->prev_odm_pipe;
+
+ while (split_pipe) {
+ index++;
+ split_pipe = split_pipe->prev_odm_pipe;
}
+
+ return index;
+}
+
+static int get_mpc_split_index(struct pipe_ctx *pipe_ctx)
+{
+ struct pipe_ctx *split_pipe = pipe_ctx->top_pipe;
+ int index = 0;
+
+ while (split_pipe && split_pipe->plane_state == pipe_ctx->plane_state) {
+ index++;
+ split_pipe = split_pipe->top_pipe;
+ }
+
+ return index;
}
/*
@@ -806,101 +815,357 @@ static void calculate_viewport_size(struct pipe_ctx
*pipe_ctx)
}
}
-static void calculate_recout(struct pipe_ctx *pipe_ctx)
+static struct rect intersect_rec(const struct rect *r0, const struct rect *r1)
{
- const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
- const struct dc_stream_state *stream = pipe_ctx->stream;
- struct scaler_data *data = _ctx->plane_res.scl_data;
- struct rect surf_clip = plane_state->clip_rect;
- bool split_tb = stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM;
- int split_count, split_idx;
- struct dpp *dpp = pipe_ctx->plane_res.dpp;
- unsigned short visual_confirm_rect_height =
VISUAL_CONFIRM_RECT_HEIGHT_DEFAULT;
+ struct rect rec;
+ int r0_x_end = r0->x + r0->width;
+ int r1_x_end = r1->x + r1->width;
+ int r0_y_end = r0->y + r0->height;
+ int r1_y_end = r1->y
[PATCH 06/16] drm/amd/display: Read down-spread percentage from lut to adjust dprefclk.
From: Martin Tsai
[Why]
Panels show corruption with high refresh rate timings when
ss is enabled.
[How]
Read down-spread percentage from lut to adjust dprefclk.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex Hung
Signed-off-by: Martin Tsai
---
.../dc/clk_mgr/dcn314/dcn314_clk_mgr.c| 33 +--
.../dc/clk_mgr/dcn314/dcn314_clk_mgr.h| 7
2 files changed, 38 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
index 2f7c8996b19d..3ba2e13d691d 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
@@ -87,6 +87,14 @@ static const struct IP_BASE CLK_BASE = { { { { 0x00016C00,
0x02401800, 0, 0, 0,
#define CLK1_CLK_PLL_REQ__PllSpineDiv_MASK 0xF000L
#define CLK1_CLK_PLL_REQ__FbMult_frac_MASK 0xL
+#define regCLK1_CLK2_BYPASS_CNTL 0x029c
+#define regCLK1_CLK2_BYPASS_CNTL_BASE_IDX 0
+
+#define CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL__SHIFT 0x0
+#define CLK1_CLK2_BYPASS_CNTL__LK2_BYPASS_DIV__SHIFT 0x10
+#define CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL_MASK0x0007L
+#define CLK1_CLK2_BYPASS_CNTL__LK2_BYPASS_DIV_MASK 0x000FL
+
#define REG(reg_name) \
(CLK_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ##
reg_name)
@@ -436,6 +444,11 @@ static DpmClocks314_t dummy_clocks;
static struct dcn314_watermarks dummy_wms = { 0 };
+static struct dcn314_ss_info_table ss_info_table = {
+ .ss_divider = 1000,
+ .ss_percentage = {0, 0, 375, 375, 375}
+};
+
static void dcn314_build_watermark_ranges(struct clk_bw_params *bw_params,
struct dcn314_watermarks *table)
{
int i, num_valid_sets;
@@ -715,6 +728,20 @@ static struct clk_mgr_funcs dcn314_funcs = {
};
extern struct clk_mgr_funcs dcn3_fpga_funcs;
+static void dcn314_read_ss_info_from_lut(struct clk_mgr_internal *clk_mgr)
+{
+ uint32_t clock_source;
+
+ REG_GET(CLK1_CLK2_BYPASS_CNTL, CLK2_BYPASS_SEL, _source);
+
+ clk_mgr->dprefclk_ss_percentage =
ss_info_table.ss_percentage[clock_source];
+
+ if (clk_mgr->dprefclk_ss_percentage != 0) {
+ clk_mgr->ss_on_dprefclk = true;
+ clk_mgr->dprefclk_ss_divider = ss_info_table.ss_divider;
+ }
+}
+
void dcn314_clk_mgr_construct(
struct dc_context *ctx,
struct clk_mgr_dcn314 *clk_mgr,
@@ -781,9 +808,11 @@ void dcn314_clk_mgr_construct(
clk_mgr->base.base.dprefclk_khz = 60;
clk_mgr->base.base.clks.ref_dtbclk_khz = 60;
- dce_clock_read_ss_info(_mgr->base);
+
+ dcn314_read_ss_info_from_lut(_mgr->base);
/*if bios enabled SS, driver needs to adjust dtb clock, only enable
with correct bios*/
- //clk_mgr->base.dccg->ref_dtbclk_khz =
dce_adjust_dp_ref_freq_for_ss(clk_mgr_internal,
clk_mgr->base.base.dprefclk_khz);
+ clk_mgr->base.base.dprefclk_khz =
+ dce_adjust_dp_ref_freq_for_ss(_mgr->base,
clk_mgr->base.base.dprefclk_khz);
clk_mgr->base.base.bw_params = _bw_params;
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
index 171f84340eb2..e0670dafe260 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
@@ -28,6 +28,8 @@
#define __DCN314_CLK_MGR_H__
#include "clk_mgr_internal.h"
+#define NUM_CLOCK_SOURCES 5
+
struct dcn314_watermarks;
struct dcn314_smu_watermark_set {
@@ -40,6 +42,11 @@ struct clk_mgr_dcn314 {
struct dcn314_smu_watermark_set smu_wm_set;
};
+struct dcn314_ss_info_table {
+ uint32_t ss_divider;
+ uint32_t ss_percentage[NUM_CLOCK_SOURCES];
+};
+
bool dcn314_are_clock_states_equal(struct dc_clocks *a,
struct dc_clocks *b);
--
2.41.0
[PATCH 05/16] drm/amd/display: Don't apply FIFO resync W/A if rdivider = 0
From: Alvin Lee [Description] It is not valid to set the WDIVIDER value to 0, so do not re-write to DISPCLK_WDIVIDER if the current value is 0 (i.e., it is at it's initial value and we have not made any requests to change DISPCLK yet). Reviewed-by: Saaem Rizvi Acked-by: Alex Hung Signed-off-by: Alvin Lee --- drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c index 11e28e056cf7..61ceff6bc0b1 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c @@ -49,7 +49,10 @@ static void dccg32_trigger_dio_fifo_resync( uint32_t dispclk_rdivider_value = 0; REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_RDIVIDER, _rdivider_value); - REG_UPDATE(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_WDIVIDER, dispclk_rdivider_value); + + /* Not valid for the WDIVIDER to be set to 0 */ + if (dispclk_rdivider_value != 0) + REG_UPDATE(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_WDIVIDER, dispclk_rdivider_value); } static void dccg32_get_pixel_rate_div( -- 2.41.0
[PATCH 04/16] drm/amd/display: Prevent invalid pipe connections
From: Ethan Bitnun
[Description]
- Prevent ODM pipe connections between pipes that are not part
of the same plane when adding a plane to context
- Re-attach child pipes of ODM slice about to be disconnected
to prevent any lost pipes with invalid tops/bottoms
- We cannot split if head_pipe is not in ODM. Preventing this
avoids creating an invalid context with an invalid pipe.
Reviewed-by: Alvin Lee
Acked-by: Alex Hung
Signed-off-by: Ethan Bitnun
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 37 +--
1 file changed, 34 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 1859350dffc6..a680ae3e8577 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -75,6 +75,9 @@
#define DC_LOGGER_INIT(logger)
+#define HEAD_NOT_IN_ODM -2
+#define UNABLE_TO_SPLIT -1
+
enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
{
enum dce_version dc_version = DCE_VERSION_UNKNOWN;
@@ -1471,7 +1474,24 @@ static int acquire_first_split_pipe(
return i;
} else if (split_pipe->prev_odm_pipe &&
split_pipe->prev_odm_pipe->plane_state ==
split_pipe->plane_state) {
+
+ // Fix case where ODM slice has child planes
+ // Re-attach child planes
+ struct pipe_ctx *temp_head_pipe =
resource_get_head_pipe_for_stream(res_ctx, split_pipe->stream);
+
+ if (split_pipe->bottom_pipe && temp_head_pipe) {
+
+ struct pipe_ctx *temp_tail_pipe =
resource_get_tail_pipe(res_ctx, temp_head_pipe);
+
+ if (temp_tail_pipe) {
+
+ split_pipe->bottom_pipe->top_pipe =
temp_tail_pipe;
+ temp_tail_pipe->bottom_pipe =
split_pipe->bottom_pipe;
+ }
+ }
+
split_pipe->prev_odm_pipe->next_odm_pipe =
split_pipe->next_odm_pipe;
+
if (split_pipe->next_odm_pipe)
split_pipe->next_odm_pipe->prev_odm_pipe =
split_pipe->prev_odm_pipe;
@@ -1479,6 +1499,11 @@ static int acquire_first_split_pipe(
resource_build_scaling_params(split_pipe->prev_odm_pipe);
memset(split_pipe, 0, sizeof(*split_pipe));
+
+ // We cannot split if head pipe is not odm
+ if (temp_head_pipe && !temp_head_pipe->next_odm_pipe &&
!temp_head_pipe->prev_odm_pipe)
+ return HEAD_NOT_IN_ODM;
+
split_pipe->stream_res.tg = pool->timing_generators[i];
split_pipe->plane_res.hubp = pool->hubps[i];
split_pipe->plane_res.ipp = pool->ipps[i];
@@ -1491,7 +1516,7 @@ static int acquire_first_split_pipe(
return i;
}
}
- return -1;
+ return UNABLE_TO_SPLIT;
}
bool dc_add_plane_to_context(
@@ -1543,6 +1568,10 @@ bool dc_add_plane_to_context(
int pipe_idx =
acquire_first_split_pipe(>res_ctx, pool, stream);
if (pipe_idx >= 0)
free_pipe =
>res_ctx.pipe_ctx[pipe_idx];
+ else if (pipe_idx == HEAD_NOT_IN_ODM)
+ break;
+ else
+ ASSERT(false);
}
if (!free_pipe) {
@@ -1699,12 +1728,14 @@ bool dc_add_plane_to_context(
(free_pipe->plane_state->clip_rect.x + free_pipe->plane_state->clip_rect.width
<=
free_pipe->stream->src.x +
free_pipe->stream->src.width/2))) {
if (!free_pipe->next_odm_pipe &&
- tail_pipe->next_odm_pipe &&
tail_pipe->next_odm_pipe->bottom_pipe) {
+ tail_pipe->next_odm_pipe &&
tail_pipe->next_odm_pipe->bottom_pipe &&
+
tail_pipe->next_odm_pipe->bottom_pipe->plane_state == free_pipe->plane_state) {
free_pipe->next_odm_pipe =
tail_pipe->next_odm_pipe->bottom_pipe;
tail_pipe->next_odm_pipe->bottom_pipe->prev_odm_pipe = free_pipe;
}
if (!free_pipe->prev_odm_pipe &&
- tail_pipe->prev_odm_pipe &&
tail_pipe->prev_odm_pipe->bottom_pipe) {
+
[PATCH 03/16] drm/amd/display: Add VESA SCR case for default aux backlight
From: Iswara Nagulendran
[How & Why]
When determining default aux backlight level, read from
DPCD address 0x734 for VESA SCR on OLED.
Reviewed-by: Felipe Clark
Acked-by: Alex Hung
Signed-off-by: Iswara Nagulendran
---
.../dc/link/protocols/link_edp_panel_control.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
index 92f58a719c07..5add2360fc94 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
@@ -252,10 +252,20 @@ static bool read_default_bl_aux(struct dc_link *link,
uint32_t *backlight_millin
link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))
return false;
- if (!core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
- (uint8_t *) backlight_millinits,
- sizeof(uint32_t)))
- return false;
+ if (!link->dpcd_caps.panel_luminance_control) {
+ if (!core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
+ (uint8_t *)backlight_millinits,
+ sizeof(uint32_t)))
+ return false;
+ } else {
+ //setting to 0 as a precaution, since target_luminance_value is
3 bytes
+ memset(backlight_millinits, 0, sizeof(uint32_t));
+
+ if (!core_link_read_dpcd(link,
DP_EDP_PANEL_TARGET_LUMINANCE_VALUE,
+ (uint8_t *)backlight_millinits,
+ sizeof(struct target_luminance_value)))
+ return false;
+ }
return true;
}
--
2.41.0
[PATCH 02/16] drm/amd/display: Guard DCN31 PHYD32CLK logic against chip family
From: George Shen
[Why]
Current yellow carp B0 PHYD32CLK logic is incorrectly applied to other
ASICs.
[How]
Add guard to check chip family is yellow carp before applying logic.
Reviewed-by: Hansen Dsouza
Acked-by: Alex Hung
Signed-off-by: George Shen
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
index 96b73d79f980..8664f0c4c9b7 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
@@ -84,7 +84,8 @@ static enum phyd32clk_clock_source get_phy_mux_symclk(
struct dcn_dccg *dccg_dcn,
enum phyd32clk_clock_source src)
{
- if (dccg_dcn->base.ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) {
+ if (dccg_dcn->base.ctx->asic_id.chip_family == FAMILY_YELLOW_CARP &&
+ dccg_dcn->base.ctx->asic_id.hw_internal_rev ==
YELLOW_CARP_B0) {
if (src == PHYD32CLKC)
src = PHYD32CLKF;
if (src == PHYD32CLKD)
--
2.41.0
[PATCH 01/16] drm/amd/display: Correct grammar mistakes
From: Reza Amini
[Why]
There are grammer mistakes in comments
[How]
Correct grammar mistakes
Reviewed-by: Anthony Koo
Acked-by: Alex Hung
Signed-off-by: Reza Amini
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 20 ++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 15fea2bcb34a..a81c8f7215bb 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -149,39 +149,40 @@
union abm_flags {
struct {
/**
-* @abm_enabled: indicates if abm is enabled.
+* @abm_enabled: Indicates if ABM is enabled.
*/
unsigned int abm_enabled : 1;
/**
-* @disable_abm_requested: indicates if driver has requested
abm to be disabled.
+* @disable_abm_requested: Indicates if driver has requested
ABM to be disabled.
*/
unsigned int disable_abm_requested : 1;
/**
-* @disable_abm_immediately: indicates if driver has requested
abm to be disabled immediately.
+* @disable_abm_immediately: Indicates if driver has requested
ABM to be disabled
+* immediately.
*/
unsigned int disable_abm_immediately : 1;
/**
-* @disable_abm_immediate_keep_gain: indicates if driver has
requested abm
+* @disable_abm_immediate_keep_gain: Indicates if driver has
requested ABM
* to be disabled immediately and keep gain.
*/
unsigned int disable_abm_immediate_keep_gain : 1;
/**
-* @fractional_pwm: indicates if fractional duty cycle for
backlight pwm is enabled.
+* @fractional_pwm: Indicates if fractional duty cycle for
backlight PWM is enabled.
*/
unsigned int fractional_pwm : 1;
/**
-* @abm_gradual_bl_change: indicates if algorithm has completed
gradual adjustment
+* @abm_gradual_bl_change: Indicates if algorithm has completed
gradual adjustment
* of user backlight level.
*/
unsigned int abm_gradual_bl_change : 1;
} bitfields;
- unsigned int u32all;
+ unsigned int u32All;
};
struct abm_save_restore {
@@ -192,7 +193,7 @@ struct abm_save_restore {
/**
* @pause: true: pause ABM and get state
-* false: un-pause ABM after setting state
+* false: unpause ABM after setting state
*/
uint32_t pause;
@@ -2764,7 +2765,7 @@ enum dmub_cmd_abm_type {
DMUB_CMD__ABM_PAUSE = 6,
/**
-* * Save and Restore ABM state. On save we save parameters, and
+* Save and Restore ABM state. On save we save parameters, and
* on restore we update state with passed in data.
*/
DMUB_CMD__ABM_SAVE_RESTORE = 7,
@@ -3152,6 +3153,7 @@ struct dmub_cmd_abm_pause_data {
uint8_t pad[1];
};
+
/**
* Definition of a DMUB_CMD__ABM_PAUSE command.
*/
--
2.41.0
[PATCH 00/16] DC Patches July 19, 2023
This DC patchset brings improvements in multiple areas. In summary, we highlight: - Fix underflow issue on 175hz timing - Add interface to modify DMUB panel power options - Remove check for default eDP panel_mode - Add new sequence for 4-lane HBR3 on vendor specific retimers - Update DPG test pattern programming - Correct unit conversion for vstartup - Exit idle optimizations before attempt to access PHY - Refactor recout calculation with a more generic formula - Read down-spread percentage from lut to adjust dprefclk. - Don't apply FIFO resync W/A if rdivider = 0 - Prevent invalid pipe connections - Rearrange dmub_cmd defs order - Add VESA SCR case for default aux backlight - Guard DCN31 PHYD32CLK logic against chip family - Correct grammar mistakes Cc: Daniel Wheeler Alvin Lee (1): drm/amd/display: Don't apply FIFO resync W/A if rdivider = 0 Anthony Koo (1): drm/amd/display: Rearrange dmub_cmd defs order Aric Cyr (1): drm/amd/display: 3.2.244 Ethan Bitnun (1): drm/amd/display: Prevent invalid pipe connections George Shen (1): drm/amd/display: Guard DCN31 PHYD32CLK logic against chip family Iswara Nagulendran (1): drm/amd/display: Add VESA SCR case for default aux backlight Leo Chen (1): drm/amd/display: Exit idle optimizations before attempt to access PHY Leo Ma (1): drm/amd/display: Fix underflow issue on 175hz timing Martin Tsai (1): drm/amd/display: Read down-spread percentage from lut to adjust dprefclk. Ovidiu Bunea (1): drm/amd/display: Add new sequence for 4-lane HBR3 on vendor specific retimers Paul Hsieh (1): drm/amd/display: Add interface to modify DMUB panel power options Reza Amini (2): drm/amd/display: Correct grammar mistakes drm/amd/display: Correct unit conversion for vstartup Taimur Hassan (1): drm/amd/display: Remove check for default eDP panel_mode Wenjing Liu (2): drm/amd/display: Refactor recout calculation with a more generic formula drm/amd/display: Update DPG test pattern programming .../dc/clk_mgr/dcn314/dcn314_clk_mgr.c| 33 +- .../dc/clk_mgr/dcn314/dcn314_clk_mgr.h| 7 + .../gpu/drm/amd/display/dc/core/dc_resource.c | 597 +- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- .../display/dc/dce110/dce110_hw_sequencer.c | 3 + .../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 45 +- .../drm/amd/display/dc/dcn21/dcn21_resource.c | 4 +- .../drm/amd/display/dc/dcn30/dcn30_resource.c | 4 +- .../gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c | 3 +- .../gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 5 +- .../amd/display/dc/dml/dcn314/dcn314_fpu.c| 25 +- .../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4 +- .../dc/dml/dcn32/display_mode_vba_util_32.c | 7 +- .../display/dc/link/accessories/link_dp_cts.c | 107 ++-- .../link_dp_training_fixed_vs_pe_retimer.c| 67 +- .../link/protocols/link_edp_panel_control.c | 67 +- drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 3 + .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 74 +-- .../gpu/drm/amd/display/dmub/src/dmub_srv.c | 12 + 19 files changed, 750 insertions(+), 319 deletions(-) -- 2.41.0
[PATCH] drm/amdkfd: avoid svm dump when dynamic debug disabled
Set dynamic_svm_range_dump macro to avoid iterating over SVM lists
from svm_range_debug_dump when dynamic debug is disabled. Otherwise,
it could drop performance, specially with big number of SVM ranges.
Make sure both svm_range_set_attr and svm_range_debug_dump functions
are dynamically enabled to print svm_range_debug_dump debug traces.
Signed-off-by: Alex Sierra
Tested-by: Alex Sierra
Signed-off-by: Philip Yang
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_svm.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
index 479c4f66afa7..0687f27f506c 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
@@ -3563,7 +3563,7 @@ svm_range_set_attr(struct kfd_process *p, struct
mm_struct *mm,
break;
}
- svm_range_debug_dump(svms);
+ dynamic_svm_range_dump(svms);
mutex_unlock(>lock);
mmap_read_unlock(mm);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.h
b/drivers/gpu/drm/amd/amdkfd/kfd_svm.h
index 21b14510882b..ed4cd501fafe 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.h
@@ -39,6 +39,9 @@
#define SVM_ADEV_PGMAP_OWNER(adev)\
((adev)->hive ? (void *)(adev)->hive : (void *)(adev))
+#define dynamic_svm_range_dump(svms) \
+ _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
+
struct svm_range_bo {
struct amdgpu_bo*bo;
struct kref kref;
--
2.32.0
Re: [PATCH 00/10] Freesync Panel Replay V2
On 2023-07-10 16:17, Alex Deucher wrote: On Mon, Jul 10, 2023 at 3:27 PM Bhawanpreet Lakha wrote: This patch set introduces Freesync Panel Replay capability on DCN 3.1.4 and newer. Replay has been verified to be working with these patches (in house) These patches are enabling panel replay in static screen use-cases. Other use cases will be added as they are ready The importance of Replay In some instances, the GPU is transmitting repeated frames to the sink without any updates or changes in the content. These repeat transmission are wasteful, resulting in power draw in different aspects of the system 1. DCN is fetching the frame of data from DF/UMC/DRAM. This memory traffic prevents power down of parts of this HW path. 2. GPU is transmitting pixel data to the display through the main link of the DisplayPort interface. This prevents power down of both the Source transmitter (TX) and the Sink receiver (RX) How it improves on PSR The concepts of utilizing replay is similar to PSR, but there is a benefit of: Source and Sink remaining synchronized which allows for - lower latency when switching from replay to live frames - enable the possibility of more use cases - easy control of the sink's refresh rate during replay Due to Source and Sink remaining timing synchronized, Replay can be activated in more UI scenarios. V2: Bug fixes, V1 had some issues which have all been fixed. - Invisible Cursor - Random Hang - Laggy System Are there minimum DMCUB firmware versions required for this? If so, we should check before enabling this. Alex There should be one theoretically, but since we only enable this on DCN3.2.1+ the FW version shouldn't matter, unless there was some specific bug fix done. Regards, Bhawan Bhawanpreet Lakha (10): drm/amd/display: Add structs for Freesync Panel Replay drm/amd/display: Add Functions to enable Freesync Panel Replay drm/amd/display: Add Freesync Panel DM code drm/amd/display: Read replay data from sink drm/amd/display: Get replay info from VSDB drm/amd/display: Add Replay supported/enabled checks drm/amd/display: Update replay for clk_mgr optimizations drm/amd/display: Update adaptive sync infopackets for replay drm/amd/display: Handle Replay related hpd irq drm/amd/display: Enable Replay for static screen use cases .../gpu/drm/amd/display/amdgpu_dm/Makefile| 2 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 71 ++- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 14 + .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c| 9 +- .../amd/display/amdgpu_dm/amdgpu_dm_replay.c | 183 .../amd/display/amdgpu_dm/amdgpu_dm_replay.h | 46 ++ .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 3 + drivers/gpu/drm/amd/display/dc/core/dc.c | 6 + .../drm/amd/display/dc/core/dc_link_exports.c | 5 + drivers/gpu/drm/amd/display/dc/dc.h | 6 + drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 3 + drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 29 ++ drivers/gpu/drm/amd/display/dc/dc_types.h | 41 ++ drivers/gpu/drm/amd/display/dc/dce/Makefile | 2 +- .../gpu/drm/amd/display/dc/dce/dmub_replay.c | 303 + .../gpu/drm/amd/display/dc/dce/dmub_replay.h | 58 +++ .../display/dc/dce110/dce110_hw_sequencer.c | 6 + .../drm/amd/display/dc/dcn21/dcn21_resource.c | 1 + .../drm/amd/display/dc/dcn30/dcn30_resource.c | 1 + .../amd/display/dc/dcn302/dcn302_resource.c | 1 + .../amd/display/dc/dcn303/dcn303_resource.c | 1 + .../drm/amd/display/dc/dcn31/dcn31_resource.c | 13 + .../amd/display/dc/dcn314/dcn314_resource.c | 14 + .../amd/display/dc/dcn315/dcn315_resource.c | 1 + .../amd/display/dc/dcn316/dcn316_resource.c | 1 + .../gpu/drm/amd/display/dc/inc/core_types.h | 19 + drivers/gpu/drm/amd/display/dc/inc/link.h | 14 + .../drm/amd/display/dc/link/link_factory.c| 7 + .../dc/link/protocols/link_dp_capability.c| 10 + .../dc/link/protocols/link_dp_irq_handler.c | 66 +++ .../link/protocols/link_edp_panel_control.c | 165 +++ .../link/protocols/link_edp_panel_control.h | 8 + .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 412 ++ .../gpu/drm/amd/display/include/dpcd_defs.h | 5 +- .../display/modules/info_packet/info_packet.c | 4 + .../amd/display/modules/power/power_helpers.c | 5 + .../amd/display/modules/power/power_helpers.h | 2 + drivers/gpu/drm/amd/include/amd_shared.h | 2 + 38 files changed, 1533 insertions(+), 6 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.h create mode 100644 drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c create mode 100644
Re: [PATCH] drm/amdkfd: avoid svm dump when dynamic debug disabled
Am 2023-07-08 um 12:57 schrieb Alex Sierra:
svm_range_debug_dump should not be called at all when dynamic debug
is disabled to avoid iterating over SVM lists. This could drop
performance, specially with big number of SVM ranges.
Signed-off-by: Alex Sierra
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
index 479c4f66afa7..4fb427fc5942 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
@@ -821,7 +821,7 @@ svm_range_is_same_attrs(struct kfd_process *p, struct
svm_range *prange,
*
* Context: The caller must hold svms->lock
*/
-static void svm_range_debug_dump(struct svm_range_list *svms)
+static int svm_range_debug_dump(struct svm_range_list *svms)
{
struct interval_tree_node *node;
struct svm_range *prange;
@@ -847,6 +847,8 @@ static void svm_range_debug_dump(struct svm_range_list
*svms)
prange->actual_loc);
node = interval_tree_iter_next(node, 0, ~0ULL);
}
+
+ return 0;
}
static int
@@ -3563,7 +3565,7 @@ svm_range_set_attr(struct kfd_process *p, struct
mm_struct *mm,
break;
}
- svm_range_debug_dump(svms);
+ pr_debug("%d", svm_range_debug_dump(svms));
This is a bit hacky. I would use the way dynamic_hex_dump is defined as
an example for how to do this without the dummy pr_debug and without
returning a dummy result from svm_range_debug_dump:
#define dynamic_svm_range_dump(svms) \
_dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
Then instead of calling svm_range_debug_dump directly, call
dynamic_svm_range_dump(svms).
Regards,
Felix
mutex_unlock(>lock);
mmap_read_unlock(mm);
Re: [PATCH v2] drm/amdgpu: Fix infinite loop in gfxhub_v1_2_xcc_gart_enable (v2)
[Public]
With the scripts/package/builddeb changes dropped, the patch is:
Acked-by: Alex Deucher
From: amd-gfx on behalf of Victor Lu
Sent: Wednesday, July 19, 2023 10:52 AM
To: amd-gfx@lists.freedesktop.org
Cc: Skvortsov, Victor ; Zhou, Bob ;
Lazar, Lijo ; Lu, Victor Cheng Chi (Victor)
Subject: [PATCH v2] drm/amdgpu: Fix infinite loop in
gfxhub_v1_2_xcc_gart_enable (v2)
An instance of for_each_inst() was not changed to match its new
behaviour and is causing a loop.
v2: remove tmp_mask variable
Fixes: 50c1d81d6365 ("drm/amdgpu: Modify for_each_inst macro")
Signed-off-by: Victor Lu
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 5 +-
scripts/package/builddeb | 60
2 files changed, 31 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
index 47f95ec218a3..dbdee1a0aefe 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
@@ -402,18 +402,15 @@ static void gfxhub_v1_2_xcc_program_invalidation(struct
amdgpu_device *adev,
static int gfxhub_v1_2_xcc_gart_enable(struct amdgpu_device *adev,
uint32_t xcc_mask)
{
- uint32_t tmp_mask;
int i;
- tmp_mask = xcc_mask;
/*
* MC_VM_FB_LOCATION_BASE/TOP is NULL for VF, because they are
* VF copy registers so vbios post doesn't program them, for
* SRIOV driver need to program them
*/
if (amdgpu_sriov_vf(adev)) {
- for_each_inst(i, tmp_mask) {
- i = ffs(tmp_mask) - 1;
+ for_each_inst(i, xcc_mask) {
WREG32_SOC15_RLC(GC, GET_INST(GC, i),
regMC_VM_FB_LOCATION_BASE,
adev->gmc.vram_start >> 24);
WREG32_SOC15_RLC(GC, GET_INST(GC, i),
regMC_VM_FB_LOCATION_TOP,
diff --git a/scripts/package/builddeb b/scripts/package/builddeb
index 67cd420dcf89..c5508054bfc8 100755
--- a/scripts/package/builddeb
+++ b/scripts/package/builddeb
@@ -164,23 +164,23 @@ if is_enabled CONFIG_MODULES; then
mv "$tmpdir/lib/modules/$version"/*
"$tmpdir/usr/lib/uml/modules/$version/"
rmdir "$tmpdir/lib/modules/$version"
fi
- if [ -n "$BUILD_DEBUG" ] ; then
- for module in $(find $tmpdir/lib/modules/ -name *.ko -printf
'%P\n'); do
- module=lib/modules/$module
- mkdir -p $(dirname $dbg_dir/usr/lib/debug/$module)
- # only keep debug symbols in the debug file
- $OBJCOPY --only-keep-debug $tmpdir/$module
$dbg_dir/usr/lib/debug/$module
- # strip original module from debug symbols
- $OBJCOPY --strip-debug $tmpdir/$module
- # then add a link to those
- $OBJCOPY
--add-gnu-debuglink=$dbg_dir/usr/lib/debug/$module $tmpdir/$module
- done
-
- # resign stripped modules
- if is_enabled CONFIG_MODULE_SIG_ALL; then
- INSTALL_MOD_PATH="$tmpdir" $MAKE -f $srctree/Makefile
modules_sign
- fi
- fi
+ #if [ -n "$BUILD_DEBUG" ] ; then
+ # for module in $(find $tmpdir/lib/modules/ -name *.ko -printf
'%P\n'); do
+ # module=lib/modules/$module
+ # mkdir -p $(dirname $dbg_dir/usr/lib/debug/$module)
+ # # only keep debug symbols in the debug file
+ # $OBJCOPY --only-keep-debug $tmpdir/$module
$dbg_dir/usr/lib/debug/$module
+ # # strip original module from debug symbols
+ # $OBJCOPY --strip-debug $tmpdir/$module
+ # # then add a link to those
+ # $OBJCOPY
--add-gnu-debuglink=$dbg_dir/usr/lib/debug/$module $tmpdir/$module
+ # done
+
+ # # resign stripped modules
+ # if is_enabled CONFIG_MODULE_SIG_ALL; then
+ # INSTALL_MOD_PATH="$tmpdir" $MAKE -f $srctree/Makefile
modules_sign
+ # fi
+ #fi
fi
# Install the maintainer scripts
@@ -220,18 +220,18 @@ fi
create_package "$packagename" "$tmpdir"
-if [ -n "$BUILD_DEBUG" ] ; then
- # Build debug package
- # Different tools want the image in different locations
- # perf
- mkdir -p $dbg_dir/usr/lib/debug/lib/modules/$version/
- cp vmlinux $dbg_dir/usr/lib/debug/lib/modules/$version/
- # systemtap
- mkdir -p $dbg_dir/usr/lib/debug/boot/
- ln -s ../lib/modules/$version/vmlinux
$dbg_dir/usr/lib/debug/boot/vmlinux-$version
- # kdump-tools
- ln -s lib/modules/$version/vmlinux
$dbg_dir/usr/lib/debug/vmlinux-$version
- create_package "$dbg_packagename" "$dbg_dir"
-fi
+#if [ -n "$BUILD_DEBUG" ] ;
Re: [PATCH] drm/amdkfd: enable cooperative groups for gfx11
Am 2023-07-19 um 10:36 schrieb Jonathan Kim:
MES can concurrently schedule queues on the device that require
exclusive device access if marked exclusively_scheduled without the
requirement of GWS. Similar to the F32 HWS, MES will manage
quality of service for these queues.
Use this for cooperative groups since cooperative groups are device
occupancy limited.
Since some GFX11 devices can only be debugged with partial CUs, do not
allow the debugging of cooperative groups on these devices as the CU
occupancy limit will change on attach.
In addition, zero initialize the MES add queue submission vector for MES
initialization tests as we do not want these to be cooperative
dispatches.
v2: fix up indentation and comments.
remove unnecessary perf warning on oversubscription.
change 0 init to 0 memset to deal with padding.
Signed-off-by: Jonathan Kim
Sorry. More indentation nit-picks inline. With those fixed, the patch is
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 1 +
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 2 ++
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 3 ++-
drivers/gpu/drm/amd/amdkfd/kfd_debug.c | 3 ++-
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 6 +-
.../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c| 7 ++-
.../gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | 12
drivers/gpu/drm/amd/include/mes_v11_api_def.h| 4 +++-
9 files changed, 27 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index f808841310fd..72ab6a838bb6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -642,6 +642,8 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int
gang_id,
unsigned long flags;
int r;
+ memset(_input, 0, sizeof(struct mes_add_queue_input));
+
/* allocate the mes queue buffer */
queue = kzalloc(sizeof(struct amdgpu_mes_queue), GFP_KERNEL);
if (!queue) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
index 2d6ac30b7135..2053954a235c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
@@ -224,6 +224,7 @@ struct mes_add_queue_input {
uint32_tis_kfd_process;
uint32_tis_aql_queue;
uint32_tqueue_size;
+ uint32_texclusively_scheduled;
};
struct mes_remove_queue_input {
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 1bdaa00c0b46..8e67e965f7ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -214,6 +214,8 @@ static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes,
mes_add_queue_pkt.is_aql_queue = input->is_aql_queue;
mes_add_queue_pkt.gds_size = input->queue_size;
+ mes_add_queue_pkt.exclusively_scheduled = input->exclusively_scheduled;
+
return mes_v11_0_submit_pkt_and_poll_completion(mes,
_add_queue_pkt, sizeof(mes_add_queue_pkt),
offsetof(union MESAPI__ADD_QUEUE, api_status));
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index 40ac093b5035..e0f9cf6dd8fd 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -1487,7 +1487,8 @@ static int kfd_ioctl_alloc_queue_gws(struct file *filep,
goto out_unlock;
}
- if (!kfd_dbg_has_gws_support(dev) && p->debug_trap_enabled) {
+ if (p->debug_trap_enabled && (!kfd_dbg_has_gws_support(dev) ||
+ kfd_dbg_has_cwsr_workaround(dev))) {
retval = -EBUSY;
goto out_unlock;
}
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
index ccfc81f085ce..1f82caea59ba 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
@@ -753,7 +753,8 @@ int kfd_dbg_trap_enable(struct kfd_process *target,
uint32_t fd,
if (!KFD_IS_SOC15(pdd->dev))
return -ENODEV;
- if (!kfd_dbg_has_gws_support(pdd->dev) && pdd->qpd.num_gws)
+ if (pdd->qpd.num_gws && (!kfd_dbg_has_gws_support(pdd->dev) ||
+kfd_dbg_has_cwsr_workaround(pdd->dev)))
return -EBUSY;
}
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index 0b3dc754e06b..ebc9674d3ce1 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -508,6 +508,7 @@ static int kfd_gws_init(struct kfd_node *node)
{
int ret = 0;
Re: [PATCH 28/29] drm/amdkfd: Refactor migrate init to support partition switch
[TLDR: I'm adding this report to the list of tracked Linux kernel regressions; the text you find below is based on a few templates paragraphs you might have encountered already in similar form. See link in footer if these mails annoy you.] On 17.07.23 15:09, Michel Dänzer wrote: > On 5/10/23 23:23, Alex Deucher wrote: >> From: Philip Yang >> >> Rename smv_migrate_init to a better name kgd2kfd_init_zone_device >> because it setup zone devive pgmap for page migration and keep it in >> kfd_migrate.c to access static functions svm_migrate_pgmap_ops. Call it >> only once in amdgpu_device_ip_init after adev ip blocks are initialized, >> but before amdgpu_amdkfd_device_init initialize kfd nodes which enable >> SVM support based on pgmap. >> >> svm_range_set_max_pages is called by kgd2kfd_device_init everytime after >> switching compute partition mode. >> >> Signed-off-by: Philip Yang >> Reviewed-by: Felix Kuehling >> Signed-off-by: Alex Deucher > > I bisected a regression to this commit, which broke HW acceleration on this > ThinkPad E595 with Picasso APU. > > The IB test fails for the compute rings, see dmesg below. > > Reverting this commit on top of the DRM changes merged for 6.5 fixes the > issue. Thanks for the report. To be sure the issue doesn't fall through the cracks unnoticed, I'm adding it to regzbot, the Linux kernel regression tracking bot: #regzbot ^introduced 84b4dd3f84d #regzbot title drm: amdgpu: HW acceleration broke on ThinkPad E595 #regzbot ignore-activity This isn't a regression? This issue or a fix for it are already discussed somewhere else? It was fixed already? You want to clarify when the regression started to happen? Or point out I got the title or something else totally wrong? Then just reply and tell me -- ideally while also telling regzbot about it, as explained by the page listed in the footer of this mail. Developers: When fixing the issue, remember to add 'Link:' tags pointing to the report (the parent of this mail). See page linked in footer for details. Ciao, Thorsten (wearing his 'the Linux kernel's regression tracker' hat) -- Everything you wanna know about Linux kernel regression tracking: https://linux-regtracking.leemhuis.info/about/#tldr That page also explains what to do if mails like this annoy you.
Re: [PATCH v2 3/4] selinux: use vma_is_initial_stack() and vma_is_initial_heap()
On Wed, Jul 19, 2023 at 6:23 AM Kefeng Wang wrote:
> On 2023/7/19 17:02, Christian Göttsche wrote:
> > On Wed, 19 Jul 2023 at 09:40, Kefeng Wang
> > wrote:
> >>
> >> Use the helpers to simplify code.
> >>
> >> Cc: Paul Moore
> >> Cc: Stephen Smalley
> >> Cc: Eric Paris
> >> Acked-by: Paul Moore
> >> Signed-off-by: Kefeng Wang
> >> ---
> >> security/selinux/hooks.c | 7 ++-
> >> 1 file changed, 2 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
> >> index d06e350fedee..ee8575540a8e 100644
> >> --- a/security/selinux/hooks.c
> >> +++ b/security/selinux/hooks.c
> >> @@ -3762,13 +3762,10 @@ static int selinux_file_mprotect(struct
> >> vm_area_struct *vma,
> >> if (default_noexec &&
> >> (prot & PROT_EXEC) && !(vma->vm_flags & VM_EXEC)) {
> >> int rc = 0;
> >> - if (vma->vm_start >= vma->vm_mm->start_brk &&
> >> - vma->vm_end <= vma->vm_mm->brk) {
> >> + if (vma_is_initial_heap(vma)) {
> >
> > This seems to change the condition from
> >
> > vma->vm_start >= vma->vm_mm->start_brk && vma->vm_end <=
> > vma->vm_mm->brk
> >
> > to
> >
> > vma->vm_start <= vma->vm_mm->brk && vma->vm_end >=
> > vma->vm_mm->start_brk
> >
> > (or AND arguments swapped)
> >
> > vma->vm_end >= vma->vm_mm->start_brk && vma->vm_start <=
> > vma->vm_mm->brk
> >
> > Is this intended?
>
> The new condition is to check whether there is intersection between
> [startbrk,brk] and [vm_start,vm_end], it contains orignal check, so
> I think it is ok, but for selinux check, I am not sure if there is
> some other problem.
This particular SELinux vma check is see if the vma falls within the
heap; can you confirm that this change preserves this?
--
paul-moore.com
[PATCH v2] drm/amdgpu: Fix infinite loop in gfxhub_v1_2_xcc_gart_enable (v2)
An instance of for_each_inst() was not changed to match its new
behaviour and is causing a loop.
v2: remove tmp_mask variable
Fixes: 50c1d81d6365 ("drm/amdgpu: Modify for_each_inst macro")
Signed-off-by: Victor Lu
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 5 +-
scripts/package/builddeb | 60
2 files changed, 31 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
index 47f95ec218a3..dbdee1a0aefe 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
@@ -402,18 +402,15 @@ static void gfxhub_v1_2_xcc_program_invalidation(struct
amdgpu_device *adev,
static int gfxhub_v1_2_xcc_gart_enable(struct amdgpu_device *adev,
uint32_t xcc_mask)
{
- uint32_t tmp_mask;
int i;
- tmp_mask = xcc_mask;
/*
* MC_VM_FB_LOCATION_BASE/TOP is NULL for VF, because they are
* VF copy registers so vbios post doesn't program them, for
* SRIOV driver need to program them
*/
if (amdgpu_sriov_vf(adev)) {
- for_each_inst(i, tmp_mask) {
- i = ffs(tmp_mask) - 1;
+ for_each_inst(i, xcc_mask) {
WREG32_SOC15_RLC(GC, GET_INST(GC, i),
regMC_VM_FB_LOCATION_BASE,
adev->gmc.vram_start >> 24);
WREG32_SOC15_RLC(GC, GET_INST(GC, i),
regMC_VM_FB_LOCATION_TOP,
diff --git a/scripts/package/builddeb b/scripts/package/builddeb
index 67cd420dcf89..c5508054bfc8 100755
--- a/scripts/package/builddeb
+++ b/scripts/package/builddeb
@@ -164,23 +164,23 @@ if is_enabled CONFIG_MODULES; then
mv "$tmpdir/lib/modules/$version"/*
"$tmpdir/usr/lib/uml/modules/$version/"
rmdir "$tmpdir/lib/modules/$version"
fi
- if [ -n "$BUILD_DEBUG" ] ; then
- for module in $(find $tmpdir/lib/modules/ -name *.ko -printf
'%P\n'); do
- module=lib/modules/$module
- mkdir -p $(dirname $dbg_dir/usr/lib/debug/$module)
- # only keep debug symbols in the debug file
- $OBJCOPY --only-keep-debug $tmpdir/$module
$dbg_dir/usr/lib/debug/$module
- # strip original module from debug symbols
- $OBJCOPY --strip-debug $tmpdir/$module
- # then add a link to those
- $OBJCOPY
--add-gnu-debuglink=$dbg_dir/usr/lib/debug/$module $tmpdir/$module
- done
-
- # resign stripped modules
- if is_enabled CONFIG_MODULE_SIG_ALL; then
- INSTALL_MOD_PATH="$tmpdir" $MAKE -f $srctree/Makefile
modules_sign
- fi
- fi
+ #if [ -n "$BUILD_DEBUG" ] ; then
+ # for module in $(find $tmpdir/lib/modules/ -name *.ko -printf
'%P\n'); do
+ # module=lib/modules/$module
+ # mkdir -p $(dirname $dbg_dir/usr/lib/debug/$module)
+ # # only keep debug symbols in the debug file
+ # $OBJCOPY --only-keep-debug $tmpdir/$module
$dbg_dir/usr/lib/debug/$module
+ # # strip original module from debug symbols
+ # $OBJCOPY --strip-debug $tmpdir/$module
+ # # then add a link to those
+ # $OBJCOPY
--add-gnu-debuglink=$dbg_dir/usr/lib/debug/$module $tmpdir/$module
+ # done
+
+ # # resign stripped modules
+ # if is_enabled CONFIG_MODULE_SIG_ALL; then
+ # INSTALL_MOD_PATH="$tmpdir" $MAKE -f $srctree/Makefile
modules_sign
+ # fi
+ #fi
fi
# Install the maintainer scripts
@@ -220,18 +220,18 @@ fi
create_package "$packagename" "$tmpdir"
-if [ -n "$BUILD_DEBUG" ] ; then
- # Build debug package
- # Different tools want the image in different locations
- # perf
- mkdir -p $dbg_dir/usr/lib/debug/lib/modules/$version/
- cp vmlinux $dbg_dir/usr/lib/debug/lib/modules/$version/
- # systemtap
- mkdir -p $dbg_dir/usr/lib/debug/boot/
- ln -s ../lib/modules/$version/vmlinux
$dbg_dir/usr/lib/debug/boot/vmlinux-$version
- # kdump-tools
- ln -s lib/modules/$version/vmlinux
$dbg_dir/usr/lib/debug/vmlinux-$version
- create_package "$dbg_packagename" "$dbg_dir"
-fi
+#if [ -n "$BUILD_DEBUG" ] ; then
+# # Build debug package
+# # Different tools want the image in different locations
+# # perf
+# mkdir -p $dbg_dir/usr/lib/debug/lib/modules/$version/
+# cp vmlinux $dbg_dir/usr/lib/debug/lib/modules/$version/
+# # systemtap
+# mkdir -p $dbg_dir/usr/lib/debug/boot/
+# ln -s ../lib/modules/$version/vmlinux
$dbg_dir/usr/lib/debug/boot/vmlinux-$version
+# # kdump-tools
+# ln
[PATCH] drm/amdkfd: enable cooperative groups for gfx11
MES can concurrently schedule queues on the device that require
exclusive device access if marked exclusively_scheduled without the
requirement of GWS. Similar to the F32 HWS, MES will manage
quality of service for these queues.
Use this for cooperative groups since cooperative groups are device
occupancy limited.
Since some GFX11 devices can only be debugged with partial CUs, do not
allow the debugging of cooperative groups on these devices as the CU
occupancy limit will change on attach.
In addition, zero initialize the MES add queue submission vector for MES
initialization tests as we do not want these to be cooperative
dispatches.
v2: fix up indentation and comments.
remove unnecessary perf warning on oversubscription.
change 0 init to 0 memset to deal with padding.
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 1 +
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 2 ++
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 3 ++-
drivers/gpu/drm/amd/amdkfd/kfd_debug.c | 3 ++-
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 6 +-
.../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c| 7 ++-
.../gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | 12
drivers/gpu/drm/amd/include/mes_v11_api_def.h| 4 +++-
9 files changed, 27 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index f808841310fd..72ab6a838bb6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -642,6 +642,8 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int
gang_id,
unsigned long flags;
int r;
+ memset(_input, 0, sizeof(struct mes_add_queue_input));
+
/* allocate the mes queue buffer */
queue = kzalloc(sizeof(struct amdgpu_mes_queue), GFP_KERNEL);
if (!queue) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
index 2d6ac30b7135..2053954a235c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
@@ -224,6 +224,7 @@ struct mes_add_queue_input {
uint32_tis_kfd_process;
uint32_tis_aql_queue;
uint32_tqueue_size;
+ uint32_texclusively_scheduled;
};
struct mes_remove_queue_input {
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 1bdaa00c0b46..8e67e965f7ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -214,6 +214,8 @@ static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes,
mes_add_queue_pkt.is_aql_queue = input->is_aql_queue;
mes_add_queue_pkt.gds_size = input->queue_size;
+ mes_add_queue_pkt.exclusively_scheduled = input->exclusively_scheduled;
+
return mes_v11_0_submit_pkt_and_poll_completion(mes,
_add_queue_pkt, sizeof(mes_add_queue_pkt),
offsetof(union MESAPI__ADD_QUEUE, api_status));
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index 40ac093b5035..e0f9cf6dd8fd 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -1487,7 +1487,8 @@ static int kfd_ioctl_alloc_queue_gws(struct file *filep,
goto out_unlock;
}
- if (!kfd_dbg_has_gws_support(dev) && p->debug_trap_enabled) {
+ if (p->debug_trap_enabled && (!kfd_dbg_has_gws_support(dev) ||
+ kfd_dbg_has_cwsr_workaround(dev))) {
retval = -EBUSY;
goto out_unlock;
}
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
index ccfc81f085ce..1f82caea59ba 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
@@ -753,7 +753,8 @@ int kfd_dbg_trap_enable(struct kfd_process *target,
uint32_t fd,
if (!KFD_IS_SOC15(pdd->dev))
return -ENODEV;
- if (!kfd_dbg_has_gws_support(pdd->dev) && pdd->qpd.num_gws)
+ if (pdd->qpd.num_gws && (!kfd_dbg_has_gws_support(pdd->dev) ||
+kfd_dbg_has_cwsr_workaround(pdd->dev)))
return -EBUSY;
}
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index 0b3dc754e06b..ebc9674d3ce1 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -508,6 +508,7 @@ static int kfd_gws_init(struct kfd_node *node)
{
int ret = 0;
struct kfd_dev *kfd = node->kfd;
+ uint32_t mes_rev = node->adev->mes.sched_version &
AMDGPU_MES_VERSION_MASK;
if
Re: [PATCH v2 2/4] drm/amdkfd: use vma_is_initial_stack() and vma_is_initial_heap()
Am 2023-07-19 um 03:51 schrieb Kefeng Wang: Use the helpers to simplify code. Cc: Felix Kuehling Cc: Alex Deucher Cc: "Christian König" Cc: "Pan, Xinhui" Cc: David Airlie Cc: Daniel Vetter Signed-off-by: Kefeng Wang Reviewed-by: Felix Kuehling --- drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c index 5ff1a5a89d96..0b7bfbd0cb66 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c @@ -2621,10 +2621,7 @@ svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, return -EFAULT; } - *is_heap_stack = (vma->vm_start <= vma->vm_mm->brk && - vma->vm_end >= vma->vm_mm->start_brk) || -(vma->vm_start <= vma->vm_mm->start_stack && - vma->vm_end >= vma->vm_mm->start_stack); + *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); start_limit = max(vma->vm_start >> PAGE_SHIFT, (unsigned long)ALIGN_DOWN(addr, 2UL << 8));
Re: [PATCH 1/2] drm/amdkfd: fix trap handling work around for debugging
Am 2023-07-14 um 05:37 schrieb Jonathan Kim:
Update the list of devices that require the cwsr trap handling
workaround for debugging use cases.
Signed-off-by: Jonathan Kim
This patch is
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_debug.c| 5 ++---
drivers/gpu/drm/amd/amdkfd/kfd_debug.h| 6 ++
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 6 ++
3 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
index 190b03efe5ff..ccfc81f085ce 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
@@ -302,8 +302,7 @@ static int kfd_dbg_set_queue_workaround(struct queue *q,
bool enable)
if (!q)
return 0;
- if (KFD_GC_VERSION(q->device) < IP_VERSION(11, 0, 0) ||
- KFD_GC_VERSION(q->device) >= IP_VERSION(12, 0, 0))
+ if (!kfd_dbg_has_cwsr_workaround(q->device))
return 0;
if (enable && q->properties.is_user_cu_masked)
@@ -349,7 +348,7 @@ int kfd_dbg_set_mes_debug_mode(struct kfd_process_device
*pdd)
{
uint32_t spi_dbg_cntl = pdd->spi_dbg_override |
pdd->spi_dbg_launch_mode;
uint32_t flags = pdd->process->dbg_flags;
- bool sq_trap_en = !!spi_dbg_cntl;
+ bool sq_trap_en = !!spi_dbg_cntl ||
!kfd_dbg_has_cwsr_workaround(pdd->dev);
if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
return 0;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.h
b/drivers/gpu/drm/amd/amdkfd/kfd_debug.h
index ba616ed17dee..586d7f886712 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.h
@@ -101,6 +101,12 @@ static inline bool kfd_dbg_is_rlc_restore_supported(struct
kfd_node *dev)
KFD_GC_VERSION(dev) == IP_VERSION(10, 1, 1));
}
+static inline bool kfd_dbg_has_cwsr_workaround(struct kfd_node *dev)
+{
+ return KFD_GC_VERSION(dev) >= IP_VERSION(11, 0, 0) &&
+ KFD_GC_VERSION(dev) <= IP_VERSION(11, 0, 3);
+}
+
static inline bool kfd_dbg_has_gws_support(struct kfd_node *dev)
{
if ((KFD_GC_VERSION(dev) == IP_VERSION(9, 0, 1)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 31cac1fd0d58..761963ad6154 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -226,8 +226,7 @@ static int add_queue_mes(struct device_queue_manager *dqm,
struct queue *q,
queue_input.paging = false;
queue_input.tba_addr = qpd->tba_addr;
queue_input.tma_addr = qpd->tma_addr;
- queue_input.trap_en = KFD_GC_VERSION(q->device) < IP_VERSION(11, 0, 0)
||
- KFD_GC_VERSION(q->device) > IP_VERSION(11, 0, 3);
+ queue_input.trap_en = !kfd_dbg_has_cwsr_workaround(q->device);
queue_input.skip_process_ctx_clear =
qpd->pqm->process->debug_trap_enabled;
queue_type = convert_to_mes_queue_type(q->properties.type);
@@ -1827,8 +1826,7 @@ static int create_queue_cpsch(struct device_queue_manager
*dqm, struct queue *q,
*/
q->properties.is_evicted = !!qpd->evicted;
q->properties.is_dbg_wa = qpd->pqm->process->debug_trap_enabled &&
- KFD_GC_VERSION(q->device) >= IP_VERSION(11, 0, 0) &&
- KFD_GC_VERSION(q->device) <= IP_VERSION(11, 0, 3);
+ kfd_dbg_has_cwsr_workaround(q->device);
if (qd)
mqd_mgr->restore_mqd(mqd_mgr, >mqd, q->mqd_mem_obj,
>gart_mqd_addr,
Re: [PATCH 1/2] drm/amd/display: Convert macros to functions in amdgpu_display.c & amdgpu_display.h
On Wed, Jul 19, 2023 at 1:20 AM Srinivasan Shanmugam
wrote:
>
> Convert macros to functions to fix the following & for better readability:
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:26: Macro argument reuse 'adev' -
> possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:32: Macro argument reuse 'adev' -
> possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:34: Macro argument reuse 'adev' -
> possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:36: Macro argument reuse 'adev' -
> possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:38: Macro argument reuse 'adev' -
> possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:40: Macro argument reuse 'adev' -
> possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:42: Macro argument reuse 'adev' -
> possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:44: Macro argument reuse 'adev' -
> possible side-effects?
>
I would drop this part. I don't think it's a net win.
> And other warnings:
>
> WARNING: Block comments use * on subsequent lines
> WARNING: Block comments use a trailing */ on a separate line
> WARNING: suspect code indent for conditional statements (8, 12)
> WARNING: braces {} are not necessary for single statement blocks
This part looks good. Maybe split this out as a separate patch.
Alex
>
> Cc: Christian König
> Cc: Alex Deucher
> Signed-off-by: Srinivasan Shanmugam
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 118 +---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h | 46 ++--
> 2 files changed, 136 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index b702f499f5fb..6eea92cef97c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -45,6 +45,82 @@
> #include
> #include
>
> +u32 amdgpu_display_vblank_get_counter(struct amdgpu_device *adev, int crtc)
> +{
> + return (adev)->mode_info.funcs->vblank_get_counter((adev), (crtc));
> +}
> +
> +void amdgpu_display_backlight_set_level(struct amdgpu_device *adev,
> + struct amdgpu_encoder *amdgpu_encoder,
> + u8 level)
> +{
> + (adev)->mode_info.funcs->backlight_set_level((amdgpu_encoder),
> (level));
> +}
> +
> +u8 amdgpu_display_backlight_get_level(struct amdgpu_device *adev,
> + struct amdgpu_encoder *amdgpu_encoder)
> +{
> + return (adev)->mode_info.funcs->backlight_get_level(amdgpu_encoder);
> +}
> +
> +bool amdgpu_display_hpd_sense(struct amdgpu_device *adev,
> + enum amdgpu_hpd_id hpd)
> +{
> + return (adev)->mode_info.funcs->hpd_sense((adev), (hpd));
> +}
> +
> +void amdgpu_display_hpd_set_polarity(struct amdgpu_device *adev,
> +enum amdgpu_hpd_id hpd)
> +{
> + (adev)->mode_info.funcs->hpd_set_polarity((adev), (hpd));
> +}
> +
> +u32 amdgpu_display_hpd_get_gpio_reg(struct amdgpu_device *adev)
> +{
> + return (adev)->mode_info.funcs->hpd_get_gpio_reg(adev);
> +}
> +
> +void amdgpu_display_bandwidth_update(struct amdgpu_device *adev)
> +{
> + (adev)->mode_info.funcs->bandwidth_update(adev);
> +}
> +
> +void amdgpu_display_page_flip(struct amdgpu_device *adev,
> + int crtc_id, u64 crtc_base,
> + bool async)
> +{
> + (adev)->mode_info.funcs->page_flip((adev), (crtc_id), (crtc_base),
> (async));
> +}
> +
> +int amdgpu_display_page_flip_get_scanoutpos(struct amdgpu_device *adev, int
> crtc,
> + u32 *vbl, u32 *pos)
> +{
> + return (adev)->mode_info.funcs->page_flip_get_scanoutpos((adev),
> (crtc), (vbl), (pos));
> +}
> +
> +void amdgpu_display_add_encoder(struct amdgpu_device *adev,
> + u32 encoder_enum,
> + u32 supported_device,
> + u16 caps)
> +{
> + (adev)->mode_info.funcs->add_encoder((adev), (encoder_enum),
> (supported_device), (caps));
> +}
> +
> +void amdgpu_display_add_connector(struct amdgpu_device *adev,
> + u32 connector_id,
> + u32 supported_device,
> + int connector_type,
> + struct amdgpu_i2c_bus_rec *i2c_bus,
> + u16 connector_object_id,
> + struct amdgpu_hpd *hpd,
> + struct amdgpu_router *router)
> +{
> + (adev)->mode_info.funcs->add_connector((adev), (connector_id),
> + (supported_device),
> (connector_type),
> + (i2c_bus),
>
Re: [PATCH 2/2] drm/radeon: Prefer dev_warn over printk
On Wed, Jul 19, 2023 at 1:20 AM Srinivasan Shanmugam
wrote:
>
> From: Srinivasan Shanmugam
>
> Fixes the following checkpatch.pl:
>
> WARNING: printk() should include KERN_ facility level
Might be better to convert to dev_* variants so that we get better
info when there are multiple GPUs in the system.
Alex
>
> Cc: Christian König
> Cc: Alex Deucher
> Signed-off-by: Srinivasan Shanmugam
> ---
> drivers/gpu/drm/radeon/radeon_atpx_handler.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
> b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
> index d0b450a06506..875a995fff66 100644
> --- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
> +++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
> @@ -115,7 +115,7 @@ static union acpi_object *radeon_atpx_call(acpi_handle
> handle, int function,
>
> /* Fail only if calling the method fails and ATPX is supported */
> if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
> - printk("failed to evaluate ATPX got %s\n",
> + pr_err("failed to evaluate ATPX got %s\n",
>acpi_format_exception(status));
> kfree(buffer.pointer);
> return NULL;
> @@ -171,7 +171,7 @@ static int radeon_atpx_validate(struct radeon_atpx *atpx)
>
> size = *(u16 *) info->buffer.pointer;
> if (size < 10) {
> - printk("ATPX buffer is too small: %zu\n", size);
> + pr_err("ATPX buffer is too small: %zu\n", size);
> kfree(info);
> return -EINVAL;
> }
> @@ -202,7 +202,7 @@ static int radeon_atpx_validate(struct radeon_atpx *atpx)
>
> atpx->is_hybrid = false;
> if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
> - printk("ATPX Hybrid Graphics\n");
> + pr_info("ATPX Hybrid Graphics\n");
> /*
> * Disable legacy PM methods only when pcie port PM is usable,
> * otherwise the device might fail to power off or power on.
> @@ -239,7 +239,7 @@ static int radeon_atpx_verify_interface(struct
> radeon_atpx *atpx)
>
> size = *(u16 *) info->buffer.pointer;
> if (size < 8) {
> - printk("ATPX buffer is too small: %zu\n", size);
> + pr_err("ATPX buffer is too small: %zu\n", size);
> err = -EINVAL;
> goto out;
> }
> @@ -248,7 +248,7 @@ static int radeon_atpx_verify_interface(struct
> radeon_atpx *atpx)
> memcpy(, info->buffer.pointer, size);
>
> /* TODO: check version? */
> - printk("ATPX version %u, functions 0x%08x\n",
> + pr_info("ATPX version %u, functions 0x%08x\n",
>output.version, output.function_bits);
>
> radeon_atpx_parse_functions(>functions, output.function_bits);
> --
> 2.25.1
>
Re: [PATCH] drm/amd/display: Allow building DC with clang on RISC-V
Applied. Thanks! On Tue, Jul 18, 2023 at 12:40 PM Nathan Chancellor wrote: > > On Mon, Jul 17, 2023 at 03:29:23PM -0700, Samuel Holland wrote: > > clang on RISC-V appears to be unaffected by the bug causing excessive > > stack usage in calculate_bandwidth(). clang 16 with -fstack-usage > > reports a 304 byte stack frame size with CONFIG_ARCH_RV32I, and 512 > > bytes with CONFIG_ARCH_RV64I. > > > > Signed-off-by: Samuel Holland > > I built ARCH=riscv allmodconfig drivers/gpu/drm/amd/amdgpu/ (confirming > that CONFIG_DRM_AMD_DC gets enabled) with LLVM 11 through 17 with and > without CONFIG_KASAN=y and I never saw the -Wframe-larger-than instance > that this was disabled for, so I agree. > > Reviewed-by: Nathan Chancellor > Tested-by: Nathan Chancellor > > > > > drivers/gpu/drm/amd/display/Kconfig | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/amd/display/Kconfig > > b/drivers/gpu/drm/amd/display/Kconfig > > index bf0a655d009e..901d1961b739 100644 > > --- a/drivers/gpu/drm/amd/display/Kconfig > > +++ b/drivers/gpu/drm/amd/display/Kconfig > > @@ -5,7 +5,7 @@ menu "Display Engine Configuration" > > config DRM_AMD_DC > > bool "AMD DC - Enable new display engine" > > default y > > - depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64 > > + depends on BROKEN || !CC_IS_CLANG || ARM64 || RISCV || SPARC64 || > > X86_64 > > select SND_HDA_COMPONENT if SND_HDA_CORE > > # !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752 > > select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC) || > > (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG)) > > -- > > 2.40.1 > >
[PATCH 2/2] drm/amdgpu: not update the same version ras ta
not update the same version ras ta.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c
index 049d34fd5ba0..c27574239fde 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c
@@ -120,6 +120,7 @@ static const struct file_operations ta_invoke_debugfs_fops
= {
* Transmit buffer:
*- TA type (4bytes)
*- TA bin length (4bytes)
+ *- TA bin version (4bytes)
*- TA bin
* Receive buffer:
*- TA ID (4bytes)
@@ -148,6 +149,7 @@ static ssize_t ta_if_load_debugfs_write(struct file *fp,
const char *buf, size_t
uint8_t *ta_bin= NULL;
uint32_t copy_pos = 0;
int ret= 0;
+ uint32_t ta_version = 0;
struct amdgpu_device *adev= (struct amdgpu_device
*)file_inode(fp)->i_private;
struct psp_context *psp = >psp;
@@ -168,6 +170,12 @@ static ssize_t ta_if_load_debugfs_write(struct file *fp,
const char *buf, size_t
copy_pos += sizeof(uint32_t);
+ ret = copy_from_user((void *)_version, [copy_pos],
sizeof(uint32_t));
+ if (ret)
+ return -EFAULT;
+
+ copy_pos += sizeof(uint32_t);
+
ta_bin = kzalloc(ta_bin_len, GFP_KERNEL);
if (!ta_bin)
return -ENOMEM;
@@ -185,6 +193,16 @@ static ssize_t ta_if_load_debugfs_write(struct file *fp,
const char *buf, size_t
goto err_free_bin;
}
+ if (ta_version == context->bin_desc.fw_version) {
+ dev_info(adev->dev,
+ "new ta is same as running ta, running ta will not be
updated!\n");
+ if (copy_to_user((char *)buf, (void *)>session_id,
sizeof(uint32_t)))
+ ret = -EFAULT;
+ else
+ ret = len;
+ goto err_free_bin;
+ }
+
/*
* Allocate TA shared buf in case shared buf was freed
* due to loading TA failed before.
@@ -209,7 +227,7 @@ static ssize_t ta_if_load_debugfs_write(struct file *fp,
const char *buf, size_t
/* Prepare TA context for TA initialization */
context->ta_type = ta_type;
- context->bin_desc.fw_version = get_bin_version(ta_bin);
+ context->bin_desc.fw_version = ta_version;
context->bin_desc.size_bytes = ta_bin_len;
context->bin_desc.start_addr = ta_bin;
--
2.34.1
[PATCH 1/2] drm/amdgpu: add ta initialization failure check condition
Add ta initialization failure check condition.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c
index 468a67b302d4..049d34fd5ba0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c
@@ -220,7 +220,7 @@ static ssize_t ta_if_load_debugfs_write(struct file *fp,
const char *buf, size_t
}
ret = psp_fn_ta_initialize(psp);
- if (ret || context->resp_status) {
+ if (ret || context->resp_status || !context->initialized) {
dev_err(adev->dev, "Failed to load TA via debugfs (%d) and
status (0x%X)\n",
ret, context->resp_status);
if (!ret)
--
2.34.1
Re: [PATCH v2 3/4] selinux: use vma_is_initial_stack() and vma_is_initial_heap()
On 19.07.23 09:51, Kefeng Wang wrote:
Use the helpers to simplify code.
Cc: Paul Moore
Cc: Stephen Smalley
Cc: Eric Paris
Acked-by: Paul Moore
Signed-off-by: Kefeng Wang
---
security/selinux/hooks.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index d06e350fedee..ee8575540a8e 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -3762,13 +3762,10 @@ static int selinux_file_mprotect(struct vm_area_struct
*vma,
if (default_noexec &&
(prot & PROT_EXEC) && !(vma->vm_flags & VM_EXEC)) {
int rc = 0;
- if (vma->vm_start >= vma->vm_mm->start_brk &&
- vma->vm_end <= vma->vm_mm->brk) {
+ if (vma_is_initial_heap(vma)) {
rc = avc_has_perm(sid, sid, SECCLASS_PROCESS,
PROCESS__EXECHEAP, NULL);
- } else if (!vma->vm_file &&
- ((vma->vm_start <= vma->vm_mm->start_stack &&
-vma->vm_end >= vma->vm_mm->start_stack) ||
+ } else if (!vma->vm_file && (vma_is_initial_stack(vma) ||
vma_is_stack_for_current(vma))) {
rc = avc_has_perm(sid, sid, SECCLASS_PROCESS,
PROCESS__EXECSTACK, NULL);
Reviewed-by: David Hildenbrand
--
Cheers,
David / dhildenb
[PATCH v2 2/4] drm/amdkfd: use vma_is_initial_stack() and vma_is_initial_heap()
Use the helpers to simplify code. Cc: Felix Kuehling Cc: Alex Deucher Cc: "Christian König" Cc: "Pan, Xinhui" Cc: David Airlie Cc: Daniel Vetter Signed-off-by: Kefeng Wang --- drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c index 5ff1a5a89d96..0b7bfbd0cb66 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c @@ -2621,10 +2621,7 @@ svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, return -EFAULT; } - *is_heap_stack = (vma->vm_start <= vma->vm_mm->brk && - vma->vm_end >= vma->vm_mm->start_brk) || -(vma->vm_start <= vma->vm_mm->start_stack && - vma->vm_end >= vma->vm_mm->start_stack); + *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); start_limit = max(vma->vm_start >> PAGE_SHIFT, (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); -- 2.27.0
Re: [PATCH v2 4/4] perf/core: use vma_is_initial_stack() and vma_is_initial_heap()
On Wed, Jul 19, 2023 at 03:51:14PM +0800, Kefeng Wang wrote: > Use the helpers to simplify code, also kill unneeded goto cpy_name. Grrr.. why am I only getting 4/4 ? I'm going to write a bot that auto NAKs all partial series :/
Re: [PATCH v2 4/4] perf/core: use vma_is_initial_stack() and vma_is_initial_heap()
On 2023/7/19 17:29, Peter Zijlstra wrote: On Wed, Jul 19, 2023 at 03:51:14PM +0800, Kefeng Wang wrote: Use the helpers to simplify code, also kill unneeded goto cpy_name. Grrr.. why am I only getting 4/4 ? I'm going to write a bot that auto NAKs all partial series :/ Sorry, I should add all to cc list, here is all patches linke[1] [1] https://lore.kernel.org/linux-mm/20230719075127.47736-1-wangkefeng.w...@huawei.com/ Thanks.
Re: [PATCH v2 3/4] selinux: use vma_is_initial_stack() and vma_is_initial_heap()
On 2023/7/19 17:02, Christian Göttsche wrote:
On Wed, 19 Jul 2023 at 09:40, Kefeng Wang wrote:
Use the helpers to simplify code.
Cc: Paul Moore
Cc: Stephen Smalley
Cc: Eric Paris
Acked-by: Paul Moore
Signed-off-by: Kefeng Wang
---
security/selinux/hooks.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index d06e350fedee..ee8575540a8e 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -3762,13 +3762,10 @@ static int selinux_file_mprotect(struct vm_area_struct
*vma,
if (default_noexec &&
(prot & PROT_EXEC) && !(vma->vm_flags & VM_EXEC)) {
int rc = 0;
- if (vma->vm_start >= vma->vm_mm->start_brk &&
- vma->vm_end <= vma->vm_mm->brk) {
+ if (vma_is_initial_heap(vma)) {
This seems to change the condition from
vma->vm_start >= vma->vm_mm->start_brk && vma->vm_end <= vma->vm_mm->brk
to
vma->vm_start <= vma->vm_mm->brk && vma->vm_end >= vma->vm_mm->start_brk
(or AND arguments swapped)
vma->vm_end >= vma->vm_mm->start_brk && vma->vm_start <= vma->vm_mm->brk
Is this intended?
The new condition is to check whether there is intersection between
[startbrk,brk] and [vm_start,vm_end], it contains orignal check, so
I think it is ok, but for selinux check, I am not sure if there is
some other problem.
rc = avc_has_perm(sid, sid, SECCLASS_PROCESS,
PROCESS__EXECHEAP, NULL);
- } else if (!vma->vm_file &&
- ((vma->vm_start <= vma->vm_mm->start_stack &&
-vma->vm_end >= vma->vm_mm->start_stack) ||
+ } else if (!vma->vm_file && (vma_is_initial_stack(vma) ||
vma_is_stack_for_current(vma))) {
rc = avc_has_perm(sid, sid, SECCLASS_PROCESS,
PROCESS__EXECSTACK, NULL);
--
2.27.0
[PATCH v2 0/4] mm: convert to vma_is_initial_heap/stack()
Add vma_is_initial_stack() and vma_is_initial_heap() helper and use them to simplify code. v2: - address comments per David Hildenbrand and Christian Göttsche - fix selinux build Kefeng Wang (4): mm: factor out VMA stack and heap checks drm/amdkfd: use vma_is_initial_stack() and vma_is_initial_heap() selinux: use vma_is_initial_stack() and vma_is_initial_heap() perf/core: use vma_is_initial_stack() and vma_is_initial_heap() drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 5 + fs/proc/task_mmu.c | 24 fs/proc/task_nommu.c | 15 +-- include/linux/mm.h | 21 + kernel/events/core.c | 22 +++--- security/selinux/hooks.c | 7 ++- 6 files changed, 36 insertions(+), 58 deletions(-) -- 2.27.0
Re: [PATCH v2 3/4] selinux: use vma_is_initial_stack() and vma_is_initial_heap()
On Wed, 19 Jul 2023 at 09:40, Kefeng Wang wrote:
>
> Use the helpers to simplify code.
>
> Cc: Paul Moore
> Cc: Stephen Smalley
> Cc: Eric Paris
> Acked-by: Paul Moore
> Signed-off-by: Kefeng Wang
> ---
> security/selinux/hooks.c | 7 ++-
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
> index d06e350fedee..ee8575540a8e 100644
> --- a/security/selinux/hooks.c
> +++ b/security/selinux/hooks.c
> @@ -3762,13 +3762,10 @@ static int selinux_file_mprotect(struct
> vm_area_struct *vma,
> if (default_noexec &&
> (prot & PROT_EXEC) && !(vma->vm_flags & VM_EXEC)) {
> int rc = 0;
> - if (vma->vm_start >= vma->vm_mm->start_brk &&
> - vma->vm_end <= vma->vm_mm->brk) {
> + if (vma_is_initial_heap(vma)) {
This seems to change the condition from
vma->vm_start >= vma->vm_mm->start_brk && vma->vm_end <= vma->vm_mm->brk
to
vma->vm_start <= vma->vm_mm->brk && vma->vm_end >= vma->vm_mm->start_brk
(or AND arguments swapped)
vma->vm_end >= vma->vm_mm->start_brk && vma->vm_start <= vma->vm_mm->brk
Is this intended?
> rc = avc_has_perm(sid, sid, SECCLASS_PROCESS,
> PROCESS__EXECHEAP, NULL);
> - } else if (!vma->vm_file &&
> - ((vma->vm_start <= vma->vm_mm->start_stack &&
> -vma->vm_end >= vma->vm_mm->start_stack) ||
> + } else if (!vma->vm_file && (vma_is_initial_stack(vma) ||
> vma_is_stack_for_current(vma))) {
> rc = avc_has_perm(sid, sid, SECCLASS_PROCESS,
> PROCESS__EXECSTACK, NULL);
> --
> 2.27.0
>
Re: [PATCH v2 1/4] mm: factor out VMA stack and heap checks
On 19.07.23 09:51, Kefeng Wang wrote:
Factor out VMA stack and heap checks and name them
vma_is_initial_stack() and vma_is_initial_heap() for
general use.
Cc: Christian Göttsche
Cc: David Hildenbrand
Signed-off-by: Kefeng Wang
---
[...]
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 2dd73e4f3d8e..51f8c573db74 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -822,6 +822,27 @@ static inline bool vma_is_anonymous(struct vm_area_struct
*vma)
return !vma->vm_ops;
}
Worth adding a similar comment like for vma_is_initial_stack() ?
+static inline bool vma_is_initial_heap(const struct vm_area_struct *vma)
+{
+ return vma->vm_start <= vma->vm_mm->brk &&
+ vma->vm_end >= vma->vm_mm->start_brk;
+}
+
+/*
+ * Indicate if the VMA is a stack for the given task; for
+ * /proc/PID/maps that is the stack of the main task.
+ */
+static inline bool vma_is_initial_stack(const struct vm_area_struct *vma)
+{
+ /*
+* We make no effort to guess what a given thread considers to be
+* its "stack". It's not even well-defined for programs written
+* languages like Go.
+*/
+ return vma->vm_start <= vma->vm_mm->start_stack &&
+ vma->vm_end >= vma->vm_mm->start_stack;
+}
+
static inline bool vma_is_temporary_stack(struct vm_area_struct *vma)
{
int maybe_stack = vma->vm_flags & (VM_GROWSDOWN | VM_GROWSUP);
Reviewed-by: David Hildenbrand
--
Cheers,
David / dhildenb
[PATCH v2 1/4] mm: factor out VMA stack and heap checks
Factor out VMA stack and heap checks and name them
vma_is_initial_stack() and vma_is_initial_heap() for
general use.
Cc: Christian G??ttsche
Cc: David Hildenbrand
Signed-off-by: Kefeng Wang
---
fs/proc/task_mmu.c | 24
fs/proc/task_nommu.c | 15 +--
include/linux/mm.h | 21 +
3 files changed, 26 insertions(+), 34 deletions(-)
diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c
index 507cd4e59d07..bf25178ae66a 100644
--- a/fs/proc/task_mmu.c
+++ b/fs/proc/task_mmu.c
@@ -236,21 +236,6 @@ static int do_maps_open(struct inode *inode, struct file
*file,
sizeof(struct proc_maps_private));
}
-/*
- * Indicate if the VMA is a stack for the given task; for
- * /proc/PID/maps that is the stack of the main task.
- */
-static int is_stack(struct vm_area_struct *vma)
-{
- /*
-* We make no effort to guess what a given thread considers to be
-* its "stack". It's not even well-defined for programs written
-* languages like Go.
-*/
- return vma->vm_start <= vma->vm_mm->start_stack &&
- vma->vm_end >= vma->vm_mm->start_stack;
-}
-
static void show_vma_header_prefix(struct seq_file *m,
unsigned long start, unsigned long end,
vm_flags_t flags, unsigned long long pgoff,
@@ -327,13 +312,12 @@ show_map_vma(struct seq_file *m, struct vm_area_struct
*vma)
goto done;
}
- if (vma->vm_start <= mm->brk &&
- vma->vm_end >= mm->start_brk) {
+ if (vma_is_initial_heap(vma)) {
name = "[heap]";
goto done;
}
- if (is_stack(vma)) {
+ if (vma_is_initial_stack(vma)) {
name = "[stack]";
goto done;
}
@@ -1971,9 +1955,9 @@ static int show_numa_map(struct seq_file *m, void *v)
if (file) {
seq_puts(m, " file=");
seq_file_path(m, file, "\n\t= ");
- } else if (vma->vm_start <= mm->brk && vma->vm_end >= mm->start_brk) {
+ } else if (vma_is_initial_heap(vma)) {
seq_puts(m, " heap");
- } else if (is_stack(vma)) {
+ } else if (vma_is_initial_stack(vma)) {
seq_puts(m, " stack");
}
diff --git a/fs/proc/task_nommu.c b/fs/proc/task_nommu.c
index 2c8b62265981..a8ac0dd8041e 100644
--- a/fs/proc/task_nommu.c
+++ b/fs/proc/task_nommu.c
@@ -121,19 +121,6 @@ unsigned long task_statm(struct mm_struct *mm,
return size;
}
-static int is_stack(struct vm_area_struct *vma)
-{
- struct mm_struct *mm = vma->vm_mm;
-
- /*
-* We make no effort to guess what a given thread considers to be
-* its "stack". It's not even well-defined for programs written
-* languages like Go.
-*/
- return vma->vm_start <= mm->start_stack &&
- vma->vm_end >= mm->start_stack;
-}
-
/*
* display a single VMA to a sequenced file
*/
@@ -171,7 +158,7 @@ static int nommu_vma_show(struct seq_file *m, struct
vm_area_struct *vma)
if (file) {
seq_pad(m, ' ');
seq_file_path(m, file, "");
- } else if (mm && is_stack(vma)) {
+ } else if (mm && vma_is_initial_stack(vma)) {
seq_pad(m, ' ');
seq_puts(m, "[stack]");
}
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 2dd73e4f3d8e..51f8c573db74 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -822,6 +822,27 @@ static inline bool vma_is_anonymous(struct vm_area_struct
*vma)
return !vma->vm_ops;
}
+static inline bool vma_is_initial_heap(const struct vm_area_struct *vma)
+{
+ return vma->vm_start <= vma->vm_mm->brk &&
+ vma->vm_end >= vma->vm_mm->start_brk;
+}
+
+/*
+ * Indicate if the VMA is a stack for the given task; for
+ * /proc/PID/maps that is the stack of the main task.
+ */
+static inline bool vma_is_initial_stack(const struct vm_area_struct *vma)
+{
+ /*
+* We make no effort to guess what a given thread considers to be
+* its "stack". It's not even well-defined for programs written
+* languages like Go.
+*/
+ return vma->vm_start <= vma->vm_mm->start_stack &&
+ vma->vm_end >= vma->vm_mm->start_stack;
+}
+
static inline bool vma_is_temporary_stack(struct vm_area_struct *vma)
{
int maybe_stack = vma->vm_flags & (VM_GROWSDOWN | VM_GROWSUP);
--
2.27.0
[PATCH v2 4/4] perf/core: use vma_is_initial_stack() and vma_is_initial_heap()
Use the helpers to simplify code, also kill unneeded goto cpy_name.
Cc: Peter Zijlstra
Cc: Arnaldo Carvalho de Melo
Signed-off-by: Kefeng Wang
---
kernel/events/core.c | 22 +++---
1 file changed, 7 insertions(+), 15 deletions(-)
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 78ae7b6f90fd..d59f6327472f 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -8685,22 +8685,14 @@ static void perf_event_mmap_event(struct
perf_mmap_event *mmap_event)
}
name = (char *)arch_vma_name(vma);
- if (name)
- goto cpy_name;
-
- if (vma->vm_start <= vma->vm_mm->start_brk &&
- vma->vm_end >= vma->vm_mm->brk) {
- name = "[heap]";
- goto cpy_name;
+ if (!name) {
+ if (vma_is_initial_heap(vma))
+ name = "[heap]";
+ else if (vma_is_initial_stack(vma))
+ name = "[stack]";
+ else
+ name = "//anon";
}
- if (vma->vm_start <= vma->vm_mm->start_stack &&
- vma->vm_end >= vma->vm_mm->start_stack) {
- name = "[stack]";
- goto cpy_name;
- }
-
- name = "//anon";
- goto cpy_name;
}
cpy_name:
--
2.27.0
Re: [PATCH v2 2/4] drm/amdkfd: use vma_is_initial_stack() and vma_is_initial_heap()
On 19.07.23 09:51, Kefeng Wang wrote: Use the helpers to simplify code. Cc: Felix Kuehling Cc: Alex Deucher Cc: "Christian König" Cc: "Pan, Xinhui" Cc: David Airlie Cc: Daniel Vetter Signed-off-by: Kefeng Wang --- drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c index 5ff1a5a89d96..0b7bfbd0cb66 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c @@ -2621,10 +2621,7 @@ svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, return -EFAULT; } - *is_heap_stack = (vma->vm_start <= vma->vm_mm->brk && - vma->vm_end >= vma->vm_mm->start_brk) || -(vma->vm_start <= vma->vm_mm->start_stack && - vma->vm_end >= vma->vm_mm->start_stack); + *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); start_limit = max(vma->vm_start >> PAGE_SHIFT, (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); Certainly a valid refactoring, although questionable if such code should care about that. Reviewed-by: David Hildenbrand -- Cheers, David / dhildenb
[PATCH v2 3/4] selinux: use vma_is_initial_stack() and vma_is_initial_heap()
Use the helpers to simplify code.
Cc: Paul Moore
Cc: Stephen Smalley
Cc: Eric Paris
Acked-by: Paul Moore
Signed-off-by: Kefeng Wang
---
security/selinux/hooks.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index d06e350fedee..ee8575540a8e 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -3762,13 +3762,10 @@ static int selinux_file_mprotect(struct vm_area_struct
*vma,
if (default_noexec &&
(prot & PROT_EXEC) && !(vma->vm_flags & VM_EXEC)) {
int rc = 0;
- if (vma->vm_start >= vma->vm_mm->start_brk &&
- vma->vm_end <= vma->vm_mm->brk) {
+ if (vma_is_initial_heap(vma)) {
rc = avc_has_perm(sid, sid, SECCLASS_PROCESS,
PROCESS__EXECHEAP, NULL);
- } else if (!vma->vm_file &&
- ((vma->vm_start <= vma->vm_mm->start_stack &&
-vma->vm_end >= vma->vm_mm->start_stack) ||
+ } else if (!vma->vm_file && (vma_is_initial_stack(vma) ||
vma_is_stack_for_current(vma))) {
rc = avc_has_perm(sid, sid, SECCLASS_PROCESS,
PROCESS__EXECSTACK, NULL);
--
2.27.0
Re: [PATCH v2 4/4] perf/core: use vma_is_initial_stack() and vma_is_initial_heap()
On 19.07.23 09:51, Kefeng Wang wrote:
Use the helpers to simplify code, also kill unneeded goto cpy_name.
Cc: Peter Zijlstra
Cc: Arnaldo Carvalho de Melo
Signed-off-by: Kefeng Wang
---
kernel/events/core.c | 22 +++---
1 file changed, 7 insertions(+), 15 deletions(-)
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 78ae7b6f90fd..d59f6327472f 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -8685,22 +8685,14 @@ static void perf_event_mmap_event(struct
perf_mmap_event *mmap_event)
}
name = (char *)arch_vma_name(vma);
- if (name)
- goto cpy_name;
-
- if (vma->vm_start <= vma->vm_mm->start_brk &&
- vma->vm_end >= vma->vm_mm->brk) {
- name = "[heap]";
- goto cpy_name;
+ if (!name) {
+ if (vma_is_initial_heap(vma))
+ name = "[heap]";
+ else if (vma_is_initial_stack(vma))
+ name = "[stack]";
+ else
+ name = "//anon";
}
- if (vma->vm_start <= vma->vm_mm->start_stack &&
- vma->vm_end >= vma->vm_mm->start_stack) {
- name = "[stack]";
- goto cpy_name;
- }
-
- name = "//anon";
- goto cpy_name;
If you're removing that goto, maybe also worth removing the goto at the
end of the previous if branch.
Reviewed-by: David Hildenbrand
--
Cheers,
David / dhildenb
RE: [PATCH] drm/amdgpu: Fix infinite loop in gfxhub_v1_2_xcc_gart_enable
[AMD Official Use Only - General]
The variable tmp_mask also could be removed.
Regards,
Bob
-Original Message-
From: amd-gfx On Behalf Of Victor Lu
Sent: Wednesday, July 19, 2023 3:02 AM
To: amd-gfx@lists.freedesktop.org
Cc: Lazar, Lijo ; Skvortsov, Victor
; Lu, Victor Cheng Chi (Victor)
Subject: [PATCH] drm/amdgpu: Fix infinite loop in gfxhub_v1_2_xcc_gart_enable
An instance of for_each_inst() was not changed to match its new behaviour and
is causing a loop.
Fixes: 50c1d81d6365 ("drm/amdgpu: Modify for_each_inst macro")
Signed-off-by: Victor Lu
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
index 47f95ec218a3..b74df0e9fb08 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
@@ -413,7 +413,6 @@ static int gfxhub_v1_2_xcc_gart_enable(struct amdgpu_device
*adev,
*/
if (amdgpu_sriov_vf(adev)) {
for_each_inst(i, tmp_mask) {
- i = ffs(tmp_mask) - 1;
WREG32_SOC15_RLC(GC, GET_INST(GC, i),
regMC_VM_FB_LOCATION_BASE,
adev->gmc.vram_start >> 24);
WREG32_SOC15_RLC(GC, GET_INST(GC, i),
regMC_VM_FB_LOCATION_TOP,
--
2.34.1
[PATCH] drm/amdgpu: set sw state to gfxoff after SR-IOV reset
[Why]
Current SR-IOV will not set GC to off state, while it is a real
GC hard reset. Whthout GFX off flag, driver may do gfxhub invalidation
before firmware load and gfxhub gart enable. This operation may cause
CP to become busy because GC is not in the right state for invalidation.
[How]
Add a function for SR-IOV to clean up some sw state before recover. Set
adev->gfx.is_poweron to false to prevent gfxhub invalidation before gfx
firmware autoload complete.
Signed-off-by: Horace Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 10 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 1 +
3 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 28e6419023b7..1c786190a84e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4575,6 +4575,9 @@ static int amdgpu_device_reset_sriov(struct amdgpu_device
*adev,
if (r)
return r;
+ /* some sw clean up VF needs to do before recover */
+ amdgpu_virt_post_reset(adev);
+
/* Resume IP prior to SMC */
r = amdgpu_device_ip_reinit_early_sriov(adev);
if (r)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 770eb9725ec1..c712d027d62d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -835,6 +835,16 @@ enum amdgpu_sriov_vf_mode
amdgpu_virt_get_sriov_vf_mode(struct amdgpu_device *ad
return mode;
}
+void amdgpu_virt_post_reset(struct amdgpu_device *adev)
+{
+ if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(11, 0, 3)) {
+ /* force set to GFXOFF state after reset,
+* to avoid some invalid operation before GC enable
+*/
+ adev->gfx.is_poweron = false;
+ }
+}
+
bool amdgpu_virt_fw_load_skip_check(struct amdgpu_device *adev, uint32_t
ucode_id)
{
switch (adev->ip_versions[MP0_HWIP][0]) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index d1f7509a44cb..fabb83e9d9ae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -360,4 +360,5 @@ u32 amdgpu_sriov_rreg(struct amdgpu_device *adev,
u32 offset, u32 acc_flags, u32 hwip, u32 xcc_id);
bool amdgpu_virt_fw_load_skip_check(struct amdgpu_device *adev,
uint32_t ucode_id);
+void amdgpu_virt_post_reset(struct amdgpu_device *adev);
#endif
--
2.34.1
[PATCH V7 9/9] drm/amd/pm: enable Wifi RFI mitigation feature support for SMU13.0.7
Fulfill the SMU13.0.7 support for Wifi RFI mitigation feature.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 59 +++
1 file changed, 59 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index bba621615abf..4a680756208b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -126,6 +126,7 @@ static struct cmn2asic_msg_mapping
smu_v13_0_7_message_map[SMU_MSG_MAX_COUNT] =
MSG_MAP(AllowGpo, PPSMC_MSG_SetGpoAllow,
0),
MSG_MAP(GetPptLimit,PPSMC_MSG_GetPptLimit,
0),
MSG_MAP(NotifyPowerSource, PPSMC_MSG_NotifyPowerSource,
0),
+ MSG_MAP(EnableUCLKShadow, PPSMC_MSG_EnableUCLKShadow,
0),
};
static struct cmn2asic_mapping smu_v13_0_7_clk_map[SMU_CLK_COUNT] = {
@@ -206,6 +207,7 @@ static struct cmn2asic_mapping
smu_v13_0_7_table_map[SMU_TABLE_COUNT] = {
TAB_MAP(DRIVER_SMU_CONFIG),
TAB_MAP(ACTIVITY_MONITOR_COEFF),
[SMU_TABLE_COMBO_PPTABLE] = {1, TABLE_COMBO_PPTABLE},
+ TAB_MAP(WIFIBAND),
};
static struct cmn2asic_mapping smu_v13_0_7_pwr_src_map[SMU_POWER_SOURCE_COUNT]
= {
@@ -488,6 +490,9 @@ static int smu_v13_0_7_tables_init(struct smu_context *smu)
AMDGPU_GEM_DOMAIN_VRAM);
SMU_TABLE_INIT(tables, SMU_TABLE_COMBO_PPTABLE,
MP0_MP1_DATA_REGION_SIZE_COMBOPPTABLE,
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
+ SMU_TABLE_INIT(tables, SMU_TABLE_WIFIBAND,
+ sizeof(WifiBandEntryTable_t), PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM);
smu_table->metrics_table = kzalloc(sizeof(SmuMetricsExternal_t),
GFP_KERNEL);
if (!smu_table->metrics_table)
@@ -1722,6 +1727,57 @@ static int smu_v13_0_7_set_df_cstate(struct smu_context
*smu,
NULL);
}
+static bool smu_v13_0_7_wbrf_support_check(struct smu_context *smu)
+{
+ return smu->smc_fw_version > 0x00524600;
+}
+
+static int smu_v13_0_7_set_wbrf_exclusion_ranges(struct smu_context *smu,
+struct exclusion_range
*exclusion_ranges)
+{
+ WifiBandEntryTable_t wifi_bands;
+ int valid_entries = 0;
+ int ret, i;
+
+ memset(_bands, 0, sizeof(wifi_bands));
+ for (i = 0; i < ARRAY_SIZE(wifi_bands.WifiBandEntry); i++) {
+ if (!exclusion_ranges[i].start &&
+ !exclusion_ranges[i].end)
+ break;
+
+ /* PMFW expects the inputs to be in Mhz unit */
+ wifi_bands.WifiBandEntry[valid_entries].LowFreq =
+ DIV_ROUND_DOWN_ULL(exclusion_ranges[i].start,
HZ_IN_MHZ);
+ wifi_bands.WifiBandEntry[valid_entries++].HighFreq =
+ DIV_ROUND_UP_ULL(exclusion_ranges[i].end, HZ_IN_MHZ);
+ }
+ wifi_bands.WifiBandEntryNum = valid_entries;
+
+ /*
+* Per confirm with PMFW team, WifiBandEntryNum = 0 is a valid setting.
+* Considering the scenarios below:
+* - At first the wifi device adds an exclusion range e.g. (2400,2500)
to
+* BIOS and our driver gets notified. We will set WifiBandEntryNum = 1
+* and pass the WifiBandEntry (2400, 2500) to PMFW.
+*
+* - Later the wifi device removes the wifiband list added above and
+* our driver gets notified again. At this time, driver will set
+* WifiBandEntryNum = 0 and pass an empty WifiBandEntry list to PMFW.
+* - PMFW may still need to do some uclk shadow update(e.g. switching
+* from shadow clock back to primary clock) on receiving this.
+*/
+
+ ret = smu_cmn_update_table(smu,
+ SMU_TABLE_WIFIBAND,
+ 0,
+ (void *)(_bands),
+ true);
+ if (ret)
+ dev_err(smu->adev->dev, "Failed to set wifiband!");
+
+ return ret;
+}
+
static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {
.get_allowed_feature_mask = smu_v13_0_7_get_allowed_feature_mask,
.set_default_dpm_table = smu_v13_0_7_set_default_dpm_table,
@@ -1787,6 +1843,9 @@ static const struct pptable_funcs smu_v13_0_7_ppt_funcs =
{
.set_mp1_state = smu_v13_0_7_set_mp1_state,
.set_df_cstate = smu_v13_0_7_set_df_cstate,
.gpo_control = smu_v13_0_gpo_control,
+ .is_asic_wbrf_supported = smu_v13_0_7_wbrf_support_check,
+ .enable_uclk_shadow = smu_v13_0_enable_uclk_shadow,
+ .set_wbrf_exclusion_ranges = smu_v13_0_7_set_wbrf_exclusion_ranges,
};
void smu_v13_0_7_set_ppt_funcs(struct smu_context *smu)
[PATCH V7 8/9] drm/amd/pm: enable Wifi RFI mitigation feature support for SMU13.0.0
Fulfill the SMU13.0.0 support for Wifi RFI mitigation feature.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
---
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 3 +
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 3 +
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c| 9 +++
.../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 60 +++
5 files changed, 77 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 5df28d4a8c30..32764c509ba8 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -325,6 +325,7 @@ enum smu_table_id
SMU_TABLE_PACE,
SMU_TABLE_ECCINFO,
SMU_TABLE_COMBO_PPTABLE,
+ SMU_TABLE_WIFIBAND,
SMU_TABLE_COUNT,
};
@@ -1499,6 +1500,8 @@ enum smu_baco_seq {
__dst_size); \
})
+#define HZ_IN_MHZ 100U
+
#if !defined(SWSMU_CODE_LAYER_L2) && !defined(SWSMU_CODE_LAYER_L3) &&
!defined(SWSMU_CODE_LAYER_L4)
int smu_get_power_limit(void *handle,
uint32_t *limit,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 297b70b9388f..5bbb60289a79 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -245,7 +245,8 @@
__SMU_DUMMY_MAP(AllowGpo), \
__SMU_DUMMY_MAP(Mode2Reset),\
__SMU_DUMMY_MAP(RequestI2cTransaction), \
- __SMU_DUMMY_MAP(GetMetricsTable),
+ __SMU_DUMMY_MAP(GetMetricsTable), \
+ __SMU_DUMMY_MAP(EnableUCLKShadow),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
index df3baaab0037..b6fae9b92303 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
@@ -303,5 +303,8 @@ int smu_v13_0_get_pptable_from_firmware(struct smu_context
*smu,
uint32_t *size,
uint32_t pptable_id);
+int smu_v13_0_enable_uclk_shadow(struct smu_context *smu,
+bool enablement);
+
#endif
#endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index ca379181081c..7cb24c862720 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -2453,3 +2453,12 @@ int smu_v13_0_mode1_reset(struct smu_context *smu)
return ret;
}
+
+int smu_v13_0_enable_uclk_shadow(struct smu_context *smu,
+bool enablement)
+{
+ return smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_EnableUCLKShadow,
+ enablement,
+ NULL);
+}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 08577d1b84ec..3e864bd2c5a4 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -155,6 +155,7 @@ static struct cmn2asic_msg_mapping
smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
MSG_MAP(AllowGpo, PPSMC_MSG_SetGpoAllow,
0),
MSG_MAP(AllowIHHostInterrupt, PPSMC_MSG_AllowIHHostInterrupt,
0),
MSG_MAP(ReenableAcDcInterrupt,
PPSMC_MSG_ReenableAcDcInterrupt, 0),
+ MSG_MAP(EnableUCLKShadow, PPSMC_MSG_EnableUCLKShadow,
0),
};
static struct cmn2asic_mapping smu_v13_0_0_clk_map[SMU_CLK_COUNT] = {
@@ -235,6 +236,7 @@ static struct cmn2asic_mapping
smu_v13_0_0_table_map[SMU_TABLE_COUNT] = {
TAB_MAP(DRIVER_SMU_CONFIG),
TAB_MAP(ACTIVITY_MONITOR_COEFF),
[SMU_TABLE_COMBO_PPTABLE] = {1, TABLE_COMBO_PPTABLE},
+ TAB_MAP(WIFIBAND),
TAB_MAP(I2C_COMMANDS),
TAB_MAP(ECCINFO),
};
@@ -472,6 +474,9 @@ static int smu_v13_0_0_tables_init(struct smu_context *smu)
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
SMU_TABLE_INIT(tables, SMU_TABLE_ECCINFO, sizeof(EccInfoTable_t),
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
+ SMU_TABLE_INIT(tables, SMU_TABLE_WIFIBAND,
+ sizeof(WifiBandEntryTable_t), PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM);
smu_table->metrics_table = kzalloc(sizeof(SmuMetricsExternal_t),
GFP_KERNEL);
if (!smu_table->metrics_table)
@@ -2141,6 +2146,58 @@ static ssize_t smu_v13_0_0_get_ecc_info(struct
smu_context *smu,
return ret;
}
+static bool
[PATCH V7 7/9] drm/amd/pm: add flood detection for wbrf events
To protect PMFW from being overloaded.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 31 +++
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 7 +
2 files changed, 32 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 83d428e890df..aa7faeafc86b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1278,7 +1278,8 @@ static int smu_wbrf_event_handler(struct notifier_block
*nb,
switch (action) {
case WBRF_CHANGED:
- smu_wbrf_handle_exclusion_ranges(smu);
+ schedule_delayed_work(>wbrf_delayed_work,
+
msecs_to_jiffies(SMU_WBRF_EVENT_HANDLING_PACE));
break;
default:
return NOTIFY_DONE;
@@ -1287,6 +1288,21 @@ static int smu_wbrf_event_handler(struct notifier_block
*nb,
return NOTIFY_OK;
}
+/**
+ * smu_wbrf_delayed_work_handler - callback on delayed work timer expired
+ *
+ * @work: struct work_struct pointer
+ *
+ * Flood is over and driver will consume the latest exclusion ranges.
+ */
+static void smu_wbrf_delayed_work_handler(struct work_struct *work)
+{
+ struct smu_context *smu =
+ container_of(work, struct smu_context, wbrf_delayed_work.work);
+
+ smu_wbrf_handle_exclusion_ranges(smu);
+}
+
/**
* smu_wbrf_support_check - check wbrf support
*
@@ -1317,12 +1333,14 @@ static void smu_wbrf_support_check(struct smu_context
*smu)
*/
static int smu_wbrf_init(struct smu_context *smu)
{
- struct amdgpu_device *adev = smu->adev;
int ret;
if (!smu->wbrf_supported)
return 0;
+ INIT_DELAYED_WORK(>wbrf_delayed_work,
+ smu_wbrf_delayed_work_handler);
+
smu->wbrf_notifier.notifier_call = smu_wbrf_event_handler;
ret = wbrf_register_notifier(>wbrf_notifier);
if (ret)
@@ -1333,11 +1351,10 @@ static int smu_wbrf_init(struct smu_context *smu)
* before our driver loaded. To make sure our driver
* is awared of those exclusion ranges.
*/
- ret = smu_wbrf_handle_exclusion_ranges(smu);
- if (ret)
- dev_err(adev->dev, "Failed to handle wbrf exclusion ranges\n");
+ schedule_delayed_work(>wbrf_delayed_work,
+ msecs_to_jiffies(SMU_WBRF_EVENT_HANDLING_PACE));
- return ret;
+ return 0;
}
/**
@@ -1353,6 +1370,8 @@ static void smu_wbrf_fini(struct smu_context *smu)
return;
wbrf_unregister_notifier(>wbrf_notifier);
+
+ cancel_delayed_work_sync(>wbrf_delayed_work);
}
static int smu_smc_hw_setup(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 5b2343cfc69b..5df28d4a8c30 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -480,6 +480,12 @@ struct stb_context {
#define WORKLOAD_POLICY_MAX 7
+/*
+ * Configure wbrf event handling pace as there can be only one
+ * event processed every SMU_WBRF_EVENT_HANDLING_PACE ms.
+ */
+#define SMU_WBRF_EVENT_HANDLING_PACE 10
+
struct smu_context
{
struct amdgpu_device*adev;
@@ -579,6 +585,7 @@ struct smu_context
/* data structures for wbrf feature support */
boolwbrf_supported;
struct notifier_block wbrf_notifier;
+ struct delayed_work wbrf_delayed_work;
};
struct i2c_adapter;
--
2.34.1
[PATCH V7 6/9] drm/amd/pm: setup the framework to support Wifi RFI mitigation feature
With WBRF feature supported, as a driver responding to the frequencies,
amdgpu driver is able to do shadow pstate switching to mitigate possible
interference(between its (G-)DDR memory clocks and local radio module
frequency bands used by Wifi 6/6e/7).
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
--
v1->v2:
- update the prompt for feature support(Lijo)
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 19 ++
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 194 ++
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 23 +++
drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 3 +
5 files changed, 240 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 02b827785e39..785d9b43f0c4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -241,6 +241,7 @@ extern int amdgpu_num_kcq;
#define AMDGPU_VCNFW_LOG_SIZE (32 * 1024)
extern int amdgpu_vcnfw_log;
extern int amdgpu_sg_display;
+extern int amdgpu_wbrf;
#define AMDGPU_VM_MAX_NUM_CTX 4096
#define AMDGPU_SG_THRESHOLD(256*1024*1024)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 393b6fb7a71d..d4f3921509a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -191,6 +191,7 @@ int amdgpu_smartshift_bias;
int amdgpu_use_xgmi_p2p = 1;
int amdgpu_vcnfw_log;
int amdgpu_sg_display = -1; /* auto */
+int amdgpu_wbrf = -1;
static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work);
@@ -948,6 +949,24 @@ MODULE_PARM_DESC(smu_pptable_id,
"specify pptable id to be used (-1 = auto(default) value, 0 = use
pptable from vbios, > 0 = soft pptable id)");
module_param_named(smu_pptable_id, amdgpu_smu_pptable_id, int, 0444);
+#if IS_ENABLED(CONFIG_WBRF)
+/**
+ * DOC: wbrf (int)
+ * Enable Wifi RFI interference mitigation feature.
+ * Due to electrical and mechanical constraints there may be likely
interference of
+ * relatively high-powered harmonics of the (G-)DDR memory clocks with local
radio
+ * module frequency bands used by Wifi 6/6e/7. To mitigate the possible RFI
interference,
+ * with this feature enabled, PMFW will use either “shadowed P-State” or
“P-State” based
+ * on active list of frequencies in-use (to be avoided) as part of initial
setting or
+ * P-state transition. However, there may be potential performance impact with
this
+ * feature enabled.
+ * (0 = disabled, 1 = enabled, -1 = auto (default setting, will be enabled if
supported))
+ */
+MODULE_PARM_DESC(wbrf,
+ "Enable Wifi RFI interference mitigation (0 = disabled, 1 = enabled, -1
= auto(default)");
+module_param_named(wbrf, amdgpu_wbrf, int, 0444);
+#endif
+
/* These devices are not supported by amdgpu.
* They are supported by the mach64, r128, radeon drivers
*/
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 2ddf5198e5c4..83d428e890df 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1188,6 +1188,173 @@ static int smu_get_thermal_temperature_range(struct
smu_context *smu)
return ret;
}
+/**
+ * smu_wbrf_handle_exclusion_ranges - consume the wbrf exclusion ranges
+ *
+ * @smu: smu_context pointer
+ *
+ * Retrieve the wbrf exclusion ranges and send them to PMFW for proper
handling.
+ * Returns 0 on success, error on failure.
+ */
+static int smu_wbrf_handle_exclusion_ranges(struct smu_context *smu)
+{
+ struct wbrf_ranges_out wbrf_exclusion = {0};
+ struct exclusion_range *wifi_bands = wbrf_exclusion.band_list;
+ struct amdgpu_device *adev = smu->adev;
+ uint64_t start, end;
+ int ret, i, j;
+
+ ret = wbrf_retrieve_exclusions(adev->dev, _exclusion);
+ if (ret) {
+ dev_err(adev->dev, "Failed to retrieve exclusion ranges!\n");
+ return ret;
+ }
+
+ /*
+* The exclusion ranges array we got might be filled with holes and
duplicate
+* entries. For example:
+* {(2400, 2500), (0, 0), (6882, 6962), (2400, 2500), (0, 0), (6117,
6189), (0, 0)...}
+* We need to do some sortups to eliminate those holes and duplicate
entries.
+* Expected output: {(2400, 2500), (6117, 6189), (6882, 6962), (0,
0)...}
+*/
+ for (i = 0; i < MAX_NUM_OF_WBRF_RANGES; i++) {
+ start = wifi_bands[i].start;
+ end = wifi_bands[i].end;
+
+ /* get the last valid entry to fill the intermediate hole */
+ if (!start && !end) {
+ for (j = MAX_NUM_OF_WBRF_RANGES - 1; j > i; j--)
+ if (wifi_bands[j].start &&
+ wifi_bands[j].end)
+ break;
+
+
[PATCH V7 5/9] drm/amd/pm: update driver_if and ppsmc headers for coming wbrf feature
Add those data structures to support Wifi RFI mitigation feature.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
---
.../pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h | 14 +-
.../pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h | 14 +-
.../amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h | 3 ++-
.../amd/pm/swsmu/inc/pmfw_if/smu_v13_0_7_ppsmc.h | 3 ++-
4 files changed, 30 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
index b686fb68a6e7..d64188fb5839 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
@@ -388,6 +388,17 @@ typedef struct {
EccInfo_t EccInfo[24];
} EccInfoTable_t;
+typedef struct {
+ uint16_t LowFreq;
+ uint16_t HighFreq;
+} WifiOneBand_t;
+
+typedef struct {
+ uint32_t WifiBandEntryNum;
+ WifiOneBand_tWifiBandEntry[11];
+ uint32_t MmHubPadding[8];
+} WifiBandEntryTable_t;
+
//D3HOT sequences
typedef enum {
BACO_SEQUENCE,
@@ -1592,7 +1603,8 @@ typedef struct {
#define TABLE_I2C_COMMANDS9
#define TABLE_DRIVER_INFO 10
#define TABLE_ECCINFO 11
-#define TABLE_COUNT 12
+#define TABLE_WIFIBAND12
+#define TABLE_COUNT 13
//IH Interupt ID
#define IH_INTERRUPT_ID_TO_DRIVER 0xFE
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
index 4c46a0392451..77483e8485e7 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
@@ -392,6 +392,17 @@ typedef struct {
EccInfo_t EccInfo[24];
} EccInfoTable_t;
+typedef struct {
+ uint16_t LowFreq;
+ uint16_t HighFreq;
+} WifiOneBand_t;
+
+typedef struct {
+ uint32_t WifiBandEntryNum;
+ WifiOneBand_tWifiBandEntry[11];
+ uint32_t MmHubPadding[8];
+} WifiBandEntryTable_t;
+
//D3HOT sequences
typedef enum {
BACO_SEQUENCE,
@@ -1624,7 +1635,8 @@ typedef struct {
#define TABLE_I2C_COMMANDS9
#define TABLE_DRIVER_INFO 10
#define TABLE_ECCINFO 11
-#define TABLE_COUNT 12
+#define TABLE_WIFIBAND12
+#define TABLE_COUNT 13
//IH Interupt ID
#define IH_INTERRUPT_ID_TO_DRIVER 0xFE
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
index 10cff75b44d5..c98cc32d11bd 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
@@ -138,7 +138,8 @@
#define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4A
#define PPSMC_MSG_SetPriorityDeltaGain 0x4B
#define PPSMC_MSG_AllowIHHostInterrupt 0x4C
-#define PPSMC_Message_Count 0x4D
+#define PPSMC_MSG_EnableUCLKShadow 0x51
+#define PPSMC_Message_Count 0x52
//Debug Dump Message
#define DEBUGSMC_MSG_TestMessage0x1
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_7_ppsmc.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_7_ppsmc.h
index 6aaefca9b595..a6bf9cdd130e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_7_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_7_ppsmc.h
@@ -134,6 +134,7 @@
#define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4A
#define PPSMC_MSG_SetPriorityDeltaGain 0x4B
#define PPSMC_MSG_AllowIHHostInterrupt 0x4C
-#define PPSMC_Message_Count 0x4D
+#define PPSMC_MSG_EnableUCLKShadow 0x51
+#define PPSMC_Message_Count 0x52
#endif
--
2.34.1
[PATCH V7 4/9] wifi: mac80211: Add support for ACPI WBRF
To support AMD's WBRF interference mitigation mechanism, Wifi adapters
utilized in the system must register the frequencies in use(or unregister
those frequencies no longer used) via the dedicated APCI calls. So that,
other drivers responding to the frequencies can take proper actions to
mitigate possible interference.
Co-developed-by: Mario Limonciello
Signed-off-by: Mario Limonciello
Co-developed-by: Evan Quan
Signed-off-by: Evan Quan
--
v1->v2:
- place the new added member(`wbrf_supported`) in
ieee80211_local(Johannes)
- handle chandefs change scenario properly(Johannes)
- some minor fixes around code sharing and possible invalid input
checks(Johannes)
v2->v3:
- drop unnecessary input checks and intermediate APIs(Mario)
- Separate some mac80211 common code(Mario, Johannes)
v3->v4:
- some minor fixes around return values(Johannes)
---
include/linux/ieee80211.h | 1 +
net/mac80211/Makefile | 2 +
net/mac80211/chan.c| 9
net/mac80211/ieee80211_i.h | 19 +++
net/mac80211/main.c| 2 +
net/mac80211/wbrf.c| 103 +
6 files changed, 136 insertions(+)
create mode 100644 net/mac80211/wbrf.c
diff --git a/include/linux/ieee80211.h b/include/linux/ieee80211.h
index c4cf296e7eaf..0703921547f5 100644
--- a/include/linux/ieee80211.h
+++ b/include/linux/ieee80211.h
@@ -4319,6 +4319,7 @@ static inline int ieee80211_get_tdls_action(struct
sk_buff *skb, u32 hdr_size)
/* convert frequencies */
#define MHZ_TO_KHZ(freq) ((freq) * 1000)
#define KHZ_TO_MHZ(freq) ((freq) / 1000)
+#define KHZ_TO_HZ(freq) ((freq) * 1000)
#define PR_KHZ(f) KHZ_TO_MHZ(f), f % 1000
#define KHZ_F "%d.%03d"
diff --git a/net/mac80211/Makefile b/net/mac80211/Makefile
index b8de44da1fb8..8f8ac567e7c8 100644
--- a/net/mac80211/Makefile
+++ b/net/mac80211/Makefile
@@ -65,4 +65,6 @@ rc80211_minstrel-$(CONFIG_MAC80211_DEBUGFS) += \
mac80211-$(CONFIG_MAC80211_RC_MINSTREL) += $(rc80211_minstrel-y)
+mac80211-$(CONFIG_WBRF) += wbrf.o
+
ccflags-y += -DDEBUG
diff --git a/net/mac80211/chan.c b/net/mac80211/chan.c
index 77c90ed8f5d7..9887471028dc 100644
--- a/net/mac80211/chan.c
+++ b/net/mac80211/chan.c
@@ -506,11 +506,16 @@ static void _ieee80211_change_chanctx(struct
ieee80211_local *local,
WARN_ON(!cfg80211_chandef_compatible(>conf.def, chandef));
+ ieee80211_remove_wbrf(local, >conf.def);
+
ctx->conf.def = *chandef;
/* check if min chanctx also changed */
changed = IEEE80211_CHANCTX_CHANGE_WIDTH |
_ieee80211_recalc_chanctx_min_def(local, ctx, rsvd_for);
+
+ ieee80211_add_wbrf(local, >conf.def);
+
drv_change_chanctx(local, ctx, changed);
if (!local->use_chanctx) {
@@ -668,6 +673,8 @@ static int ieee80211_add_chanctx(struct ieee80211_local
*local,
lockdep_assert_held(>mtx);
lockdep_assert_held(>chanctx_mtx);
+ ieee80211_add_wbrf(local, >conf.def);
+
if (!local->use_chanctx)
local->hw.conf.radar_enabled = ctx->conf.radar_enabled;
@@ -748,6 +755,8 @@ static void ieee80211_del_chanctx(struct ieee80211_local
*local,
}
ieee80211_recalc_idle(local);
+
+ ieee80211_remove_wbrf(local, >conf.def);
}
static void ieee80211_free_chanctx(struct ieee80211_local *local,
diff --git a/net/mac80211/ieee80211_i.h b/net/mac80211/ieee80211_i.h
index 4159fb65038b..fb984ce7038c 100644
--- a/net/mac80211/ieee80211_i.h
+++ b/net/mac80211/ieee80211_i.h
@@ -1591,6 +1591,10 @@ struct ieee80211_local {
/* extended capabilities provided by mac80211 */
u8 ext_capa[8];
+
+#if IS_ENABLED(CONFIG_WBRF)
+ bool wbrf_supported;
+#endif
};
static inline struct ieee80211_sub_if_data *
@@ -2615,4 +2619,19 @@ ieee80211_eht_cap_ie_to_sta_eht_cap(struct
ieee80211_sub_if_data *sdata,
const struct ieee80211_eht_cap_elem
*eht_cap_ie_elem,
u8 eht_cap_len,
struct link_sta_info *link_sta);
+
+#if IS_ENABLED(CONFIG_WBRF)
+void ieee80211_check_wbrf_support(struct ieee80211_local *local);
+void ieee80211_add_wbrf(struct ieee80211_local *local,
+ struct cfg80211_chan_def *chandef);
+void ieee80211_remove_wbrf(struct ieee80211_local *local,
+ struct cfg80211_chan_def *chandef);
+#else
+static inline void ieee80211_check_wbrf_support(struct ieee80211_local *local)
{ }
+static inline void ieee80211_add_wbrf(struct ieee80211_local *local,
+ struct cfg80211_chan_def *chandef) { }
+static inline void ieee80211_remove_wbrf(struct ieee80211_local *local,
+struct cfg80211_chan_def *chandef) { }
+#endif /* CONFIG_WBRF */
+
#endif /* IEEE80211_I_H */
diff --git a/net/mac80211/main.c b/net/mac80211/main.c
index 55cdfaef0f5d..0a55626b1546 100644
--- a/net/mac80211/main.c
+++
[PATCH V7 3/9] cfg80211: expose nl80211_chan_width_to_mhz for wide sharing
The newly added WBRF feature needs this interface for channel
width calculation.
Signed-off-by: Evan Quan
---
include/net/cfg80211.h | 8
net/wireless/chan.c| 3 ++-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index 9e04f69712b1..c6dc337eafce 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -920,6 +920,14 @@ const struct cfg80211_chan_def *
cfg80211_chandef_compatible(const struct cfg80211_chan_def *chandef1,
const struct cfg80211_chan_def *chandef2);
+/**
+ * nl80211_chan_width_to_mhz - get the channel width in Mhz
+ * @chan_width: the channel width from nl80211_chan_width
+ * Return: channel width in Mhz if the chan_width from nl80211_chan_width
+ * is valid. -1 otherwise.
+ */
+int nl80211_chan_width_to_mhz(enum nl80211_chan_width chan_width);
+
/**
* cfg80211_chandef_valid - check if a channel definition is valid
* @chandef: the channel definition to check
diff --git a/net/wireless/chan.c b/net/wireless/chan.c
index 0b7e81db383d..227db04eac42 100644
--- a/net/wireless/chan.c
+++ b/net/wireless/chan.c
@@ -141,7 +141,7 @@ static bool cfg80211_edmg_chandef_valid(const struct
cfg80211_chan_def *chandef)
return true;
}
-static int nl80211_chan_width_to_mhz(enum nl80211_chan_width chan_width)
+int nl80211_chan_width_to_mhz(enum nl80211_chan_width chan_width)
{
int mhz;
@@ -190,6 +190,7 @@ static int nl80211_chan_width_to_mhz(enum
nl80211_chan_width chan_width)
}
return mhz;
}
+EXPORT_SYMBOL(nl80211_chan_width_to_mhz);
static int cfg80211_chandef_get_width(const struct cfg80211_chan_def *c)
{
--
2.34.1
[PATCH V7 2/9] driver core: add ACPI based WBRF mechanism introduced by AMD
AMD has introduced an ACPI based mechanism to support WBRF for some
platforms with AMD dGPU + WLAN. This needs support from BIOS equipped
with necessary AML implementations and dGPU firmwares.
For those systems without the ACPI mechanism and developing solutions,
user can use the generic WBRF solution for diagnosing potential
interference issues.
Co-developed-by: Mario Limonciello
Signed-off-by: Mario Limonciello
Co-developed-by: Evan Quan
Signed-off-by: Evan Quan
--
v4->v5:
- promote this to be a more generic solution with input argument taking
`struct device` and provide better scalability to support non-ACPI
scenarios(Andrew)
- update the APIs naming and some other minor fixes(Rafael)
v5->v6:
- make the code more readable and some other fixes(Andrew)
---
drivers/acpi/Makefile | 2 +
drivers/acpi/amd_wbrf.c | 282 ++
drivers/base/Kconfig | 29
drivers/base/wbrf.c | 41 -
include/linux/acpi_amd_wbrf.h | 24 +++
include/linux/wbrf.h | 2 +
6 files changed, 373 insertions(+), 7 deletions(-)
create mode 100644 drivers/acpi/amd_wbrf.c
create mode 100644 include/linux/acpi_amd_wbrf.h
diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
index feb36c0b9446..94b940ddbf88 100644
--- a/drivers/acpi/Makefile
+++ b/drivers/acpi/Makefile
@@ -131,3 +131,5 @@ obj-y += dptf/
obj-$(CONFIG_ARM64)+= arm64/
obj-$(CONFIG_ACPI_VIOT)+= viot.o
+
+obj-$(CONFIG_WBRF_AMD_ACPI)+= amd_wbrf.o
diff --git a/drivers/acpi/amd_wbrf.c b/drivers/acpi/amd_wbrf.c
new file mode 100644
index ..f79d09c0c535
--- /dev/null
+++ b/drivers/acpi/amd_wbrf.c
@@ -0,0 +1,282 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Wifi Band Exclusion Interface (AMD ACPI Implementation)
+ * Copyright (C) 2023 Advanced Micro Devices
+ *
+ */
+
+#include
+#include
+
+/*
+ * Functions bit vector for WBRF method
+ *
+ * Bit 0: Supported for any functions other than function 0.
+ * Bit 1: Function 1 (Add / Remove frequency) is supported.
+ * Bit 2: Function 2 (Get frequency list) is supported.
+ */
+#define WBRF_SUPPORT_OTHER_FUNCTION0x0
+#define WBRF_RECORD0x1
+#define WBRF_RETRIEVE 0x2
+
+/* record actions */
+#define WBRF_RECORD_ADD0x0
+#define WBRF_RECORD_REMOVE 0x1
+
+#define WBRF_REVISION 0x1
+
+/*
+ * The data structure used for WBRF_RETRIEVE is not natually aligned.
+ * And unfortunately the design has been settled down.
+ */
+struct amd_wbrf_ranges_out {
+ u32 num_of_ranges;
+ struct exclusion_range band_list[MAX_NUM_OF_WBRF_RANGES];
+} __packed;
+
+static const guid_t wifi_acpi_dsm_guid =
+ GUID_INIT(0x7b7656cf, 0xdc3d, 0x4c1c,
+ 0x83, 0xe9, 0x66, 0xe7, 0x21, 0xde, 0x30, 0x70);
+
+static int wbrf_dsm(struct acpi_device *adev, u8 fn,
+ union acpi_object *argv4,
+ union acpi_object **out)
+{
+ union acpi_object *obj;
+ int rc;
+
+ obj = acpi_evaluate_dsm(adev->handle, _acpi_dsm_guid,
+ WBRF_REVISION, fn, argv4);
+ if (!obj)
+ return -ENXIO;
+
+ switch (obj->type) {
+ case ACPI_TYPE_BUFFER:
+ *out = obj;
+ return 0;
+
+ case ACPI_TYPE_INTEGER:
+ rc = obj->integer.value ? -EINVAL : 0;
+ break;
+
+ default:
+ rc = -EOPNOTSUPP;
+ }
+
+ ACPI_FREE(obj);
+
+ return rc;
+}
+
+static int wbrf_record(struct acpi_device *adev, uint8_t action,
+ struct wbrf_ranges_in *in)
+{
+ union acpi_object argv4;
+ union acpi_object *tmp;
+ u32 num_of_ranges = 0;
+ u32 num_of_elements;
+ u32 arg_idx = 0;
+ u32 loop_idx;
+ int ret;
+
+ if (!in)
+ return -EINVAL;
+
+ for (loop_idx = 0; loop_idx < ARRAY_SIZE(in->band_list);
+loop_idx++)
+ if (in->band_list[loop_idx].start &&
+ in->band_list[loop_idx].end)
+ num_of_ranges++;
+
+ /*
+* Every range comes with two end points(start and end) and
+* each of them is accounted as an element. Meanwhile the range
+* count and action type are accounted as an element each.
+* So, the total element count = 2 * num_of_ranges + 1 + 1.
+*/
+ num_of_elements = 2 * num_of_ranges + 1 + 1;
+
+ tmp = kcalloc(num_of_elements, sizeof(*tmp), GFP_KERNEL);
+ if (!tmp)
+ return -ENOMEM;
+
+ argv4.package.type = ACPI_TYPE_PACKAGE;
+ argv4.package.count = num_of_elements;
+ argv4.package.elements = tmp;
+
+ tmp[arg_idx].integer.type = ACPI_TYPE_INTEGER;
+ tmp[arg_idx++].integer.value = num_of_ranges;
+ tmp[arg_idx].integer.type = ACPI_TYPE_INTEGER;
[PATCH V7 1/9] drivers core: Add support for Wifi band RF mitigations
Due to electrical and mechanical constraints in certain platform designs
there may be likely interference of relatively high-powered harmonics of
the (G-)DDR memory clocks with local radio module frequency bands used
by Wifi 6/6e/7.
To mitigate this, AMD has introduced a mechanism that devices can use to
notify active use of particular frequencies so that other devices can make
relative internal adjustments as necessary to avoid this resonance.
In order for a device to support this, the expected flow for device
driver or subsystems:
Drivers/subsystems contributing frequencies:
1) During probe, check `wbrf_supported_producer` to see if WBRF supported
for the device.
2) If adding frequencies, then call `wbrf_add_exclusion` with the
start and end ranges of the frequencies.
3) If removing frequencies, then call `wbrf_remove_exclusion` with
start and end ranges of the frequencies.
Drivers/subsystems responding to frequencies:
1) During probe, check `wbrf_supported_consumer` to see if WBRF is supported
for the device.
2) Call the `wbrf_retrieve_exclusions` to retrieve the current
exclusions on receiving an ACPI notification for a new frequency
change.
Co-developed-by: Mario Limonciello
Signed-off-by: Mario Limonciello
Co-developed-by: Evan Quan
Signed-off-by: Evan Quan
--
v4->v5:
- promote this to be a more generic solution with input argument taking
`struct device` and provide better scalability to support non-ACPI
scenarios(Andrew)
- update the APIs naming and some other minor fixes(Rafael)
v6->v7:
- revised the `struct wbrf_ranges_out` to be naturally aligned(Andrew)
- revised some code comments(Andrew)
---
drivers/base/Kconfig | 8 ++
drivers/base/Makefile | 1 +
drivers/base/wbrf.c | 229 ++
include/linux/wbrf.h | 70 +
4 files changed, 308 insertions(+)
create mode 100644 drivers/base/wbrf.c
create mode 100644 include/linux/wbrf.h
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index 2b8fd6bb7da0..5b441017b225 100644
--- a/drivers/base/Kconfig
+++ b/drivers/base/Kconfig
@@ -242,4 +242,12 @@ config FW_DEVLINK_SYNC_STATE_TIMEOUT
command line option on every system/board your kernel is expected to
work on.
+config WBRF
+ bool "Wifi band RF mitigation mechanism"
+ default n
+ help
+ Wifi band RF mitigation mechanism allows multiple drivers from
+ different domains to notify the frequencies in use so that hardware
+ can be reconfigured to avoid harmonic conflicts.
+
endmenu
diff --git a/drivers/base/Makefile b/drivers/base/Makefile
index 3079bfe53d04..c844f68a6830 100644
--- a/drivers/base/Makefile
+++ b/drivers/base/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_GENERIC_MSI_IRQ) += platform-msi.o
obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY) += arch_topology.o
obj-$(CONFIG_GENERIC_ARCH_NUMA) += arch_numa.o
obj-$(CONFIG_ACPI) += physical_location.o
+obj-$(CONFIG_WBRF) += wbrf.o
obj-y += test/
diff --git a/drivers/base/wbrf.c b/drivers/base/wbrf.c
new file mode 100644
index ..3bc1c31b094e
--- /dev/null
+++ b/drivers/base/wbrf.c
@@ -0,0 +1,229 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Wifi Band Exclusion Interface
+ * Copyright (C) 2023 Advanced Micro Devices
+ *
+ */
+
+#include
+
+static BLOCKING_NOTIFIER_HEAD(wbrf_chain_head);
+static DEFINE_MUTEX(wbrf_mutex);
+static struct exclusion_range_pool wbrf_pool;
+
+static int _wbrf_add_exclusion_ranges(struct wbrf_ranges_in *in)
+{
+ int i, j;
+
+ for (i = 0; i < ARRAY_SIZE(in->band_list); i++) {
+ if (!in->band_list[i].start &&
+ !in->band_list[i].end)
+ continue;
+
+ for (j = 0; j < ARRAY_SIZE(wbrf_pool.band_list); j++) {
+ if (wbrf_pool.band_list[j].start ==
in->band_list[i].start &&
+ wbrf_pool.band_list[j].end == in->band_list[i].end)
{
+ wbrf_pool.ref_counter[j]++;
+ break;
+ }
+ }
+ if (j < ARRAY_SIZE(wbrf_pool.band_list))
+ continue;
+
+ for (j = 0; j < ARRAY_SIZE(wbrf_pool.band_list); j++) {
+ if (!wbrf_pool.band_list[j].start &&
+ !wbrf_pool.band_list[j].end) {
+ wbrf_pool.band_list[j].start =
in->band_list[i].start;
+ wbrf_pool.band_list[j].end =
in->band_list[i].end;
+ wbrf_pool.ref_counter[j] = 1;
+ break;
+ }
+ }
+ if (j >= ARRAY_SIZE(wbrf_pool.band_list))
+ return -ENOSPC;
+ }
+
+ return 0;
+}
+
+static int _wbrf_remove_exclusion_ranges(struct wbrf_ranges_in *in)
+{
+ int i, j;
+
+ for (i = 0; i <
[PATCH V7 0/9] Enable Wifi RFI interference mitigation feature support
Due to electrical and mechanical constraints in certain platform designs there may be likely interference of relatively high-powered harmonics of the (G-)DDR memory clocks with local radio module frequency bands used by Wifi 6/6e/7. To mitigate possible RFI interference producers can advertise the frequencies in use and consumers can use this information to avoid using these frequencies for sensitive features. The whole patch set is based on Linux 6.4. With some brief introductions as below: Patch1 - 2: Core functionality setup for WBRF feature support Patch3 - 4: Bring WBRF support to wifi subsystem. Patch5 - 9: Bring WBRF support to AMD graphics driver. Evan Quan (9): drivers core: Add support for Wifi band RF mitigations driver core: add ACPI based WBRF mechanism introduced by AMD cfg80211: expose nl80211_chan_width_to_mhz for wide sharing wifi: mac80211: Add support for ACPI WBRF drm/amd/pm: update driver_if and ppsmc headers for coming wbrf feature drm/amd/pm: setup the framework to support Wifi RFI mitigation feature drm/amd/pm: add flood detection for wbrf events drm/amd/pm: enable Wifi RFI mitigation feature support for SMU13.0.0 drm/amd/pm: enable Wifi RFI mitigation feature support for SMU13.0.7 drivers/acpi/Makefile | 2 + drivers/acpi/amd_wbrf.c | 282 ++ drivers/base/Kconfig | 37 +++ drivers/base/Makefile | 1 + drivers/base/wbrf.c | 256 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 19 ++ drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 213 + drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 33 ++ .../inc/pmfw_if/smu13_driver_if_v13_0_0.h | 14 +- .../inc/pmfw_if/smu13_driver_if_v13_0_7.h | 14 +- .../pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h | 3 +- .../pm/swsmu/inc/pmfw_if/smu_v13_0_7_ppsmc.h | 3 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 3 + .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c| 9 + .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 60 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 59 drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 3 + include/linux/acpi_amd_wbrf.h | 24 ++ include/linux/ieee80211.h | 1 + include/linux/wbrf.h | 72 + include/net/cfg80211.h| 8 + net/mac80211/Makefile | 2 + net/mac80211/chan.c | 9 + net/mac80211/ieee80211_i.h| 19 ++ net/mac80211/main.c | 2 + net/mac80211/wbrf.c | 103 +++ net/wireless/chan.c | 3 +- 29 files changed, 1252 insertions(+), 6 deletions(-) create mode 100644 drivers/acpi/amd_wbrf.c create mode 100644 drivers/base/wbrf.c create mode 100644 include/linux/acpi_amd_wbrf.h create mode 100644 include/linux/wbrf.h create mode 100644 net/mac80211/wbrf.c -- 2.34.1
RE: [PATCH 2/2] drm/radeon: Prefer dev_warn over printk
[Public]
Looks good.
Reviewed-by: Guchun Chen
Regards,
Guchun
> -Original Message-
> From: amd-gfx On Behalf Of
> Srinivasan Shanmugam
> Sent: Wednesday, July 19, 2023 1:20 PM
> To: Koenig, Christian ; Deucher, Alexander
>
> Cc: Srinivasan Shanmugam partner.google.com>; SHANMUGAM, SRINIVASAN
> ; amd-gfx@lists.freedesktop.org
> Subject: [PATCH 2/2] drm/radeon: Prefer dev_warn over printk
>
> From: Srinivasan Shanmugam partner.google.com>
>
> Fixes the following checkpatch.pl:
>
> WARNING: printk() should include KERN_ facility level
>
> Cc: Christian König
> Cc: Alex Deucher
> Signed-off-by: Srinivasan Shanmugam
> ---
> drivers/gpu/drm/radeon/radeon_atpx_handler.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
> b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
> index d0b450a06506..875a995fff66 100644
> --- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
> +++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
> @@ -115,7 +115,7 @@ static union acpi_object
> *radeon_atpx_call(acpi_handle handle, int function,
>
> /* Fail only if calling the method fails and ATPX is supported */
> if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
> - printk("failed to evaluate ATPX got %s\n",
> + pr_err("failed to evaluate ATPX got %s\n",
> acpi_format_exception(status));
> kfree(buffer.pointer);
> return NULL;
> @@ -171,7 +171,7 @@ static int radeon_atpx_validate(struct radeon_atpx
> *atpx)
>
> size = *(u16 *) info->buffer.pointer;
> if (size < 10) {
> - printk("ATPX buffer is too small: %zu\n", size);
> + pr_err("ATPX buffer is too small: %zu\n", size);
> kfree(info);
> return -EINVAL;
> }
> @@ -202,7 +202,7 @@ static int radeon_atpx_validate(struct radeon_atpx
> *atpx)
>
> atpx->is_hybrid = false;
> if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
> - printk("ATPX Hybrid Graphics\n");
> + pr_info("ATPX Hybrid Graphics\n");
> /*
>* Disable legacy PM methods only when pcie port PM is
> usable,
>* otherwise the device might fail to power off or power on.
> @@ -239,7 +239,7 @@ static int radeon_atpx_verify_interface(struct
> radeon_atpx *atpx)
>
> size = *(u16 *) info->buffer.pointer;
> if (size < 8) {
> - printk("ATPX buffer is too small: %zu\n", size);
> + pr_err("ATPX buffer is too small: %zu\n", size);
> err = -EINVAL;
> goto out;
> }
> @@ -248,7 +248,7 @@ static int radeon_atpx_verify_interface(struct
> radeon_atpx *atpx)
> memcpy(, info->buffer.pointer, size);
>
> /* TODO: check version? */
> - printk("ATPX version %u, functions 0x%08x\n",
> + pr_info("ATPX version %u, functions 0x%08x\n",
> output.version, output.function_bits);
>
> radeon_atpx_parse_functions(>functions,
> output.function_bits);
> --
> 2.25.1
<>
RE: [PATCH] drm/amdgpu: Fix unused variable ‘idx’ in ‘amdgpu_atom_parse’
[Public] Reviewed-by: Guchun Chen > -Original Message- > From: amd-gfx On Behalf Of > Srinivasan Shanmugam > Sent: Wednesday, July 19, 2023 1:29 PM > To: Koenig, Christian ; Deucher, Alexander > > Cc: SHANMUGAM, SRINIVASAN ; > amd-gfx@lists.freedesktop.org > Subject: [PATCH] drm/amdgpu: Fix unused variable ‘idx’ in > ‘amdgpu_atom_parse’ > > drivers/gpu/drm/amd/amdgpu/atom.c: In function ‘amdgpu_atom_parse’: > drivers/gpu/drm/amd/amdgpu/atom.c:1468:6: warning: unused variable > ‘idx’ [-Wunused-variable] > 1468 | u16 idx; > | ^~~ > > Cc: Christian König > Cc: Alex Deucher > Signed-off-by: Srinivasan Shanmugam > --- > drivers/gpu/drm/amd/amdgpu/atom.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/atom.c > b/drivers/gpu/drm/amd/amdgpu/atom.c > index edbb862c1025..9f63ddb89b75 100644 > --- a/drivers/gpu/drm/amd/amdgpu/atom.c > +++ b/drivers/gpu/drm/amd/amdgpu/atom.c > @@ -1465,7 +1465,6 @@ struct atom_context *amdgpu_atom_parse(struct > card_info *card, void *bios) > struct _ATOM_ROM_HEADER *atom_rom_header; > struct _ATOM_MASTER_DATA_TABLE *master_table; > struct _ATOM_FIRMWARE_INFO *atom_fw_info; > - u16 idx; > > if (!ctx) > return NULL; > -- > 2.25.1 <>
RE: [PATCH 1/2] drm/amd/display: Convert macros to functions in amdgpu_display.c & amdgpu_display.h
[Public]
Instead of converting all to functions, below improvement may be a bit more
simple. Can you please double check?
-#define amdgpu_display_vblank_get_counter(adev, crtc)
(adev)->mode_info.funcs->vblank_get_counter((adev), (crtc))
+#define amdgpu_display_vblank_get_counter(_adev, crtc) \
+ ({typeof(_adev) (adev) = (_adev); \
+ (adev)->mode_info.funcs->vblank_get_counter((adev), (crtc));})
Regards,
Guchun
> -Original Message-
> From: amd-gfx On Behalf Of
> Srinivasan Shanmugam
> Sent: Wednesday, July 19, 2023 1:20 PM
> To: Koenig, Christian ; Deucher, Alexander
>
> Cc: SHANMUGAM, SRINIVASAN ;
> amd-gfx@lists.freedesktop.org
> Subject: [PATCH 1/2] drm/amd/display: Convert macros to functions in
> amdgpu_display.c & amdgpu_display.h
>
> Convert macros to functions to fix the following & for better readability:
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:26: Macro argument
> reuse 'adev' - possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:32: Macro argument
> reuse 'adev' - possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:34: Macro argument
> reuse 'adev' - possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:36: Macro argument
> reuse 'adev' - possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:38: Macro argument
> reuse 'adev' - possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:40: Macro argument
> reuse 'adev' - possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:42: Macro argument
> reuse 'adev' - possible side-effects?
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.h:44: Macro argument
> reuse 'adev' - possible side-effects?
>
> And other warnings:
>
> WARNING: Block comments use * on subsequent lines
> WARNING: Block comments use a trailing */ on a separate line
> WARNING: suspect code indent for conditional statements (8, 12)
> WARNING: braces {} are not necessary for single statement blocks
>
> Cc: Christian König
> Cc: Alex Deucher
> Signed-off-by: Srinivasan Shanmugam
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 118
> +--- drivers/gpu/drm/amd/amdgpu/amdgpu_display.h |
> 46 ++--
> 2 files changed, 136 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index b702f499f5fb..6eea92cef97c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -45,6 +45,82 @@
> #include
> #include
>
> +u32 amdgpu_display_vblank_get_counter(struct amdgpu_device *adev, int
> +crtc) {
> + return (adev)->mode_info.funcs->vblank_get_counter((adev),
> (crtc)); }
> +
> +void amdgpu_display_backlight_set_level(struct amdgpu_device *adev,
> + struct amdgpu_encoder
> *amdgpu_encoder,
> + u8 level)
> +{
> + (adev)->mode_info.funcs->backlight_set_level((amdgpu_encoder),
> +(level)); }
> +
> +u8 amdgpu_display_backlight_get_level(struct amdgpu_device *adev,
> + struct amdgpu_encoder
> *amdgpu_encoder) {
> + return (adev)->mode_info.funcs-
> >backlight_get_level(amdgpu_encoder);
> +}
> +
> +bool amdgpu_display_hpd_sense(struct amdgpu_device *adev,
> + enum amdgpu_hpd_id hpd)
> +{
> + return (adev)->mode_info.funcs->hpd_sense((adev), (hpd)); }
> +
> +void amdgpu_display_hpd_set_polarity(struct amdgpu_device *adev,
> + enum amdgpu_hpd_id hpd)
> +{
> + (adev)->mode_info.funcs->hpd_set_polarity((adev), (hpd)); }
> +
> +u32 amdgpu_display_hpd_get_gpio_reg(struct amdgpu_device *adev) {
> + return (adev)->mode_info.funcs->hpd_get_gpio_reg(adev);
> +}
> +
> +void amdgpu_display_bandwidth_update(struct amdgpu_device *adev) {
> + (adev)->mode_info.funcs->bandwidth_update(adev);
> +}
> +
> +void amdgpu_display_page_flip(struct amdgpu_device *adev,
> + int crtc_id, u64 crtc_base,
> + bool async)
> +{
> + (adev)->mode_info.funcs->page_flip((adev), (crtc_id), (crtc_base),
> +(async)); }
> +
> +int amdgpu_display_page_flip_get_scanoutpos(struct amdgpu_device
> *adev, int crtc,
> + u32 *vbl, u32 *pos)
> +{
> + return (adev)->mode_info.funcs->page_flip_get_scanoutpos((adev),
> +(crtc), (vbl), (pos)); }
> +
> +void amdgpu_display_add_encoder(struct amdgpu_device *adev,
> + u32 encoder_enum,
> + u32 supported_device,
> + u16 caps)
> +{
> + (adev)->mode_info.funcs->add_encoder((adev), (encoder_enum),
> +(supported_device), (caps)); }
> +
> +void amdgpu_display_add_connector(struct amdgpu_device *adev,
> + u32 connector_id,
> + u32 supported_device,
> + int
Re: [PATCH] drm/amd: Fix an error handling mistake in psp_sw_init()
On 7/19/2023 1:34 AM, Limonciello, Mario wrote:
[Public]
[Public]
-Original Message-
From: Limonciello, Mario
Sent: Thursday, July 13, 2023 00:15
To: amd-gfx@lists.freedesktop.org
Cc: Limonciello, Mario
Subject: [PATCH] drm/amd: Fix an error handling mistake in psp_sw_init()
If the second call to amdgpu_bo_create_kernel() fails, the memory
allocated from the first call should be cleared. If the third call
fails, the memory from the second call should be cleared.
Fixes: b95b5391684b ("drm/amdgpu/psp: move PSP memory alloc from
hw_init to sw_init")
Signed-off-by: Mario Limonciello
Ping on this one.
Reviewed-by: Lijo Lazar
Thanks,
Lijo
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 1b4d5f04d968..6ffc1a640d2d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -491,11 +491,11 @@ static int psp_sw_init(void *handle)
return 0;
failed2:
- amdgpu_bo_free_kernel(>fw_pri_bo,
- >fw_pri_mc_addr, >fw_pri_buf);
-failed1:
amdgpu_bo_free_kernel(>fence_buf_bo,
>fence_buf_mc_addr, >fence_buf);
+failed1:
+ amdgpu_bo_free_kernel(>fw_pri_bo,
+ >fw_pri_mc_addr, >fw_pri_buf);
return ret;
}
--
2.34.1
