Re: [PATCH v2] drm/amdgpu: register a dirty framebuffer callback for fbcon

[Christian König]

Am 15.08.23 um 19:26 schrieb Hamza Mahfooz:

fbcon requires that we implement _framebuffer_funcs.dirty.
Otherwise, the framebuffer might take a while to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon cases since it might cause too many atomic commits to be made
at once. So, implement amdgpu_dirtyfb() and only enable it for fbcon
framebuffers on devices that support atomic KMS.

Cc: Aurabindo Pillai 
Cc: Mario Limonciello 
Cc: sta...@vger.kernel.org # 6.1+
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2519
Signed-off-by: Hamza Mahfooz 
---
v2: update variable names
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 26 -
  1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index d20dd3f852fc..d3b59f99cb7c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -38,6 +38,8 @@
  #include 
  #include 
  #include 
+#include 
+#include 
  #include 
  #include 
  #include 
@@ -532,11 +534,29 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector 
*amdgpu_connector,
return true;
  }
  
+static int amdgpu_dirtyfb(struct drm_framebuffer *fb, struct drm_file *file,

+ unsigned int flags, unsigned int color,
+ struct drm_clip_rect *clips, unsigned int num_clips)
+{
+
+   if (strcmp(fb->comm, "[fbcon]"))
+   return -ENOSYS;


Once more to the v2 of this patch: Tests like those are a pretty big 
NO-GO for upstreaming.


Regards,
Christian.


+
+   return drm_atomic_helper_dirtyfb(fb, file, flags, color, clips,
+num_clips);
+}
+
  static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
.destroy = drm_gem_fb_destroy,
.create_handle = drm_gem_fb_create_handle,
  };
  
+static const struct drm_framebuffer_funcs amdgpu_fb_funcs_atomic = {

+   .destroy = drm_gem_fb_destroy,
+   .create_handle = drm_gem_fb_create_handle,
+   .dirty = amdgpu_dirtyfb
+};
+
  uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
  uint64_t bo_flags)
  {
@@ -1139,7 +1159,11 @@ static int amdgpu_display_gem_fb_verify_and_init(struct 
drm_device *dev,
if (ret)
goto err;
  
-	ret = drm_framebuffer_init(dev, >base, _fb_funcs);

+   if (drm_drv_uses_atomic_modeset(dev))
+   ret = drm_framebuffer_init(dev, >base,
+  _fb_funcs_atomic);
+   else
+   ret = drm_framebuffer_init(dev, >base, _fb_funcs);
  
  	if (ret)

goto err;

Re: [PATCH] drm/amdgpu: register a dirty framebuffer callback for fbcon

[Christian König]

Am 15.08.23 um 19:10 schrieb Hamza Mahfooz:

fbcon requires that we implement _framebuffer_funcs.dirty.
Otherwise, the framebuffer might take awhile to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon cases since it might cause too many atomic commits to be made
at once. So, implement amdgpu_dirtyfb() and only enable it for fbcon
framebuffers on devices that support atomic KMS.

Cc: Aurabindo Pillai 
Cc: Mario Limonciello 
Cc: sta...@vger.kernel.org # 6.1+
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2519
Signed-off-by: Hamza Mahfooz 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 26 -
  1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index d20dd3f852fc..743db9aee68c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -38,6 +38,8 @@
  #include 
  #include 
  #include 
+#include 
+#include 
  #include 
  #include 
  #include 
@@ -532,11 +534,29 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector 
*amdgpu_connector,
return true;
  }
  
+static int amdgpu_dirtyfb(struct drm_framebuffer *fb, struct drm_file *file,

+ unsigned int flags, unsigned int color,
+ struct drm_clip_rect *clips, unsigned int num_clips)
+{
+
+   if (strcmp(framebuffer->comm, "[fbcon]"))
+   return -ENOSYS;


Checks like this are a pretty big NO-GO.

I'm not an expert for the display stuff, but in general this here looks 
like a pretty ugly hack.


Regards,
Christian.


+
+   return drm_atomic_helper_dirtyfb(framebuffer, file_priv, flags, color,
+clips, num_clips);
+}
+
  static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
.destroy = drm_gem_fb_destroy,
.create_handle = drm_gem_fb_create_handle,
  };
  
+static const struct drm_framebuffer_funcs amdgpu_fb_funcs_atomic = {

+   .destroy = drm_gem_fb_destroy,
+   .create_handle = drm_gem_fb_create_handle,
+   .dirty = amdgpu_dirtyfb
+};
+
  uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
  uint64_t bo_flags)
  {
@@ -1139,7 +1159,11 @@ static int amdgpu_display_gem_fb_verify_and_init(struct 
drm_device *dev,
if (ret)
goto err;
  
-	ret = drm_framebuffer_init(dev, >base, _fb_funcs);

+   if (drm_drv_uses_atomic_modeset(dev))
+   ret = drm_framebuffer_init(dev, >base,
+  _fb_funcs_atomic);
+   else
+   ret = drm_framebuffer_init(dev, >base, _fb_funcs);
  
  	if (ret)

goto err;

RE: [PATCH] drm/amdgpu: Keep reset handlers shared

[Lazar, Lijo]

[AMD Official Use Only - General]



Thanks,
Lijo

-Original Message-
From: amd-gfx  On Behalf Of Lijo Lazar
Sent: Thursday, August 10, 2023 5:14 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Kamal, Asad 
; Zhang, Hawking 
Subject: [PATCH] drm/amdgpu: Keep reset handlers shared

Instead of maintaining a list per device, keep the reset handlers common per 
ASIC family. A pointer to the list of handlers is maintained in reset control.

Signed-off-by: Lijo Lazar 
---
 drivers/gpu/drm/amd/amdgpu/aldebaran.c  | 19 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c   |  8 
 drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h   | 16 
 drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c | 20 +++-
 drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c   | 19 +++
 5 files changed, 45 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/aldebaran.c 
b/drivers/gpu/drm/amd/amdgpu/aldebaran.c
index 2b97b8a96fb4..82e1c83a7ccc 100644
--- a/drivers/gpu/drm/amd/amdgpu/aldebaran.c
+++ b/drivers/gpu/drm/amd/amdgpu/aldebaran.c
@@ -48,20 +48,19 @@ aldebaran_get_reset_handler(struct amdgpu_reset_control 
*reset_ctl,  {
struct amdgpu_reset_handler *handler;
struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle;
+   int i;

if (reset_context->method != AMD_RESET_METHOD_NONE) {
dev_dbg(adev->dev, "Getting reset handler for method %d\n",
reset_context->method);
-   list_for_each_entry(handler, _ctl->reset_handlers,
-handler_list) {
+   for_each_handler(i, handler, reset_ctl) {
if (handler->reset_method == reset_context->method)
return handler;
}
}

if (aldebaran_is_mode2_default(reset_ctl)) {
-   list_for_each_entry(handler, _ctl->reset_handlers,
-handler_list) {
+   for_each_handler(i, handler, reset_ctl) {
if (handler->reset_method == AMD_RESET_METHOD_MODE2) {
reset_context->method = AMD_RESET_METHOD_MODE2;
return handler;
@@ -124,9 +123,9 @@ static void aldebaran_async_reset(struct work_struct *work)
struct amdgpu_reset_control *reset_ctl =
container_of(work, struct amdgpu_reset_control, reset_work);
struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle;
+   int i;

-   list_for_each_entry(handler, _ctl->reset_handlers,
-handler_list) {
+   for_each_handler(i, handler, reset_ctl) {
if (handler->reset_method == reset_ctl->active_reset) {
dev_dbg(adev->dev, "Resetting device\n");
handler->do_reset(adev);
@@ -395,6 +394,11 @@ static struct amdgpu_reset_handler aldebaran_mode2_handler 
= {
.do_reset   = aldebaran_mode2_reset,
 };

+static struct amdgpu_reset_handler
+   *aldebaran_rst_handlers[AMDGPU_RESET_MAX_HANDLERS] = {
+   _mode2_handler,
+   };
+
 int aldebaran_reset_init(struct amdgpu_device *adev)  {
struct amdgpu_reset_control *reset_ctl; @@ -408,10 +412,9 @@ int 
aldebaran_reset_init(struct amdgpu_device *adev)
reset_ctl->active_reset = AMD_RESET_METHOD_NONE;
reset_ctl->get_reset_handler = aldebaran_get_reset_handler;

-   INIT_LIST_HEAD(_ctl->reset_handlers);
INIT_WORK(_ctl->reset_work, reset_ctl->async_reset);
/* Only mode2 is handled through reset control now */
-   amdgpu_reset_add_handler(reset_ctl, _mode2_handler);
+   reset_ctl->reset_handlers = _rst_handlers;

adev->reset_cntl = reset_ctl;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
index 5fed06ffcc6b..02d874799c16 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
@@ -26,14 +26,6 @@
 #include "sienna_cichlid.h"
 #include "smu_v13_0_10.h"

-int amdgpu_reset_add_handler(struct amdgpu_reset_control *reset_ctl,
-struct amdgpu_reset_handler *handler)
-{
-   /* TODO: Check if handler exists? */
-   list_add_tail(>handler_list, _ctl->reset_handlers);
-   return 0;
-}
-
 int amdgpu_reset_init(struct amdgpu_device *adev)  {
int ret = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
index f4a501ff87d9..471d789b33a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
@@ -26,6 +26,8 @@

 #include "amdgpu.h"

+#define AMDGPU_RESET_MAX_HANDLERS 5
+
 enum AMDGPU_RESET_FLAGS {

AMDGPU_NEED_FULL_RESET = 0,
@@ -44,7 +46,6 @@ struct amdgpu_reset_context {

 struct amdgpu_reset_handler {
enum 

RE: [PATCH] drm/amdgpu: Remove gfxoff check in GFX v9.4.3

[Lazar, Lijo]

[AMD Official Use Only - General]

Sorry, for the spam. Please ignore this.

Thanks,
Lijo

-Original Message-
From: amd-gfx  On Behalf Of Lijo Lazar
Sent: Wednesday, August 16, 2023 9:37 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; s...@canb.auug.org.au; 
airl...@redhat.com; dri-de...@lists.freedesktop.org; Zhang, Hawking 

Subject: [PATCH] drm/amdgpu: Remove gfxoff check in GFX v9.4.3

GFXOFF feature is not there for GFX 9.4.3 ASICs.

Signed-off-by: Lijo Lazar 
Reviewed-by: Hawking Zhang 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index d8d6807e7b96..57ed4e5c294c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -337,13 +337,11 @@ static uint64_t gfx_v9_4_3_get_gpu_clock_counter(struct 
amdgpu_device *adev)  {
uint64_t clock;

-   amdgpu_gfx_off_ctrl(adev, false);
mutex_lock(>gfx.gpu_clock_mutex);
WREG32_SOC15(GC, GET_INST(GC, 0), regRLC_CAPTURE_GPU_CLOCK_COUNT, 1);
clock = (uint64_t)RREG32_SOC15(GC, GET_INST(GC, 0), 
regRLC_GPU_CLOCK_COUNT_LSB) |
((uint64_t)RREG32_SOC15(GC, GET_INST(GC, 0), 
regRLC_GPU_CLOCK_COUNT_MSB) << 32ULL);
mutex_unlock(>gfx.gpu_clock_mutex);
-   amdgpu_gfx_off_ctrl(adev, true);

return clock;
 }
--
2.25.1

RE: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC support

[Lazar, Lijo]

[Public]

Hi Bokun,

Originally the call back is meant to enable fast UCLK switching based on 
display configuration. We can reuse the same interface to notify PMFW for any 
display related configuration. smu_v13_0_notify_display_change looks to be 
copied from smuv11, but not really used now. I think the existing 
implementation can be dropped altogether.

Thanks,
Lijo

From: Zhang, Bokun 
Sent: Tuesday, August 15, 2023 11:52 PM
To: Lazar, Lijo ; Deucher, Alexander 
; amd-gfx@lists.freedesktop.org
Cc: Quan, Evan 
Subject: RE: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC 
support


[Public]

Hey Lijo,
I have considered to combine the function. However notify_display_change() may 
serve for another purpose as mentioned in the comment:

/**
* @notify_display_change: Enable fast memory clock switching.
*
* Allows for fine grained memory clock switching but has more 
stringent
* timing requirements.
*/

This function is implemented as smu_v13_0_notify_display_change() for SMU 13, 
but not included in smu_v13_0_0_ppt_funcs struct and therefore not called at 
the moment.
I am not completely sure about the purpose of smu_v13_0_notify_display_change().
If it makes sense to combine them, I can make the change accordingly. But I 
would like to know if I should add a new function 
smu_v13_0_0_notify_display_change, or extend smu_v13_0_notify_display_change() 
and add it to smu_v13_0_0_ppt_funcs.

Thanks!


From: Lazar, Lijo mailto:lijo.la...@amd.com>>
Sent: Tuesday, August 15, 2023 2:03 PM
To: Deucher, Alexander 
mailto:alexander.deuc...@amd.com>>; Zhang, Bokun 
mailto:bokun.zh...@amd.com>>; 
amd-gfx@lists.freedesktop.org
Cc: Zhang, Bokun mailto:bokun.zh...@amd.com>>; Quan, Evan 
mailto:evan.q...@amd.com>>
Subject: Re: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC 
support


[Public]

There's already another smu callback - notify_display. This can be accommodated 
there, no need to add another callback.

Thanks,
Lijo

From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Deucher, Alexander 
mailto:alexander.deuc...@amd.com>>
Sent: Tuesday, August 15, 2023 11:13:14 PM
To: Zhang, Bokun mailto:bokun.zh...@amd.com>>; 
amd-gfx@lists.freedesktop.org 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Zhang, Bokun mailto:bokun.zh...@amd.com>>; Quan, Evan 
mailto:evan.q...@amd.com>>
Subject: RE: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC 
support

[Public]

[Public]

> -Original Message-
> From: amd-gfx 
> mailto:amd-gfx-boun...@lists.freedesktop.org>>
>  On Behalf Of Bokun
> Zhang
> Sent: Tuesday, August 15, 2023 11:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Bokun mailto:bokun.zh...@amd.com>>; Quan, Evan
> mailto:evan.q...@amd.com>>
> Subject: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC
> support
>
> - There is a DPM issue where if DC is not present,
>   FCLK will stay at low level.
>   We need to send a SMU message to configure the DPM
>
> Reviewed-by: Evan Quan mailto:evan.q...@amd.com>>
> Signed-off-by: Bokun Zhang mailto:bokun.zh...@amd.com>>
> ---
>  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c  | 6 ++
>  drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h  | 5 +
>  .../gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h   | 5
> -
>  drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h   | 3 ++-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c   | 7
> +++
>  drivers/gpu/drm/amd/pm/swsmu/smu_internal.h| 1 +
>  6 files changed, 25 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index f005a90c35af..c65bebdbec11 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -1410,6 +1410,12 @@ static int smu_smc_hw_setup(struct
> smu_context *smu)
>   return ret;
>   }
>
> + if (!amdgpu_device_has_dc_support(adev)) {
> + ret = smu_notify_no_dc(smu);
> + if (ret)
> + dev_warn(adev->dev, "Failed to notify no dc support,
> driver may not reach best performance\n");
> + }
> +
>   /*
>* Set min deep sleep dce fclk with bootup value from vbios via
>* SetMinDeepSleepDcefclk MSG.
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> index 6e2069dcb6b9..c8fdc3d0aa25 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> @@ -1356,6 +1356,11 @@ struct pptable_funcs {
>* @init_pptable_microcode: Prepare the pptable microcode to upload
> via PSP
>*/
>   int 

[PATCH] drm/amdgpu: Remove gfxoff check in GFX v9.4.3

[Lijo Lazar]

GFXOFF feature is not there for GFX 9.4.3 ASICs.

Signed-off-by: Lijo Lazar 
Reviewed-by: Hawking Zhang 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index d8d6807e7b96..57ed4e5c294c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -337,13 +337,11 @@ static uint64_t gfx_v9_4_3_get_gpu_clock_counter(struct 
amdgpu_device *adev)
 {
uint64_t clock;
 
-   amdgpu_gfx_off_ctrl(adev, false);
mutex_lock(>gfx.gpu_clock_mutex);
WREG32_SOC15(GC, GET_INST(GC, 0), regRLC_CAPTURE_GPU_CLOCK_COUNT, 1);
clock = (uint64_t)RREG32_SOC15(GC, GET_INST(GC, 0), 
regRLC_GPU_CLOCK_COUNT_LSB) |
((uint64_t)RREG32_SOC15(GC, GET_INST(GC, 0), 
regRLC_GPU_CLOCK_COUNT_MSB) << 32ULL);
mutex_unlock(>gfx.gpu_clock_mutex);
-   amdgpu_gfx_off_ctrl(adev, true);
 
return clock;
 }
-- 
2.25.1

[PATCH] Documentation/gpu: Update amdgpu documentation

[Lijo Lazar]

7957ec80ef97 ("drm/amdgpu: Add FRU sysfs nodes only if needed") moved
the documentation for some of the sysfs nodes to amdgpu_fru_eeprom.c.
Update the documentation accordingly.

Signed-off-by: Lijo Lazar 
---
 Documentation/gpu/amdgpu/driver-misc.rst | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Documentation/gpu/amdgpu/driver-misc.rst 
b/Documentation/gpu/amdgpu/driver-misc.rst
index be131e963d87..26334e54447b 100644
--- a/Documentation/gpu/amdgpu/driver-misc.rst
+++ b/Documentation/gpu/amdgpu/driver-misc.rst
@@ -11,19 +11,19 @@ via sysfs
 product_name
 
 
-.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
:doc: product_name
 
 product_number
 --
 
-.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
:doc: product_name
 
 serial_number
 -
 
-.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
:doc: serial_number
 
 unique_id
-- 
2.25.1

RE: [PATCH] drm/amdgpu: Enable ras for mp0 v13_0_6 sriov

[Yang, Stanley]

[AMD Official Use Only - General]

Reviewed-by: Stanley.Yang 

Regards,
Stanley
> -Original Message-
> From: Chai, Thomas 
> Sent: Wednesday, August 16, 2023 10:26 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Li,
> Candice ; Yang, Stanley ;
> Chai, Thomas 
> Subject: [PATCH] drm/amdgpu: Enable ras for mp0 v13_0_6 sriov
>
> Enable ras for mp0 v13_0_6 sriov
>
> Signed-off-by: YiPeng Chai 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 7689395e44fd..378478cf9c21 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -2399,6 +2399,7 @@ static bool amdgpu_ras_asic_supported(struct
> amdgpu_device *adev)
>   if (amdgpu_sriov_vf(adev)) {
>   switch (adev->ip_versions[MP0_HWIP][0]) {
>   case IP_VERSION(13, 0, 2):
> + case IP_VERSION(13, 0, 6):
>   return true;
>   default:
>   return false;
> --
> 2.34.1

[PATCH] drm/amdgpu: Enable ras for mp0 v13_0_6 sriov

[YiPeng Chai]

Enable ras for mp0 v13_0_6 sriov

Signed-off-by: YiPeng Chai 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 7689395e44fd..378478cf9c21 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2399,6 +2399,7 @@ static bool amdgpu_ras_asic_supported(struct 
amdgpu_device *adev)
if (amdgpu_sriov_vf(adev)) {
switch (adev->ip_versions[MP0_HWIP][0]) {
case IP_VERSION(13, 0, 2):
+   case IP_VERSION(13, 0, 6):
return true;
default:
return false;
-- 
2.34.1

[linux-next:master] BUILD REGRESSION 98297fc6ecafc0c7eabc5d869279fb27609fcdc1

[kernel test robot]

tree/branch: 
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 98297fc6ecafc0c7eabc5d869279fb27609fcdc1  Add linux-next specific 
files for 20230815

Error/Warning reports:

https://lore.kernel.org/oe-kbuild-all/202308081459.us5rlyay-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202308111853.isf5a6vc-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202308111926.gyjautn4-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202308112307.tpmybd3l-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202308112326.ajavwcoc-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202308160339.zgeogvdn-...@intel.com

Error/Warning: (recently discovered and may have been fixed)

../lib/gcc/loongarch64-linux/12.3.0/plugin/include/config/loongarch/loongarch-opts.h:31:10:
 fatal error: loongarch-def.h: No such file or directory
arch/loongarch/kernel/asm-offsets.c:172:6: warning: no previous prototype for 
'output_thread_lbt_defines' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_replay.c:37: warning: This 
comment starts with '/**', but isn't a kernel-doc comment. Refer 
Documentation/doc-guide/kernel-doc.rst
drivers/gpu/drm/drm_gpuva_mgr.c:1079:39: warning: variable 'prev' set but not 
used [-Wunused-but-set-variable]
drivers/gpu/drm/tests/drm_kunit_helpers.c:172: warning: expecting prototype for 
drm_kunit_helper_context_alloc(). Prototype was for 
drm_kunit_helper_acquire_ctx_alloc() instead
drivers/video/backlight/lp855x_bl.c:252:11: warning: variable 'ret' is used 
uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
drivers/video/backlight/lp855x_bl.c:252:7: warning: variable 'ret' is used 
uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
drivers/watchdog/xilinx_wwdt.c:74: undefined reference to `__udivdi3'
include/linux/build_bug.h:16:51: error: bit-field '' width not an 
integer constant
kernel/rcu/update.c:529:6: warning: no previous prototype for 
'torture_sched_setaffinity' [-Wmissing-prototypes]
kernel/rcu/update.c:529:6: warning: no previous prototype for function 
'torture_sched_setaffinity' [-Wmissing-prototypes]
make[3]: *** No rule to make target 'rustdoc'.

Unverified Error/Warning (likely false positive, please contact us if 
interested):

lib/crypto/mpi/mpi-inv.c:34:15: warning: variable 'k' set but not used 
[-Wunused-but-set-variable]
sh4-linux-gcc: internal compiler error: Segmentation fault signal terminated 
program cc1
{standard input}: Warning: end of file not at end of a line; newline inserted
{standard input}:927: Error: pcrel too far

Error/Warning ids grouped by kconfigs:

gcc_recent_errors
|-- alpha-allyesconfig
|   |-- 
drivers-gpu-drm-amd-amdgpu-..-display-dc-dce-dmub_replay.c:warning:This-comment-starts-with-but-isn-t-a-kernel-doc-comment.-Refer-Documentation-doc-guide-kernel-doc.rst
|   |-- drivers-gpu-drm-drm_gpuva_mgr.c:warning:variable-prev-set-but-not-used
|   |-- 
drivers-gpu-drm-tests-drm_kunit_helpers.c:warning:expecting-prototype-for-drm_kunit_helper_context_alloc().-Prototype-was-for-drm_kunit_helper_acquire_ctx_alloc()-instead
|   `-- 
kernel-rcu-update.c:warning:no-previous-prototype-for-torture_sched_setaffinity
|-- alpha-randconfig-r006-20230815
|   |-- drivers-gpu-drm-drm_gpuva_mgr.c:warning:variable-prev-set-but-not-used
|   |-- 
drivers-gpu-drm-tests-drm_kunit_helpers.c:warning:expecting-prototype-for-drm_kunit_helper_context_alloc().-Prototype-was-for-drm_kunit_helper_acquire_ctx_alloc()-instead
|   `-- 
kernel-rcu-update.c:warning:no-previous-prototype-for-torture_sched_setaffinity
|-- alpha-randconfig-r021-20230815
|   `-- 
kernel-rcu-update.c:warning:no-previous-prototype-for-torture_sched_setaffinity
|-- arc-allyesconfig
|   |-- 
drivers-gpu-drm-amd-amdgpu-..-display-dc-dce-dmub_replay.c:warning:This-comment-starts-with-but-isn-t-a-kernel-doc-comment.-Refer-Documentation-doc-guide-kernel-doc.rst
|   |-- drivers-gpu-drm-drm_gpuva_mgr.c:warning:variable-prev-set-but-not-used
|   |-- 
drivers-gpu-drm-tests-drm_kunit_helpers.c:warning:expecting-prototype-for-drm_kunit_helper_context_alloc().-Prototype-was-for-drm_kunit_helper_acquire_ctx_alloc()-instead
|   `-- 
kernel-rcu-update.c:warning:no-previous-prototype-for-torture_sched_setaffinity
|-- arc-randconfig-r043-20230815
|   `-- 
kernel-rcu-update.c:warning:no-previous-prototype-for-torture_sched_setaffinity
|-- arm-allmodconfig
|   |-- 
drivers-gpu-drm-amd-amdgpu-..-display-dc-dce-dmub_replay.c:warning:This-comment-starts-with-but-isn-t-a-kernel-doc-comment.-Refer-Documentation-doc-guide-kernel-doc.rst
|   |-- drivers-gpu-drm-drm_gpuva_mgr.c:warning:variable-prev-set-but-not-used
|   |-- 
drivers-gpu-drm-tests-drm_kunit_helpers.c:warning:expecting-prototype-for-drm_kunit_helper_context_alloc().-Prototype-was-for-drm_kunit_helper_acquire_ctx_alloc()-instead
|   `-- 
kernel-rcu-update.c:warning:no-previous-prototype-for-torture_sched_setaffinity
|-- arm-allyesconfig
|   |-- 
drivers-gpu-drm-amd-amdgpu

RE: [PATCH] drm/amd/pm: allow the user to force BACO on smu v13.0.0/7

[Feng, Kenneth]

[AMD Official Use Only - General]

Hi Alex,
Right, just BAMACO has its advantage for the fast resume.
Maybe later we can further identify which sku needs to save more power vs 
faster resume time.
For example, mobile device can by default use BACO and desktop/workstation 
device can by default use BAMACO.
Thanks.


-Original Message-
From: Alex Deucher 
Sent: Wednesday, August 16, 2023 12:56 AM
To: Feng, Kenneth 
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/pm: allow the user to force BACO on smu v13.0.0/7

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.


On Tue, Aug 15, 2023 at 5:05 AM Kenneth Feng  wrote:
>
> allow the user to force BACO on smu v13.0.0/7
>
> Signed-off-by: Kenneth Feng 

Acked-by: Alex Deucher  Would it be better to 
default to BACO?  It would save more power at the expense of resume latency.

Alex


> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c   | 2 +-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 3 ++-
> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 3 ++-
>  3 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> index 895cda8e6934..52e9c7611013 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> @@ -2263,7 +2263,7 @@ int smu_v13_0_baco_set_state(struct smu_context *smu,
> if (state == SMU_BACO_STATE_ENTER) {
> ret = smu_cmn_send_smc_msg_with_param(smu,
>   SMU_MSG_EnterBaco,
> - smu_baco->maco_support ?
> + (smu_baco->maco_support 
> && amdgpu_runtime_pm != 1) ?
>   BACO_SEQ_BAMACO : 
> BACO_SEQ_BACO,
>   NULL);
> } else {
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> index a5857acee641..12ccc12657d7 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> @@ -2211,7 +2211,8 @@ static int smu_v13_0_0_baco_enter(struct
> smu_context *smu)
>
> if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev))
> return smu_v13_0_baco_set_armd3_sequence(smu,
> -   smu_baco->maco_support ? BACO_SEQ_BAMACO : 
> BACO_SEQ_BACO);
> +   (smu_baco->maco_support && amdgpu_runtime_pm 
> != 1) ?
> +   BACO_SEQ_BAMACO :
> + BACO_SEQ_BACO);
> else
> return smu_v13_0_baco_enter(smu);  } diff --git
> a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
> index 93b3e8fa8238..f0bcc7995983 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
> @@ -2139,7 +2139,8 @@ static int smu_v13_0_7_baco_enter(struct
> smu_context *smu)
>
> if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev))
> return smu_v13_0_baco_set_armd3_sequence(smu,
> -   smu_baco->maco_support ? BACO_SEQ_BAMACO : 
> BACO_SEQ_BACO);
> +   (smu_baco->maco_support && amdgpu_runtime_pm 
> != 1) ?
> +   BACO_SEQ_BAMACO :
> + BACO_SEQ_BACO);
> else
> return smu_v13_0_baco_enter(smu);  }
> --
> 2.34.1
>

[PATCH] Revert "Revert "drm/amdgpu/display: change pipe policy for DCN 2.0""

[Alex Deucher]

This reverts commit 27dd79c00aeab36cd7542c7a4481a32549038659.

It appears MPC_SPLIT_DYNAMIC still causes problems with multiple
displays on DCN2.0 hardware.  Switch back to MPC_SPLIT_AVOID_MULT_DISP.
This increases power usage with multiple displays, but avoids hangs.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2475
Cc: Rodrigo Siqueira 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index dfecb9602f49..000fe96203c4 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -712,7 +712,7 @@ static const struct dc_debug_options debug_defaults_drv = {
.timing_trace = false,
.clock_trace = true,
.disable_pplib_clock_request = true,
-   .pipe_split_policy = MPC_SPLIT_DYNAMIC,
+   .pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
.force_single_disp_pipe_split = false,
.disable_dcc = DCC_ENABLE,
.vsr_support = true,
-- 
2.41.0

[PATCH v4 4/4] drm/amdgpu: Create version number for coredumps

[André Almeida]

Even if there's nothing currently parsing amdgpu's coredump files, if
we eventually have such tools they will be glad to find a version field
to properly read the file.

Create a version number to be displayed on top of coredump file, to be
incremented when the file format or content get changed.

Signed-off-by: André Almeida 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
index 46c8d6ce349c..6696ff0a94af 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
@@ -192,6 +192,7 @@ static ssize_t amdgpu_devcoredump_read(char *buffer, loff_t 
offset,
p = drm_coredump_printer();
 
drm_printf(, " AMDGPU Device Coredump \n");
+   drm_printf(, "version: " AMDGPU_COREDUMP_VERSION "\n");
drm_printf(, "kernel: " UTS_RELEASE "\n");
drm_printf(, "module: " KBUILD_MODNAME "\n");
drm_printf(, "time: %lld.%09ld\n", coredump->reset_time.tv_sec, 
coredump->reset_time.tv_nsec);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
index 362954521721..7b6767ca8127 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
@@ -88,6 +88,9 @@ struct amdgpu_reset_domain {
 };
 
 #ifdef CONFIG_DEV_COREDUMP
+
+#define AMDGPU_COREDUMP_VERSION "1"
+
 struct amdgpu_coredump_info {
struct amdgpu_device*adev;
struct amdgpu_task_info reset_task_info;
-- 
2.41.0

[PATCH v4 3/4] drm/amdgpu: Move coredump code to amdgpu_reset file

[André Almeida]

Giving that we use codedump just for device resets, move it's functions
and structs to a more semantic file, the amdgpu_reset.{c, h}.

Signed-off-by: André Almeida 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h|  9 ---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 78 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c  | 76 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h  | 11 +++
 4 files changed, 87 insertions(+), 87 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 0d560b713948..314b06cddc39 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1100,15 +1100,6 @@ struct amdgpu_device {
uint32_taid_mask;
 };
 
-#ifdef CONFIG_DEV_COREDUMP
-struct amdgpu_coredump_info {
-   struct amdgpu_device*adev;
-   struct amdgpu_task_info reset_task_info;
-   struct timespec64   reset_time;
-   boolreset_vram_lost;
-};
-#endif
-
 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
 {
return container_of(ddev, struct amdgpu_device, ddev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index b5b879bcc5c9..9706f608723a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -32,8 +32,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 
@@ -4799,82 +4797,6 @@ static int amdgpu_reset_reg_dumps(struct amdgpu_device 
*adev)
return 0;
 }
 
-#ifndef CONFIG_DEV_COREDUMP
-static void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,
-   struct amdgpu_reset_context *reset_context)
-{
-}
-#else
-static ssize_t amdgpu_devcoredump_read(char *buffer, loff_t offset,
-   size_t count, void *data, size_t datalen)
-{
-   struct drm_printer p;
-   struct amdgpu_coredump_info *coredump = data;
-   struct drm_print_iterator iter;
-   int i;
-
-   iter.data = buffer;
-   iter.offset = 0;
-   iter.start = offset;
-   iter.remain = count;
-
-   p = drm_coredump_printer();
-
-   drm_printf(, " AMDGPU Device Coredump \n");
-   drm_printf(, "kernel: " UTS_RELEASE "\n");
-   drm_printf(, "module: " KBUILD_MODNAME "\n");
-   drm_printf(, "time: %lld.%09ld\n", coredump->reset_time.tv_sec, 
coredump->reset_time.tv_nsec);
-   if (coredump->reset_task_info.pid)
-   drm_printf(, "process_name: %s PID: %d\n",
-  coredump->reset_task_info.process_name,
-  coredump->reset_task_info.pid);
-
-   if (coredump->reset_vram_lost)
-   drm_printf(, "VRAM is lost due to GPU reset!\n");
-   if (coredump->adev->num_regs) {
-   drm_printf(, "AMDGPU register dumps:\nOffset: Value:\n");
-
-   for (i = 0; i < coredump->adev->num_regs; i++)
-   drm_printf(, "0x%08x: 0x%08x\n",
-  coredump->adev->reset_dump_reg_list[i],
-  coredump->adev->reset_dump_reg_value[i]);
-   }
-
-   return count - iter.remain;
-}
-
-static void amdgpu_devcoredump_free(void *data)
-{
-   kfree(data);
-}
-
-static void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,
-   struct amdgpu_reset_context *reset_context)
-{
-   struct amdgpu_coredump_info *coredump;
-   struct drm_device *dev = adev_to_drm(adev);
-
-   coredump = kzalloc(sizeof(*coredump), GFP_NOWAIT);
-
-   if (!coredump) {
-   DRM_ERROR("%s: failed to allocate memory for coredump\n", 
__func__);
-   return;
-   }
-
-   coredump->reset_vram_lost = vram_lost;
-
-   if (reset_context->job && reset_context->job->vm)
-   coredump->reset_task_info = reset_context->job->vm->task_info;
-
-   coredump->adev = adev;
-
-   ktime_get_ts64(>reset_time);
-
-   dev_coredumpm(dev->dev, THIS_MODULE, coredump, 0, GFP_NOWAIT,
- amdgpu_devcoredump_read, amdgpu_devcoredump_free);
-}
-#endif
-
 int amdgpu_do_asic_reset(struct list_head *device_list_handle,
 struct amdgpu_reset_context *reset_context)
 {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
index 5fed06ffcc6b..46c8d6ce349c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
@@ -21,6 +21,9 @@
  *
  */
 
+#include 
+#include 
+
 #include "amdgpu_reset.h"
 #include "aldebaran.h"
 #include "sienna_cichlid.h"
@@ -167,5 +170,78 @@ void amdgpu_device_unlock_reset_domain(struct 
amdgpu_reset_domain *reset_domain)
up_write(_domain->sem);
 }
 
+#ifndef CONFIG_DEV_COREDUMP
+void amdgpu_coredump(struct amdgpu_device *adev, bool 

[PATCH v4 2/4] drm/amdgpu: Rework coredump to use memory dynamically

[André Almeida]

Instead of storing coredump information inside amdgpu_device struct,
move if to a proper separated struct and allocate it dynamically. This
will make it easier to further expand the logged information.

Signed-off-by: André Almeida 
---
v4: change kmalloc to kzalloc
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 14 +++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 63 ++
 2 files changed, 49 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9c6a332261ab..0d560b713948 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1088,11 +1088,6 @@ struct amdgpu_device {
uint32_t*reset_dump_reg_list;
uint32_t*reset_dump_reg_value;
int num_regs;
-#ifdef CONFIG_DEV_COREDUMP
-   struct amdgpu_task_info reset_task_info;
-   boolreset_vram_lost;
-   struct timespec64   reset_time;
-#endif
 
boolscpm_enabled;
uint32_tscpm_status;
@@ -1105,6 +1100,15 @@ struct amdgpu_device {
uint32_taid_mask;
 };
 
+#ifdef CONFIG_DEV_COREDUMP
+struct amdgpu_coredump_info {
+   struct amdgpu_device*adev;
+   struct amdgpu_task_info reset_task_info;
+   struct timespec64   reset_time;
+   boolreset_vram_lost;
+};
+#endif
+
 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
 {
return container_of(ddev, struct amdgpu_device, ddev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index bf4781551f88..b5b879bcc5c9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4799,12 +4799,17 @@ static int amdgpu_reset_reg_dumps(struct amdgpu_device 
*adev)
return 0;
 }
 
-#ifdef CONFIG_DEV_COREDUMP
+#ifndef CONFIG_DEV_COREDUMP
+static void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,
+   struct amdgpu_reset_context *reset_context)
+{
+}
+#else
 static ssize_t amdgpu_devcoredump_read(char *buffer, loff_t offset,
size_t count, void *data, size_t datalen)
 {
struct drm_printer p;
-   struct amdgpu_device *adev = data;
+   struct amdgpu_coredump_info *coredump = data;
struct drm_print_iterator iter;
int i;
 
@@ -4818,21 +4823,21 @@ static ssize_t amdgpu_devcoredump_read(char *buffer, 
loff_t offset,
drm_printf(, " AMDGPU Device Coredump \n");
drm_printf(, "kernel: " UTS_RELEASE "\n");
drm_printf(, "module: " KBUILD_MODNAME "\n");
-   drm_printf(, "time: %lld.%09ld\n", adev->reset_time.tv_sec, 
adev->reset_time.tv_nsec);
-   if (adev->reset_task_info.pid)
+   drm_printf(, "time: %lld.%09ld\n", coredump->reset_time.tv_sec, 
coredump->reset_time.tv_nsec);
+   if (coredump->reset_task_info.pid)
drm_printf(, "process_name: %s PID: %d\n",
-  adev->reset_task_info.process_name,
-  adev->reset_task_info.pid);
+  coredump->reset_task_info.process_name,
+  coredump->reset_task_info.pid);
 
-   if (adev->reset_vram_lost)
+   if (coredump->reset_vram_lost)
drm_printf(, "VRAM is lost due to GPU reset!\n");
-   if (adev->num_regs) {
+   if (coredump->adev->num_regs) {
drm_printf(, "AMDGPU register dumps:\nOffset: Value:\n");
 
-   for (i = 0; i < adev->num_regs; i++)
+   for (i = 0; i < coredump->adev->num_regs; i++)
drm_printf(, "0x%08x: 0x%08x\n",
-  adev->reset_dump_reg_list[i],
-  adev->reset_dump_reg_value[i]);
+  coredump->adev->reset_dump_reg_list[i],
+  coredump->adev->reset_dump_reg_value[i]);
}
 
return count - iter.remain;
@@ -4840,14 +4845,32 @@ static ssize_t amdgpu_devcoredump_read(char *buffer, 
loff_t offset,
 
 static void amdgpu_devcoredump_free(void *data)
 {
+   kfree(data);
 }
 
-static void amdgpu_reset_capture_coredumpm(struct amdgpu_device *adev)
+static void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,
+   struct amdgpu_reset_context *reset_context)
 {
+   struct amdgpu_coredump_info *coredump;
struct drm_device *dev = adev_to_drm(adev);
 
-   ktime_get_ts64(>reset_time);
-   dev_coredumpm(dev->dev, THIS_MODULE, adev, 0, GFP_NOWAIT,
+   coredump = kzalloc(sizeof(*coredump), GFP_NOWAIT);
+
+   if (!coredump) {
+   DRM_ERROR("%s: failed to allocate memory for coredump\n", 

[PATCH v4 1/4] drm/amdgpu: Allocate coredump memory in a nonblocking way

[André Almeida]

During a GPU reset, a normal memory reclaim could block to reclaim
memory. Giving that coredump is a best effort mechanism, it shouldn't
disturb the reset path. Change its memory allocation flag to a
nonblocking one.

Signed-off-by: André Almeida 
Reviewed-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index aa171db68639..bf4781551f88 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4847,7 +4847,7 @@ static void amdgpu_reset_capture_coredumpm(struct 
amdgpu_device *adev)
struct drm_device *dev = adev_to_drm(adev);
 
ktime_get_ts64(>reset_time);
-   dev_coredumpm(dev->dev, THIS_MODULE, adev, 0, GFP_KERNEL,
+   dev_coredumpm(dev->dev, THIS_MODULE, adev, 0, GFP_NOWAIT,
  amdgpu_devcoredump_read, amdgpu_devcoredump_free);
 }
 #endif
-- 
2.41.0

[PATCH v4 0/4] drm/amdgpu: Rework coredump memory allocation

[André Almeida]

Hi,

The patches of this set are a rework to alloc devcoredump dynamically and to
move it to a better source file.

Thanks,
André

Changelog:

v3: 
https://lore.kernel.org/dri-devel/20230810192330.198326-1-andrealm...@igalia.com/
- Changed from kmalloc to kzalloc
- Dropped "Create a module param to disable soft recovery" for now

v2: 
https://lore.kernel.org/dri-devel/20230713213242.680944-1-andrealm...@igalia.com/
- Drop the IB and ring patch
- Drop patch that limited information from kernel threads
- Add patch to move coredump to amdgpu_reset

v1: 
https://lore.kernel.org/dri-devel/20230711213501.526237-1-andrealm...@igalia.com/
 - Drop "Mark contexts guilty for causing soft recoveries" patch
 - Use GFP_NOWAIT for devcoredump allocation

André Almeida (4):
  drm/amdgpu: Allocate coredump memory in a nonblocking way
  drm/amdgpu: Rework coredump to use memory dynamically
  drm/amdgpu: Move coredump code to amdgpu_reset file
  drm/amdgpu: Create version number for coredumps

 drivers/gpu/drm/amd/amdgpu/amdgpu.h|  5 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 67 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c  | 77 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h  | 14 
 4 files changed, 94 insertions(+), 69 deletions(-)

-- 
2.41.0

[PATCH v6 6/6] drm/doc: Define KMS atomic state set

[André Almeida]

From: Pekka Paalanen 

Specify how the atomic state is maintained between userspace and
kernel, plus the special case for async flips.

Signed-off-by: Pekka Paalanen 
Signed-off-by: André Almeida 
---
v5: Add note that not every redundant attribute will result in no-op
v4: total rework by Pekka
---
 Documentation/gpu/drm-uapi.rst | 44 ++
 1 file changed, 44 insertions(+)

diff --git a/Documentation/gpu/drm-uapi.rst b/Documentation/gpu/drm-uapi.rst
index 65fb3036a580..b91ccaddeeb9 100644
--- a/Documentation/gpu/drm-uapi.rst
+++ b/Documentation/gpu/drm-uapi.rst
@@ -486,3 +486,47 @@ and the CRTC index is its position in this array.
 
 .. kernel-doc:: include/uapi/drm/drm_mode.h
:internal:
+
+KMS atomic state
+
+
+An atomic commit can change multiple KMS properties in an atomic fashion,
+without ever applying intermediate or partial state changes.  Either the whole
+commit succeeds or fails, and it will never be applied partially. This is the
+fundamental improvement of the atomic API over the older non-atomic API which 
is
+referred to as the "legacy API".  Applying intermediate state could 
unexpectedly
+fail, cause visible glitches, or delay reaching the final state.
+
+An atomic commit can be flagged with DRM_MODE_ATOMIC_TEST_ONLY, which means the
+complete state change is validated but not applied.  Userspace should use this
+flag to validate any state change before asking to apply it. If validation 
fails
+for any reason, userspace should attempt to fall back to another, perhaps
+simpler, final state.  This allows userspace to probe for various 
configurations
+without causing visible glitches on screen and without the need to undo a
+probing change.
+
+The changes recorded in an atomic commit apply on top the current KMS state in
+the kernel. Hence, the complete new KMS state is the complete old KMS state 
with
+the committed property settings done on top. The kernel will try to avoid
+no-operation changes, so it is safe for userspace to send redundant property
+settings.  However, not every situation allows for no-op changes, due to the
+need to acquire locks for some attributes. Userspace needs to be aware that 
some
+redundant information might result in oversynchronization issues.  No-operation
+changes do not count towards actually needed changes, e.g.  setting MODE_ID to 
a
+different blob with identical contents as the current KMS state shall not be a
+modeset on its own.
+
+A "modeset" is a change in KMS state that might enable, disable, or temporarily
+disrupt the emitted video signal, possibly causing visible glitches on screen. 
A
+modeset may also take considerably more time to complete than other kinds of
+changes, and the video sink might also need time to adapt to the new signal
+properties. Therefore a modeset must be explicitly allowed with the flag
+DRM_MODE_ATOMIC_ALLOW_MODESET.  This in combination with
+DRM_MODE_ATOMIC_TEST_ONLY allows userspace to determine if a state change is
+likely to cause visible disruption on screen and avoid such changes when end
+users do not expect them.
+
+An atomic commit with the flag DRM_MODE_PAGE_FLIP_ASYNC is allowed to
+effectively change only the FB_ID property on any planes. No-operation changes
+are ignored as always. Changing any other property will cause the commit to be
+rejected.
-- 
2.41.0

[PATCH v6 5/6] drm: Refuse to async flip with atomic prop changes

[André Almeida]

Given that prop changes may lead to modesetting, which would defeat the
fast path of the async flip, refuse any atomic prop change for async
flips in atomic API. The only exceptions are the framebuffer ID to flip
to and the mode ID, that could be referring to an identical mode.

Signed-off-by: André Almeida 
---
v5: no changes
v4: new patch
---
 drivers/gpu/drm/drm_atomic_helper.c |  5 +++
 drivers/gpu/drm/drm_atomic_uapi.c   | 52 +++--
 drivers/gpu/drm/drm_crtc_internal.h |  2 +-
 drivers/gpu/drm/drm_mode_object.c   |  2 +-
 4 files changed, 56 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index 292e38eb6218..b34e3104afd1 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -629,6 +629,11 @@ drm_atomic_helper_check_modeset(struct drm_device *dev,
WARN_ON(!drm_modeset_is_locked(>mutex));
 
if (!drm_mode_equal(_crtc_state->mode, 
_crtc_state->mode)) {
+   if (new_crtc_state->async_flip) {
+   drm_dbg_atomic(dev, "[CRTC:%d:%s] no mode 
changes allowed during async flip\n",
+  crtc->base.id, crtc->name);
+   return -EINVAL;
+   }
drm_dbg_atomic(dev, "[CRTC:%d:%s] mode changed\n",
   crtc->base.id, crtc->name);
new_crtc_state->mode_changed = true;
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index a15121e75a0a..6c423a7e8c7b 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -1006,13 +1006,28 @@ int drm_atomic_connector_commit_dpms(struct 
drm_atomic_state *state,
return ret;
 }
 
+static int drm_atomic_check_prop_changes(int ret, uint64_t old_val, uint64_t 
prop_value,
+struct drm_property *prop)
+{
+   if (ret != 0 || old_val != prop_value) {
+   drm_dbg_atomic(prop->dev,
+  "[PROP:%d:%s] No prop can be changed during 
async flip\n",
+  prop->base.id, prop->name);
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
 int drm_atomic_set_property(struct drm_atomic_state *state,
struct drm_file *file_priv,
struct drm_mode_object *obj,
struct drm_property *prop,
-   uint64_t prop_value)
+   uint64_t prop_value,
+   bool async_flip)
 {
struct drm_mode_object *ref;
+   uint64_t old_val;
int ret;
 
if (!drm_property_change_valid_get(prop, prop_value, ))
@@ -1029,6 +1044,13 @@ int drm_atomic_set_property(struct drm_atomic_state 
*state,
break;
}
 
+   if (async_flip) {
+   ret = drm_atomic_connector_get_property(connector, 
connector_state,
+   prop, _val);
+   ret = drm_atomic_check_prop_changes(ret, old_val, 
prop_value, prop);
+   break;
+   }
+
ret = drm_atomic_connector_set_property(connector,
connector_state, file_priv,
prop, prop_value);
@@ -1037,6 +1059,7 @@ int drm_atomic_set_property(struct drm_atomic_state 
*state,
case DRM_MODE_OBJECT_CRTC: {
struct drm_crtc *crtc = obj_to_crtc(obj);
struct drm_crtc_state *crtc_state;
+   struct drm_mode_config *config = >dev->mode_config;
 
crtc_state = drm_atomic_get_crtc_state(state, crtc);
if (IS_ERR(crtc_state)) {
@@ -1044,6 +1067,18 @@ int drm_atomic_set_property(struct drm_atomic_state 
*state,
break;
}
 
+   /*
+* We allow mode_id changes here for async flips, because we
+* check later on drm_atomic_helper_check_modeset() callers if
+* there are modeset changes or they are equal
+*/
+   if (async_flip && prop != config->prop_mode_id) {
+   ret = drm_atomic_crtc_get_property(crtc, crtc_state,
+  prop, _val);
+   ret = drm_atomic_check_prop_changes(ret, old_val, 
prop_value, prop);
+   break;
+   }
+
ret = drm_atomic_crtc_set_property(crtc,
crtc_state, prop, prop_value);
break;
@@ -1051,6 +1086,7 @@ int drm_atomic_set_property(struct drm_atomic_state 
*state,
case DRM_MODE_OBJECT_PLANE: {
struct drm_plane *plane 

[PATCH v6 4/6] amd/display: indicate support for atomic async page-flips on DC

[André Almeida]

From: Simon Ser 

amdgpu_dm_commit_planes() already sets the flip_immediate flag for
async page-flips. This flag is used to set the UNP_FLIP_CONTROL
register. Thus, no additional change is required to handle async
page-flips with the atomic uAPI.

Signed-off-by: Simon Ser 
Reviewed-by: André Almeida 
Reviewed-by: Alex Deucher 
Signed-off-by: André Almeida 
---
v5: no changes
v4: no changes
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 4b433793f5a0..4d3d6009838c 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3924,7 +3924,6 @@ static int amdgpu_dm_mode_config_init(struct 
amdgpu_device *adev)
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
/* indicates support for immediate flip */
adev_to_drm(adev)->mode_config.async_page_flip = true;
-   adev_to_drm(adev)->mode_config.atomic_async_page_flip_not_supported = 
true;
 
state = kzalloc(sizeof(*state), GFP_KERNEL);
if (!state)
-- 
2.41.0

[PATCH v6 3/6] drm: introduce drm_mode_config.atomic_async_page_flip_not_supported

[André Almeida]

From: Simon Ser 

This new field indicates whether the driver has the necessary logic
to support async page-flips via the atomic uAPI. This is leveraged by
the next commit to allow user-space to use this functionality.

All atomic drivers setting drm_mode_config.async_page_flip are updated
to also set drm_mode_config.atomic_async_page_flip_not_supported. We
will gradually check and update these drivers to properly handle
drm_crtc_state.async_flip in their atomic logic.

The goal of this negative flag is the same as
fb_modifiers_not_supported: we want to eventually get rid of all
drivers missing atomic support for async flips. New drivers should not
set this flag, instead they should support atomic async flips (if
they support async flips at all). IOW, we don't want more drivers
with async flip support for legacy but not atomic.

Signed-off-by: Simon Ser 
Reviewed-by: André Almeida 
Reviewed-by: Alex Deucher 
Signed-off-by: André Almeida 
---
v5: no changes
v4: no changes
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c   |  1 +
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c|  1 +
 drivers/gpu/drm/i915/display/intel_display_driver.c |  1 +
 drivers/gpu/drm/nouveau/nouveau_display.c   |  1 +
 include/drm/drm_mode_config.h   | 11 +++
 5 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 4d3d6009838c..4b433793f5a0 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3924,6 +3924,7 @@ static int amdgpu_dm_mode_config_init(struct 
amdgpu_device *adev)
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
/* indicates support for immediate flip */
adev_to_drm(adev)->mode_config.async_page_flip = true;
+   adev_to_drm(adev)->mode_config.atomic_async_page_flip_not_supported = 
true;
 
state = kzalloc(sizeof(*state), GFP_KERNEL);
if (!state)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
index fa0f9a93d50d..301b222c410d 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
@@ -639,6 +639,7 @@ static int atmel_hlcdc_dc_modeset_init(struct drm_device 
*dev)
dev->mode_config.max_height = dc->desc->max_height;
dev->mode_config.funcs = _config_funcs;
dev->mode_config.async_page_flip = true;
+   dev->mode_config.atomic_async_page_flip_not_supported = true;
 
return 0;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c 
b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 8f144d4d3c39..f290c5c2e3c9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -123,6 +123,7 @@ static void intel_mode_config_init(struct drm_i915_private 
*i915)
mode_config->helper_private = _mode_config_funcs;
 
mode_config->async_page_flip = HAS_ASYNC_FLIPS(i915);
+   mode_config->atomic_async_page_flip_not_supported = true;
 
/*
 * Maximum framebuffer dimensions, chosen to match
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c 
b/drivers/gpu/drm/nouveau/nouveau_display.c
index 99977e5fe716..540895dabfc7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -720,6 +720,7 @@ nouveau_display_create(struct drm_device *dev)
dev->mode_config.async_page_flip = false;
else
dev->mode_config.async_page_flip = true;
+   dev->mode_config.atomic_async_page_flip_not_supported = true;
 
drm_kms_helper_poll_init(dev);
drm_kms_helper_poll_disable(dev);
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 973119a9176b..47b005671e6a 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -918,6 +918,17 @@ struct drm_mode_config {
 */
bool async_page_flip;
 
+   /**
+* @atomic_async_page_flip_not_supported:
+*
+* If true, the driver does not support async page-flips with the
+* atomic uAPI. This is only used by old drivers which haven't yet
+* accomodated for _crtc_state.async_flip in their atomic logic,
+* even if they have _mode_config.async_page_flip set to true.
+* New drivers shall not set this flag.
+*/
+   bool atomic_async_page_flip_not_supported;
+
/**
 * @fb_modifiers_not_supported:
 *
-- 
2.41.0

[PATCH v6 2/6] drm: introduce DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP

[André Almeida]

From: Simon Ser 

This new kernel capability indicates whether async page-flips are
supported via the atomic uAPI. DRM clients can use it to check
for support before feeding DRM_MODE_PAGE_FLIP_ASYNC to the kernel.

Make it clear that DRM_CAP_ASYNC_PAGE_FLIP is for legacy uAPI only.

Signed-off-by: Simon Ser 
Reviewed-by: André Almeida 
Reviewed-by: Alex Deucher 
Signed-off-by: André Almeida 
---
v5: no changes
v4: no changes
---
 drivers/gpu/drm/drm_ioctl.c |  5 +
 include/uapi/drm/drm.h  | 10 +-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index f03ffbacfe9b..3562b717b74f 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -301,6 +301,11 @@ static int drm_getcap(struct drm_device *dev, void *data, 
struct drm_file *file_
case DRM_CAP_CRTC_IN_VBLANK_EVENT:
req->value = 1;
break;
+   case DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP:
+   req->value = drm_core_check_feature(dev, DRIVER_ATOMIC) &&
+dev->mode_config.async_page_flip &&
+
!dev->mode_config.atomic_async_page_flip_not_supported;
+   break;
default:
return -EINVAL;
}
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
index 794c1d857677..58baefe32c23 100644
--- a/include/uapi/drm/drm.h
+++ b/include/uapi/drm/drm.h
@@ -713,7 +713,8 @@ struct drm_gem_open {
 /**
  * DRM_CAP_ASYNC_PAGE_FLIP
  *
- * If set to 1, the driver supports _MODE_PAGE_FLIP_ASYNC.
+ * If set to 1, the driver supports _MODE_PAGE_FLIP_ASYNC for legacy
+ * page-flips.
  */
 #define DRM_CAP_ASYNC_PAGE_FLIP0x7
 /**
@@ -773,6 +774,13 @@ struct drm_gem_open {
  * :ref:`drm_sync_objects`.
  */
 #define DRM_CAP_SYNCOBJ_TIMELINE   0x14
+/**
+ * DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP
+ *
+ * If set to 1, the driver supports _MODE_PAGE_FLIP_ASYNC for atomic
+ * commits.
+ */
+#define DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP 0x15
 
 /* DRM_IOCTL_GET_CAP ioctl argument type */
 struct drm_get_cap {
-- 
2.41.0

[PATCH v6 1/6] drm: allow DRM_MODE_PAGE_FLIP_ASYNC for atomic commits

[André Almeida]

From: Simon Ser 

If the driver supports it, allow user-space to supply the
DRM_MODE_PAGE_FLIP_ASYNC flag to request an async page-flip.
Set drm_crtc_state.async_flip accordingly.

Document that drivers will reject atomic commits if an async
flip isn't possible. This allows user-space to fall back to
something else. For instance, Xorg falls back to a blit.
Another option is to wait as close to the next vblank as
possible before performing the page-flip to reduce latency.

Signed-off-by: Simon Ser 
Reviewed-by: Alex Deucher 
Co-developed-by: André Almeida 
Signed-off-by: André Almeida 
---
v5: no changes
v4: no changes
---
 drivers/gpu/drm/drm_atomic_uapi.c | 28 +---
 include/uapi/drm/drm_mode.h   |  9 +
 2 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index 98d3b10c08ae..a15121e75a0a 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -1323,6 +1323,18 @@ static void complete_signaling(struct drm_device *dev,
kfree(fence_state);
 }
 
+static void
+set_async_flip(struct drm_atomic_state *state)
+{
+   struct drm_crtc *crtc;
+   struct drm_crtc_state *crtc_state;
+   int i;
+
+   for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
+   crtc_state->async_flip = true;
+   }
+}
+
 int drm_mode_atomic_ioctl(struct drm_device *dev,
  void *data, struct drm_file *file_priv)
 {
@@ -1363,9 +1375,16 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
}
 
if (arg->flags & DRM_MODE_PAGE_FLIP_ASYNC) {
-   drm_dbg_atomic(dev,
-  "commit failed: invalid flag 
DRM_MODE_PAGE_FLIP_ASYNC\n");
-   return -EINVAL;
+   if (!dev->mode_config.async_page_flip) {
+   drm_dbg_atomic(dev,
+  "commit failed: DRM_MODE_PAGE_FLIP_ASYNC 
not supported\n");
+   return -EINVAL;
+   }
+   if (dev->mode_config.atomic_async_page_flip_not_supported) {
+   drm_dbg_atomic(dev,
+  "commit failed: DRM_MODE_PAGE_FLIP_ASYNC 
not supported with atomic\n");
+   return -EINVAL;
+   }
}
 
/* can't test and expect an event at the same time. */
@@ -1468,6 +1487,9 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
if (ret)
goto out;
 
+   if (arg->flags & DRM_MODE_PAGE_FLIP_ASYNC)
+   set_async_flip(state);
+
if (arg->flags & DRM_MODE_ATOMIC_TEST_ONLY) {
ret = drm_atomic_check_only(state);
} else if (arg->flags & DRM_MODE_ATOMIC_NONBLOCK) {
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index ea1b639bcb28..04e6a3caa675 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -957,6 +957,15 @@ struct hdr_output_metadata {
  * Request that the page-flip is performed as soon as possible, ie. with no
  * delay due to waiting for vblank. This may cause tearing to be visible on
  * the screen.
+ *
+ * When used with atomic uAPI, the driver will return an error if the hardware
+ * doesn't support performing an asynchronous page-flip for this update.
+ * User-space should handle this, e.g. by falling back to a regular page-flip.
+ *
+ * Note, some hardware might need to perform one last synchronous page-flip
+ * before being able to switch to asynchronous page-flips. As an exception,
+ * the driver will return success even though that first page-flip is not
+ * asynchronous.
  */
 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
 #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
-- 
2.41.0

[PATCH v6 0/6] drm: Add support for atomic async page-flip

[André Almeida]

Hi,

This work from me and Simon adds support for DRM_MODE_PAGE_FLIP_ASYNC through
the atomic API. This feature is already available via the legacy API. The use
case is to be able to present a new frame immediately (or as soon as
possible), even if after missing a vblank. This might result in tearing, but
it's useful when a high framerate is desired, such as for gaming.

Differently from earlier versions, this one refuses to flip if any prop changes
for async flips. The idea is that the fast path of immediate page flips doesn't
play well with modeset changes, so only the fb_id can be changed. The exception
is for mode_id changes, that might be referring to an identical mode (which
would skip a modeset). This is done to make the async API more similar to the
normal API.

Thanks,
André

- User-space patch: https://github.com/Plagman/gamescope/pull/595
- IGT tests: 
https://gitlab.freedesktop.org/andrealmeid/igt-gpu-tools/-/tree/atomic_async_page_flip

Changes from v5:
- Add note in the docs that not every redundant attribute will result in no-op,
  some might cause oversynchronization issues.

v5: 
https://lore.kernel.org/dri-devel/20230707224059.305474-1-andrealm...@igalia.com/

Changes from v4:
 - Documentation rewrote by Pekka Paalanen

v4: 
https://lore.kernel.org/dri-devel/20230701020917.143394-1-andrealm...@igalia.com/

Changes from v3:
 - Add new patch to reject prop changes
 - Add a documentation clarifying the KMS atomic state set

v3: 
https://lore.kernel.org/dri-devel/20220929184307.258331-1-cont...@emersion.fr/

André Almeida (1):
  drm: Refuse to async flip with atomic prop changes

Pekka Paalanen (1):
  drm/doc: Define KMS atomic state set

Simon Ser (4):
  drm: allow DRM_MODE_PAGE_FLIP_ASYNC for atomic commits
  drm: introduce DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP
  drm: introduce drm_mode_config.atomic_async_page_flip_not_supported
  amd/display: indicate support for atomic async page-flips on DC

 Documentation/gpu/drm-uapi.rst| 44 ++
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c  |  1 +
 drivers/gpu/drm/drm_atomic_helper.c   |  5 ++
 drivers/gpu/drm/drm_atomic_uapi.c | 80 +--
 drivers/gpu/drm/drm_crtc_internal.h   |  2 +-
 drivers/gpu/drm/drm_ioctl.c   |  5 ++
 drivers/gpu/drm/drm_mode_object.c |  2 +-
 .../drm/i915/display/intel_display_driver.c   |  1 +
 drivers/gpu/drm/nouveau/nouveau_display.c |  1 +
 include/drm/drm_mode_config.h | 11 +++
 include/uapi/drm/drm.h| 10 ++-
 include/uapi/drm/drm_mode.h   |  9 +++
 12 files changed, 162 insertions(+), 9 deletions(-)

-- 
2.41.0

Re: [PATCH v2] drm/amdgpu: register a dirty framebuffer callback for fbcon

[Mario Limonciello]

On 8/15/2023 12:26, Hamza Mahfooz wrote:

fbcon requires that we implement _framebuffer_funcs.dirty.
Otherwise, the framebuffer might take a while to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon cases since it might cause too many atomic commits to be made
at once. So, implement amdgpu_dirtyfb() and only enable it for fbcon
framebuffers on devices that support atomic KMS.

Cc: Aurabindo Pillai 
Cc: Mario Limonciello 
Cc: sta...@vger.kernel.org # 6.1+


This is safe specifically because other things like FB_DAMAGE_CLIPS have 
come back to 6.1.y as well via f1edb2f58adb ("drm/amd/display: add 
FB_DAMAGE_CLIPS support") and fixups to that.



Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2519
Signed-off-by: Hamza Mahfooz 


Reviewed-by: Mario Limonciello 


---
v2: update variable names
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 26 -
  1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index d20dd3f852fc..d3b59f99cb7c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -38,6 +38,8 @@
  #include 
  #include 
  #include 
+#include 
+#include 
  #include 
  #include 
  #include 
@@ -532,11 +534,29 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector 
*amdgpu_connector,
return true;
  }
  
+static int amdgpu_dirtyfb(struct drm_framebuffer *fb, struct drm_file *file,

+ unsigned int flags, unsigned int color,
+ struct drm_clip_rect *clips, unsigned int num_clips)
+{
+
+   if (strcmp(fb->comm, "[fbcon]"))
+   return -ENOSYS;
+
+   return drm_atomic_helper_dirtyfb(fb, file, flags, color, clips,
+num_clips);
+}
+
  static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
.destroy = drm_gem_fb_destroy,
.create_handle = drm_gem_fb_create_handle,
  };
  
+static const struct drm_framebuffer_funcs amdgpu_fb_funcs_atomic = {

+   .destroy = drm_gem_fb_destroy,
+   .create_handle = drm_gem_fb_create_handle,
+   .dirty = amdgpu_dirtyfb
+};
+
  uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
  uint64_t bo_flags)
  {
@@ -1139,7 +1159,11 @@ static int amdgpu_display_gem_fb_verify_and_init(struct 
drm_device *dev,
if (ret)
goto err;
  
-	ret = drm_framebuffer_init(dev, >base, _fb_funcs);

+   if (drm_drv_uses_atomic_modeset(dev))
+   ret = drm_framebuffer_init(dev, >base,
+  _fb_funcs_atomic);
+   else
+   ret = drm_framebuffer_init(dev, >base, _fb_funcs);
  
  	if (ret)

goto err;

RE: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC support

[Zhang, Bokun]

[Public]

Hey Lijo,
I have considered to combine the function. However notify_display_change() may 
serve for another purpose as mentioned in the comment:

/**
* @notify_display_change: Enable fast memory clock switching.
*
* Allows for fine grained memory clock switching but has more 
stringent
* timing requirements.
*/

This function is implemented as smu_v13_0_notify_display_change() for SMU 13, 
but not included in smu_v13_0_0_ppt_funcs struct and therefore not called at 
the moment.
I am not completely sure about the purpose of smu_v13_0_notify_display_change().
If it makes sense to combine them, I can make the change accordingly. But I 
would like to know if I should add a new function 
smu_v13_0_0_notify_display_change, or extend smu_v13_0_notify_display_change() 
and add it to smu_v13_0_0_ppt_funcs.

Thanks!


From: Lazar, Lijo 
Sent: Tuesday, August 15, 2023 2:03 PM
To: Deucher, Alexander ; Zhang, Bokun 
; amd-gfx@lists.freedesktop.org
Cc: Zhang, Bokun ; Quan, Evan 
Subject: Re: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC 
support


[Public]

There's already another smu callback - notify_display. This can be accommodated 
there, no need to add another callback.

Thanks,
Lijo

From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Deucher, Alexander 
mailto:alexander.deuc...@amd.com>>
Sent: Tuesday, August 15, 2023 11:13:14 PM
To: Zhang, Bokun mailto:bokun.zh...@amd.com>>; 
amd-gfx@lists.freedesktop.org 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Zhang, Bokun mailto:bokun.zh...@amd.com>>; Quan, Evan 
mailto:evan.q...@amd.com>>
Subject: RE: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC 
support

[Public]

[Public]

> -Original Message-
> From: amd-gfx 
> mailto:amd-gfx-boun...@lists.freedesktop.org>>
>  On Behalf Of Bokun
> Zhang
> Sent: Tuesday, August 15, 2023 11:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Bokun mailto:bokun.zh...@amd.com>>; Quan, Evan
> mailto:evan.q...@amd.com>>
> Subject: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC
> support
>
> - There is a DPM issue where if DC is not present,
>   FCLK will stay at low level.
>   We need to send a SMU message to configure the DPM
>
> Reviewed-by: Evan Quan mailto:evan.q...@amd.com>>
> Signed-off-by: Bokun Zhang mailto:bokun.zh...@amd.com>>
> ---
>  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c  | 6 ++
>  drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h  | 5 +
>  .../gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h   | 5
> -
>  drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h   | 3 ++-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c   | 7
> +++
>  drivers/gpu/drm/amd/pm/swsmu/smu_internal.h| 1 +
>  6 files changed, 25 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index f005a90c35af..c65bebdbec11 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -1410,6 +1410,12 @@ static int smu_smc_hw_setup(struct
> smu_context *smu)
>   return ret;
>   }
>
> + if (!amdgpu_device_has_dc_support(adev)) {
> + ret = smu_notify_no_dc(smu);
> + if (ret)
> + dev_warn(adev->dev, "Failed to notify no dc support,
> driver may not reach best performance\n");
> + }
> +
>   /*
>* Set min deep sleep dce fclk with bootup value from vbios via
>* SetMinDeepSleepDcefclk MSG.
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> index 6e2069dcb6b9..c8fdc3d0aa25 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> @@ -1356,6 +1356,11 @@ struct pptable_funcs {
>* @init_pptable_microcode: Prepare the pptable microcode to upload
> via PSP
>*/
>   int (*init_pptable_microcode)(struct smu_context *smu);
> +
> + /**
> +  * @notify_no_dal: Notify SMU that there is no display and SMU
> should control DPM

Fix the function name in the kernel doc comment here.  With that fixed, patch 
is:
Reviewed-by: Alex Deucher 
mailto:alexander.deuc...@amd.com>>

> +  */
> + int (*notify_no_dc)(struct smu_context *smu);
>  };
>
>  typedef enum {
> diff --git
> a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> index 10cff75b44d5..e2ee855c7748 100644
> ---
> a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> +++
> b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> @@ -138,7 +138,10 @@
>  #define 

Re: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC support

[Lazar, Lijo]

[Public]

There's already another smu callback - notify_display. This can be accommodated 
there, no need to add another callback.

Thanks,
Lijo

From: amd-gfx  on behalf of Deucher, 
Alexander 
Sent: Tuesday, August 15, 2023 11:13:14 PM
To: Zhang, Bokun ; amd-gfx@lists.freedesktop.org 

Cc: Zhang, Bokun ; Quan, Evan 
Subject: RE: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC 
support

[Public]

[Public]

> -Original Message-
> From: amd-gfx  On Behalf Of Bokun
> Zhang
> Sent: Tuesday, August 15, 2023 11:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Bokun ; Quan, Evan
> 
> Subject: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC
> support
>
> - There is a DPM issue where if DC is not present,
>   FCLK will stay at low level.
>   We need to send a SMU message to configure the DPM
>
> Reviewed-by: Evan Quan 
> Signed-off-by: Bokun Zhang 
> ---
>  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c  | 6 ++
>  drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h  | 5 +
>  .../gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h   | 5
> -
>  drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h   | 3 ++-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c   | 7
> +++
>  drivers/gpu/drm/amd/pm/swsmu/smu_internal.h| 1 +
>  6 files changed, 25 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index f005a90c35af..c65bebdbec11 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -1410,6 +1410,12 @@ static int smu_smc_hw_setup(struct
> smu_context *smu)
>   return ret;
>   }
>
> + if (!amdgpu_device_has_dc_support(adev)) {
> + ret = smu_notify_no_dc(smu);
> + if (ret)
> + dev_warn(adev->dev, "Failed to notify no dc support,
> driver may not reach best performance\n");
> + }
> +
>   /*
>* Set min deep sleep dce fclk with bootup value from vbios via
>* SetMinDeepSleepDcefclk MSG.
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> index 6e2069dcb6b9..c8fdc3d0aa25 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> @@ -1356,6 +1356,11 @@ struct pptable_funcs {
>* @init_pptable_microcode: Prepare the pptable microcode to upload
> via PSP
>*/
>   int (*init_pptable_microcode)(struct smu_context *smu);
> +
> + /**
> +  * @notify_no_dal: Notify SMU that there is no display and SMU
> should control DPM

Fix the function name in the kernel doc comment here.  With that fixed, patch 
is:
Reviewed-by: Alex Deucher 

> +  */
> + int (*notify_no_dc)(struct smu_context *smu);
>  };
>
>  typedef enum {
> diff --git
> a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> index 10cff75b44d5..e2ee855c7748 100644
> ---
> a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> +++
> b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> @@ -138,7 +138,10 @@
>  #define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4A
>  #define PPSMC_MSG_SetPriorityDeltaGain   0x4B
>  #define PPSMC_MSG_AllowIHHostInterrupt   0x4C
> -#define PPSMC_Message_Count  0x4D
> +
> +#define PPSMC_MSG_DALNotPresent  0x4E
> +
> +#define PPSMC_Message_Count  0x4F
>
>  //Debug Dump Message
>  #define DEBUGSMC_MSG_TestMessage0x1
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> index 297b70b9388f..f71fc99447f2 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> @@ -245,7 +245,8 @@
>   __SMU_DUMMY_MAP(AllowGpo),  \
>   __SMU_DUMMY_MAP(Mode2Reset),\
>   __SMU_DUMMY_MAP(RequestI2cTransaction), \
> - __SMU_DUMMY_MAP(GetMetricsTable),
> + __SMU_DUMMY_MAP(GetMetricsTable), \
> + __SMU_DUMMY_MAP(DALNotPresent),
>
>  #undef __SMU_DUMMY_MAP
>  #define __SMU_DUMMY_MAP(type)SMU_MSG_##type
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> index 48b03524a52d..41412cf891a7 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> @@ -160,6 +160,7 @@ static struct cmn2asic_msg_mapping
> smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
>   MSG_MAP(AllowGpo,   PPSMC_MSG_SetGpoAllow,
> 0),
>   MSG_MAP(AllowIHHostInterrupt,
>   PPSMC_MSG_AllowIHHostInterrupt,   0),
>   MSG_MAP(ReenableAcDcInterrupt,
>   

RE: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC support

[Deucher, Alexander]

[Public]

> -Original Message-
> From: amd-gfx  On Behalf Of Bokun
> Zhang
> Sent: Tuesday, August 15, 2023 11:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Bokun ; Quan, Evan
> 
> Subject: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC
> support
>
> - There is a DPM issue where if DC is not present,
>   FCLK will stay at low level.
>   We need to send a SMU message to configure the DPM
>
> Reviewed-by: Evan Quan 
> Signed-off-by: Bokun Zhang 
> ---
>  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c  | 6 ++
>  drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h  | 5 +
>  .../gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h   | 5
> -
>  drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h   | 3 ++-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c   | 7
> +++
>  drivers/gpu/drm/amd/pm/swsmu/smu_internal.h| 1 +
>  6 files changed, 25 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index f005a90c35af..c65bebdbec11 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -1410,6 +1410,12 @@ static int smu_smc_hw_setup(struct
> smu_context *smu)
>   return ret;
>   }
>
> + if (!amdgpu_device_has_dc_support(adev)) {
> + ret = smu_notify_no_dc(smu);
> + if (ret)
> + dev_warn(adev->dev, "Failed to notify no dc support,
> driver may not reach best performance\n");
> + }
> +
>   /*
>* Set min deep sleep dce fclk with bootup value from vbios via
>* SetMinDeepSleepDcefclk MSG.
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> index 6e2069dcb6b9..c8fdc3d0aa25 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> @@ -1356,6 +1356,11 @@ struct pptable_funcs {
>* @init_pptable_microcode: Prepare the pptable microcode to upload
> via PSP
>*/
>   int (*init_pptable_microcode)(struct smu_context *smu);
> +
> + /**
> +  * @notify_no_dal: Notify SMU that there is no display and SMU
> should control DPM

Fix the function name in the kernel doc comment here.  With that fixed, patch 
is:
Reviewed-by: Alex Deucher 

> +  */
> + int (*notify_no_dc)(struct smu_context *smu);
>  };
>
>  typedef enum {
> diff --git
> a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> index 10cff75b44d5..e2ee855c7748 100644
> ---
> a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> +++
> b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
> @@ -138,7 +138,10 @@
>  #define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4A
>  #define PPSMC_MSG_SetPriorityDeltaGain   0x4B
>  #define PPSMC_MSG_AllowIHHostInterrupt   0x4C
> -#define PPSMC_Message_Count  0x4D
> +
> +#define PPSMC_MSG_DALNotPresent  0x4E
> +
> +#define PPSMC_Message_Count  0x4F
>
>  //Debug Dump Message
>  #define DEBUGSMC_MSG_TestMessage0x1
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> index 297b70b9388f..f71fc99447f2 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> @@ -245,7 +245,8 @@
>   __SMU_DUMMY_MAP(AllowGpo),  \
>   __SMU_DUMMY_MAP(Mode2Reset),\
>   __SMU_DUMMY_MAP(RequestI2cTransaction), \
> - __SMU_DUMMY_MAP(GetMetricsTable),
> + __SMU_DUMMY_MAP(GetMetricsTable), \
> + __SMU_DUMMY_MAP(DALNotPresent),
>
>  #undef __SMU_DUMMY_MAP
>  #define __SMU_DUMMY_MAP(type)SMU_MSG_##type
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> index 48b03524a52d..41412cf891a7 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> @@ -160,6 +160,7 @@ static struct cmn2asic_msg_mapping
> smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
>   MSG_MAP(AllowGpo,   PPSMC_MSG_SetGpoAllow,
> 0),
>   MSG_MAP(AllowIHHostInterrupt,
>   PPSMC_MSG_AllowIHHostInterrupt,   0),
>   MSG_MAP(ReenableAcDcInterrupt,
>   PPSMC_MSG_ReenableAcDcInterrupt,   0),
> + MSG_MAP(DALNotPresent,
>   PPSMC_MSG_DALNotPresent,   0),
>  };
>
>  static struct cmn2asic_mapping smu_v13_0_0_clk_map[SMU_CLK_COUNT] =
> {
> @@ -2601,6 +2602,11 @@ static ssize_t smu_v13_0_0_get_ecc_info(struct
> smu_context *smu,
>   return ret;
>  }
>
> +static int smu_v13_0_0_notify_no_dc(struct smu_context *smu)
> +{
> + return smu_cmn_send_smc_msg(smu, SMU_MSG_DALNotPresent,
> NULL);
> +}
> +
>  

[PATCH v2] drm/amdgpu: register a dirty framebuffer callback for fbcon

[Hamza Mahfooz]

fbcon requires that we implement _framebuffer_funcs.dirty.
Otherwise, the framebuffer might take a while to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon cases since it might cause too many atomic commits to be made
at once. So, implement amdgpu_dirtyfb() and only enable it for fbcon
framebuffers on devices that support atomic KMS.

Cc: Aurabindo Pillai 
Cc: Mario Limonciello 
Cc: sta...@vger.kernel.org # 6.1+
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2519
Signed-off-by: Hamza Mahfooz 
---
v2: update variable names
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 26 -
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index d20dd3f852fc..d3b59f99cb7c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -38,6 +38,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -532,11 +534,29 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector 
*amdgpu_connector,
return true;
 }
 
+static int amdgpu_dirtyfb(struct drm_framebuffer *fb, struct drm_file *file,
+ unsigned int flags, unsigned int color,
+ struct drm_clip_rect *clips, unsigned int num_clips)
+{
+
+   if (strcmp(fb->comm, "[fbcon]"))
+   return -ENOSYS;
+
+   return drm_atomic_helper_dirtyfb(fb, file, flags, color, clips,
+num_clips);
+}
+
 static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
.destroy = drm_gem_fb_destroy,
.create_handle = drm_gem_fb_create_handle,
 };
 
+static const struct drm_framebuffer_funcs amdgpu_fb_funcs_atomic = {
+   .destroy = drm_gem_fb_destroy,
+   .create_handle = drm_gem_fb_create_handle,
+   .dirty = amdgpu_dirtyfb
+};
+
 uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
  uint64_t bo_flags)
 {
@@ -1139,7 +1159,11 @@ static int amdgpu_display_gem_fb_verify_and_init(struct 
drm_device *dev,
if (ret)
goto err;
 
-   ret = drm_framebuffer_init(dev, >base, _fb_funcs);
+   if (drm_drv_uses_atomic_modeset(dev))
+   ret = drm_framebuffer_init(dev, >base,
+  _fb_funcs_atomic);
+   else
+   ret = drm_framebuffer_init(dev, >base, _fb_funcs);
 
if (ret)
goto err;
-- 
2.41.0

[PATCH] drm/amdgpu: register a dirty framebuffer callback for fbcon

[Hamza Mahfooz]

fbcon requires that we implement _framebuffer_funcs.dirty.
Otherwise, the framebuffer might take awhile to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon cases since it might cause too many atomic commits to be made
at once. So, implement amdgpu_dirtyfb() and only enable it for fbcon
framebuffers on devices that support atomic KMS.

Cc: Aurabindo Pillai 
Cc: Mario Limonciello 
Cc: sta...@vger.kernel.org # 6.1+
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2519
Signed-off-by: Hamza Mahfooz 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 26 -
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index d20dd3f852fc..743db9aee68c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -38,6 +38,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -532,11 +534,29 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector 
*amdgpu_connector,
return true;
 }
 
+static int amdgpu_dirtyfb(struct drm_framebuffer *fb, struct drm_file *file,
+ unsigned int flags, unsigned int color,
+ struct drm_clip_rect *clips, unsigned int num_clips)
+{
+
+   if (strcmp(framebuffer->comm, "[fbcon]"))
+   return -ENOSYS;
+
+   return drm_atomic_helper_dirtyfb(framebuffer, file_priv, flags, color,
+clips, num_clips);
+}
+
 static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
.destroy = drm_gem_fb_destroy,
.create_handle = drm_gem_fb_create_handle,
 };
 
+static const struct drm_framebuffer_funcs amdgpu_fb_funcs_atomic = {
+   .destroy = drm_gem_fb_destroy,
+   .create_handle = drm_gem_fb_create_handle,
+   .dirty = amdgpu_dirtyfb
+};
+
 uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
  uint64_t bo_flags)
 {
@@ -1139,7 +1159,11 @@ static int amdgpu_display_gem_fb_verify_and_init(struct 
drm_device *dev,
if (ret)
goto err;
 
-   ret = drm_framebuffer_init(dev, >base, _fb_funcs);
+   if (drm_drv_uses_atomic_modeset(dev))
+   ret = drm_framebuffer_init(dev, >base,
+  _fb_funcs_atomic);
+   else
+   ret = drm_framebuffer_init(dev, >base, _fb_funcs);
 
if (ret)
goto err;
-- 
2.41.0

Re: [PATCH] drm/amd/pm: allow the user to force BACO on smu v13.0.0/7

[Alex Deucher]

On Tue, Aug 15, 2023 at 5:05 AM Kenneth Feng  wrote:
>
> allow the user to force BACO on smu v13.0.0/7
>
> Signed-off-by: Kenneth Feng 

Acked-by: Alex Deucher 
Would it be better to default to BACO?  It would save more power at
the expense of resume latency.

Alex


> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c   | 2 +-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 3 ++-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 3 ++-
>  3 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> index 895cda8e6934..52e9c7611013 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> @@ -2263,7 +2263,7 @@ int smu_v13_0_baco_set_state(struct smu_context *smu,
> if (state == SMU_BACO_STATE_ENTER) {
> ret = smu_cmn_send_smc_msg_with_param(smu,
>   SMU_MSG_EnterBaco,
> - smu_baco->maco_support ?
> + (smu_baco->maco_support 
> && amdgpu_runtime_pm != 1) ?
>   BACO_SEQ_BAMACO : 
> BACO_SEQ_BACO,
>   NULL);
> } else {
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> index a5857acee641..12ccc12657d7 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> @@ -2211,7 +2211,8 @@ static int smu_v13_0_0_baco_enter(struct smu_context 
> *smu)
>
> if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev))
> return smu_v13_0_baco_set_armd3_sequence(smu,
> -   smu_baco->maco_support ? BACO_SEQ_BAMACO : 
> BACO_SEQ_BACO);
> +   (smu_baco->maco_support && amdgpu_runtime_pm 
> != 1) ?
> +   BACO_SEQ_BAMACO : BACO_SEQ_BACO);
> else
> return smu_v13_0_baco_enter(smu);
>  }
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
> index 93b3e8fa8238..f0bcc7995983 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
> @@ -2139,7 +2139,8 @@ static int smu_v13_0_7_baco_enter(struct smu_context 
> *smu)
>
> if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev))
> return smu_v13_0_baco_set_armd3_sequence(smu,
> -   smu_baco->maco_support ? BACO_SEQ_BAMACO : 
> BACO_SEQ_BACO);
> +   (smu_baco->maco_support && amdgpu_runtime_pm 
> != 1) ?
> +   BACO_SEQ_BAMACO : BACO_SEQ_BACO);
> else
> return smu_v13_0_baco_enter(smu);
>  }
> --
> 2.34.1
>

[PATCH v2] drm/amdgpu/pm: Add notification function for no DC support

[Bokun Zhang]

- There is a DPM issue where if DC is not present,
  FCLK will stay at low level.
  We need to send a SMU message to configure the DPM

Reviewed-by: Evan Quan 
Signed-off-by: Bokun Zhang 
---
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c  | 6 ++
 drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h  | 5 +
 .../gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h   | 5 -
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h   | 3 ++-
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c   | 7 +++
 drivers/gpu/drm/amd/pm/swsmu/smu_internal.h| 1 +
 6 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index f005a90c35af..c65bebdbec11 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1410,6 +1410,12 @@ static int smu_smc_hw_setup(struct smu_context *smu)
return ret;
}
 
+   if (!amdgpu_device_has_dc_support(adev)) {
+   ret = smu_notify_no_dc(smu);
+   if (ret)
+   dev_warn(adev->dev, "Failed to notify no dc support, 
driver may not reach best performance\n");
+   }
+
/*
 * Set min deep sleep dce fclk with bootup value from vbios via
 * SetMinDeepSleepDcefclk MSG.
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 6e2069dcb6b9..c8fdc3d0aa25 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -1356,6 +1356,11 @@ struct pptable_funcs {
 * @init_pptable_microcode: Prepare the pptable microcode to upload via 
PSP
 */
int (*init_pptable_microcode)(struct smu_context *smu);
+
+   /**
+* @notify_no_dal: Notify SMU that there is no display and SMU should 
control DPM
+*/
+   int (*notify_no_dc)(struct smu_context *smu);
 };
 
 typedef enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
index 10cff75b44d5..e2ee855c7748 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
@@ -138,7 +138,10 @@
 #define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4A
 #define PPSMC_MSG_SetPriorityDeltaGain   0x4B
 #define PPSMC_MSG_AllowIHHostInterrupt   0x4C
-#define PPSMC_Message_Count  0x4D
+
+#define PPSMC_MSG_DALNotPresent  0x4E
+
+#define PPSMC_Message_Count  0x4F
 
 //Debug Dump Message
 #define DEBUGSMC_MSG_TestMessage0x1
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 297b70b9388f..f71fc99447f2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -245,7 +245,8 @@
__SMU_DUMMY_MAP(AllowGpo),  \
__SMU_DUMMY_MAP(Mode2Reset),\
__SMU_DUMMY_MAP(RequestI2cTransaction), \
-   __SMU_DUMMY_MAP(GetMetricsTable),
+   __SMU_DUMMY_MAP(GetMetricsTable), \
+   __SMU_DUMMY_MAP(DALNotPresent),
 
 #undef __SMU_DUMMY_MAP
 #define __SMU_DUMMY_MAP(type)  SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 48b03524a52d..41412cf891a7 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -160,6 +160,7 @@ static struct cmn2asic_msg_mapping 
smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
MSG_MAP(AllowGpo,   PPSMC_MSG_SetGpoAllow,  
 0),
MSG_MAP(AllowIHHostInterrupt,   PPSMC_MSG_AllowIHHostInterrupt, 
  0),
MSG_MAP(ReenableAcDcInterrupt,  
PPSMC_MSG_ReenableAcDcInterrupt,   0),
+   MSG_MAP(DALNotPresent,  PPSMC_MSG_DALNotPresent,   0),
 };
 
 static struct cmn2asic_mapping smu_v13_0_0_clk_map[SMU_CLK_COUNT] = {
@@ -2601,6 +2602,11 @@ static ssize_t smu_v13_0_0_get_ecc_info(struct 
smu_context *smu,
return ret;
 }
 
+static int smu_v13_0_0_notify_no_dc(struct smu_context *smu)
+{
+   return smu_cmn_send_smc_msg(smu, SMU_MSG_DALNotPresent, NULL);
+}
+
 static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
.get_allowed_feature_mask = smu_v13_0_0_get_allowed_feature_mask,
.set_default_dpm_table = smu_v13_0_0_set_default_dpm_table,
@@ -2680,6 +2686,7 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = 
{
.send_hbm_bad_channel_flag = smu_v13_0_0_send_bad_mem_channel_flag,
.gpo_control = smu_v13_0_gpo_control,
.get_ecc_info = smu_v13_0_0_get_ecc_info,
+   .notify_no_dc = smu_v13_0_0_notify_no_dc,
 };
 
 void 

Re: [PATCH] drm/amdgpu/gmc6: fix in case the PCI BAR is larger than the actual amount of vram

[Alex Deucher]

Applied.  Thanks!

On Tue, Aug 15, 2023 at 3:13 AM hongao  wrote:
>
> [why]
> limit visible_vram_size to real_vram_size in case
> the PCI BAR is larger than the actual amount of vram.
>
> Signed-off-by: hongao 
> ---
>  drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> index b7dad4e67813..c0de7496bfd1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> @@ -320,6 +320,8 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
> adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
> adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
> adev->gmc.visible_vram_size = adev->gmc.aper_size;
> +   if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
> +   adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
>
> /* set the gart size */
> if (amdgpu_gart_size == -1) {
> --
> 2.20.1
>

Re: [PATCH] drm/amdgpu/pm: Add notification function for no DC support

[Hamza Mahfooz]

Hi Bokun,

On 8/15/23 10:29, Bokun Zhang wrote:

- There is a DPM issue where if DC is not present,
   FCLK will stay at low level.
   We need to send a SMU message to configure the DPM

Signed-off-by: Bokun Zhang 
Reviewed-by: Evan Quan 
---
  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c  | 6 ++
  drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h  | 5 +
  .../gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h   | 5 -
  drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h   | 3 ++-
  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c   | 7 +++
  drivers/gpu/drm/amd/pm/swsmu/smu_internal.h| 1 +
  6 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index f005a90c35af..274c6ba534b3 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1410,6 +1410,12 @@ static int smu_smc_hw_setup(struct smu_context *smu)
return ret;
}
  
+	if (!amdgpu_device_has_dc_support(adev)) {

+   ret = smu_notify_no_dc(smu);
+   if (ret)
+   dev_warn(adev->dev, "Failed to notify no dal support, driver 
may not reach best performance\n");


Can you replace all instances of dal with DC (i.e. s/dal/DC and s/DAL/DC)?


+   }
+
/*
 * Set min deep sleep dce fclk with bootup value from vbios via
 * SetMinDeepSleepDcefclk MSG.
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 6e2069dcb6b9..c8fdc3d0aa25 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -1356,6 +1356,11 @@ struct pptable_funcs {
 * @init_pptable_microcode: Prepare the pptable microcode to upload via 
PSP
 */
int (*init_pptable_microcode)(struct smu_context *smu);
+
+   /**
+* @notify_no_dal: Notify SMU that there is no display and SMU should 
control DPM
+*/
+   int (*notify_no_dc)(struct smu_context *smu);
  };
  
  typedef enum {

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
index 10cff75b44d5..e2ee855c7748 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
@@ -138,7 +138,10 @@
  #define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4A
  #define PPSMC_MSG_SetPriorityDeltaGain   0x4B
  #define PPSMC_MSG_AllowIHHostInterrupt   0x4C
-#define PPSMC_Message_Count  0x4D
+
+#define PPSMC_MSG_DALNotPresent  0x4E
+
+#define PPSMC_Message_Count  0x4F
  
  //Debug Dump Message

  #define DEBUGSMC_MSG_TestMessage0x1
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 297b70b9388f..f71fc99447f2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -245,7 +245,8 @@
__SMU_DUMMY_MAP(AllowGpo),  \
__SMU_DUMMY_MAP(Mode2Reset),\
__SMU_DUMMY_MAP(RequestI2cTransaction), \
-   __SMU_DUMMY_MAP(GetMetricsTable),
+   __SMU_DUMMY_MAP(GetMetricsTable), \
+   __SMU_DUMMY_MAP(DALNotPresent),
  
  #undef __SMU_DUMMY_MAP

  #define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 48b03524a52d..41412cf891a7 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -160,6 +160,7 @@ static struct cmn2asic_msg_mapping 
smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
MSG_MAP(AllowGpo,   PPSMC_MSG_SetGpoAllow,  
 0),
MSG_MAP(AllowIHHostInterrupt,   PPSMC_MSG_AllowIHHostInterrupt, 
  0),
MSG_MAP(ReenableAcDcInterrupt,  
PPSMC_MSG_ReenableAcDcInterrupt,   0),
+   MSG_MAP(DALNotPresent,  PPSMC_MSG_DALNotPresent,   0),
  };
  
  static struct cmn2asic_mapping smu_v13_0_0_clk_map[SMU_CLK_COUNT] = {

@@ -2601,6 +2602,11 @@ static ssize_t smu_v13_0_0_get_ecc_info(struct 
smu_context *smu,
return ret;
  }
  
+static int smu_v13_0_0_notify_no_dc(struct smu_context *smu)

+{
+   return smu_cmn_send_smc_msg(smu, SMU_MSG_DALNotPresent, NULL);
+}
+
  static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
.get_allowed_feature_mask = smu_v13_0_0_get_allowed_feature_mask,
.set_default_dpm_table = smu_v13_0_0_set_default_dpm_table,
@@ -2680,6 +2686,7 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = 
{
.send_hbm_bad_channel_flag = smu_v13_0_0_send_bad_mem_channel_flag,
.gpo_control = 

[PATCH] drm/amdgpu/pm: Add notification function for no DC support

[Bokun Zhang]

- There is a DPM issue where if DC is not present,
  FCLK will stay at low level.
  We need to send a SMU message to configure the DPM

Signed-off-by: Bokun Zhang 
Reviewed-by: Evan Quan 
---
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c  | 6 ++
 drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h  | 5 +
 .../gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h   | 5 -
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h   | 3 ++-
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c   | 7 +++
 drivers/gpu/drm/amd/pm/swsmu/smu_internal.h| 1 +
 6 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index f005a90c35af..274c6ba534b3 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1410,6 +1410,12 @@ static int smu_smc_hw_setup(struct smu_context *smu)
return ret;
}
 
+   if (!amdgpu_device_has_dc_support(adev)) {
+   ret = smu_notify_no_dc(smu);
+   if (ret)
+   dev_warn(adev->dev, "Failed to notify no dal support, 
driver may not reach best performance\n");
+   }
+
/*
 * Set min deep sleep dce fclk with bootup value from vbios via
 * SetMinDeepSleepDcefclk MSG.
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 6e2069dcb6b9..c8fdc3d0aa25 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -1356,6 +1356,11 @@ struct pptable_funcs {
 * @init_pptable_microcode: Prepare the pptable microcode to upload via 
PSP
 */
int (*init_pptable_microcode)(struct smu_context *smu);
+
+   /**
+* @notify_no_dal: Notify SMU that there is no display and SMU should 
control DPM
+*/
+   int (*notify_no_dc)(struct smu_context *smu);
 };
 
 typedef enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
index 10cff75b44d5..e2ee855c7748 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h
@@ -138,7 +138,10 @@
 #define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4A
 #define PPSMC_MSG_SetPriorityDeltaGain   0x4B
 #define PPSMC_MSG_AllowIHHostInterrupt   0x4C
-#define PPSMC_Message_Count  0x4D
+
+#define PPSMC_MSG_DALNotPresent  0x4E
+
+#define PPSMC_Message_Count  0x4F
 
 //Debug Dump Message
 #define DEBUGSMC_MSG_TestMessage0x1
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h 
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 297b70b9388f..f71fc99447f2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -245,7 +245,8 @@
__SMU_DUMMY_MAP(AllowGpo),  \
__SMU_DUMMY_MAP(Mode2Reset),\
__SMU_DUMMY_MAP(RequestI2cTransaction), \
-   __SMU_DUMMY_MAP(GetMetricsTable),
+   __SMU_DUMMY_MAP(GetMetricsTable), \
+   __SMU_DUMMY_MAP(DALNotPresent),
 
 #undef __SMU_DUMMY_MAP
 #define __SMU_DUMMY_MAP(type)  SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 48b03524a52d..41412cf891a7 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -160,6 +160,7 @@ static struct cmn2asic_msg_mapping 
smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
MSG_MAP(AllowGpo,   PPSMC_MSG_SetGpoAllow,  
 0),
MSG_MAP(AllowIHHostInterrupt,   PPSMC_MSG_AllowIHHostInterrupt, 
  0),
MSG_MAP(ReenableAcDcInterrupt,  
PPSMC_MSG_ReenableAcDcInterrupt,   0),
+   MSG_MAP(DALNotPresent,  PPSMC_MSG_DALNotPresent,   0),
 };
 
 static struct cmn2asic_mapping smu_v13_0_0_clk_map[SMU_CLK_COUNT] = {
@@ -2601,6 +2602,11 @@ static ssize_t smu_v13_0_0_get_ecc_info(struct 
smu_context *smu,
return ret;
 }
 
+static int smu_v13_0_0_notify_no_dc(struct smu_context *smu)
+{
+   return smu_cmn_send_smc_msg(smu, SMU_MSG_DALNotPresent, NULL);
+}
+
 static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
.get_allowed_feature_mask = smu_v13_0_0_get_allowed_feature_mask,
.set_default_dpm_table = smu_v13_0_0_set_default_dpm_table,
@@ -2680,6 +2686,7 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = 
{
.send_hbm_bad_channel_flag = smu_v13_0_0_send_bad_mem_channel_flag,
.gpo_control = smu_v13_0_gpo_control,
.get_ecc_info = smu_v13_0_0_get_ecc_info,
+   .notify_no_dc = smu_v13_0_0_notify_no_dc,
 };
 
 void 

[PATCH] drm/amdgpu/gmc6: fix in case the PCI BAR is larger than the actual amount of vram

[hongao]

[why]
limit visible_vram_size to real_vram_size in case
the PCI BAR is larger than the actual amount of vram.

Signed-off-by: hongao 
---
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index b7dad4e67813..c0de7496bfd1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -320,6 +320,8 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
adev->gmc.visible_vram_size = adev->gmc.aper_size;
+   if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
+   adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
 
/* set the gart size */
if (amdgpu_gart_size == -1) {
-- 
2.20.1

[PATCH] drm/amd/pm: allow the user to force BACO on smu v13.0.0/7

[Kenneth Feng]

allow the user to force BACO on smu v13.0.0/7

Signed-off-by: Kenneth Feng 
---
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c   | 2 +-
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 3 ++-
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 3 ++-
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 895cda8e6934..52e9c7611013 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -2263,7 +2263,7 @@ int smu_v13_0_baco_set_state(struct smu_context *smu,
if (state == SMU_BACO_STATE_ENTER) {
ret = smu_cmn_send_smc_msg_with_param(smu,
  SMU_MSG_EnterBaco,
- smu_baco->maco_support ?
+ (smu_baco->maco_support 
&& amdgpu_runtime_pm != 1) ?
  BACO_SEQ_BAMACO : 
BACO_SEQ_BACO,
  NULL);
} else {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index a5857acee641..12ccc12657d7 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -2211,7 +2211,8 @@ static int smu_v13_0_0_baco_enter(struct smu_context *smu)
 
if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev))
return smu_v13_0_baco_set_armd3_sequence(smu,
-   smu_baco->maco_support ? BACO_SEQ_BAMACO : 
BACO_SEQ_BACO);
+   (smu_baco->maco_support && amdgpu_runtime_pm != 
1) ?
+   BACO_SEQ_BAMACO : BACO_SEQ_BACO);
else
return smu_v13_0_baco_enter(smu);
 }
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index 93b3e8fa8238..f0bcc7995983 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -2139,7 +2139,8 @@ static int smu_v13_0_7_baco_enter(struct smu_context *smu)
 
if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev))
return smu_v13_0_baco_set_armd3_sequence(smu,
-   smu_baco->maco_support ? BACO_SEQ_BAMACO : 
BACO_SEQ_BACO);
+   (smu_baco->maco_support && amdgpu_runtime_pm != 
1) ?
+   BACO_SEQ_BAMACO : BACO_SEQ_BACO);
else
return smu_v13_0_baco_enter(smu);
 }
-- 
2.34.1

[PATCH 7/8] drm/amd/pm: add fan target temperature OD setting support for SMU13

[Evan Quan]

Add SMU13 fan target temperature OD setting support.

Signed-off-by: Evan Quan 
---
 .../gpu/drm/amd/include/kgd_pp_interface.h|  2 +
 drivers/gpu/drm/amd/pm/amdgpu_pm.c| 45 
 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h   |  2 +
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |  2 +
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h  |  1 +
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  | 51 ++-
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  | 51 ++-
 7 files changed, 152 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h 
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index 06ed73a6b5f3..e2eefc8d8edc 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -117,6 +117,7 @@ enum pp_clock_type {
OD_FAN_CURVE,
OD_ACOUSTIC_LIMIT,
OD_ACOUSTIC_TARGET,
+   OD_FAN_TARGET_TEMPERATURE,
 };
 
 enum amd_pp_sensors {
@@ -194,6 +195,7 @@ enum PP_OD_DPM_TABLE_COMMAND {
PP_OD_EDIT_FAN_CURVE,
PP_OD_EDIT_ACOUSTIC_LIMIT,
PP_OD_EDIT_ACOUSTIC_TARGET,
+   PP_OD_EDIT_FAN_TARGET_TEMPERATURE,
 };
 
 struct pp_states_info {
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 6a75b53189b7..63edd45e224d 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -3795,6 +3795,43 @@ static umode_t acoustic_target_threshold_visible(struct 
amdgpu_device *adev)
return umode;
 }
 
+static ssize_t fan_target_temperature_show(struct kobject *kobj,
+  struct kobj_attribute *attr,
+  char *buf)
+{
+   struct od_kobj *container = container_of(kobj, struct od_kobj, kobj);
+   struct amdgpu_device *adev = (struct amdgpu_device *)container->priv;
+
+   return (ssize_t)amdgpu_retrieve_od_settings(adev, 
OD_FAN_TARGET_TEMPERATURE, buf);
+}
+
+static ssize_t fan_target_temperature_store(struct kobject *kobj,
+   struct kobj_attribute *attr,
+   const char *buf,
+   size_t count)
+{
+   struct od_kobj *container = container_of(kobj, struct od_kobj, kobj);
+   struct amdgpu_device *adev = (struct amdgpu_device *)container->priv;
+
+   return (ssize_t)amdgpu_distribute_custom_od_settings(adev,
+
PP_OD_EDIT_FAN_TARGET_TEMPERATURE,
+buf,
+count);
+}
+
+static umode_t fan_target_temperature_visible(struct amdgpu_device *adev)
+{
+   umode_t umode = ;
+
+   if (adev->pm.od_feature_mask & 
OD_OPS_SUPPORT_FAN_TARGET_TEMPERATURE_RETRIEVE)
+   umode |= S_IRUSR | S_IRGRP | S_IROTH;
+
+   if (adev->pm.od_feature_mask & 
OD_OPS_SUPPORT_FAN_TARGET_TEMPERATURE_SET)
+   umode |= S_IWUSR;
+
+   return umode;
+}
+
 static struct od_feature_set amdgpu_od_set = {
.containers = {
[0] = {
@@ -3832,6 +3869,14 @@ static struct od_feature_set amdgpu_od_set = {
.store = 
acoustic_target_threshold_store,
},
},
+   [4] = {
+   .name = "fan_target_temperature",
+   .ops = {
+   .is_visible = 
fan_target_temperature_visible,
+   .show = 
fan_target_temperature_show,
+   .store = 
fan_target_temperature_store,
+   },
+   },
},
},
},
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h 
b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
index 6b2bbd13db09..80d2ac1ecb9f 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
@@ -322,6 +322,8 @@ struct config_table_setting
 #define OD_OPS_SUPPORT_ACOUSTIC_LIMIT_THRESHOLD_SETBIT(5)
 #define OD_OPS_SUPPORT_ACOUSTIC_TARGET_THRESHOLD_RETRIEVE  BIT(6)
 #define OD_OPS_SUPPORT_ACOUSTIC_TARGET_THRESHOLD_SET   BIT(7)
+#define OD_OPS_SUPPORT_FAN_TARGET_TEMPERATURE_RETRIEVE BIT(8)
+#define OD_OPS_SUPPORT_FAN_TARGET_TEMPERATURE_SET  BIT(9)
 
 struct amdgpu_pm {
struct mutexmutex;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 3bfa9b9bb247..22a6527139a6 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2489,6 +2489,8 @@ static enum 

[PATCH 8/8] drm/amd/pm: add fan minimum pwm OD setting support for SMU13

[Evan Quan]

Add SMU13 fan minimum pwm OD setting support.

Signed-off-by: Evan Quan 
---
 .../gpu/drm/amd/include/kgd_pp_interface.h|  2 +
 drivers/gpu/drm/amd/pm/amdgpu_pm.c| 45 
 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h   |  2 +
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |  2 +
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h  |  1 +
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  | 51 ++-
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  | 51 ++-
 7 files changed, 152 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h 
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index e2eefc8d8edc..cac972cedce1 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -118,6 +118,7 @@ enum pp_clock_type {
OD_ACOUSTIC_LIMIT,
OD_ACOUSTIC_TARGET,
OD_FAN_TARGET_TEMPERATURE,
+   OD_FAN_MINIMUM_PWM,
 };
 
 enum amd_pp_sensors {
@@ -196,6 +197,7 @@ enum PP_OD_DPM_TABLE_COMMAND {
PP_OD_EDIT_ACOUSTIC_LIMIT,
PP_OD_EDIT_ACOUSTIC_TARGET,
PP_OD_EDIT_FAN_TARGET_TEMPERATURE,
+   PP_OD_EDIT_FAN_MINIMUM_PWM,
 };
 
 struct pp_states_info {
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 63edd45e224d..47a6ff398f7a 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -3832,6 +3832,43 @@ static umode_t fan_target_temperature_visible(struct 
amdgpu_device *adev)
return umode;
 }
 
+static ssize_t fan_minimum_pwm_show(struct kobject *kobj,
+   struct kobj_attribute *attr,
+   char *buf)
+{
+   struct od_kobj *container = container_of(kobj, struct od_kobj, kobj);
+   struct amdgpu_device *adev = (struct amdgpu_device *)container->priv;
+
+   return (ssize_t)amdgpu_retrieve_od_settings(adev, OD_FAN_MINIMUM_PWM, 
buf);
+}
+
+static ssize_t fan_minimum_pwm_store(struct kobject *kobj,
+struct kobj_attribute *attr,
+const char *buf,
+size_t count)
+{
+   struct od_kobj *container = container_of(kobj, struct od_kobj, kobj);
+   struct amdgpu_device *adev = (struct amdgpu_device *)container->priv;
+
+   return (ssize_t)amdgpu_distribute_custom_od_settings(adev,
+
PP_OD_EDIT_FAN_MINIMUM_PWM,
+buf,
+count);
+}
+
+static umode_t fan_minimum_pwm_visible(struct amdgpu_device *adev)
+{
+   umode_t umode = ;
+
+   if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_FAN_MINIMUM_PWM_RETRIEVE)
+   umode |= S_IRUSR | S_IRGRP | S_IROTH;
+
+   if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_FAN_MINIMUM_PWM_SET)
+   umode |= S_IWUSR;
+
+   return umode;
+}
+
 static struct od_feature_set amdgpu_od_set = {
.containers = {
[0] = {
@@ -3877,6 +3914,14 @@ static struct od_feature_set amdgpu_od_set = {
.store = 
fan_target_temperature_store,
},
},
+   [5] = {
+   .name = "fan_minimum_pwm",
+   .ops = {
+   .is_visible = 
fan_minimum_pwm_visible,
+   .show = fan_minimum_pwm_show,
+   .store = fan_minimum_pwm_store,
+   },
+   },
},
},
},
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h 
b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
index 80d2ac1ecb9f..342c4d8318dc 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
@@ -324,6 +324,8 @@ struct config_table_setting
 #define OD_OPS_SUPPORT_ACOUSTIC_TARGET_THRESHOLD_SET   BIT(7)
 #define OD_OPS_SUPPORT_FAN_TARGET_TEMPERATURE_RETRIEVE BIT(8)
 #define OD_OPS_SUPPORT_FAN_TARGET_TEMPERATURE_SET  BIT(9)
+#define OD_OPS_SUPPORT_FAN_MINIMUM_PWM_RETRIEVEBIT(10)
+#define OD_OPS_SUPPORT_FAN_MINIMUM_PWM_SET BIT(11)
 
 struct amdgpu_pm {
struct mutexmutex;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 22a6527139a6..d22ed5a272ce 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2491,6 +2491,8 @@ static enum smu_clk_type smu_convert_to_smuclk(enum 
pp_clock_type type)
clk_type = SMU_OD_ACOUSTIC_TARGET; break;
case 

[PATCH 5/8] drm/amd/pm: add fan acoustic limit OD setting support for SMU13

[Evan Quan]

Add SMU13 fan acoustic limit OD setting support.

Signed-off-by: Evan Quan 
---
 .../gpu/drm/amd/include/kgd_pp_interface.h|  2 +
 drivers/gpu/drm/amd/pm/amdgpu_pm.c| 45 
 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h   |  2 +
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |  2 +
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h  |  1 +
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  | 51 ++-
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  | 51 ++-
 7 files changed, 152 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h 
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index 3743777b45cb..aa07c5d0d3c9 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -115,6 +115,7 @@ enum pp_clock_type {
OD_CCLK,
OD_FAN_MODE,
OD_FAN_CURVE,
+   OD_ACOUSTIC_LIMIT,
 };
 
 enum amd_pp_sensors {
@@ -190,6 +191,7 @@ enum PP_OD_DPM_TABLE_COMMAND {
PP_OD_EDIT_VDDGFX_OFFSET,
PP_OD_EDIT_FAN_MODE,
PP_OD_EDIT_FAN_CURVE,
+   PP_OD_EDIT_ACOUSTIC_LIMIT,
 };
 
 struct pp_states_info {
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 7baebe45b912..e09da037d605 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -3721,6 +3721,43 @@ static umode_t fan_curve_visible(struct amdgpu_device 
*adev)
return umode;
 }
 
+static ssize_t acoustic_limit_threshold_show(struct kobject *kobj,
+struct kobj_attribute *attr,
+char *buf)
+{
+   struct od_kobj *container = container_of(kobj, struct od_kobj, kobj);
+   struct amdgpu_device *adev = (struct amdgpu_device *)container->priv;
+
+   return (ssize_t)amdgpu_retrieve_od_settings(adev, OD_ACOUSTIC_LIMIT, 
buf);
+}
+
+static ssize_t acoustic_limit_threshold_store(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+   struct od_kobj *container = container_of(kobj, struct od_kobj, kobj);
+   struct amdgpu_device *adev = (struct amdgpu_device *)container->priv;
+
+   return (ssize_t)amdgpu_distribute_custom_od_settings(adev,
+
PP_OD_EDIT_ACOUSTIC_LIMIT,
+buf,
+count);
+}
+
+static umode_t acoustic_limit_threshold_visible(struct amdgpu_device *adev)
+{
+   umode_t umode = ;
+
+   if (adev->pm.od_feature_mask & 
OD_OPS_SUPPORT_ACOUSTIC_LIMIT_THRESHOLD_RETRIEVE)
+   umode |= S_IRUSR | S_IRGRP | S_IROTH;
+
+   if (adev->pm.od_feature_mask & 
OD_OPS_SUPPORT_ACOUSTIC_LIMIT_THRESHOLD_SET)
+   umode |= S_IWUSR;
+
+   return umode;
+}
+
 static struct od_feature_set amdgpu_od_set = {
.containers = {
[0] = {
@@ -3742,6 +3779,14 @@ static struct od_feature_set amdgpu_od_set = {
.store = fan_curve_store,
},
},
+   [2] = {
+   .name = "acoustic_limit_rpm_threshold",
+   .ops = {
+   .is_visible = 
acoustic_limit_threshold_visible,
+   .show = 
acoustic_limit_threshold_show,
+   .store = 
acoustic_limit_threshold_store,
+   },
+   },
},
},
},
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h 
b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
index 4463c60b710a..17ffcef34e61 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
@@ -318,6 +318,8 @@ struct config_table_setting
 #define OD_OPS_SUPPORT_FAN_MODE_SETBIT(1)
 #define OD_OPS_SUPPORT_FAN_CURVE_RETRIEVE  BIT(2)
 #define OD_OPS_SUPPORT_FAN_CURVE_SET   BIT(3)
+#define OD_OPS_SUPPORT_ACOUSTIC_LIMIT_THRESHOLD_RETRIEVE   BIT(4)
+#define OD_OPS_SUPPORT_ACOUSTIC_LIMIT_THRESHOLD_SETBIT(5)
 
 struct amdgpu_pm {
struct mutexmutex;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index fe998df9dca2..3db6bd49b73c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2485,6 +2485,8 @@ static enum smu_clk_type smu_convert_to_smuclk(enum 
pp_clock_type type)

[PATCH 4/8] drm/amd/pm: add fan temperature/pwm curve OD setting support for SMU13

[Evan Quan]

Add SMU13 fan temperature/pwm curve OD setting support.

Signed-off-by: Evan Quan 
---
 .../gpu/drm/amd/include/kgd_pp_interface.h|  2 +
 drivers/gpu/drm/amd/pm/amdgpu_pm.c| 45 ++
 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h   |  2 +
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |  2 +
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h  |  1 +
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  | 87 ++-
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  | 87 ++-
 7 files changed, 224 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h 
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index d51c639a3f31..3743777b45cb 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -114,6 +114,7 @@ enum pp_clock_type {
OD_VDDGFX_OFFSET,
OD_CCLK,
OD_FAN_MODE,
+   OD_FAN_CURVE,
 };
 
 enum amd_pp_sensors {
@@ -188,6 +189,7 @@ enum PP_OD_DPM_TABLE_COMMAND {
PP_OD_COMMIT_DPM_TABLE,
PP_OD_EDIT_VDDGFX_OFFSET,
PP_OD_EDIT_FAN_MODE,
+   PP_OD_EDIT_FAN_CURVE,
 };
 
 struct pp_states_info {
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 90c5f3c95307..7baebe45b912 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -3684,6 +3684,43 @@ static umode_t fan_mode_visible(struct amdgpu_device 
*adev)
return umode;
 }
 
+static ssize_t fan_curve_show(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+   struct od_kobj *container = container_of(kobj, struct od_kobj, kobj);
+   struct amdgpu_device *adev = (struct amdgpu_device *)container->priv;
+
+   return (ssize_t)amdgpu_retrieve_od_settings(adev, OD_FAN_CURVE, buf);
+}
+
+static ssize_t fan_curve_store(struct kobject *kobj,
+  struct kobj_attribute *attr,
+  const char *buf,
+  size_t count)
+{
+   struct od_kobj *container = container_of(kobj, struct od_kobj, kobj);
+   struct amdgpu_device *adev = (struct amdgpu_device *)container->priv;
+
+   return (ssize_t)amdgpu_distribute_custom_od_settings(adev,
+
PP_OD_EDIT_FAN_CURVE,
+buf,
+count);
+}
+
+static umode_t fan_curve_visible(struct amdgpu_device *adev)
+{
+   umode_t umode = ;
+
+   if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_FAN_CURVE_RETRIEVE)
+   umode |= S_IRUSR | S_IRGRP | S_IROTH;
+
+   if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_FAN_CURVE_SET)
+   umode |= S_IWUSR;
+
+   return umode;
+}
+
 static struct od_feature_set amdgpu_od_set = {
.containers = {
[0] = {
@@ -3697,6 +3734,14 @@ static struct od_feature_set amdgpu_od_set = {
.store = fan_mode_store,
},
},
+   [1] = {
+   .name = "fan_curve",
+   .ops = {
+   .is_visible = fan_curve_visible,
+   .show = fan_curve_show,
+   .store = fan_curve_store,
+   },
+   },
},
},
},
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h 
b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
index b54f84e2408a..4463c60b710a 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
@@ -316,6 +316,8 @@ struct config_table_setting
 
 #define OD_OPS_SUPPORT_FAN_MODE_RETRIEVE   BIT(0)
 #define OD_OPS_SUPPORT_FAN_MODE_SETBIT(1)
+#define OD_OPS_SUPPORT_FAN_CURVE_RETRIEVE  BIT(2)
+#define OD_OPS_SUPPORT_FAN_CURVE_SET   BIT(3)
 
 struct amdgpu_pm {
struct mutexmutex;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 01ccfd219d6b..fe998df9dca2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2483,6 +2483,8 @@ static enum smu_clk_type smu_convert_to_smuclk(enum 
pp_clock_type type)
clk_type = SMU_OD_CCLK; break;
case OD_FAN_MODE:
clk_type = SMU_OD_FAN_MODE; break;
+   case OD_FAN_CURVE:
+   clk_type = SMU_OD_FAN_CURVE; break;
default:
clk_type = SMU_CLK_COUNT; break;
}
diff --git 

[PATCH 6/8] drm/amd/pm: add fan acoustic target OD setting support for SMU13

[Evan Quan]

Add SMU13 fan acoustic target OD setting support.

Signed-off-by: Evan Quan 
---
 .../gpu/drm/amd/include/kgd_pp_interface.h|  2 +
 drivers/gpu/drm/amd/pm/amdgpu_pm.c| 45 
 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h   |  2 +
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |  2 +
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h  |  1 +
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  | 51 ++-
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  | 51 ++-
 7 files changed, 152 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h 
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index aa07c5d0d3c9..06ed73a6b5f3 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -116,6 +116,7 @@ enum pp_clock_type {
OD_FAN_MODE,
OD_FAN_CURVE,
OD_ACOUSTIC_LIMIT,
+   OD_ACOUSTIC_TARGET,
 };
 
 enum amd_pp_sensors {
@@ -192,6 +193,7 @@ enum PP_OD_DPM_TABLE_COMMAND {
PP_OD_EDIT_FAN_MODE,
PP_OD_EDIT_FAN_CURVE,
PP_OD_EDIT_ACOUSTIC_LIMIT,
+   PP_OD_EDIT_ACOUSTIC_TARGET,
 };
 
 struct pp_states_info {
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index e09da037d605..6a75b53189b7 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -3758,6 +3758,43 @@ static umode_t acoustic_limit_threshold_visible(struct 
amdgpu_device *adev)
return umode;
 }
 
+static ssize_t acoustic_target_threshold_show(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+   struct od_kobj *container = container_of(kobj, struct od_kobj, kobj);
+   struct amdgpu_device *adev = (struct amdgpu_device *)container->priv;
+
+   return (ssize_t)amdgpu_retrieve_od_settings(adev, OD_ACOUSTIC_TARGET, 
buf);
+}
+
+static ssize_t acoustic_target_threshold_store(struct kobject *kobj,
+  struct kobj_attribute *attr,
+  const char *buf,
+  size_t count)
+{
+   struct od_kobj *container = container_of(kobj, struct od_kobj, kobj);
+   struct amdgpu_device *adev = (struct amdgpu_device *)container->priv;
+
+   return (ssize_t)amdgpu_distribute_custom_od_settings(adev,
+
PP_OD_EDIT_ACOUSTIC_TARGET,
+buf,
+count);
+}
+
+static umode_t acoustic_target_threshold_visible(struct amdgpu_device *adev)
+{
+   umode_t umode = ;
+
+   if (adev->pm.od_feature_mask & 
OD_OPS_SUPPORT_ACOUSTIC_TARGET_THRESHOLD_RETRIEVE)
+   umode |= S_IRUSR | S_IRGRP | S_IROTH;
+
+   if (adev->pm.od_feature_mask & 
OD_OPS_SUPPORT_ACOUSTIC_TARGET_THRESHOLD_SET)
+   umode |= S_IWUSR;
+
+   return umode;
+}
+
 static struct od_feature_set amdgpu_od_set = {
.containers = {
[0] = {
@@ -3787,6 +3824,14 @@ static struct od_feature_set amdgpu_od_set = {
.store = 
acoustic_limit_threshold_store,
},
},
+   [3] = {
+   .name = "acoustic_target_rpm_threshold",
+   .ops = {
+   .is_visible = 
acoustic_target_threshold_visible,
+   .show = 
acoustic_target_threshold_show,
+   .store = 
acoustic_target_threshold_store,
+   },
+   },
},
},
},
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h 
b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
index 17ffcef34e61..6b2bbd13db09 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
@@ -320,6 +320,8 @@ struct config_table_setting
 #define OD_OPS_SUPPORT_FAN_CURVE_SET   BIT(3)
 #define OD_OPS_SUPPORT_ACOUSTIC_LIMIT_THRESHOLD_RETRIEVE   BIT(4)
 #define OD_OPS_SUPPORT_ACOUSTIC_LIMIT_THRESHOLD_SETBIT(5)
+#define OD_OPS_SUPPORT_ACOUSTIC_TARGET_THRESHOLD_RETRIEVE  BIT(6)
+#define OD_OPS_SUPPORT_ACOUSTIC_TARGET_THRESHOLD_SET   BIT(7)
 
 struct amdgpu_pm {
struct mutexmutex;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 3db6bd49b73c..3bfa9b9bb247 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2487,6 +2487,8 @@ static enum 

[PATCH 0/8] A new set of Linux OD interfaces

[Evan Quan]

The existing OD interface `pp_od_clk_voltage` is unable to meet the growing
demands for more OD functionalities. Since the buf used within it comes with
size limit as one page. With more OD functionalities added, we will hit that
limit soon.

To better meet the growing demainds, a new set of OD interfaces are designed.
With this new design, there will be multiple interfaces exposed with each
representing a single OD functionality. And all those interfaces will be
arranged in a tree liked hierarchy as below. Meanwhile all functionalities
for the same component will be arranged under the same directory.

gpu_od/
├── fan_ctrl
├── acoustic_limit_rpm_threshold
├── acoustic_target_rpm_threshold
├── fan_curve
├── fan_minimum_pwm
├── fan_mode
├── fan_target_temperature
...
...(more to be added)


Evan Quan (8):
  drm/amd/pm: introduce a new set of OD interfaces
  drm/amdgpu: revise the device initialization sequences
  drm/amd/pm: add fan mode OD setting support for SMU13
  drm/amd/pm: add fan temperature/pwm curve OD setting support for SMU13
  drm/amd/pm: add fan acoustic limit OD setting support for SMU13
  drm/amd/pm: add fan acoustic target OD setting support for SMU13
  drm/amd/pm: add fan target temperature OD setting support for SMU13
  drm/amd/pm: add fan minimum pwm OD setting support for SMU13

 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c|  39 +-
 .../gpu/drm/amd/include/kgd_pp_interface.h|  14 +-
 drivers/gpu/drm/amd/pm/amdgpu_pm.c| 676 +-
 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h   |  16 +
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |  12 +
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h  |   6 +
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  | 316 +++-
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  | 316 +++-
 8 files changed, 1370 insertions(+), 25 deletions(-)

-- 
2.34.1

[PATCH 3/8] drm/amd/pm: add fan mode OD setting support for SMU13

[Evan Quan]

Add SMU13 fan mode OD setting support.

Signed-off-by: Evan Quan 
---
 .../gpu/drm/amd/include/kgd_pp_interface.h|   4 +-
 drivers/gpu/drm/amd/pm/amdgpu_pm.c| 189 +-
 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h   |   4 +
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |   2 +
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h  |   1 +
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  |  35 +++-
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  |  35 +++-
 7 files changed, 262 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h 
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index 90989405eddc..d51c639a3f31 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -113,6 +113,7 @@ enum pp_clock_type {
OD_RANGE,
OD_VDDGFX_OFFSET,
OD_CCLK,
+   OD_FAN_MODE,
 };
 
 enum amd_pp_sensors {
@@ -185,7 +186,8 @@ enum PP_OD_DPM_TABLE_COMMAND {
PP_OD_EDIT_VDDC_CURVE,
PP_OD_RESTORE_DEFAULT_TABLE,
PP_OD_COMMIT_DPM_TABLE,
-   PP_OD_EDIT_VDDGFX_OFFSET
+   PP_OD_EDIT_VDDGFX_OFFSET,
+   PP_OD_EDIT_FAN_MODE,
 };
 
 struct pp_states_info {
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 9352c0fbb09f..90c5f3c95307 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -3513,7 +3513,194 @@ static const struct attribute_group *hwmon_groups[] = {
NULL
 };
 
-static struct od_feature_set amdgpu_od_set;
+static int amdgpu_retrieve_od_settings(struct amdgpu_device *adev,
+  enum pp_clock_type od_type,
+  char *buf)
+{
+   int size = 0;
+   int ret;
+
+   if (amdgpu_in_reset(adev))
+   return -EPERM;
+   if (adev->in_suspend && !adev->in_runpm)
+   return -EPERM;
+
+   ret = pm_runtime_get_sync(adev->dev);
+   if (ret < 0) {
+   pm_runtime_put_autosuspend(adev->dev);
+   return ret;
+   }
+
+   size = amdgpu_dpm_print_clock_levels(adev, od_type, buf);
+   if (size == 0)
+   size = sysfs_emit(buf, "\n");
+
+   pm_runtime_mark_last_busy(adev->dev);
+   pm_runtime_put_autosuspend(adev->dev);
+
+   return size;
+}
+
+static int parse_input_od_command_lines(const char *buf,
+   size_t count,
+   u32 *type,
+   long *params,
+   uint32_t *num_of_params)
+{
+   const char delimiter[3] = {' ', '\n', '\0'};
+   uint32_t parameter_size = 0;
+   char buf_cpy[128] = {0};
+   char *tmp_str, *sub_str;
+   int ret;
+
+   if (count > sizeof(buf_cpy) - 1)
+   return -EINVAL;
+
+   memcpy(buf_cpy, buf, count);
+   tmp_str = buf_cpy;
+
+   /* skip heading spaces */
+   while (isspace(*tmp_str))
+   tmp_str++;
+
+   switch (*tmp_str) {
+   case 'r':
+   *type = PP_OD_RESTORE_DEFAULT_TABLE;
+   return 0;
+   case 'c':
+   *type = PP_OD_COMMIT_DPM_TABLE;
+   return 0;
+   default:
+   break;
+   }
+
+   while ((sub_str = strsep(_str, delimiter)) != NULL) {
+   if (strlen(sub_str) == 0)
+   continue;
+
+   ret = kstrtol(sub_str, 0, [parameter_size]);
+   if (ret)
+   return -EINVAL;
+   parameter_size++;
+
+   while (isspace(*tmp_str))
+   tmp_str++;
+   }
+
+   *num_of_params = parameter_size;
+
+   return 0;
+}
+
+static int
+amdgpu_distribute_custom_od_settings(struct amdgpu_device *adev,
+enum PP_OD_DPM_TABLE_COMMAND cmd_type,
+const char *in_buf,
+size_t count)
+{
+   uint32_t parameter_size = 0;
+   long parameter[64];
+   int ret;
+
+   if (amdgpu_in_reset(adev))
+   return -EPERM;
+   if (adev->in_suspend && !adev->in_runpm)
+   return -EPERM;
+
+   ret = parse_input_od_command_lines(in_buf,
+  count,
+  _type,
+  parameter,
+  _size);
+   if (ret)
+   return ret;
+
+   ret = pm_runtime_get_sync(adev->dev);
+   if (ret < 0)
+   goto err_out0;
+
+   ret = amdgpu_dpm_odn_edit_dpm_table(adev,
+   cmd_type,
+   parameter,
+   parameter_size);
+   if (ret)
+   goto err_out1;
+
+   if (cmd_type == 

[PATCH 2/8] drm/amdgpu: revise the device initialization sequences

[Evan Quan]

By placing the sysfs interfaces creation after `.late_int`. Since some
operations performed during `.late_init` may affect how the sysfs
interfaces should be created.

Signed-off-by: Evan Quan 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 37 --
 1 file changed, 21 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 77eb18447e82..b1accf5c1982 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3860,22 +3860,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
/* Get a log2 for easy divisions. */
adev->mm_stats.log2_max_MBps = ilog2(max(1u, max_MBps));
 
-   r = amdgpu_atombios_sysfs_init(adev);
-   if (r)
-   drm_err(>ddev,
-   "registering atombios sysfs failed (%d).\n", r);
-
-   r = amdgpu_pm_sysfs_init(adev);
-   if (r)
-   DRM_ERROR("registering pm sysfs failed (%d).\n", r);
-
-   r = amdgpu_ucode_sysfs_init(adev);
-   if (r) {
-   adev->ucode_sysfs_en = false;
-   DRM_ERROR("Creating firmware sysfs failed (%d).\n", r);
-   } else
-   adev->ucode_sysfs_en = true;
-
/*
 * Register gpu instance before amdgpu_device_enable_mgpu_fan_boost.
 * Otherwise the mgpu fan boost feature will be skipped due to the
@@ -3904,6 +3888,27 @@ int amdgpu_device_init(struct amdgpu_device *adev,
flush_delayed_work(>delayed_init_work);
}
 
+   /*
+* Place those sysfs registering after `late_init`. As some of those
+* operations performed in `late_init` might affect the sysfs
+* interfaces creating.
+*/
+   r = amdgpu_atombios_sysfs_init(adev);
+   if (r)
+   drm_err(>ddev,
+   "registering atombios sysfs failed (%d).\n", r);
+
+   r = amdgpu_pm_sysfs_init(adev);
+   if (r)
+   DRM_ERROR("registering pm sysfs failed (%d).\n", r);
+
+   r = amdgpu_ucode_sysfs_init(adev);
+   if (r) {
+   adev->ucode_sysfs_en = false;
+   DRM_ERROR("Creating firmware sysfs failed (%d).\n", r);
+   } else
+   adev->ucode_sysfs_en = true;
+
r = sysfs_create_files(>dev->kobj, amdgpu_dev_attributes);
if (r)
dev_err(adev->dev, "Could not create amdgpu device attr\n");
-- 
2.34.1

[PATCH 1/8] drm/amd/pm: introduce a new set of OD interfaces

[Evan Quan]

There will be multiple interfaces(sysfs files) exposed with each representing
a single OD functionality. And all those interface will be arranged in a tree
liked hierarchy with the top dir as "gpu_od". Meanwhile all functionalities
for the same component will be arranged under the same directory.

Signed-off-by: Evan Quan 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |   2 +
 drivers/gpu/drm/amd/pm/amdgpu_pm.c | 264 -
 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h|   2 +
 3 files changed, 266 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 6809bf7dae57..77eb18447e82 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3622,6 +3622,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 
INIT_LIST_HEAD(>ras_list);
 
+   INIT_LIST_HEAD(>pm.od_kobj_list);
+
INIT_DELAYED_WORK(>delayed_init_work,
  amdgpu_device_delayed_init_work_handler);
INIT_DELAYED_WORK(>gfx.gfx_off_delay_work,
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 5aed023f7402..9352c0fbb09f 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -35,6 +35,44 @@
 #include 
 #include 
 
+#define MAX_NUM_OF_FEATURES_PER_SUBSET 8
+#define MAX_NUM_OF_SUBSETS 8
+
+struct od_attribute {
+   struct kobj_attribute   attribute;
+   struct list_headentry;
+};
+
+struct od_kobj {
+   struct kobject  kobj;
+   struct list_headentry;
+   struct list_headattribute;
+   void*priv;
+};
+
+struct od_feature_ops {
+   umode_t (*is_visible)(struct amdgpu_device *adev);
+   ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
+   char *buf);
+   ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
+const char *buf, size_t count);
+};
+
+struct od_feature_item {
+   const char  *name;
+   struct od_feature_ops   ops;
+};
+
+struct od_feature_container {
+   char*name;
+   struct od_feature_ops   ops;
+   struct od_feature_item  
sub_feature[MAX_NUM_OF_FEATURES_PER_SUBSET];
+};
+
+struct od_feature_set {
+   struct od_feature_container containers[MAX_NUM_OF_SUBSETS];
+};
+
 static const struct hwmon_temp_label {
enum PP_HWMON_TEMP channel;
const char *label;
@@ -3475,10 +3513,216 @@ static const struct attribute_group *hwmon_groups[] = {
NULL
 };
 
-int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
+static struct od_feature_set amdgpu_od_set;
+
+static void od_kobj_release(struct kobject *kobj)
+{
+   struct od_kobj *od_kobj = container_of(kobj, struct od_kobj, kobj);
+
+   kfree(od_kobj);
+}
+
+static const struct kobj_type od_ktype = {
+   .release= od_kobj_release,
+   .sysfs_ops  = _sysfs_ops,
+};
+
+static void amdgpu_od_set_fini(struct amdgpu_device *adev)
+{
+   struct od_kobj *container, *container_next;
+   struct od_attribute *attribute, *attribute_next;
+
+   if (list_empty(>pm.od_kobj_list))
+   return;
+
+   list_for_each_entry_safe(container, container_next,
+>pm.od_kobj_list, entry) {
+   list_del(>entry);
+
+   list_for_each_entry_safe(attribute, attribute_next,
+>attribute, entry) {
+   list_del(>entry);
+   sysfs_remove_file(>kobj,
+ >attribute.attr);
+   kfree(attribute);
+   }
+
+   kobject_put(>kobj);
+   }
+}
+
+static bool amdgpu_is_od_feature_supported(struct amdgpu_device *adev,
+  struct od_feature_ops *feature_ops)
+{
+   umode_t mode;
+
+   if (!feature_ops->is_visible)
+   return false;
+
+   /*
+* If the feature has no user read and write mode set,
+* we can assume the feature is actually not supported.(?)
+* And the revelant sysfs interface should not be exposed.
+*/
+   mode = feature_ops->is_visible(adev);
+   if (mode & (S_IRUSR | S_IWUSR))
+   return true;
+
+   return false;
+}
+
+static bool amdgpu_od_is_self_contained(struct amdgpu_device *adev,
+   struct od_feature_container *container)
+{
+   int i;
+
+   /*
+* If there is no valid entry within the container, the container
+* is recognized as a self contained container. And the valid entry
+* here means it has a valid naming and it is visible/supported by
+* the ASIC.
+*/
+   for (i = 0; i < 

Re: [RESEND v3 1/5] drm/amdgpu: Create a module param to disable soft recovery

[Christian König]

Am 10.08.23 um 21:23 schrieb André Almeida:

Create a module parameter to disable soft recoveries on amdgpu, making
every recovery go through the device reset path. This option makes
easier to force device resets for testing and debugging purposes.


I'm still torn apart on this. On the one hand it's certainly useful for 
developers on the other hand module parameters are not meant to be used 
by developers, they are meant to be used by end users.


Now we have to ask what's the use case to disable soft recovery by an 
end user? I don't see any.


Maybe we can overload the amdgpu_gpu_recovery module option with this. 
Or even better merge all the developer module parameter into a 
amdgpu_debug option. This way it should be pretty obvious that this 
isn't meant to be used by someone who doesn't know how to use it.


Regards,
Christian.



Signed-off-by: André Almeida 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h  | 1 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c  | 9 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 6 +-
  3 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 2e3c7c15cb8e..9c6a332261ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -189,6 +189,7 @@ extern uint amdgpu_force_long_training;
  extern int amdgpu_lbpw;
  extern int amdgpu_compute_multipipe;
  extern int amdgpu_gpu_recovery;
+extern bool amdgpu_soft_recovery;
  extern int amdgpu_emu_mode;
  extern uint amdgpu_smu_memory_pool_size;
  extern int amdgpu_smu_pptable_id;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0fec81d6a7df..27e7fa36cc60 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -163,6 +163,7 @@ uint amdgpu_force_long_training;
  int amdgpu_lbpw = -1;
  int amdgpu_compute_multipipe = -1;
  int amdgpu_gpu_recovery = -1; /* auto */
+bool amdgpu_soft_recovery = true;
  int amdgpu_emu_mode;
  uint amdgpu_smu_memory_pool_size;
  int amdgpu_smu_pptable_id = -1;
@@ -538,6 +539,14 @@ module_param_named(compute_multipipe, 
amdgpu_compute_multipipe, int, 0444);
  MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = 
disable, -1 = auto)");
  module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444);
  
+/**

+ * DOC: gpu_soft_recovery (bool)
+ * Set true to allow the driver to try soft recoveries if a job get stuck. Set
+ * to false to always force a GPU reset during recovery.
+ */
+MODULE_PARM_DESC(gpu_soft_recovery, "Enable GPU soft recovery mechanism (default: 
true)");
+module_param_named(gpu_soft_recovery, amdgpu_soft_recovery, bool, 0644);
+
  /**
   * DOC: emu_mode (int)
   * Set value 1 to enable emulation mode. This is only needed when running on 
an emulator. The default is 0 (disabled).
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 80d6e132e409..40678d9fb17e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -434,8 +434,12 @@ bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, 
unsigned int vmid,
   struct dma_fence *fence)
  {
unsigned long flags;
+   ktime_t deadline;
  
-	ktime_t deadline = ktime_add_us(ktime_get(), 1);

+   if (!amdgpu_soft_recovery)
+   return false;
+
+   deadline = ktime_add_us(ktime_get(), 1);
  
  	if (amdgpu_sriov_vf(ring->adev) || !ring->funcs->soft_recovery || !fence)

return false;