[PATCH] drm/amdgpu: Fix missing error code in amdgpu_od_set_init
This commit ensures that an error code -EINVAL is set in the
amdgpu_od_set_init function when the od_kobj_list has only one entry,
indicating that the list is not in the expected state.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_pm.c:4355 amdgpu_od_set_init() warn:
missing error code 'ret'
Fixes: d9a3a5e770dc ("drm/amdgpu/pm: Remove gpu_od if it's an empty directory")
Cc: Ma Jun
Cc: Yang Wang
Cc: Lijo Lazar
Cc: Alex Deucher
Cc: Christian König
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index d5d6ab484e5a..86118fbfc33c 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -4463,8 +4463,10 @@ static int amdgpu_od_set_init(struct amdgpu_device *adev)
* If gpu_od is the only member in the list, that means gpu_od is an
* empty directory, so remove it.
*/
- if (list_is_singular(&adev->pm.od_kobj_list))
+ if (list_is_singular(&adev->pm.od_kobj_list)) {
+ ret = -EINVAL;
goto err_out;
+ }
return 0;
--
2.34.1
[PATCH] drm/amd/display: Add null checks for 'stream' and 'plane' before dereferencing
This commit adds null checks for the 'stream' and 'plane' variables in
the dcn30_apply_idle_power_optimizations function. These variables were
previously assumed to be null at line 922, but they were used later in
the code without checking if they were null. This could potentially lead
to a null pointer dereference, which would cause a crash.
The null checks ensure that 'stream' and 'plane' are not null before
they are used, preventing potential crashes.
Fixes the below static smatch checker:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn30/dcn30_hwseq.c:938
dcn30_apply_idle_power_optimizations() error: we previously assumed 'stream'
could be null (see line 922)
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn30/dcn30_hwseq.c:940
dcn30_apply_idle_power_optimizations() error: we previously assumed 'plane'
could be null (see line 922)
Cc: Tom Chung
Cc: Nicholas Kazlauskas
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Cc: Roman Li
Cc: Hersen Wu
Cc: Alex Hung
Cc: Aurabindo Pillai
Cc: Harry Wentland
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
index 29d1f150846a..4c4706153305 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
@@ -919,6 +919,9 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc,
bool enable)
stream = dc->current_state->streams[0];
plane = (stream ?
dc->current_state->stream_status[0].plane_states[0] : NULL);
+ if (!stream || !plane)
+ return false;
+
if (stream && plane) {
cursor_cache_enable =
stream->cursor_position.enable &&
plane->address.grph.cursor_cache_addr.quad_part;
--
2.34.1
RE: [PATCH] drm/amdgpu: Estimate RAS reservation when report capacity v2
[AMD Official Use Only - AMD Internal Distribution Only]
Thanks Tao. Yes, I added the comments to amdgpu_ras.h.
+/* Reserve 8 physical dram row for possible retirement.
+ * In worst cases, it will lose 8 * 2MB memory in vram domain */
+#define AMDGPU_RAS_RESERVED_VRAM_SIZE (16ULL << 20)
Regards,
Hawking
-Original Message-
From: Zhou1, Tao
Sent: Tuesday, May 28, 2024 14:02
To: Zhang, Hawking ; amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix ; Kasiviswanathan, Harish
Subject: RE: [PATCH] drm/amdgpu: Estimate RAS reservation when report capacity
v2
[AMD Official Use Only - AMD Internal Distribution Only]
I prefer to add comment for AMDGPU_RAS_RESERVED_VRAM_SIZE to explain the value
of 16MB, anyway the patch is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Zhang, Hawking
> Sent: Tuesday, May 28, 2024 1:57 PM
> To: amd-gfx@lists.freedesktop.org; Zhou1, Tao
> Cc: Zhang, Hawking ; Kuehling, Felix
> ; Kasiviswanathan, Harish
>
> Subject: [PATCH] drm/amdgpu: Estimate RAS reservation when report
> capacity v2
>
> Add estimate of how much vram we need to reserve for RAS when
> caculating the total available vram.
>
> v2: apply the change to MP0 v13_0_2 and v13_0_14
>
> Signed-off-by: Hawking Zhang
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 +++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 20 +++
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 4
> 3 files changed, 31 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index e98927529f61..ad813772f8a1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -173,6 +173,8 @@ int amdgpu_amdkfd_reserve_mem_limit(struct
> amdgpu_device *adev, {
> uint64_t reserved_for_pt =
> ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> + uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes
> + : 0);
> size_t system_mem_needed, ttm_mem_needed, vram_needed;
> int ret = 0;
> uint64_t vram_size = 0;
> @@ -221,7 +223,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct
> amdgpu_device *adev,
> (kfd_mem_limit.ttm_mem_used + ttm_mem_needed >
>kfd_mem_limit.max_ttm_mem_limit) ||
> (adev && xcp_id >= 0 && adev->kfd.vram_used[xcp_id] +
> vram_needed >
> - vram_size - reserved_for_pt - atomic64_read(&adev->vram_pin_size)
> +
> + vram_size - reserved_for_pt - reserved_for_ras -
> +atomic64_read(&adev->vram_pin_size) +
>atomic64_read(&adev->kfd.vram_pinned))) {
> ret = -ENOMEM;
> goto release;
> @@ -1694,6 +1696,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
> amdgpu_device *adev, {
> uint64_t reserved_for_pt =
> ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> + uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes
> + : 0);
> ssize_t available;
> uint64_t vram_available, system_mem_available,
> ttm_mem_available;
>
> @@ -1702,7 +1706,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
> amdgpu_device *adev,
> - adev->kfd.vram_used_aligned[xcp_id]
> - atomic64_read(&adev->vram_pin_size)
> + atomic64_read(&adev->kfd.vram_pinned)
> - - reserved_for_pt;
> + - reserved_for_pt
> + - reserved_for_ras;
>
> if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
> system_mem_available = no_system_mem_limit ?
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index ecce022c657b..f28bf5765380 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -3317,6 +3317,24 @@ static void amdgpu_ras_event_mgr_init(struct
> amdgpu_device *adev)
> amdgpu_put_xgmi_hive(hive); }
>
> +static void amdgpu_ras_init_reserved_vram_size(struct amdgpu_device
> +*adev) {
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> +
> + if (!con || (adev->flags & AMD_IS_APU))
> + return;
> +
> + switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {
> + case IP_VERSION(13, 0, 2):
> + case IP_VERSION(13, 0, 6):
> + case IP_VERSION(13, 0, 14):
> + con->reserved_pages_in_bytes =
> AMDGPU_RAS_RESERVED_VRAM_SIZE;
> + break;
> + default:
> + break;
> + }
> +}
> +
> int amdgpu_ras_init(struct amdgpu_device *adev) {
> struct amdgpu_ras *con = amdgpu_ras_get_context(adev); @@
> -3422,6
> +3440,8 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
> /* Get RAS schema for particular SOC */
> con->schema = amdgpu_get_ras_schema(adev);
>
> + amdgpu_ras_init_res
RE: [PATCH] drm/amdgpu: Estimate RAS reservation when report capacity v2
[AMD Official Use Only - AMD Internal Distribution Only]
I prefer to add comment for AMDGPU_RAS_RESERVED_VRAM_SIZE to explain the value
of 16MB, anyway the patch is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Zhang, Hawking
> Sent: Tuesday, May 28, 2024 1:57 PM
> To: amd-gfx@lists.freedesktop.org; Zhou1, Tao
> Cc: Zhang, Hawking ; Kuehling, Felix
> ; Kasiviswanathan, Harish
>
> Subject: [PATCH] drm/amdgpu: Estimate RAS reservation when report capacity v2
>
> Add estimate of how much vram we need to reserve for RAS when caculating the
> total available vram.
>
> v2: apply the change to MP0 v13_0_2 and v13_0_14
>
> Signed-off-by: Hawking Zhang
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 +++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 20 +++
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 4
> 3 files changed, 31 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index e98927529f61..ad813772f8a1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -173,6 +173,8 @@ int amdgpu_amdkfd_reserve_mem_limit(struct
> amdgpu_device *adev, {
> uint64_t reserved_for_pt =
> ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> + uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes : 0);
> size_t system_mem_needed, ttm_mem_needed, vram_needed;
> int ret = 0;
> uint64_t vram_size = 0;
> @@ -221,7 +223,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct
> amdgpu_device *adev,
> (kfd_mem_limit.ttm_mem_used + ttm_mem_needed >
>kfd_mem_limit.max_ttm_mem_limit) ||
> (adev && xcp_id >= 0 && adev->kfd.vram_used[xcp_id] +
> vram_needed >
> - vram_size - reserved_for_pt - atomic64_read(&adev->vram_pin_size)
> +
> + vram_size - reserved_for_pt - reserved_for_ras -
> +atomic64_read(&adev->vram_pin_size) +
>atomic64_read(&adev->kfd.vram_pinned))) {
> ret = -ENOMEM;
> goto release;
> @@ -1694,6 +1696,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
> amdgpu_device *adev, {
> uint64_t reserved_for_pt =
> ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> + uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes : 0);
> ssize_t available;
> uint64_t vram_available, system_mem_available, ttm_mem_available;
>
> @@ -1702,7 +1706,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
> amdgpu_device *adev,
> - adev->kfd.vram_used_aligned[xcp_id]
> - atomic64_read(&adev->vram_pin_size)
> + atomic64_read(&adev->kfd.vram_pinned)
> - - reserved_for_pt;
> + - reserved_for_pt
> + - reserved_for_ras;
>
> if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
> system_mem_available = no_system_mem_limit ?
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index ecce022c657b..f28bf5765380 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -3317,6 +3317,24 @@ static void amdgpu_ras_event_mgr_init(struct
> amdgpu_device *adev)
> amdgpu_put_xgmi_hive(hive);
> }
>
> +static void amdgpu_ras_init_reserved_vram_size(struct amdgpu_device
> +*adev) {
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> +
> + if (!con || (adev->flags & AMD_IS_APU))
> + return;
> +
> + switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {
> + case IP_VERSION(13, 0, 2):
> + case IP_VERSION(13, 0, 6):
> + case IP_VERSION(13, 0, 14):
> + con->reserved_pages_in_bytes =
> AMDGPU_RAS_RESERVED_VRAM_SIZE;
> + break;
> + default:
> + break;
> + }
> +}
> +
> int amdgpu_ras_init(struct amdgpu_device *adev) {
> struct amdgpu_ras *con = amdgpu_ras_get_context(adev); @@ -3422,6
> +3440,8 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
> /* Get RAS schema for particular SOC */
> con->schema = amdgpu_get_ras_schema(adev);
>
> + amdgpu_ras_init_reserved_vram_size(adev);
> +
> if (amdgpu_ras_fs_init(adev)) {
> r = -EINVAL;
> goto release_con;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> index 6a8c7b1609df..bd61f77a7134 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> @@ -64,6 +64,9 @@ struct amdgpu_iv_entry; #define
> AMDGPU_RAS_FEATURES_SOCKETID_SHIFT 29 #define
> AMDGPU_RAS_FEATURES_SOCKETID_MASK 0xe000
>
> +/* Reserve 8 physical dram row for possible retirement.
> + * I
[PATCH] drm/amdgpu: Estimate RAS reservation when report capacity v2
Add estimate of how much vram we need to reserve for RAS
when caculating the total available vram.
v2: apply the change to MP0 v13_0_2 and v13_0_14
Signed-off-by: Hawking Zhang
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 20 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 4
3 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index e98927529f61..ad813772f8a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -173,6 +173,8 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device
*adev,
{
uint64_t reserved_for_pt =
ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
+ struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
+ uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes : 0);
size_t system_mem_needed, ttm_mem_needed, vram_needed;
int ret = 0;
uint64_t vram_size = 0;
@@ -221,7 +223,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device
*adev,
(kfd_mem_limit.ttm_mem_used + ttm_mem_needed >
kfd_mem_limit.max_ttm_mem_limit) ||
(adev && xcp_id >= 0 && adev->kfd.vram_used[xcp_id] + vram_needed >
-vram_size - reserved_for_pt - atomic64_read(&adev->vram_pin_size) +
+vram_size - reserved_for_pt - reserved_for_ras -
atomic64_read(&adev->vram_pin_size) +
atomic64_read(&adev->kfd.vram_pinned))) {
ret = -ENOMEM;
goto release;
@@ -1694,6 +1696,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
amdgpu_device *adev,
{
uint64_t reserved_for_pt =
ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
+ struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
+ uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes : 0);
ssize_t available;
uint64_t vram_available, system_mem_available, ttm_mem_available;
@@ -1702,7 +1706,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
amdgpu_device *adev,
- adev->kfd.vram_used_aligned[xcp_id]
- atomic64_read(&adev->vram_pin_size)
+ atomic64_read(&adev->kfd.vram_pinned)
- - reserved_for_pt;
+ - reserved_for_pt
+ - reserved_for_ras;
if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
system_mem_available = no_system_mem_limit ?
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index ecce022c657b..f28bf5765380 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -3317,6 +3317,24 @@ static void amdgpu_ras_event_mgr_init(struct
amdgpu_device *adev)
amdgpu_put_xgmi_hive(hive);
}
+static void amdgpu_ras_init_reserved_vram_size(struct amdgpu_device *adev)
+{
+ struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
+
+ if (!con || (adev->flags & AMD_IS_APU))
+ return;
+
+ switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {
+ case IP_VERSION(13, 0, 2):
+ case IP_VERSION(13, 0, 6):
+ case IP_VERSION(13, 0, 14):
+ con->reserved_pages_in_bytes = AMDGPU_RAS_RESERVED_VRAM_SIZE;
+ break;
+ default:
+ break;
+ }
+}
+
int amdgpu_ras_init(struct amdgpu_device *adev)
{
struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
@@ -3422,6 +3440,8 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
/* Get RAS schema for particular SOC */
con->schema = amdgpu_get_ras_schema(adev);
+ amdgpu_ras_init_reserved_vram_size(adev);
+
if (amdgpu_ras_fs_init(adev)) {
r = -EINVAL;
goto release_con;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
index 6a8c7b1609df..bd61f77a7134 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
@@ -64,6 +64,9 @@ struct amdgpu_iv_entry;
#define AMDGPU_RAS_FEATURES_SOCKETID_SHIFT 29
#define AMDGPU_RAS_FEATURES_SOCKETID_MASK 0xe000
+/* Reserve 8 physical dram row for possible retirement.
+ * In worst cases, it will lose 8 * 2MB memory in vram domain */
+#define AMDGPU_RAS_RESERVED_VRAM_SIZE (16ULL << 20)
/* The high three bits indicates socketid */
#define AMDGPU_RAS_GET_FEATURES(val) ((val) &
~AMDGPU_RAS_FEATURES_SOCKETID_MASK)
@@ -541,6 +544,7 @@ struct amdgpu_ras {
struct ras_event_manager __event_mgr;
struct ras_event_manager *event_mgr;
+ uint64_t reserved_pages_in_bytes;
};
struct ras_fs_data {
--
2.17.1
RE: [PATCH] drm/amdgpu: Estimate RAS reservation when report capacity
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Tao,
We don't plan to apply the change to gfx adapters. And it's only applicable to
aldebran and aqua_vanjaram. I will add back aldebran in v2.
Regards,
Hawking
-Original Message-
From: Zhou1, Tao
Sent: Tuesday, May 28, 2024 10:41
To: Zhang, Hawking ; amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix ; Kasiviswanathan, Harish
; Zhang, Hawking
Subject: RE: [PATCH] drm/amdgpu: Estimate RAS reservation when report capacity
[AMD Official Use Only - AMD Internal Distribution Only]
> -Original Message-
> From: amd-gfx On Behalf Of
> Hawking Zhang
> Sent: Tuesday, May 28, 2024 10:21 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhou1, Tao ; Kuehling, Felix
> ; Kasiviswanathan, Harish
> ; Zhang, Hawking
>
> Subject: [PATCH] drm/amdgpu: Estimate RAS reservation when report
> capacity
>
> Add estimate of how much vram we need to reserve for RAS when
> caculating the total available vram.
>
> Signed-off-by: Hawking Zhang
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 +++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c| 18 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h| 2 ++
> 3 files changed, 27 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index e98927529f61..ad813772f8a1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -173,6 +173,8 @@ int amdgpu_amdkfd_reserve_mem_limit(struct
> amdgpu_device *adev, {
> uint64_t reserved_for_pt =
> ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> + uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes
> + : 0);
> size_t system_mem_needed, ttm_mem_needed, vram_needed;
> int ret = 0;
> uint64_t vram_size = 0;
> @@ -221,7 +223,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct
> amdgpu_device *adev,
> (kfd_mem_limit.ttm_mem_used + ttm_mem_needed >
>kfd_mem_limit.max_ttm_mem_limit) ||
> (adev && xcp_id >= 0 && adev->kfd.vram_used[xcp_id] +
> vram_needed >
> - vram_size - reserved_for_pt - atomic64_read(&adev->vram_pin_size)
> +
> + vram_size - reserved_for_pt - reserved_for_ras -
> +atomic64_read(&adev->vram_pin_size) +
>atomic64_read(&adev->kfd.vram_pinned))) {
> ret = -ENOMEM;
> goto release;
> @@ -1694,6 +1696,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
> amdgpu_device *adev, {
> uint64_t reserved_for_pt =
> ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> + uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes
> + : 0);
> ssize_t available;
> uint64_t vram_available, system_mem_available,
> ttm_mem_available;
>
> @@ -1702,7 +1706,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
> amdgpu_device *adev,
> - adev->kfd.vram_used_aligned[xcp_id]
> - atomic64_read(&adev->vram_pin_size)
> + atomic64_read(&adev->kfd.vram_pinned)
> - - reserved_for_pt;
> + - reserved_for_pt
> + - reserved_for_ras;
>
> if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
> system_mem_available = no_system_mem_limit ?
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index ecce022c657b..a6334e0e62dc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -3317,6 +3317,22 @@ static void amdgpu_ras_event_mgr_init(struct
> amdgpu_device *adev)
> amdgpu_put_xgmi_hive(hive); }
>
> +static void amdgpu_ras_init_reserved_vram_size(struct amdgpu_device
> +*adev) {
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> +
> + if (!con || (adev->flags & AMD_IS_APU))
> + return;
> +
> + switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {
> + case IP_VERSION(13, 0, 6):
[Tao] can we apply the change for all ASICs which support RAS?
> + con->reserved_pages_in_bytes =
> AMDGPU_RAS_RESERVED_VRAM_SIZE;
> + break;
> + default:
> + break;
> + }
> +}
> +
> int amdgpu_ras_init(struct amdgpu_device *adev) {
> struct amdgpu_ras *con = amdgpu_ras_get_context(adev); @@
> -3422,6
> +3438,8 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
> /* Get RAS schema for particular SOC */
> con->schema = amdgpu_get_ras_schema(adev);
>
> + amdgpu_ras_init_reserved_vram_size(adev);
> +
> if (amdgpu_ras_fs_init(adev)) {
> r = -EINVAL;
> goto release_con;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> index 6a8c7b
drm-ci: flaky tests for amdgpu driver testing
Hi Maintainers, There are some flaky tests reported for amdgpu driver testing in drm-ci. # Board Name: hp-11A-G6-EE-grunt # IGT Version: 1.28-g0df7b9b97 # Linux Version: 6.9.0-rc7 # Failure Rate: 50 kms_async_flips@async-flip-with-page-flip-events kms_async_flips@crc kms_plane@pixel-format-source-clamping Will add these tests in drivers/gpu/drm/ci/xfails/amdgpu-stoney-flakes.txt (https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/Documentation/gpu/automated_testing.rst#n70) Please could you have a look at these test results and let us know if you need more information. Thank you. Regards, Vignesh
RE: [PATCH] drm/amdgpu: Estimate RAS reservation when report capacity
[AMD Official Use Only - AMD Internal Distribution Only]
> -Original Message-
> From: amd-gfx On Behalf Of Hawking
> Zhang
> Sent: Tuesday, May 28, 2024 10:21 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhou1, Tao ; Kuehling, Felix
> ; Kasiviswanathan, Harish
> ; Zhang, Hawking
>
> Subject: [PATCH] drm/amdgpu: Estimate RAS reservation when report capacity
>
> Add estimate of how much vram we need to reserve for RAS when caculating the
> total available vram.
>
> Signed-off-by: Hawking Zhang
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 +++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c| 18 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h| 2 ++
> 3 files changed, 27 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index e98927529f61..ad813772f8a1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -173,6 +173,8 @@ int amdgpu_amdkfd_reserve_mem_limit(struct
> amdgpu_device *adev, {
> uint64_t reserved_for_pt =
> ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> + uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes : 0);
> size_t system_mem_needed, ttm_mem_needed, vram_needed;
> int ret = 0;
> uint64_t vram_size = 0;
> @@ -221,7 +223,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct
> amdgpu_device *adev,
> (kfd_mem_limit.ttm_mem_used + ttm_mem_needed >
>kfd_mem_limit.max_ttm_mem_limit) ||
> (adev && xcp_id >= 0 && adev->kfd.vram_used[xcp_id] +
> vram_needed >
> - vram_size - reserved_for_pt - atomic64_read(&adev->vram_pin_size)
> +
> + vram_size - reserved_for_pt - reserved_for_ras -
> +atomic64_read(&adev->vram_pin_size) +
>atomic64_read(&adev->kfd.vram_pinned))) {
> ret = -ENOMEM;
> goto release;
> @@ -1694,6 +1696,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
> amdgpu_device *adev, {
> uint64_t reserved_for_pt =
> ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> + uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes : 0);
> ssize_t available;
> uint64_t vram_available, system_mem_available, ttm_mem_available;
>
> @@ -1702,7 +1706,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
> amdgpu_device *adev,
> - adev->kfd.vram_used_aligned[xcp_id]
> - atomic64_read(&adev->vram_pin_size)
> + atomic64_read(&adev->kfd.vram_pinned)
> - - reserved_for_pt;
> + - reserved_for_pt
> + - reserved_for_ras;
>
> if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
> system_mem_available = no_system_mem_limit ?
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index ecce022c657b..a6334e0e62dc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -3317,6 +3317,22 @@ static void amdgpu_ras_event_mgr_init(struct
> amdgpu_device *adev)
> amdgpu_put_xgmi_hive(hive);
> }
>
> +static void amdgpu_ras_init_reserved_vram_size(struct amdgpu_device
> +*adev) {
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> +
> + if (!con || (adev->flags & AMD_IS_APU))
> + return;
> +
> + switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {
> + case IP_VERSION(13, 0, 6):
[Tao] can we apply the change for all ASICs which support RAS?
> + con->reserved_pages_in_bytes =
> AMDGPU_RAS_RESERVED_VRAM_SIZE;
> + break;
> + default:
> + break;
> + }
> +}
> +
> int amdgpu_ras_init(struct amdgpu_device *adev) {
> struct amdgpu_ras *con = amdgpu_ras_get_context(adev); @@ -3422,6
> +3438,8 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
> /* Get RAS schema for particular SOC */
> con->schema = amdgpu_get_ras_schema(adev);
>
> + amdgpu_ras_init_reserved_vram_size(adev);
> +
> if (amdgpu_ras_fs_init(adev)) {
> r = -EINVAL;
> goto release_con;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> index 6a8c7b1609df..bee622c4268a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> @@ -64,6 +64,7 @@ struct amdgpu_iv_entry; #define
> AMDGPU_RAS_FEATURES_SOCKETID_SHIFT 29 #define
> AMDGPU_RAS_FEATURES_SOCKETID_MASK 0xe000
>
> +#define AMDGPU_RAS_RESERVED_VRAM_SIZE(16ULL << 20)
[Tao] it's better to add comment here to explain why the value is 16MB.
> /* The high three bits indicates socketid */ #define
> AMDGPU_RAS_GET_FEATURES(val) ((val) &
> ~A
[PATCH] drm/amdgpu: Estimate RAS reservation when report capacity
Add estimate of how much vram we need to reserve for RAS
when caculating the total available vram.
Signed-off-by: Hawking Zhang
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c| 18 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h| 2 ++
3 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index e98927529f61..ad813772f8a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -173,6 +173,8 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device
*adev,
{
uint64_t reserved_for_pt =
ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
+ struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
+ uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes : 0);
size_t system_mem_needed, ttm_mem_needed, vram_needed;
int ret = 0;
uint64_t vram_size = 0;
@@ -221,7 +223,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device
*adev,
(kfd_mem_limit.ttm_mem_used + ttm_mem_needed >
kfd_mem_limit.max_ttm_mem_limit) ||
(adev && xcp_id >= 0 && adev->kfd.vram_used[xcp_id] + vram_needed >
-vram_size - reserved_for_pt - atomic64_read(&adev->vram_pin_size) +
+vram_size - reserved_for_pt - reserved_for_ras -
atomic64_read(&adev->vram_pin_size) +
atomic64_read(&adev->kfd.vram_pinned))) {
ret = -ENOMEM;
goto release;
@@ -1694,6 +1696,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
amdgpu_device *adev,
{
uint64_t reserved_for_pt =
ESTIMATE_PT_SIZE(amdgpu_amdkfd_total_mem_size);
+ struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
+ uint64_t reserved_for_ras = (con ? con->reserved_pages_in_bytes : 0);
ssize_t available;
uint64_t vram_available, system_mem_available, ttm_mem_available;
@@ -1702,7 +1706,8 @@ size_t amdgpu_amdkfd_get_available_memory(struct
amdgpu_device *adev,
- adev->kfd.vram_used_aligned[xcp_id]
- atomic64_read(&adev->vram_pin_size)
+ atomic64_read(&adev->kfd.vram_pinned)
- - reserved_for_pt;
+ - reserved_for_pt
+ - reserved_for_ras;
if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
system_mem_available = no_system_mem_limit ?
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index ecce022c657b..a6334e0e62dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -3317,6 +3317,22 @@ static void amdgpu_ras_event_mgr_init(struct
amdgpu_device *adev)
amdgpu_put_xgmi_hive(hive);
}
+static void amdgpu_ras_init_reserved_vram_size(struct amdgpu_device *adev)
+{
+ struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
+
+ if (!con || (adev->flags & AMD_IS_APU))
+ return;
+
+ switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {
+ case IP_VERSION(13, 0, 6):
+ con->reserved_pages_in_bytes = AMDGPU_RAS_RESERVED_VRAM_SIZE;
+ break;
+ default:
+ break;
+ }
+}
+
int amdgpu_ras_init(struct amdgpu_device *adev)
{
struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
@@ -3422,6 +3438,8 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
/* Get RAS schema for particular SOC */
con->schema = amdgpu_get_ras_schema(adev);
+ amdgpu_ras_init_reserved_vram_size(adev);
+
if (amdgpu_ras_fs_init(adev)) {
r = -EINVAL;
goto release_con;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
index 6a8c7b1609df..bee622c4268a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
@@ -64,6 +64,7 @@ struct amdgpu_iv_entry;
#define AMDGPU_RAS_FEATURES_SOCKETID_SHIFT 29
#define AMDGPU_RAS_FEATURES_SOCKETID_MASK 0xe000
+#define AMDGPU_RAS_RESERVED_VRAM_SIZE (16ULL << 20)
/* The high three bits indicates socketid */
#define AMDGPU_RAS_GET_FEATURES(val) ((val) &
~AMDGPU_RAS_FEATURES_SOCKETID_MASK)
@@ -541,6 +542,7 @@ struct amdgpu_ras {
struct ras_event_manager __event_mgr;
struct ras_event_manager *event_mgr;
+ uint64_t reserved_pages_in_bytes;
};
struct ras_fs_data {
--
2.17.1
Re: [PATCH] drm/amdkfd: simplify APU VRAM handling
On Mon, May 27, 2024 at 3:22 PM Felix Kuehling wrote:
>
> On 2024-05-24 10:08, Alex Deucher wrote:
> > With commit 89773b85599a
> > ("drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs")
> > big and small APU "VRAM" handling in KFD was unified. Since AMD_IS_APU
> > is set for both big and small APUs, we can simplify the checks in
> > the code.
> >
> > v2: clean up a few more places (Lang)
> >
> > Signed-off-by: Alex Deucher
>
> This is a lot cleaner, thanks. I was looking for something like this
> when I reviewed the original patch but missed it. I found it now in
> amdgpu_discovery_set_ip_blocks (I think).
Yes, that's the place.
Alex
>
> Acked-by: Felix Kuehling
>
>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 16
> > drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
> > drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 ++
> > drivers/gpu/drm/amd/amdkfd/kfd_svm.h | 1 -
> > 4 files changed, 11 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> > index 336eb51c4839..3af00b57cd8a 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> > @@ -196,7 +196,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct
> > amdgpu_device *adev,
> > return -EINVAL;
> >
> > vram_size = KFD_XCP_MEMORY_SIZE(adev, xcp_id);
> > - if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
> > + if (adev->flags & AMD_IS_APU) {
> > system_mem_needed = size;
> > ttm_mem_needed = size;
> > }
> > @@ -233,7 +233,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct
> > amdgpu_device *adev,
> > if (adev && xcp_id >= 0) {
> > adev->kfd.vram_used[xcp_id] += vram_needed;
> > adev->kfd.vram_used_aligned[xcp_id] +=
> > - (adev->gmc.is_app_apu || adev->flags &
> > AMD_IS_APU) ?
> > + (adev->flags & AMD_IS_APU) ?
> > vram_needed :
> > ALIGN(vram_needed, VRAM_AVAILABLITY_ALIGN);
> > }
> > @@ -261,7 +261,7 @@ void amdgpu_amdkfd_unreserve_mem_limit(struct
> > amdgpu_device *adev,
> >
> > if (adev) {
> > adev->kfd.vram_used[xcp_id] -= size;
> > - if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU)
> > {
> > + if (adev->flags & AMD_IS_APU) {
> > adev->kfd.vram_used_aligned[xcp_id] -= size;
> > kfd_mem_limit.system_mem_used -= size;
> > kfd_mem_limit.ttm_mem_used -= size;
> > @@ -894,7 +894,7 @@ static int kfd_mem_attach(struct amdgpu_device *adev,
> > struct kgd_mem *mem,
> >* if peer device has large BAR. In contrast, access over xGMI is
> >* allowed for both small and large BAR configurations of peer device
> >*/
> > - if ((adev != bo_adev && !(adev->gmc.is_app_apu || adev->flags &
> > AMD_IS_APU)) &&
> > + if ((adev != bo_adev && !(adev->flags & AMD_IS_APU)) &&
> > ((mem->domain == AMDGPU_GEM_DOMAIN_VRAM) ||
> >(mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) ||
> >(mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP))) {
> > @@ -1682,7 +1682,7 @@ size_t amdgpu_amdkfd_get_available_memory(struct
> > amdgpu_device *adev,
> > - atomic64_read(&adev->vram_pin_size)
> > - reserved_for_pt;
> >
> > - if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
> > + if (adev->flags & AMD_IS_APU) {
> > system_mem_available = no_system_mem_limit ?
> > kfd_mem_limit.max_system_mem_limit :
> > kfd_mem_limit.max_system_mem_limit -
> > @@ -1730,7 +1730,7 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
> > if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {
> > domain = alloc_domain = AMDGPU_GEM_DOMAIN_VRAM;
> >
> > - if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
> > + if (adev->flags & AMD_IS_APU) {
> > domain = AMDGPU_GEM_DOMAIN_GTT;
> > alloc_domain = AMDGPU_GEM_DOMAIN_GTT;
> > alloc_flags = 0;
> > @@ -1981,7 +1981,7 @@ int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
> > if (size) {
> > if (!is_imported &&
> > (mem->bo->preferred_domains == AMDGPU_GEM_DOMAIN_VRAM ||
> > -((adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) &&
> > +((adev->flags & AMD_IS_APU) &&
> > mem->bo->preferred_domains == AMDGPU_GEM_DOMAIN_GTT)))
> > *size = bo_size;
> > else
[PATCH] drm/amdgpu: Add lock around VF RLCG interface
flush_gpu_tlb may be called from another thread while
device_gpu_recover is running.
Both of these threads access registers through the VF
RLCG interface during VF Full Access. Add a lock around this interface
to prevent race conditions between these threads.
Signed-off-by: Victor Skvortsov
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 6 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++
3 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index f5168b4c3b03..6711836054f9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4049,6 +4049,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
mutex_init(&adev->grbm_idx_mutex);
mutex_init(&adev->mn_lock);
mutex_init(&adev->virt.vf_errors.lock);
+ mutex_init(&adev->virt.rlcg_reg_lock);
hash_init(adev->mn_hash);
mutex_init(&adev->psp.mutex);
mutex_init(&adev->notifier_lock);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 3d5f58e76f2d..a72683f83390 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -982,6 +982,9 @@ u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev, u32
offset, u32 v, u32 f
scratch_reg1 = (void __iomem *)adev->rmmio + 4 *
reg_access_ctrl->scratch_reg1;
scratch_reg2 = (void __iomem *)adev->rmmio + 4 *
reg_access_ctrl->scratch_reg2;
scratch_reg3 = (void __iomem *)adev->rmmio + 4 *
reg_access_ctrl->scratch_reg3;
+
+ mutex_lock(&adev->virt.rlcg_reg_lock);
+
if (reg_access_ctrl->spare_int)
spare_int = (void __iomem *)adev->rmmio + 4 *
reg_access_ctrl->spare_int;
@@ -1038,6 +1041,9 @@ u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, u32 f
}
ret = readl(scratch_reg0);
+
+ mutex_unlock(&adev->virt.rlcg_reg_lock);
+
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index 642f1fd287d8..0ec246c74570 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -272,6 +272,8 @@ struct amdgpu_virt {
/* the ucode id to signal the autoload */
uint32_t autoload_ucode_id;
+
+ struct mutex rlcg_reg_lock;
};
struct amdgpu_video_codec_info;
--
2.34.1
Re: [PATCH] drm/amdgpu: Make CPX mode auto default in NPS4
On 2024-05-22 15:15, Rajneesh Bhardwaj wrote: On GFXIP9.4.3, make CPX mode as the default compute mode if the node is setup in NPS4 memory partition mode. This change is only applicable for dGPU, for APU, continue to use TPX mode. Cc: Lijo Lazar Signed-off-by: Rajneesh Bhardwaj Reviewed-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c index d62cfa4e2d2b..2c9a0aa41e2d 100644 --- a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c +++ b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c @@ -422,7 +422,7 @@ __aqua_vanjaram_get_auto_mode(struct amdgpu_xcp_mgr *xcp_mgr) if (adev->gmc.num_mem_partitions == num_xcc / 2) return (adev->flags & AMD_IS_APU) ? AMDGPU_TPX_PARTITION_MODE : - AMDGPU_QPX_PARTITION_MODE; + AMDGPU_CPX_PARTITION_MODE; if (adev->gmc.num_mem_partitions == 2 && !(adev->flags & AMD_IS_APU)) return AMDGPU_DPX_PARTITION_MODE;
Re: [PATCH] drm/amdkfd: simplify APU VRAM handling
On 2024-05-24 10:08, Alex Deucher wrote:
With commit 89773b85599a
("drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs")
big and small APU "VRAM" handling in KFD was unified. Since AMD_IS_APU
is set for both big and small APUs, we can simplify the checks in
the code.
v2: clean up a few more places (Lang)
Signed-off-by: Alex Deucher
This is a lot cleaner, thanks. I was looking for something like this
when I reviewed the original patch but missed it. I found it now in
amdgpu_discovery_set_ip_blocks (I think).
Acked-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 16
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 ++
drivers/gpu/drm/amd/amdkfd/kfd_svm.h | 1 -
4 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 336eb51c4839..3af00b57cd8a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -196,7 +196,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device
*adev,
return -EINVAL;
vram_size = KFD_XCP_MEMORY_SIZE(adev, xcp_id);
- if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
+ if (adev->flags & AMD_IS_APU) {
system_mem_needed = size;
ttm_mem_needed = size;
}
@@ -233,7 +233,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device
*adev,
if (adev && xcp_id >= 0) {
adev->kfd.vram_used[xcp_id] += vram_needed;
adev->kfd.vram_used_aligned[xcp_id] +=
- (adev->gmc.is_app_apu || adev->flags &
AMD_IS_APU) ?
+ (adev->flags & AMD_IS_APU) ?
vram_needed :
ALIGN(vram_needed, VRAM_AVAILABLITY_ALIGN);
}
@@ -261,7 +261,7 @@ void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device
*adev,
if (adev) {
adev->kfd.vram_used[xcp_id] -= size;
- if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
+ if (adev->flags & AMD_IS_APU) {
adev->kfd.vram_used_aligned[xcp_id] -= size;
kfd_mem_limit.system_mem_used -= size;
kfd_mem_limit.ttm_mem_used -= size;
@@ -894,7 +894,7 @@ static int kfd_mem_attach(struct amdgpu_device *adev,
struct kgd_mem *mem,
* if peer device has large BAR. In contrast, access over xGMI is
* allowed for both small and large BAR configurations of peer device
*/
- if ((adev != bo_adev && !(adev->gmc.is_app_apu || adev->flags & AMD_IS_APU))
&&
+ if ((adev != bo_adev && !(adev->flags & AMD_IS_APU)) &&
((mem->domain == AMDGPU_GEM_DOMAIN_VRAM) ||
(mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) ||
(mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP))) {
@@ -1682,7 +1682,7 @@ size_t amdgpu_amdkfd_get_available_memory(struct
amdgpu_device *adev,
- atomic64_read(&adev->vram_pin_size)
- reserved_for_pt;
- if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
+ if (adev->flags & AMD_IS_APU) {
system_mem_available = no_system_mem_limit ?
kfd_mem_limit.max_system_mem_limit :
kfd_mem_limit.max_system_mem_limit -
@@ -1730,7 +1730,7 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {
domain = alloc_domain = AMDGPU_GEM_DOMAIN_VRAM;
- if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
+ if (adev->flags & AMD_IS_APU) {
domain = AMDGPU_GEM_DOMAIN_GTT;
alloc_domain = AMDGPU_GEM_DOMAIN_GTT;
alloc_flags = 0;
@@ -1981,7 +1981,7 @@ int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
if (size) {
if (!is_imported &&
(mem->bo->preferred_domains == AMDGPU_GEM_DOMAIN_VRAM ||
- ((adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) &&
+ ((adev->flags & AMD_IS_APU) &&
mem->bo->preferred_domains == AMDGPU_GEM_DOMAIN_GTT)))
*size = bo_size;
else
@@ -2404,7 +2404,7 @@ static int import_obj_create(struct amdgpu_device *adev,
(*mem)->bo = bo;
(*mem)->va = va;
(*mem)->domain = (bo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM) &&
-!(adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) ?
+!(adev->flags & AMD_IS_APU) ?
AMDGPU_GEM_DOMAIN_V
[PATCH] drm/amdgpu: Add flags to distinguish vf/pf/pt mode
Add extra flag definition for ids_flag field to distinguish
between vf/pf/pt modes
v2: Updated kms driver minor version & removed pf check as default is 0
Signed-off-by: Asad Kamal
Reviewed-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 9 +
include/uapi/drm/amdgpu_drm.h | 10 ++
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 2da76fadf6ea..60d5758939ae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -116,9 +116,10 @@
* - 3.55.0 - Add AMDGPU_INFO_GPUVM_FAULT query
* - 3.56.0 - Update IB start address and size alignment for decode and encode
* - 3.57.0 - Compute tunneling on GFX10+
+ * - 3.58.0 - Add AMDGPU_IDS_FLAGS_MODE_PF, AMDGPU_IDS_FLAGS_MODE_VF &
AMDGPU_IDS_FLAGS_MODE_PT
*/
#define KMS_DRIVER_MAJOR 3
-#define KMS_DRIVER_MINOR 57
+#define KMS_DRIVER_MINOR 58
#define KMS_DRIVER_PATCHLEVEL 0
/*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 66782be5917b..260cd0ad286d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -869,6 +869,15 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
if (adev->gfx.config.ta_cntl2_truncate_coord_mode)
dev_info->ids_flags |=
AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD;
+ if (amdgpu_passthrough(adev))
+ dev_info->ids_flags |= (AMDGPU_IDS_FLAGS_MODE_PT <<
+ AMDGPU_IDS_FLAGS_MODE_SHIFT) &
+ AMDGPU_IDS_FLAGS_MODE_MASK;
+ else if (amdgpu_sriov_vf(adev))
+ dev_info->ids_flags |= (AMDGPU_IDS_FLAGS_MODE_VF <<
+ AMDGPU_IDS_FLAGS_MODE_SHIFT) &
+ AMDGPU_IDS_FLAGS_MODE_MASK;
+
vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
vm_size -= AMDGPU_VA_RESERVED_TOP;
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 5b6c0055cfcf..ae3f4e275f20 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -754,6 +754,16 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
#define AMDGPU_IDS_FLAGS_TMZ0x4
#define AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD 0x8
+/*
+ * Query h/w info: Flag identifying VF/PF/PT mode
+ *
+ */
+#define AMDGPU_IDS_FLAGS_MODE_MASK 0x300
+#define AMDGPU_IDS_FLAGS_MODE_SHIFT 0x8
+#define AMDGPU_IDS_FLAGS_MODE_PF0x0
+#define AMDGPU_IDS_FLAGS_MODE_VF0x1
+#define AMDGPU_IDS_FLAGS_MODE_PT0x2
+
/* indicate if acceleration can be working */
#define AMDGPU_INFO_ACCEL_WORKING 0x00
/* get the crtc_id from the mode object id? */
--
2.42.0
[PATCH AUTOSEL 5.10 1/7] drm/amd/display: Exit idle optimizations before HDCP execution
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't be DC directly because of a potential race condition with the
link protection thread and the rest of DM operation.
Cc: Mario Limonciello
Cc: Alex Deucher
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Nicholas Kazlauskas
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c| 10 ++
drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h | 8
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
index fa8aeec304ef4..c39cb4b6767cf 100644
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
@@ -86,6 +86,14 @@ static uint8_t is_cp_desired_hdcp2(struct mod_hdcp *hdcp)
!hdcp->connection.is_hdcp2_revoked;
}
+static void exit_idle_optimizations(struct mod_hdcp *hdcp)
+{
+ struct mod_hdcp_dm *dm = &hdcp->config.dm;
+
+ if (dm->funcs.exit_idle_optimizations)
+ dm->funcs.exit_idle_optimizations(dm->handle);
+}
+
static enum mod_hdcp_status execution(struct mod_hdcp *hdcp,
struct mod_hdcp_event_context *event_ctx,
union mod_hdcp_transition_input *input)
@@ -448,6 +456,8 @@ enum mod_hdcp_status mod_hdcp_process_event(struct mod_hdcp
*hdcp,
memset(&event_ctx, 0, sizeof(struct mod_hdcp_event_context));
event_ctx.event = event;
+ exit_idle_optimizations(hdcp);
+
/* execute and transition */
exec_status = execution(hdcp, &event_ctx, &hdcp->auth.trans_input);
trans_status = transition(
diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
index eed560eecbab4..fb195276fb704 100644
--- a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
+++ b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
@@ -143,6 +143,13 @@ struct mod_hdcp_ddc {
} funcs;
};
+struct mod_hdcp_dm {
+ void *handle;
+ struct {
+ void (*exit_idle_optimizations)(void *handle);
+ } funcs;
+};
+
struct mod_hdcp_psp {
void *handle;
void *funcs;
@@ -252,6 +259,7 @@ struct mod_hdcp_display_query {
struct mod_hdcp_config {
struct mod_hdcp_psp psp;
struct mod_hdcp_ddc ddc;
+ struct mod_hdcp_dm dm;
uint8_t index;
};
--
2.43.0
[PATCH AUTOSEL 5.15 1/6] drm/amd/display: Exit idle optimizations before HDCP execution
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't be DC directly because of a potential race condition with the
link protection thread and the rest of DM operation.
Cc: Mario Limonciello
Cc: Alex Deucher
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Nicholas Kazlauskas
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c| 10 ++
drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h | 8
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
index 3e81850a7ffe3..47bb973669d85 100644
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
@@ -88,6 +88,14 @@ static uint8_t is_cp_desired_hdcp2(struct mod_hdcp *hdcp)
!hdcp->connection.is_hdcp2_revoked;
}
+static void exit_idle_optimizations(struct mod_hdcp *hdcp)
+{
+ struct mod_hdcp_dm *dm = &hdcp->config.dm;
+
+ if (dm->funcs.exit_idle_optimizations)
+ dm->funcs.exit_idle_optimizations(dm->handle);
+}
+
static enum mod_hdcp_status execution(struct mod_hdcp *hdcp,
struct mod_hdcp_event_context *event_ctx,
union mod_hdcp_transition_input *input)
@@ -507,6 +515,8 @@ enum mod_hdcp_status mod_hdcp_process_event(struct mod_hdcp
*hdcp,
memset(&event_ctx, 0, sizeof(struct mod_hdcp_event_context));
event_ctx.event = event;
+ exit_idle_optimizations(hdcp);
+
/* execute and transition */
exec_status = execution(hdcp, &event_ctx, &hdcp->auth.trans_input);
trans_status = transition(
diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
index f37101f5a..8a620c34396c7 100644
--- a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
+++ b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
@@ -154,6 +154,13 @@ struct mod_hdcp_ddc {
} funcs;
};
+struct mod_hdcp_dm {
+ void *handle;
+ struct {
+ void (*exit_idle_optimizations)(void *handle);
+ } funcs;
+};
+
struct mod_hdcp_psp {
void *handle;
void *funcs;
@@ -269,6 +276,7 @@ struct mod_hdcp_display_query {
struct mod_hdcp_config {
struct mod_hdcp_psp psp;
struct mod_hdcp_ddc ddc;
+ struct mod_hdcp_dm dm;
uint8_t index;
};
--
2.43.0
[PATCH AUTOSEL 6.1 01/11] drm/amd/display: Exit idle optimizations before HDCP execution
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't be DC directly because of a potential race condition with the
link protection thread and the rest of DM operation.
Cc: Mario Limonciello
Cc: Alex Deucher
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Nicholas Kazlauskas
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c| 10 ++
drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h | 8
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
index 5e01c6e24cbc8..9a5a1726acaf8 100644
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
@@ -88,6 +88,14 @@ static uint8_t is_cp_desired_hdcp2(struct mod_hdcp *hdcp)
!hdcp->connection.is_hdcp2_revoked;
}
+static void exit_idle_optimizations(struct mod_hdcp *hdcp)
+{
+ struct mod_hdcp_dm *dm = &hdcp->config.dm;
+
+ if (dm->funcs.exit_idle_optimizations)
+ dm->funcs.exit_idle_optimizations(dm->handle);
+}
+
static enum mod_hdcp_status execution(struct mod_hdcp *hdcp,
struct mod_hdcp_event_context *event_ctx,
union mod_hdcp_transition_input *input)
@@ -543,6 +551,8 @@ enum mod_hdcp_status mod_hdcp_process_event(struct mod_hdcp
*hdcp,
memset(&event_ctx, 0, sizeof(struct mod_hdcp_event_context));
event_ctx.event = event;
+ exit_idle_optimizations(hdcp);
+
/* execute and transition */
exec_status = execution(hdcp, &event_ctx, &hdcp->auth.trans_input);
trans_status = transition(
diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
index 3348bb97ef81a..dfa8168e51890 100644
--- a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
+++ b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
@@ -155,6 +155,13 @@ struct mod_hdcp_ddc {
} funcs;
};
+struct mod_hdcp_dm {
+ void *handle;
+ struct {
+ void (*exit_idle_optimizations)(void *handle);
+ } funcs;
+};
+
struct mod_hdcp_psp {
void *handle;
void *funcs;
@@ -271,6 +278,7 @@ struct mod_hdcp_display_query {
struct mod_hdcp_config {
struct mod_hdcp_psp psp;
struct mod_hdcp_ddc ddc;
+ struct mod_hdcp_dm dm;
uint8_t index;
};
--
2.43.0
[PATCH AUTOSEL 6.6 01/16] drm/amd/display: Exit idle optimizations before HDCP execution
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't be DC directly because of a potential race condition with the
link protection thread and the rest of DM operation.
Cc: Mario Limonciello
Cc: Alex Deucher
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Nicholas Kazlauskas
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c| 10 ++
drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h | 8
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
index 5e01c6e24cbc8..9a5a1726acaf8 100644
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
@@ -88,6 +88,14 @@ static uint8_t is_cp_desired_hdcp2(struct mod_hdcp *hdcp)
!hdcp->connection.is_hdcp2_revoked;
}
+static void exit_idle_optimizations(struct mod_hdcp *hdcp)
+{
+ struct mod_hdcp_dm *dm = &hdcp->config.dm;
+
+ if (dm->funcs.exit_idle_optimizations)
+ dm->funcs.exit_idle_optimizations(dm->handle);
+}
+
static enum mod_hdcp_status execution(struct mod_hdcp *hdcp,
struct mod_hdcp_event_context *event_ctx,
union mod_hdcp_transition_input *input)
@@ -543,6 +551,8 @@ enum mod_hdcp_status mod_hdcp_process_event(struct mod_hdcp
*hdcp,
memset(&event_ctx, 0, sizeof(struct mod_hdcp_event_context));
event_ctx.event = event;
+ exit_idle_optimizations(hdcp);
+
/* execute and transition */
exec_status = execution(hdcp, &event_ctx, &hdcp->auth.trans_input);
trans_status = transition(
diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
index a4d344a4db9e1..cdb17b093f2b8 100644
--- a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
+++ b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
@@ -156,6 +156,13 @@ struct mod_hdcp_ddc {
} funcs;
};
+struct mod_hdcp_dm {
+ void *handle;
+ struct {
+ void (*exit_idle_optimizations)(void *handle);
+ } funcs;
+};
+
struct mod_hdcp_psp {
void *handle;
void *funcs;
@@ -272,6 +279,7 @@ struct mod_hdcp_display_query {
struct mod_hdcp_config {
struct mod_hdcp_psp psp;
struct mod_hdcp_ddc ddc;
+ struct mod_hdcp_dm dm;
uint8_t index;
};
--
2.43.0
[PATCH AUTOSEL 6.8 06/20] drm/amd/display: add root clock control function pointer to fix display corruption
From: "Xi (Alex) Liu"
[ Upstream commit de2d1105a3757742b45b0d8270b3c8734cd6b6f8 ]
[Why and how]
External display has corruption because no root clock control function. Add the
function pointer to fix the issue.
Reviewed-by: Daniel Miess
Reviewed-by: Nicholas Kazlauskas
Acked-by: Roman Li
Signed-off-by: Xi (Alex) Liu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
index 143d3fc0221cf..069e48573f4a9 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
@@ -147,6 +147,7 @@ static const struct hwseq_private_funcs
dcn351_private_funcs = {
//.hubp_pg_control = dcn35_hubp_pg_control,
.enable_power_gating_plane = dcn35_enable_power_gating_plane,
.dpp_root_clock_control = dcn35_dpp_root_clock_control,
+ .dpstream_root_clock_control = dcn35_dpstream_root_clock_control,
.program_all_writeback_pipes_in_tree =
dcn30_program_all_writeback_pipes_in_tree,
.update_odm = dcn35_update_odm,
.set_hdr_multiplier = dcn10_set_hdr_multiplier,
--
2.43.0
[PATCH AUTOSEL 6.8 02/20] drm/amd/display: Workaround register access in idle race with cursor
From: Nicholas Kazlauskas
[ Upstream commit b5b6d6251579a29dafdad25f4bc7f3ff7bfd2c86 ]
[Why]
Cursor update can be pre-empted by a request for setting target flip
submission.
This causes an issue where we're in the middle of the exit sequence
trying to log to DM, but the pre-emption starts another DMCUB
command submission that requires being out of idle.
The DC lock aqusition can fail, and depending on the DM/OS interface
it's possible that the function inserted into this thread must not fail.
This means that lock aqusition must be skipped and exit *must* occur.
[How]
Modify when we consider idle as active. Consider it exited only once
the exit has fully finished.
Consider it as entered prior to actual notification.
Since we're on the same core/thread the cached values are coherent
and we'll see that we still need to exit. Once the cursor update resumes
it'll continue doing the double exit but this won't cause a functional
issue, just a (potential) redundant operation.
Reviewed-by: Duncan Ma
Acked-by: Wayne Lin
Signed-off-by: Nicholas Kazlauskas
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 23 +++-
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 9084b320849a6..447dab3864019 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -1320,16 +1320,27 @@ void dc_dmub_srv_apply_idle_power_optimizations(const
struct dc *dc, bool allow_
* Powering up the hardware requires notifying PMFW and DMCUB.
* Clearing the driver idle allow requires a DMCUB command.
* DMCUB commands requires the DMCUB to be powered up and restored.
-*
-* Exit out early to prevent an infinite loop of DMCUB commands
-* triggering exit low power - use software state to track this.
*/
- dc_dmub_srv->idle_allowed = allow_idle;
- if (!allow_idle)
+ if (!allow_idle) {
dc_dmub_srv_exit_low_power_state(dc);
- else
+ /*
+* Idle is considered fully exited only after the sequence above
+* fully completes. If we have a race of two threads exiting
+* at the same time then it's safe to perform the sequence
+* twice as long as we're not re-entering.
+*
+* Infinite command submission is avoided by using the
+* dm_execute_dmub_cmd submission instead of the "wake" helpers.
+*/
+ dc_dmub_srv->idle_allowed = false;
+ } else {
+ /* Consider idle as notified prior to the actual submission to
+* prevent multiple entries. */
+ dc_dmub_srv->idle_allowed = true;
+
dc_dmub_srv_notify_idle(dc, allow_idle);
+ }
}
bool dc_wake_and_execute_dmub_cmd(const struct dc_context *ctx, union
dmub_rb_cmd *cmd,
--
2.43.0
[PATCH AUTOSEL 6.8 01/20] drm/amd/display: Exit idle optimizations before HDCP execution
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't be DC directly because of a potential race condition with the
link protection thread and the rest of DM operation.
Cc: Mario Limonciello
Cc: Alex Deucher
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Nicholas Kazlauskas
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c| 10 ++
drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h | 8
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
index 5e01c6e24cbc8..9a5a1726acaf8 100644
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
@@ -88,6 +88,14 @@ static uint8_t is_cp_desired_hdcp2(struct mod_hdcp *hdcp)
!hdcp->connection.is_hdcp2_revoked;
}
+static void exit_idle_optimizations(struct mod_hdcp *hdcp)
+{
+ struct mod_hdcp_dm *dm = &hdcp->config.dm;
+
+ if (dm->funcs.exit_idle_optimizations)
+ dm->funcs.exit_idle_optimizations(dm->handle);
+}
+
static enum mod_hdcp_status execution(struct mod_hdcp *hdcp,
struct mod_hdcp_event_context *event_ctx,
union mod_hdcp_transition_input *input)
@@ -543,6 +551,8 @@ enum mod_hdcp_status mod_hdcp_process_event(struct mod_hdcp
*hdcp,
memset(&event_ctx, 0, sizeof(struct mod_hdcp_event_context));
event_ctx.event = event;
+ exit_idle_optimizations(hdcp);
+
/* execute and transition */
exec_status = execution(hdcp, &event_ctx, &hdcp->auth.trans_input);
trans_status = transition(
diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
index a4d344a4db9e1..cdb17b093f2b8 100644
--- a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
+++ b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
@@ -156,6 +156,13 @@ struct mod_hdcp_ddc {
} funcs;
};
+struct mod_hdcp_dm {
+ void *handle;
+ struct {
+ void (*exit_idle_optimizations)(void *handle);
+ } funcs;
+};
+
struct mod_hdcp_psp {
void *handle;
void *funcs;
@@ -272,6 +279,7 @@ struct mod_hdcp_display_query {
struct mod_hdcp_config {
struct mod_hdcp_psp psp;
struct mod_hdcp_ddc ddc;
+ struct mod_hdcp_dm dm;
uint8_t index;
};
--
2.43.0
[PATCH AUTOSEL 6.9 07/23] drm/amd/display: add root clock control function pointer to fix display corruption
From: "Xi (Alex) Liu"
[ Upstream commit de2d1105a3757742b45b0d8270b3c8734cd6b6f8 ]
[Why and how]
External display has corruption because no root clock control function. Add the
function pointer to fix the issue.
Reviewed-by: Daniel Miess
Reviewed-by: Nicholas Kazlauskas
Acked-by: Roman Li
Signed-off-by: Xi (Alex) Liu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
index 670255c9bc822..4dca5c5a8318f 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
@@ -147,6 +147,7 @@ static const struct hwseq_private_funcs
dcn351_private_funcs = {
//.hubp_pg_control = dcn35_hubp_pg_control,
.enable_power_gating_plane = dcn35_enable_power_gating_plane,
.dpp_root_clock_control = dcn35_dpp_root_clock_control,
+ .dpstream_root_clock_control = dcn35_dpstream_root_clock_control,
.program_all_writeback_pipes_in_tree =
dcn30_program_all_writeback_pipes_in_tree,
.update_odm = dcn35_update_odm,
.set_hdr_multiplier = dcn10_set_hdr_multiplier,
--
2.43.0
[PATCH AUTOSEL 6.9 02/23] drm/amd/display: Workaround register access in idle race with cursor
From: Nicholas Kazlauskas
[ Upstream commit b5b6d6251579a29dafdad25f4bc7f3ff7bfd2c86 ]
[Why]
Cursor update can be pre-empted by a request for setting target flip
submission.
This causes an issue where we're in the middle of the exit sequence
trying to log to DM, but the pre-emption starts another DMCUB
command submission that requires being out of idle.
The DC lock aqusition can fail, and depending on the DM/OS interface
it's possible that the function inserted into this thread must not fail.
This means that lock aqusition must be skipped and exit *must* occur.
[How]
Modify when we consider idle as active. Consider it exited only once
the exit has fully finished.
Consider it as entered prior to actual notification.
Since we're on the same core/thread the cached values are coherent
and we'll see that we still need to exit. Once the cursor update resumes
it'll continue doing the double exit but this won't cause a functional
issue, just a (potential) redundant operation.
Reviewed-by: Duncan Ma
Acked-by: Wayne Lin
Signed-off-by: Nicholas Kazlauskas
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 23 +++-
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 6083b1dcf050a..a72e849eced3f 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -1340,16 +1340,27 @@ void dc_dmub_srv_apply_idle_power_optimizations(const
struct dc *dc, bool allow_
* Powering up the hardware requires notifying PMFW and DMCUB.
* Clearing the driver idle allow requires a DMCUB command.
* DMCUB commands requires the DMCUB to be powered up and restored.
-*
-* Exit out early to prevent an infinite loop of DMCUB commands
-* triggering exit low power - use software state to track this.
*/
- dc_dmub_srv->idle_allowed = allow_idle;
- if (!allow_idle)
+ if (!allow_idle) {
dc_dmub_srv_exit_low_power_state(dc);
- else
+ /*
+* Idle is considered fully exited only after the sequence above
+* fully completes. If we have a race of two threads exiting
+* at the same time then it's safe to perform the sequence
+* twice as long as we're not re-entering.
+*
+* Infinite command submission is avoided by using the
+* dm_execute_dmub_cmd submission instead of the "wake" helpers.
+*/
+ dc_dmub_srv->idle_allowed = false;
+ } else {
+ /* Consider idle as notified prior to the actual submission to
+* prevent multiple entries. */
+ dc_dmub_srv->idle_allowed = true;
+
dc_dmub_srv_notify_idle(dc, allow_idle);
+ }
}
bool dc_wake_and_execute_dmub_cmd(const struct dc_context *ctx, union
dmub_rb_cmd *cmd,
--
2.43.0
[PATCH AUTOSEL 6.9 01/23] drm/amd/display: Exit idle optimizations before HDCP execution
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't be DC directly because of a potential race condition with the
link protection thread and the rest of DM operation.
Cc: Mario Limonciello
Cc: Alex Deucher
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Nicholas Kazlauskas
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c| 10 ++
drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h | 8
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
index 5e01c6e24cbc8..9a5a1726acaf8 100644
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
@@ -88,6 +88,14 @@ static uint8_t is_cp_desired_hdcp2(struct mod_hdcp *hdcp)
!hdcp->connection.is_hdcp2_revoked;
}
+static void exit_idle_optimizations(struct mod_hdcp *hdcp)
+{
+ struct mod_hdcp_dm *dm = &hdcp->config.dm;
+
+ if (dm->funcs.exit_idle_optimizations)
+ dm->funcs.exit_idle_optimizations(dm->handle);
+}
+
static enum mod_hdcp_status execution(struct mod_hdcp *hdcp,
struct mod_hdcp_event_context *event_ctx,
union mod_hdcp_transition_input *input)
@@ -543,6 +551,8 @@ enum mod_hdcp_status mod_hdcp_process_event(struct mod_hdcp
*hdcp,
memset(&event_ctx, 0, sizeof(struct mod_hdcp_event_context));
event_ctx.event = event;
+ exit_idle_optimizations(hdcp);
+
/* execute and transition */
exec_status = execution(hdcp, &event_ctx, &hdcp->auth.trans_input);
trans_status = transition(
diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
index a4d344a4db9e1..cdb17b093f2b8 100644
--- a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
+++ b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
@@ -156,6 +156,13 @@ struct mod_hdcp_ddc {
} funcs;
};
+struct mod_hdcp_dm {
+ void *handle;
+ struct {
+ void (*exit_idle_optimizations)(void *handle);
+ } funcs;
+};
+
struct mod_hdcp_psp {
void *handle;
void *funcs;
@@ -272,6 +279,7 @@ struct mod_hdcp_display_query {
struct mod_hdcp_config {
struct mod_hdcp_psp psp;
struct mod_hdcp_ddc ddc;
+ struct mod_hdcp_dm dm;
uint8_t index;
};
--
2.43.0
Re: [PATCH 13/13] drm/amd/display: Enable copying of bounding box data from VBIOS DMUB
On 2024-05-23 15:20, Aurabindo Pillai wrote:
> Allocate some memory, send the address in chunks to dmub, and finally
> ask it to copy the bounding box data into the newly allocated memory.
>
> Signed-off-by: Aurabindo Pillai
The entire series is
Acked-by: Harry Wentland
Harry
> ---
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 121 ++
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 10 ++
> .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 24 +---
> drivers/gpu/drm/amd/display/dc/core/dc.c | 5 +
> drivers/gpu/drm/amd/display/dc/dc.h | 3 +
> .../dc/dml2/dml21/dml21_translation_helper.c | 6 +-
> .../drm/amd/display/dc/dml2/dml2_wrapper.h| 1 +
> 7 files changed, 146 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index bb4573603479..74accbcaae28 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1627,6 +1627,117 @@ static void retrieve_dmi_info(struct
> amdgpu_display_manager *dm)
> }
> }
>
> +void*
> +dm_allocate_gpu_mem(
> + struct amdgpu_device *adev,
> + enum dc_gpu_mem_alloc_type type,
> + size_t size,
> + long long *addr)
> +{
> + struct dal_allocation *da;
> + u32 domain = (type == DC_MEM_ALLOC_TYPE_GART) ?
> + AMDGPU_GEM_DOMAIN_GTT : AMDGPU_GEM_DOMAIN_VRAM;
> + int ret;
> +
> + da = kzalloc(sizeof(struct dal_allocation), GFP_KERNEL);
> + if (!da)
> + return NULL;
> +
> + ret = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
> + domain, &da->bo,
> + &da->gpu_addr, &da->cpu_ptr);
> +
> + *addr = da->gpu_addr;
> +
> + if (ret) {
> + kfree(da);
> + return NULL;
> + }
> +
> + /* add da to list in dm */
> + list_add(&da->list, &adev->dm.da_list);
> +
> + return da->cpu_ptr;
> +}
> +
> +static enum dmub_status
> +dm_dmub_send_vbios_gpint_command(struct amdgpu_device *adev,
> + enum dmub_gpint_command command_code,
> + uint16_t param,
> + uint32_t timeout_us)
> +{
> + union dmub_gpint_data_register reg, test;
> + uint32_t i;
> +
> + /* Assume that VBIOS DMUB is ready to take commands */
> +
> + reg.bits.status = 1;
> + reg.bits.command_code = command_code;
> + reg.bits.param = param;
> +
> + cgs_write_register(adev->dm.cgs_device, 0x34c0 + 0x01f8, reg.all);
> +
> + for (i = 0; i < timeout_us; ++i) {
> + udelay(1);
> +
> + /* Check if our GPINT got acked */
> + reg.bits.status = 0;
> + test = (union dmub_gpint_data_register)
> + cgs_read_register(adev->dm.cgs_device, 0x34c0 + 0x01f8);
> +
> + if (test.all == reg.all)
> + return DMUB_STATUS_OK;
> + }
> +
> + return DMUB_STATUS_TIMEOUT;
> +}
> +
> +static struct dml2_soc_bb *dm_dmub_get_vbios_bounding_box(struct
> amdgpu_device *adev)
> +{
> + struct dml2_soc_bb *bb;
> + long long addr;
> + int i = 0;
> + uint16_t chunk;
> + enum dmub_gpint_command send_addrs[] = {
> + DMUB_GPINT__SET_BB_ADDR_WORD0,
> + DMUB_GPINT__SET_BB_ADDR_WORD1,
> + DMUB_GPINT__SET_BB_ADDR_WORD2,
> + DMUB_GPINT__SET_BB_ADDR_WORD3,
> + };
> + enum dmub_status ret;
> +
> + switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
> + case IP_VERSION(4, 0, 1):
> + break;
> + default:
> + return NULL;
> + }
> +
> + bb = dm_allocate_gpu_mem(adev,
> + DC_MEM_ALLOC_TYPE_GART,
> + sizeof(struct dml2_soc_bb),
> + &addr);
> + if (!bb)
> + return NULL;
> +
> + for (i = 0; i < 4; i++) {
> + /* Extract 16-bit chunk */
> + chunk = ((uint64_t) addr >> (i * 16)) & 0x;
> + /* Send the chunk */
> + ret = dm_dmub_send_vbios_gpint_command(adev, send_addrs[i],
> chunk, 3);
> + if (ret != DMUB_STATUS_OK)
> + /* No need to free bb here since it shall be done
> unconditionally */
> + return NULL;
> + }
> +
> + /* Now ask DMUB to copy the bb */
> + ret = dm_dmub_send_vbios_gpint_command(adev, DMUB_GPINT__BB_COPY, 1,
> 20);
> + if (ret != DMUB_STATUS_OK)
> + return NULL;
> +
> + return bb;
> +}
> +
> static int amdgpu_dm_init(struct amdgpu_device *adev)
> {
> struct dc_init_data init_data;
> @@ -1748,6 +1859,11 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>
> retrieve_dmi_info(&adev->dm);
>
> + if (adev->dm.bb_from_dmub)
> +
Re: [PATCH] drm/amdgpu/pptable: Fix UBSAN array-index-out-of-bounds
On Mon, May 27, 2024 at 5:42 AM Tasos Sahanidis wrote:
>
> On 2024-05-23 17:52, Alex Deucher wrote:
> > On Thu, May 23, 2024 at 9:05 AM Tasos Sahanidis wrote:
> >>
> >> Dyanmically sized arrays used [1] instead of []. Replacing the former
> >> with the latter resolves multiple warnings observed on boot with a
> >> BONAIRE card.
> >>
> >> Signed-off-by: Tasos Sahanidis
> >> ---
> >> drivers/gpu/drm/amd/include/pptable.h | 24
> >> 1 file changed, 12 insertions(+), 12 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/amd/include/pptable.h
> >> b/drivers/gpu/drm/amd/include/pptable.h
> >> index 2e8e6c9875f6..d1dec880d2d6 100644
> >> --- a/drivers/gpu/drm/amd/include/pptable.h
> >> +++ b/drivers/gpu/drm/amd/include/pptable.h
> >> @@ -480,7 +480,7 @@ typedef struct _StateArray{
> >> //how many states we have
> >> UCHAR ucNumEntries;
> >>
> >> -ATOM_PPLIB_STATE_V2 states[1];
> >> +ATOM_PPLIB_STATE_V2 states[];
> >
> > Can you add __counted_by(ucNumEntries) to the end of the line? E.g.,
> >
> > ATOM_PPLIB_STATE_V2 states[] __counted_by(ucNumEntries);
> >
> > Same comment for the other changes below.
> >
> > Alex
>
> Sure thing! I have the v2 ready and will submit after testing it on
> hardware. I do have a question though. The following already uses [].
> Would it be acceptable to also modify it in the same patch?
Yes, that's fine. Thanks!
>
> @@ -658,7 +658,7 @@ typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Record
>
> typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{
> UCHAR numEntries;
> -ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[];
> +ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[]
> __counted_by(numEntries);
> }ATOM_PPLIB_SAMClk_Voltage_Limit_Table;
>
> typedef struct _ATOM_PPLIB_SAMU_Table
>
> There's also this, which I think __counted_by can be used here as well:
yes.
>
> diff --git a/drivers/gpu/drm/amd/include/pptable.h
> b/drivers/gpu/drm/amd/include/pptable.h
> index febc853d2a07..341d4a4e8d98 100644
> --- a/drivers/gpu/drm/amd/include/pptable.h
> +++ b/drivers/gpu/drm/amd/include/pptable.h
> @@ -497,15 +497,15 @@ typedef struct _ClockInfoArray{
> typedef struct _NonClockInfoArray{
>
> //how many non-clock levels we have. normally should be same as number
> of states
> UCHAR ucNumEntries;
> //sizeof(ATOM_PPLIB_NONCLOCK_INFO)
> UCHAR ucEntrySize;
>
> -ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[];
> +ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[] __counted_by(ucNumEntries);
Yes.
> }NonClockInfoArray;
>
> typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record
> {
> USHORT usClockLow;
> UCHAR ucClockHigh;
> USHORT usVoltage;
>
> All the other ones are UCHAR, so __counted_by can not be used on them.
I'm not following. Why not?
Alex
>
> Please let me know what you think.
>
> Thanks!
>
> --
> Tasos
Re: [PATCH] drm/client: Detect when ACPI lid is closed during initialization
On Mon, May 27, 2024 at 10:32 AM Mario Limonciello
wrote:
>
> If the lid on a laptop is closed when eDP connectors are populated
> then it remains enabled when the initial framebuffer configuration
> is built.
>
> When creating the initial framebuffer configuration detect the ACPI
> lid status and if it's closed disable any eDP connectors.
>
> Suggested-by: Alex Deucher
> Reported-by: Chris Bainbridge
> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3349
> Signed-off-by: Mario Limonciello
> ---
> drivers/gpu/drm/drm_client_modeset.c | 23 +++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_client_modeset.c
> b/drivers/gpu/drm/drm_client_modeset.c
> index 31af5cf37a09..b76438c31761 100644
> --- a/drivers/gpu/drm/drm_client_modeset.c
> +++ b/drivers/gpu/drm/drm_client_modeset.c
> @@ -8,6 +8,7 @@
> */
>
> #include "drm/drm_modeset_lock.h"
> +#include
> #include
> #include
> #include
> @@ -257,6 +258,27 @@ static void drm_client_connectors_enabled(struct
> drm_connector **connectors,
> enabled[i] = drm_connector_enabled(connectors[i], false);
> }
>
> +static void drm_client_match_edp_lid(struct drm_device *dev,
> +struct drm_connector **connectors,
> +unsigned int connector_count,
> +bool *enabled)
> +{
> + int i;
> +
> + for (i = 0; i < connector_count; i++) {
> + struct drm_connector *connector = connectors[i];
> +
> + if (connector->connector_type != DRM_MODE_CONNECTOR_eDP ||
> !enabled[i])
Might want to check for LVDS here as well since a lot of laptops used
LVDS prior to eDP.
Alex
> + continue;
> +
> + if (!acpi_lid_open()) {
> + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] lid is closed,
> disabling\n",
> + connector->base.id, connector->name);
> + enabled[i] = false;
> + }
> + }
> +}
> +
> static bool drm_client_target_cloned(struct drm_device *dev,
> struct drm_connector **connectors,
> unsigned int connector_count,
> @@ -844,6 +866,7 @@ int drm_client_modeset_probe(struct drm_client_dev
> *client, unsigned int width,
> memset(crtcs, 0, connector_count * sizeof(*crtcs));
> memset(offsets, 0, connector_count * sizeof(*offsets));
>
> + drm_client_match_edp_lid(dev, connectors, connector_count,
> enabled);
> if (!drm_client_target_cloned(dev, connectors,
> connector_count, modes,
> offsets, enabled, width,
> height) &&
> !drm_client_target_preferred(dev, connectors,
> connector_count, modes,
> --
> 2.43.0
>
Re: [PATCH] drm/amdgpu: drop MES 10.1 support v3
Am 23.05.24 um 21:48 schrieb Alex Deucher:
It was an enablement vehicle for MES 11 and was never
productized. Remove it.
v2: drop additional checks in the GFX10 code.
v3: drop mes_api_def.h
Signed-off-by: Alex Deucher
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/Makefile |1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 20 -
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 281 +---
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c| 1190 -
drivers/gpu/drm/amd/amdgpu/mes_v10_1.h| 29 -
drivers/gpu/drm/amd/amdgpu/nv.c |1 -
.../drm/amd/amdkfd/kfd_device_queue_manager.c |2 +-
drivers/gpu/drm/amd/include/mes_api_def.h | 570
8 files changed, 72 insertions(+), 2022 deletions(-)
delete mode 100644 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
delete mode 100644 drivers/gpu/drm/amd/amdgpu/mes_v10_1.h
delete mode 100644 drivers/gpu/drm/amd/include/mes_api_def.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index 6e3d7f51616f..eddbb69a179f 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -187,7 +187,6 @@ amdgpu-y += \
# add MES block
amdgpu-y += \
amdgpu_mes.o \
- mes_v10_1.o \
mes_v11_0.o \
mes_v12_0.o
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index c5f23e1a1362..510916e28d37 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -94,7 +94,6 @@
#include "vcn_v4_0_5.h"
#include "jpeg_v4_0_5.h"
#include "amdgpu_vkms.h"
-#include "mes_v10_1.h"
#include "mes_v11_0.h"
#include "mes_v12_0.h"
#include "smuio_v11_0.h"
@@ -2319,25 +2318,6 @@ static int amdgpu_discovery_set_mm_ip_blocks(struct
amdgpu_device *adev)
static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev)
{
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
- case IP_VERSION(10, 1, 10):
- case IP_VERSION(10, 1, 1):
- case IP_VERSION(10, 1, 2):
- case IP_VERSION(10, 1, 3):
- case IP_VERSION(10, 1, 4):
- case IP_VERSION(10, 3, 0):
- case IP_VERSION(10, 3, 1):
- case IP_VERSION(10, 3, 2):
- case IP_VERSION(10, 3, 3):
- case IP_VERSION(10, 3, 4):
- case IP_VERSION(10, 3, 5):
- case IP_VERSION(10, 3, 6):
- if (amdgpu_mes) {
- amdgpu_device_ip_block_add(adev, &mes_v10_1_ip_block);
- adev->enable_mes = true;
- if (amdgpu_mes_kiq)
- adev->enable_mes_kiq = true;
- }
- break;
case IP_VERSION(11, 0, 0):
case IP_VERSION(11, 0, 1):
case IP_VERSION(11, 0, 2):
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 8ceb26a5575a..2a808029a47c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3734,14 +3734,8 @@ static void gfx10_kiq_unmap_queues(struct amdgpu_ring
*kiq_ring,
enum amdgpu_unmap_queues_action action,
u64 gpu_addr, u64 seq)
{
- struct amdgpu_device *adev = kiq_ring->adev;
uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;
- if (adev->enable_mes && !adev->gfx.kiq[0].ring.sched.ready) {
- amdgpu_mes_unmap_legacy_queue(adev, ring, action, gpu_addr,
seq);
- return;
- }
-
amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));
amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */
PACKET3_UNMAP_QUEUES_ACTION(action) |
@@ -3999,33 +3993,18 @@ static int gfx_v10_0_ring_test_ib(struct amdgpu_ring
*ring, long timeout)
memset(&ib, 0, sizeof(ib));
- if (ring->is_mes_queue) {
- uint32_t padding, offset;
-
- offset = amdgpu_mes_ctx_get_offs(ring, AMDGPU_MES_CTX_IB_OFFS);
- padding = amdgpu_mes_ctx_get_offs(ring,
- AMDGPU_MES_CTX_PADDING_OFFS);
-
- ib.gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);
- ib.ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);
-
- gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, padding);
- cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, padding);
- *cpu_ptr = cpu_to_le32(0xCAFEDEAD);
- } else {
- r = amdgpu_device_wb_get(adev, &index);
- if (r)
- return r;
+ r = amdgpu_device_wb_get(adev, &index);
+ if (r)
+ return r;
- gpu_addr = adev->wb.gpu_addr + (index * 4);
- adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD);
- cpu_ptr = &adev-
Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT
On 5/24/24 06:43, Guenter Roeck wrote: On 5/24/24 06:18, Alex Deucher wrote: On Fri, May 24, 2024 at 9:17 AM Alex Deucher wrote: On Fri, May 24, 2024 at 5:16 AM Guenter Roeck wrote: Hi, On Fri, Mar 29, 2024 at 12:18:28AM -0700, Samuel Holland wrote: Now that all previously-supported architectures select ARCH_HAS_KERNEL_FPU_SUPPORT, this code can depend on that symbol instead of the existing list of architectures. It can also take advantage of the common kernel-mode FPU API and method of adjusting CFLAGS. Acked-by: Alex Deucher Reviewed-by: Christoph Hellwig Signed-off-by: Samuel Holland With this patch in the mainline kernel, I get the following build error when trying to build powerpc:ppc32_allmodconfig. powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.o uses soft float powerpc64-linux-ld: failed to merge target specific data of file drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o [ repeated many times ] The problem is no longer seen after reverting this patch. Should be fixed with this patch: https://gitlab.freedesktop.org/agd5f/linux/-/commit/5f56be33f33dd1d50b9433f842c879a20dc00f5b Will pull it into my -fixes branch. Nevermind, this is something else. Yes, CONFIG_DRM_AMD_DC_FP is enabled in that configuration. Also, the above patch does not apply upstream; the endif is already in the correct place in the upstream kernel (though the commit introducing it adds a blank line at the end of the file) Guenter
Re: Build regressions/improvements in v6.10-rc1
On Mon, 27 May 2024, Geert Uytterhoeven wrote:
Below is the list of build error/warning regressions/improvements in
v6.10-rc1[1] compared to v6.9[2].
Summarized:
- build errors: +27/-20
- build warnings: +3/-1601
Happy fixing! ;-)
Thanks to the linux-next team for providing the build service.
[1]
http://kisskb.ellerman.id.au/kisskb/branch/linus/head/1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0/
(all 138 configs)
[2]
http://kisskb.ellerman.id.au/kisskb/branch/linus/head/a38297e3fb012ddfa7ce0321a7e5a8daeb1872b6/
(all 138 configs)
*** ERRORS ***
27 error regressions:
+ /kisskb/src/arch/sparc/prom/p1275.c: error: no previous prototype for
'prom_cif_init' [-Werror=missing-prototypes]: => 52:6
sparc64-gcc13/sparc64-allmodconfig (seen before)
+
/kisskb/src/drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20.c:
error: the frame size of 2192 bytes is larger than 2048 bytes
[-Werror=frame-larger-than=]: => 5118:1
+
/kisskb/src/drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20v2.c:
error: the frame size of 2280 bytes is larger than 2048 bytes
[-Werror=frame-larger-than=]: => 5234:1
+
/kisskb/src/drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:
error: the frame size of 2096 bytes is larger than 2048 bytes
[-Werror=frame-larger-than=]: => 5188:1
+
/kisskb/src/drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:
error: the frame size of 2184 bytes is larger than 2048 bytes
[-Werror=frame-larger-than=]: => 3049:1
+
/kisskb/src/drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:
error: the frame size of 2264 bytes is larger than 2048 bytes
[-Werror=frame-larger-than=]: => 3274:1
+
/kisskb/src/drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_mode_vba_314.c:
error: the frame size of 2232 bytes is larger than 2048 bytes
[-Werror=frame-larger-than=]: => 3296:1
+
/kisskb/src/drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.c:
error: the frame size of 2080 bytes is larger than 2048 bytes
[-Werror=frame-larger-than=]: => 1646:1
powerpc-gcc5/ppc32_allmodconfig
+ /kisskb/src/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c: error: unknown option
after '#pragma GCC diagnostic' kind [-Werror=pragmas]: => 16:9
+ /kisskb/src/drivers/gpu/drm/msm/adreno/adreno_gen7_9_0_snapshot.h: error:
'gen7_9_0_external_core_regs' defined but not used [-Werror=unused-variable]:
=> 1438:19
+ /kisskb/src/drivers/gpu/drm/msm/adreno/adreno_gen7_9_0_snapshot.h: error:
'gen7_9_0_sptp_clusters' defined but not used [-Werror=unused-variable]: =>
1188:43
arm64-gcc5/arm64-allmodconfig
powerpc-gcc5/powerpc-all{mod,yes}config
powerpc-gcc5/ppc32_allmodconfig
powerpc-gcc5/ppc64_book3e_allmodconfig
powerpc-gcc5/ppc64le_allmodconfig
sparc64-gcc5/sparc64-allmodconfig
Looks like #pragma "-Wunused-const-variable" is not supported by gcc-5
+ /kisskb/src/drivers/gpu/drm/nouveau/nvif/object.c: error: 'memcpy' accessing
4294967240 or more bytes at offsets 0 and 56 overlaps 6442450833 bytes at offset
-2147483593 [-Werror=restrict]: => 298:17
+ /kisskb/src/drivers/gpu/drm/nouveau/nvif/object.c: error: 'memcpy' accessing
4294967264 or more bytes at offsets 0 and 32 overlaps 6442450881 bytes at offset
-2147483617 [-Werror=restrict]: => 161:9
parisc-gcc13/generic-32bit_defconfig
parisc-gcc13/parisc-{def,allmod}config
+ /kisskb/src/include/linux/kern_levels.h: error: format '%lu' expects argument
of type 'long unsigned int', but argument 4 has type 'unsigned int'
[-Werror=format=]: => 5:18, 5:25
mips-gcc{8,13}/mips-allmodconfig
parisc-gcc13/parisc-allmodconfig
powerpc-gcc{5,13}/ppc32_allmodconfig
sparc64-gcc{5,13}/sparc-allmodconfig
xtensa-gcc13/xtensa-allmodconfig
drivers/scsi/mpi3mr/mpi3mr_transport.c: In function 'mpi3mr_sas_port_add':
drivers/scsi/mpi3mr/mpi3mr_transport.c:1367:62: note: format string is defined
here
ioc_warn(mrioc, "skipping port %u, max allowed value is %lu\n",
~~^
%u
+ /kisskb/src/kernel/bpf/verifier.c: error: ‘pcpu_hot’ undeclared (first use in
this function): => 20317:85
+ /kisskb/src/lib/iomap.c: error: no previous prototype for ‘ioread64_hi_lo’
[-Werror=missing-prototypes]: => 163:5
+ /kisskb/src/lib/iomap.c: error: no previous prototype for ‘ioread64_lo_hi’
[-Werror=missing-prototypes]: => 156:5
+ /kisskb/src/lib/iomap.c: error: no previous prototype for ‘ioread64be_hi_lo’
[-Werror=missing-prototypes]: => 178:5
+ /kisskb/src/lib/iomap.c: error: no previous prototype for ‘ioread64be_lo_hi’
[-Werror=missing-prototypes]: => 170:5
+ /kisskb/src/lib/iomap.c: error: no previous prototype for ‘iowrite64_hi_lo’
[-Werror=missing-prototypes]: => 272:6
+ /kisskb/src/lib/iomap.c: error: no previous prototype for ‘iowrite64_lo_hi’
[-Werror=missing-prototypes]: => 264:6
+ /kisskb/src/lib/i
Re: [PATCH] drm/amdgpu/pptable: Fix UBSAN array-index-out-of-bounds
On 2024-05-23 17:52, Alex Deucher wrote:
> On Thu, May 23, 2024 at 9:05 AM Tasos Sahanidis wrote:
>>
>> Dyanmically sized arrays used [1] instead of []. Replacing the former
>> with the latter resolves multiple warnings observed on boot with a
>> BONAIRE card.
>>
>> Signed-off-by: Tasos Sahanidis
>> ---
>> drivers/gpu/drm/amd/include/pptable.h | 24
>> 1 file changed, 12 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/include/pptable.h
>> b/drivers/gpu/drm/amd/include/pptable.h
>> index 2e8e6c9875f6..d1dec880d2d6 100644
>> --- a/drivers/gpu/drm/amd/include/pptable.h
>> +++ b/drivers/gpu/drm/amd/include/pptable.h
>> @@ -480,7 +480,7 @@ typedef struct _StateArray{
>> //how many states we have
>> UCHAR ucNumEntries;
>>
>> -ATOM_PPLIB_STATE_V2 states[1];
>> +ATOM_PPLIB_STATE_V2 states[];
>
> Can you add __counted_by(ucNumEntries) to the end of the line? E.g.,
>
> ATOM_PPLIB_STATE_V2 states[] __counted_by(ucNumEntries);
>
> Same comment for the other changes below.
>
> Alex
Sure thing! I have the v2 ready and will submit after testing it on
hardware. I do have a question though. The following already uses [].
Would it be acceptable to also modify it in the same patch?
@@ -658,7 +658,7 @@ typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Record
typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{
UCHAR numEntries;
-ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[];
+ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[] __counted_by(numEntries);
}ATOM_PPLIB_SAMClk_Voltage_Limit_Table;
typedef struct _ATOM_PPLIB_SAMU_Table
There's also this, which I think __counted_by can be used here as well:
diff --git a/drivers/gpu/drm/amd/include/pptable.h
b/drivers/gpu/drm/amd/include/pptable.h
index febc853d2a07..341d4a4e8d98 100644
--- a/drivers/gpu/drm/amd/include/pptable.h
+++ b/drivers/gpu/drm/amd/include/pptable.h
@@ -497,15 +497,15 @@ typedef struct _ClockInfoArray{
typedef struct _NonClockInfoArray{
//how many non-clock levels we have. normally should be same as number of
states
UCHAR ucNumEntries;
//sizeof(ATOM_PPLIB_NONCLOCK_INFO)
UCHAR ucEntrySize;
-ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[];
+ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[] __counted_by(ucNumEntries);
}NonClockInfoArray;
typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record
{
USHORT usClockLow;
UCHAR ucClockHigh;
USHORT usVoltage;
All the other ones are UCHAR, so __counted_by can not be used on them.
Please let me know what you think.
Thanks!
--
Tasos
[PATCH] drm/radeon/r100: enhance error handling in r100_cp_init_microcode
In r100_cp_init_microcode, if rdev->family don't match any of
if statement, fw_name will be NULL, which will cause
gcc (11.4.0 powerpc64le-linux-gnu) complain:
In function ‘r100_cp_init_microcode’,
inlined from ‘r100_cp_init’ at drivers/gpu/drm/radeon/r100.c:1136:7:
./include/linux/printk.h:457:44: warning: ‘%s’ directive argument is null
[-Wformat-overflow=]
457 | #define printk(fmt, ...) printk_index_wrap(_printk, fmt, ##__VA_ARGS__)
Above warning is emitted during the rcutorture test in
in PPC VM of Opensource Lab of Oregon State Univerisity.
Enhance error handling in r100_cp_init_microcode, let r100_cp_init_microcode
return with -EINVAL when none of chip families is matched.
Signed-off-by: Zhouyi Zhou
---
drivers/gpu/drm/radeon/r100.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 0b1e19345f43..4f8a1bdd9365 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1055,6 +1055,11 @@ static int r100_cp_init_microcode(struct radeon_device
*rdev)
(rdev->family == CHIP_RV570)) {
DRM_INFO("Loading R500 Microcode\n");
fw_name = FIRMWARE_R520;
+ } else {
+ pr_err("radeon_cp: Failed to load firmware \"%d\"\n",
+ rdev->family);
+ err = -EINVAL;
+ goto out;
}
err = request_firmware(&rdev->me_fw, fw_name, rdev->dev);
@@ -1067,6 +1072,8 @@ static int r100_cp_init_microcode(struct radeon_device
*rdev)
release_firmware(rdev->me_fw);
rdev->me_fw = NULL;
}
+
+out:
return err;
}
--
2.34.1
Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT
On 5/24/24 06:18, Alex Deucher wrote: On Fri, May 24, 2024 at 9:17 AM Alex Deucher wrote: On Fri, May 24, 2024 at 5:16 AM Guenter Roeck wrote: Hi, On Fri, Mar 29, 2024 at 12:18:28AM -0700, Samuel Holland wrote: Now that all previously-supported architectures select ARCH_HAS_KERNEL_FPU_SUPPORT, this code can depend on that symbol instead of the existing list of architectures. It can also take advantage of the common kernel-mode FPU API and method of adjusting CFLAGS. Acked-by: Alex Deucher Reviewed-by: Christoph Hellwig Signed-off-by: Samuel Holland With this patch in the mainline kernel, I get the following build error when trying to build powerpc:ppc32_allmodconfig. powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.o uses soft float powerpc64-linux-ld: failed to merge target specific data of file drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o [ repeated many times ] The problem is no longer seen after reverting this patch. Should be fixed with this patch: https://gitlab.freedesktop.org/agd5f/linux/-/commit/5f56be33f33dd1d50b9433f842c879a20dc00f5b Will pull it into my -fixes branch. Nevermind, this is something else. mdgpu_dm_helpers.o is built with -msoft-float, display_mode_lib.o is built with -mhard-float. -msoft-float is from arch/powerpc/Makefile:KBUILD_CFLAGS += $(CC_FLAGS_NO_FPU) -mhard-float is from drivers/gpu/drm/amd/display/dc/dml/Makefile:dml_ccflags := $(CC_FLAGS_FPU) drivers/gpu/drm/amd/display/dc/dml/Makefile:dml_rcflags := $(CC_FLAGS_NO_FPU) drivers/gpu/drm/amd/display/dc/dml2/Makefile:dml2_ccflags := $(CC_FLAGS_FPU) drivers/gpu/drm/amd/display/dc/dml2/Makefile:dml2_rcflags := $(CC_FLAGS_NO_FPU) Unfortunately I have no idea know how to resolve this. Guenter
Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT
On 5/24/24 06:18, Alex Deucher wrote: On Fri, May 24, 2024 at 9:17 AM Alex Deucher wrote: On Fri, May 24, 2024 at 5:16 AM Guenter Roeck wrote: Hi, On Fri, Mar 29, 2024 at 12:18:28AM -0700, Samuel Holland wrote: Now that all previously-supported architectures select ARCH_HAS_KERNEL_FPU_SUPPORT, this code can depend on that symbol instead of the existing list of architectures. It can also take advantage of the common kernel-mode FPU API and method of adjusting CFLAGS. Acked-by: Alex Deucher Reviewed-by: Christoph Hellwig Signed-off-by: Samuel Holland With this patch in the mainline kernel, I get the following build error when trying to build powerpc:ppc32_allmodconfig. powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.o uses soft float powerpc64-linux-ld: failed to merge target specific data of file drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o [ repeated many times ] The problem is no longer seen after reverting this patch. Should be fixed with this patch: https://gitlab.freedesktop.org/agd5f/linux/-/commit/5f56be33f33dd1d50b9433f842c879a20dc00f5b Will pull it into my -fixes branch. Nevermind, this is something else. Yes, CONFIG_DRM_AMD_DC_FP is enabled in that configuration. Guenter
[PATCH] drm/client: Detect when ACPI lid is closed during initialization
If the lid on a laptop is closed when eDP connectors are populated
then it remains enabled when the initial framebuffer configuration
is built.
When creating the initial framebuffer configuration detect the ACPI
lid status and if it's closed disable any eDP connectors.
Suggested-by: Alex Deucher
Reported-by: Chris Bainbridge
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3349
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/drm_client_modeset.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/drm_client_modeset.c
b/drivers/gpu/drm/drm_client_modeset.c
index 31af5cf37a09..b76438c31761 100644
--- a/drivers/gpu/drm/drm_client_modeset.c
+++ b/drivers/gpu/drm/drm_client_modeset.c
@@ -8,6 +8,7 @@
*/
#include "drm/drm_modeset_lock.h"
+#include
#include
#include
#include
@@ -257,6 +258,27 @@ static void drm_client_connectors_enabled(struct
drm_connector **connectors,
enabled[i] = drm_connector_enabled(connectors[i], false);
}
+static void drm_client_match_edp_lid(struct drm_device *dev,
+struct drm_connector **connectors,
+unsigned int connector_count,
+bool *enabled)
+{
+ int i;
+
+ for (i = 0; i < connector_count; i++) {
+ struct drm_connector *connector = connectors[i];
+
+ if (connector->connector_type != DRM_MODE_CONNECTOR_eDP ||
!enabled[i])
+ continue;
+
+ if (!acpi_lid_open()) {
+ drm_dbg_kms(dev, "[CONNECTOR:%d:%s] lid is closed,
disabling\n",
+ connector->base.id, connector->name);
+ enabled[i] = false;
+ }
+ }
+}
+
static bool drm_client_target_cloned(struct drm_device *dev,
struct drm_connector **connectors,
unsigned int connector_count,
@@ -844,6 +866,7 @@ int drm_client_modeset_probe(struct drm_client_dev *client,
unsigned int width,
memset(crtcs, 0, connector_count * sizeof(*crtcs));
memset(offsets, 0, connector_count * sizeof(*offsets));
+ drm_client_match_edp_lid(dev, connectors, connector_count,
enabled);
if (!drm_client_target_cloned(dev, connectors, connector_count,
modes,
offsets, enabled, width, height)
&&
!drm_client_target_preferred(dev, connectors,
connector_count, modes,
--
2.43.0
Re: [PATCH] drm/radeon/r100: enhance error handling in r100_cp_init_microcode
Am 27.05.24 um 03:20 schrieb Zhouyi Zhou:
In r100_cp_init_microcode, if rdev->family don't match any of
if statement, fw_name will be NULL, which will cause
gcc (11.4.0 powerpc64le-linux-gnu) complain:
In function ‘r100_cp_init_microcode’,
inlined from ‘r100_cp_init’ at drivers/gpu/drm/radeon/r100.c:1136:7:
./include/linux/printk.h:457:44: warning: ‘%s’ directive argument is null
[-Wformat-overflow=]
457 | #define printk(fmt, ...) printk_index_wrap(_printk, fmt, ##__VA_ARGS__)
Above warning is emitted during the rcutorture test in
in PPC VM of Opensource Lab of Oregon State Univerisity.
Enhance error handling in r100_cp_init_microcode, let r100_cp_init_microcode
return with -EINVAL when none of chip families is matched.
Signed-off-by: Zhouyi Zhou
---
drivers/gpu/drm/radeon/r100.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 0b1e19345f43..4f8a1bdd9365 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1055,6 +1055,11 @@ static int r100_cp_init_microcode(struct radeon_device
*rdev)
(rdev->family == CHIP_RV570)) {
DRM_INFO("Loading R500 Microcode\n");
fw_name = FIRMWARE_R520;
+ } else {
+ pr_err("radeon_cp: Failed to load firmware \"%d\"\n",
+ rdev->family);
+ err = -EINVAL;
+ goto out;
}
err = request_firmware(&rdev->me_fw, fw_name, rdev->dev);
@@ -1067,6 +1072,8 @@ static int r100_cp_init_microcode(struct radeon_device
*rdev)
release_firmware(rdev->me_fw);
rdev->me_fw = NULL;
}
+
+out:
That looks superfluous, just return -EINVAL directly in the else case above.
Apart from that this is for ~15year old hardware. I'm a bit reluctant
adding code for something that old even when this change here looks
harmless.
Is there a plan to complain about that in an automated checker? If yes
then the change is probably justified, if no then I would rather not do it.
Regards,
Christian.
return err;
}
RE: [PATCH] drm/amdgpu: fix typo in amdgpu_ras_aca_sysfs_read() function
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Tao Zhou
> -Original Message-
> From: Wang, Yang(Kevin)
> Sent: Monday, May 27, 2024 3:47 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Chai, Thomas
> Subject: [PATCH] drm/amdgpu: fix typo in amdgpu_ras_aca_sysfs_read() function
>
> fix typo "info.ue_count" in amdgpu_ras_aca_sysfs_read() function.
>
> Fixes: edd67b5417f5 ("drm/amdgpu: add aca deferred error type support")
>
> Signed-off-by: Yang Wang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 8073716bc5ac..db4a811cc0f5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -1299,7 +1299,7 @@ ssize_t amdgpu_ras_aca_sysfs_read(struct device
> *dev, struct device_attribute *a
> return -EINVAL;
>
> return sysfs_emit(buf, "%s: %lu\n%s: %lu\n%s: %lu\n", "ue",
> info.ue_count,
> - "ce", info.ce_count, "de", info.ue_count);
> + "ce", info.ce_count, "de", info.de_count);
> }
>
> static int amdgpu_ras_query_error_status_helper(struct amdgpu_device *adev,
> --
> 2.34.1
[PATCH] drm/amdgpu: fix typo in amdgpu_ras_aca_sysfs_read() function
fix typo "info.ue_count" in amdgpu_ras_aca_sysfs_read() function.
Fixes: edd67b5417f5 ("drm/amdgpu: add aca deferred error type support")
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 8073716bc5ac..db4a811cc0f5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -1299,7 +1299,7 @@ ssize_t amdgpu_ras_aca_sysfs_read(struct device *dev,
struct device_attribute *a
return -EINVAL;
return sysfs_emit(buf, "%s: %lu\n%s: %lu\n%s: %lu\n", "ue",
info.ue_count,
- "ce", info.ce_count, "de", info.ue_count);
+ "ce", info.ce_count, "de", info.de_count);
}
static int amdgpu_ras_query_error_status_helper(struct amdgpu_device *adev,
--
2.34.1
