[PATCH] drm/amdgpu: Fix the incomplete product number
The comments say that the product number is a 16-digit HEX string so the
buffer needs to be at least 17 characters to hold the NUL terminator. Expand
the buffer size to 20 to avoid the alignment issues.
The comment:Product number should only be 16 characters. Any
more,and something could be wrong. Cap it at 16 to be safe
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9f729a648005..187e3dae3965 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1019,7 +1019,7 @@ struct amdgpu_device {
boolpsp_sysfs_en;
/* Chip product information */
- charproduct_number[16];
+ charproduct_number[20];
charproduct_name[AMDGPU_PRODUCT_NAME_LEN];
charserial[20];
--
2.34.1
[PATCH] drm/amdgpu: Fix the incomplete product number
The comments say that the product number is a 16-digit HEX string so the
buffer needs to be at least 17 characters to hold the NUL terminator.
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9f729a648005..187e3dae3965 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1019,7 +1019,7 @@ struct amdgpu_device {
boolpsp_sysfs_en;
/* Chip product information */
- charproduct_number[16];
+ charproduct_number[20];
charproduct_name[AMDGPU_PRODUCT_NAME_LEN];
charserial[20];
--
2.34.1
[PATCH] drm/amd/amdgpu: Enable some sysnodes for guest smi
Enable sysnode vclk and dclk on Navi21 asic for guest smi
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 249cb0aeb5ae..c255b4b8e685 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -2087,10 +2087,10 @@ static int default_attr_update(struct amdgpu_device
*adev, struct amdgpu_device_
if (asic_type < CHIP_VEGA12)
*states = ATTR_STATE_UNSUPPORTED;
} else if (DEVICE_ATTR_IS(pp_dpm_vclk)) {
- if (!(asic_type == CHIP_VANGOGH))
+ if (!(asic_type == CHIP_VANGOGH || asic_type ==
CHIP_SIENNA_CICHLID))
*states = ATTR_STATE_UNSUPPORTED;
} else if (DEVICE_ATTR_IS(pp_dpm_dclk)) {
- if (!(asic_type == CHIP_VANGOGH))
+ if (!(asic_type == CHIP_VANGOGH || asic_type ==
CHIP_SIENNA_CICHLID))
*states = ATTR_STATE_UNSUPPORTED;
}
--
2.32.0
[PATCH] drm/amdgpu: Change the imprecise output
The fail reason is that the vfgate is disabled
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 9f3d82dfb79c..f94ef15b3166 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -56,7 +56,7 @@
#define GFX10_NUM_GFX_RINGS_Sienna_Cichlid 1
#define GFX10_MEC_HPD_SIZE 2048
-#define RLCG_INTERFACE_NOT_ENABLED 0x400
+#define RLCG_VFGATE_DISABLED 0x400
#define RLCG_WRONG_OPERATION_TYPE 0x200
#define RLCG_NOT_IN_RANGE 0x100
@@ -1571,8 +1571,8 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, uint32
if (i >= retries) {
if (RLCG_ERROR_REPORT_ENABLED(adev)) {
- if (tmp & RLCG_INTERFACE_NOT_ENABLED)
- pr_err("The interface is not enabled,
program reg:0x%05x failed!\n", offset);
+ if (tmp & RLCG_VFGATE_DISABLED)
+ pr_err("The vfgate is disabled, program
reg:0x%05x failed!\n", offset);
else if (tmp & RLCG_WRONG_OPERATION_TYPE)
pr_err("Wrong operation type, program
reg:0x%05x failed!\n", offset);
else if (tmp & RLCG_NOT_IN_RANGE)
--
2.32.0
___
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[PATCH] drm/amdgpu: Add error message when programing registers fails
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 26 ++
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index bc4347a72301..67a6fffd528b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -56,6 +56,10 @@
#define GFX10_NUM_GFX_RINGS_Sienna_Cichlid 1
#define GFX10_MEC_HPD_SIZE 2048
+#define RLCG_INTERFACE_NOT_ENABLED 0x400
+#define RLCG_WRONG_OPERATION_TYPE 0x200
+#define RLCG_NOT_IN_RANGE 0x100
+
#define F32_CE_PROGRAM_RAM_SIZE65536
#define RLCG_UCODE_LOADING_START_ADDRESS 0x2000L
@@ -185,6 +189,9 @@
#define GFX_RLCG_GC_READ (0x1 << 28)
#define GFX_RLCG_MMHUB_WRITE (0x2 << 28)
+#define RLCG_ERROR_REPORT_ENABLED(adev) \
+ (amdgpu_sriov_reg_indirect_mmhub(adev) ||
amdgpu_sriov_reg_indirect_gc(adev))
+
MODULE_FIRMWARE("amdgpu/navi10_ce.bin");
MODULE_FIRMWARE("amdgpu/navi10_pfp.bin");
MODULE_FIRMWARE("amdgpu/navi10_me.bin");
@@ -1523,9 +1530,9 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, uint32
writel(v, scratch_reg0);
writel(offset | flag, scratch_reg1);
writel(1, spare_int);
- for (i = 0; i < retries; i++) {
- u32 tmp;
+ u32 tmp;
+ for (i = 0; i < retries; i++) {
tmp = readl(scratch_reg1);
if (!(tmp & flag))
break;
@@ -1533,8 +1540,19 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, uint32
udelay(10);
}
- if (i >= retries)
- pr_err("timeout: rlcg program reg:0x%05x failed !\n",
offset);
+ if (i >= retries) {
+ if (RLCG_ERROR_REPORT_ENABLED(adev)) {
+ if (tmp & RLCG_INTERFACE_NOT_ENABLED)
+ pr_err("The interface is not enabled,
program reg:0x%05x failed!\n", offset);
+ else if (tmp & RLCG_WRONG_OPERATION_TYPE)
+ pr_err("Wrong operation type, program
reg:0x%05x failed!\n", offset);
+ else if (tmp & RLCG_NOT_IN_RANGE)
+ pr_err("The register is not in range,
program reg:0x%05x failed!\n", offset);
+ else
+ pr_err("Unknown error type, program
reg:0x%05x failed!\n", offset);
+ } else
+ pr_err("timeout: rlcg program reg:0x%05x
failed!\n", offset);
+ }
}
ret = readl(scratch_reg0);
--
2.32.0
___
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/amdgpu: Add error message when programing registers fails
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 24
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index bc4347a72301..3ac0d27e8ad1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -56,6 +56,10 @@
#define GFX10_NUM_GFX_RINGS_Sienna_Cichlid 1
#define GFX10_MEC_HPD_SIZE 2048
+#define RLCG_INTERFACE_NOT_ENABLED 0x400
+#define RLCG_WRONG_OPERATION_TYPE 0x200
+#define RLCG_NOT_IN_RANGE 0x100
+
#define F32_CE_PROGRAM_RAM_SIZE65536
#define RLCG_UCODE_LOADING_START_ADDRESS 0x2000L
@@ -1523,9 +1527,9 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, uint32
writel(v, scratch_reg0);
writel(offset | flag, scratch_reg1);
writel(1, spare_int);
- for (i = 0; i < retries; i++) {
- u32 tmp;
+ u32 tmp;
+ for (i = 0; i < retries; i++) {
tmp = readl(scratch_reg1);
if (!(tmp & flag))
break;
@@ -1533,8 +1537,20 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, uint32
udelay(10);
}
- if (i >= retries)
- pr_err("timeout: rlcg program reg:0x%05x failed !\n",
offset);
+ if (i >= retries) {
+ if (amdgpu_sriov_reg_indirect_mmhub(adev) ||
+ amdgpu_sriov_reg_indirect_gc(adev)) {
+ if (tmp & RLCG_INTERFACE_NOT_ENABLED)
+ pr_err("The interface is not enabled,
program reg:0x%05x failed!\n", offset);
+ else if (tmp & RLCG_WRONG_OPERATION_TYPE)
+ pr_err("Wrong operation type, program
reg:0x%05x failed!\n", offset);
+ else if (tmp & RLCG_NOT_IN_RANGE)
+ pr_err("The register is not in range,
program reg:0x%05x failed!\n", offset);
+ else
+ pr_err("Unknown error type, program
reg:0x%05x failed!\n", offset);
+ } else
+ pr_err("timeout: rlcg program reg:0x%05x
failed!\n", offset);
+ }
}
ret = readl(scratch_reg0);
--
2.32.0
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/amdgpu: Add error message when programing registers fails
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index bc4347a72301..a7e03bba72b3 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -56,6 +56,10 @@
#define GFX10_NUM_GFX_RINGS_Sienna_Cichlid 1
#define GFX10_MEC_HPD_SIZE 2048
+#define INTERFACE_NOT_ENABLED_FLAG 0x400
+#define WRONG_OPERATION_TYPE_FLAG 0x200
+#define NOT_IN_RANGE_FLAG 0x100
+
#define F32_CE_PROGRAM_RAM_SIZE65536
#define RLCG_UCODE_LOADING_START_ADDRESS 0x2000L
@@ -1523,9 +1527,9 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, uint32
writel(v, scratch_reg0);
writel(offset | flag, scratch_reg1);
writel(1, spare_int);
- for (i = 0; i < retries; i++) {
- u32 tmp;
+ u32 tmp;
+ for (i = 0; i < retries; i++) {
tmp = readl(scratch_reg1);
if (!(tmp & flag))
break;
@@ -1533,8 +1537,18 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, uint32
udelay(10);
}
- if (i >= retries)
- pr_err("timeout: rlcg program reg:0x%05x failed !\n",
offset);
+ if (i >= retries) {
+ pr_err("timeout: rlcg program reg:0x%05x failed!\n",
offset);
+ if (amdgpu_sriov_reg_indirect_mmhub(adev) ||
+ amdgpu_sriov_reg_indirect_gc(adev)) {
+ if (tmp & INTERFACE_NOT_ENABLED_FLAG)
+ pr_err("The interface is not
eabled!\n");
+ if (tmp & WRONG_OPERATION_TYPE_FLAG)
+ pr_err("Wrong operation type!\n");
+ if (tmp & NOT_IN_RANGE_FLAG)
+ pr_err("The register is not in
range!\n");
+ }
+ }
}
ret = readl(scratch_reg0);
--
2.32.0
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
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[PATCH] drm/amdgpu: return error type when programing registers fails
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index bc4347a72301..af92c6f63dee 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -56,6 +56,15 @@
#define GFX10_NUM_GFX_RINGS_Sienna_Cichlid 1
#define GFX10_MEC_HPD_SIZE 2048
+#define INTERFACE_NOT_ENABLED_FLAG 0x400
+#define WRONG_OPERATION_TYPE_FLAG 0x200
+#define NOT_IN_RANGE_FLAG 0x100
+
+#define RLCG_UNKNOWN_TYPE 0
+#define RLCG_INTERFACE_NOT_ENABLED 1
+#define RLCG_WRONG_OPERATION_TYPE 2
+#define RLCG_NOT_IN_RANGE 3
+
#define F32_CE_PROGRAM_RAM_SIZE65536
#define RLCG_UCODE_LOADING_START_ADDRESS 0x2000L
@@ -1533,8 +1542,17 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, uint32
udelay(10);
}
- if (i >= retries)
- pr_err("timeout: rlcg program reg:0x%05x failed !\n",
offset);
+ if (i >= retries) {
+ int error_type = RLCG_UNKNOWN_TYPE;
+
+ if (tmp & INTERFACE_NOT_ENABLED_FLAG && !error_type)
+ error_type = RLCG_INTERFACE_NOT_ENABLED;
+ if (tmp & WRONG_OPERATION_TYPE_FLAG && !error_type)
+ error_type = RLCG_WRONG_OPERATION_TYPE;
+ if (tmp & NOT_IN_RANGE_FLAG && !error_type)
+ error_type = RLCG_NOT_IN_RANGE;
+ pr_err("timeout: rlcg program reg:0x%05x failed! Error
type: %d.\n", offset, error_type);
+ }
}
ret = readl(scratch_reg0);
--
2.32.0
___
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[PATCH] drm/amdgpu: return error type when programing registers fails
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index bc4347a72301..2ec5b973a888 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -56,6 +56,15 @@
#define GFX10_NUM_GFX_RINGS_Sienna_Cichlid 1
#define GFX10_MEC_HPD_SIZE 2048
+#define INTERFACE_NOT_ENABLED_FLAG 0x400
+#define WRONG_OPERATION_TYPE_FLAG 0x200
+#define NOT_IN_RANGE_FLAG 0x100
+
+#define RLCG_UNKNOWN_TYPE 0
+#define RLCG_INTERFACE_NOT_ENABLED 1
+#define RLCG_WRONG_OPERATION_TYPE 2
+#define RLCG_NOT_IN_RANGE 3
+
#define F32_CE_PROGRAM_RAM_SIZE65536
#define RLCG_UCODE_LOADING_START_ADDRESS 0x2000L
@@ -1533,8 +1542,17 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, uint32
udelay(10);
}
- if (i >= retries)
- pr_err("timeout: rlcg program reg:0x%05x failed !\n",
offset);
+ if (i >= retries) {
+ u32 error_type = RLCG_UNKNOWN_TYPE;
+
+ if (tmp & INTERFACE_NOT_ENABLED_FLAG)
+ error_type = RLCG_INTERFACE_NOT_ENABLED;
+ if (tmp & WRONG_OPERATION_TYPE_FLAG)
+ error_type = RLCG_WRONG_OPERATION_TYPE;
+ if (tmp & NOT_IN_RANGE_FLAG)
+ error_type = RLCG_NOT_IN_RANGE;
+ pr_err("timeout: rlcg program reg:0x%05x failed! Error
type: %d.\n", offset, error_type);
+ }
}
ret = readl(scratch_reg0);
--
2.32.0
___
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[PATCH] drm/amdgpu: change the imprecise function name
The callback functions are used for SRIOV read/write instead
of just for rlcg read/write
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h| 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 8
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/soc15_common.h | 8
5 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index eb1f3f42e00b..aa94ad0e9973 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -508,7 +508,7 @@ void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->is_rlcg_access_range) {
if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg))
- return adev->gfx.rlc.funcs->rlcg_wreg(adev, reg, v, 0,
0);
+ return adev->gfx.rlc.funcs->sriov_wreg(adev, reg, v, 0,
0);
} else {
writel(v, ((void __iomem *)adev->rmmio) + (reg * 4));
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
index 7a4775ab6804..00afd0dcae86 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
@@ -127,8 +127,8 @@ struct amdgpu_rlc_funcs {
void (*reset)(struct amdgpu_device *adev);
void (*start)(struct amdgpu_device *adev);
void (*update_spm_vmid)(struct amdgpu_device *adev, unsigned vmid);
- void (*rlcg_wreg)(struct amdgpu_device *adev, u32 offset, u32 v, u32
acc_flags, u32 hwip);
- u32 (*rlcg_rreg)(struct amdgpu_device *adev, u32 offset, u32 acc_flags,
u32 hwip);
+ void (*sriov_wreg)(struct amdgpu_device *adev, u32 offset, u32 v, u32
acc_flags, u32 hwip);
+ u32 (*sriov_rreg)(struct amdgpu_device *adev, u32 offset, u32
acc_flags, u32 hwip);
bool (*is_rlcg_access_range)(struct amdgpu_device *adev, uint32_t reg);
};
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 705fa3027199..bc4347a72301 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -1542,7 +1542,7 @@ static u32 gfx_v10_rlcg_rw(struct amdgpu_device *adev,
u32 offset, u32 v, uint32
return ret;
}
-static void gfx_v10_rlcg_wreg(struct amdgpu_device *adev, u32 offset, u32
value, u32 acc_flags, u32 hwip)
+static void gfx_v10_sriov_wreg(struct amdgpu_device *adev, u32 offset, u32
value, u32 acc_flags, u32 hwip)
{
u32 rlcg_flag;
@@ -1558,7 +1558,7 @@ static void gfx_v10_rlcg_wreg(struct amdgpu_device *adev,
u32 offset, u32 value,
WREG32(offset, value);
}
-static u32 gfx_v10_rlcg_rreg(struct amdgpu_device *adev, u32 offset, u32
acc_flags, u32 hwip)
+static u32 gfx_v10_sriov_rreg(struct amdgpu_device *adev, u32 offset, u32
acc_flags, u32 hwip)
{
u32 rlcg_flag;
@@ -8269,8 +8269,8 @@ static const struct amdgpu_rlc_funcs
gfx_v10_0_rlc_funcs_sriov = {
.reset = gfx_v10_0_rlc_reset,
.start = gfx_v10_0_rlc_start,
.update_spm_vmid = gfx_v10_0_update_spm_vmid,
- .rlcg_wreg = gfx_v10_rlcg_wreg,
- .rlcg_rreg = gfx_v10_rlcg_rreg,
+ .sriov_wreg = gfx_v10_sriov_wreg,
+ .sriov_rreg = gfx_v10_sriov_rreg,
.is_rlcg_access_range = gfx_v10_0_is_rlcg_access_range,
};
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 044076ec1d03..03acc777adf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -787,7 +787,7 @@ static void gfx_v9_0_rlcg_w(struct amdgpu_device *adev, u32
offset, u32 v, u32 f
}
-static void gfx_v9_0_rlcg_wreg(struct amdgpu_device *adev, u32 offset,
+static void gfx_v9_0_sriov_wreg(struct amdgpu_device *adev, u32 offset,
u32 v, u32 acc_flags, u32 hwip)
{
if ((acc_flags & AMDGPU_REGS_RLC) &&
@@ -5131,7 +5131,7 @@ static const struct amdgpu_rlc_funcs gfx_v9_0_rlc_funcs =
{
.reset = gfx_v9_0_rlc_reset,
.start = gfx_v9_0_rlc_start,
.update_spm_vmid = gfx_v9_0_update_spm_vmid,
- .rlcg_wreg = gfx_v9_0_rlcg_wreg,
+ .sriov_wreg = gfx_v9_0_sriov_wreg,
.is_rlcg_access_range = gfx_v9_0_is_rlcg_access_range,
};
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
index 0eeb5e073be8..8a9ca87d8663 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
@@ -28,13 +28,13 @@
#define SOC15_REG_OFFSET(ip, inst, reg)
(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg)
#define __WREG32_SOC15_RLC__(reg, value, flag, hwip) \
- ((amdgpu_sriov_vf(adev) &
[PATCH] drm/amdgpu: Use a precise function name
The callback functions are used for SRIOV read/write instead
of just for rlcg read/write
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h| 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/soc15_common.h | 8
5 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index eb1f3f42e00b..aa94ad0e9973 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -508,7 +508,7 @@ void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->is_rlcg_access_range) {
if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg))
- return adev->gfx.rlc.funcs->rlcg_wreg(adev, reg, v, 0,
0);
+ return adev->gfx.rlc.funcs->sriov_wreg(adev, reg, v, 0,
0);
} else {
writel(v, ((void __iomem *)adev->rmmio) + (reg * 4));
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
index 7a4775ab6804..00afd0dcae86 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
@@ -127,8 +127,8 @@ struct amdgpu_rlc_funcs {
void (*reset)(struct amdgpu_device *adev);
void (*start)(struct amdgpu_device *adev);
void (*update_spm_vmid)(struct amdgpu_device *adev, unsigned vmid);
- void (*rlcg_wreg)(struct amdgpu_device *adev, u32 offset, u32 v, u32
acc_flags, u32 hwip);
- u32 (*rlcg_rreg)(struct amdgpu_device *adev, u32 offset, u32 acc_flags,
u32 hwip);
+ void (*sriov_wreg)(struct amdgpu_device *adev, u32 offset, u32 v, u32
acc_flags, u32 hwip);
+ u32 (*sriov_rreg)(struct amdgpu_device *adev, u32 offset, u32
acc_flags, u32 hwip);
bool (*is_rlcg_access_range)(struct amdgpu_device *adev, uint32_t reg);
};
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 705fa3027199..c9b68a8611d5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -8269,8 +8269,8 @@ static const struct amdgpu_rlc_funcs
gfx_v10_0_rlc_funcs_sriov = {
.reset = gfx_v10_0_rlc_reset,
.start = gfx_v10_0_rlc_start,
.update_spm_vmid = gfx_v10_0_update_spm_vmid,
- .rlcg_wreg = gfx_v10_rlcg_wreg,
- .rlcg_rreg = gfx_v10_rlcg_rreg,
+ .sriov_wreg = gfx_v10_rlcg_wreg,
+ .sriov_rreg = gfx_v10_rlcg_rreg,
.is_rlcg_access_range = gfx_v10_0_is_rlcg_access_range,
};
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 044076ec1d03..1c9b8b37fd3a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -5131,7 +5131,7 @@ static const struct amdgpu_rlc_funcs gfx_v9_0_rlc_funcs =
{
.reset = gfx_v9_0_rlc_reset,
.start = gfx_v9_0_rlc_start,
.update_spm_vmid = gfx_v9_0_update_spm_vmid,
- .rlcg_wreg = gfx_v9_0_rlcg_wreg,
+ .sriov_wreg = gfx_v9_0_rlcg_wreg,
.is_rlcg_access_range = gfx_v9_0_is_rlcg_access_range,
};
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
index 0eeb5e073be8..8a9ca87d8663 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
@@ -28,13 +28,13 @@
#define SOC15_REG_OFFSET(ip, inst, reg)
(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg)
#define __WREG32_SOC15_RLC__(reg, value, flag, hwip) \
- ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->rlcg_wreg) ? \
-adev->gfx.rlc.funcs->rlcg_wreg(adev, reg, value, flag, hwip) : \
+ ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->sriov_wreg) ? \
+adev->gfx.rlc.funcs->sriov_wreg(adev, reg, value, flag, hwip) : \
WREG32(reg, value))
#define __RREG32_SOC15_RLC__(reg, flag, hwip) \
- ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->rlcg_rreg) ? \
-adev->gfx.rlc.funcs->rlcg_rreg(adev, reg, flag, hwip) : \
+ ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->sriov_rreg) ? \
+adev->gfx.rlc.funcs->sriov_rreg(adev, reg, flag, hwip) : \
RREG32(reg))
#define WREG32_FIELD15(ip, idx, reg, field, val) \
--
2.32.0
___
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] SWDEV-291099 - Use a percise function name
The callback functions are used for SRIOV read/write instead
of just for rlcg read/write
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h| 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/soc15_common.h | 8
5 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index eb1f3f42e00b..aa94ad0e9973 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -508,7 +508,7 @@ void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->is_rlcg_access_range) {
if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg))
- return adev->gfx.rlc.funcs->rlcg_wreg(adev, reg, v, 0,
0);
+ return adev->gfx.rlc.funcs->sriov_wreg(adev, reg, v, 0,
0);
} else {
writel(v, ((void __iomem *)adev->rmmio) + (reg * 4));
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
index 7a4775ab6804..00afd0dcae86 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
@@ -127,8 +127,8 @@ struct amdgpu_rlc_funcs {
void (*reset)(struct amdgpu_device *adev);
void (*start)(struct amdgpu_device *adev);
void (*update_spm_vmid)(struct amdgpu_device *adev, unsigned vmid);
- void (*rlcg_wreg)(struct amdgpu_device *adev, u32 offset, u32 v, u32
acc_flags, u32 hwip);
- u32 (*rlcg_rreg)(struct amdgpu_device *adev, u32 offset, u32 acc_flags,
u32 hwip);
+ void (*sriov_wreg)(struct amdgpu_device *adev, u32 offset, u32 v, u32
acc_flags, u32 hwip);
+ u32 (*sriov_rreg)(struct amdgpu_device *adev, u32 offset, u32
acc_flags, u32 hwip);
bool (*is_rlcg_access_range)(struct amdgpu_device *adev, uint32_t reg);
};
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 705fa3027199..c9b68a8611d5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -8269,8 +8269,8 @@ static const struct amdgpu_rlc_funcs
gfx_v10_0_rlc_funcs_sriov = {
.reset = gfx_v10_0_rlc_reset,
.start = gfx_v10_0_rlc_start,
.update_spm_vmid = gfx_v10_0_update_spm_vmid,
- .rlcg_wreg = gfx_v10_rlcg_wreg,
- .rlcg_rreg = gfx_v10_rlcg_rreg,
+ .sriov_wreg = gfx_v10_rlcg_wreg,
+ .sriov_rreg = gfx_v10_rlcg_rreg,
.is_rlcg_access_range = gfx_v10_0_is_rlcg_access_range,
};
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 044076ec1d03..1c9b8b37fd3a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -5131,7 +5131,7 @@ static const struct amdgpu_rlc_funcs gfx_v9_0_rlc_funcs =
{
.reset = gfx_v9_0_rlc_reset,
.start = gfx_v9_0_rlc_start,
.update_spm_vmid = gfx_v9_0_update_spm_vmid,
- .rlcg_wreg = gfx_v9_0_rlcg_wreg,
+ .sriov_wreg = gfx_v9_0_rlcg_wreg,
.is_rlcg_access_range = gfx_v9_0_is_rlcg_access_range,
};
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
index 0eeb5e073be8..8a9ca87d8663 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
@@ -28,13 +28,13 @@
#define SOC15_REG_OFFSET(ip, inst, reg)
(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg)
#define __WREG32_SOC15_RLC__(reg, value, flag, hwip) \
- ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->rlcg_wreg) ? \
-adev->gfx.rlc.funcs->rlcg_wreg(adev, reg, value, flag, hwip) : \
+ ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->sriov_wreg) ? \
+adev->gfx.rlc.funcs->sriov_wreg(adev, reg, value, flag, hwip) : \
WREG32(reg, value))
#define __RREG32_SOC15_RLC__(reg, flag, hwip) \
- ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->rlcg_rreg) ? \
-adev->gfx.rlc.funcs->rlcg_rreg(adev, reg, flag, hwip) : \
+ ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs &&
adev->gfx.rlc.funcs->sriov_rreg) ? \
+adev->gfx.rlc.funcs->sriov_rreg(adev, reg, flag, hwip) : \
RREG32(reg))
#define WREG32_FIELD15(ip, idx, reg, field, val) \
--
2.32.0
___
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/amdgpu: fix the fence leak
release the unreleased fences
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 01fe60fedcbe..59b662947dde 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -669,11 +669,15 @@ void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct
amdgpu_ctx_entity *cen
if (!fence)
continue;
s_fence = to_drm_sched_fence(fence);
- if (!dma_fence_is_signaled(_fence->scheduled))
+ if (!dma_fence_is_signaled(_fence->scheduled)) {
+ dma_fence_put(fence);
continue;
+ }
t1 = s_fence->scheduled.timestamp;
- if (t1 >= now)
+ if (t1 >= now) {
+ dma_fence_put(fence);
continue;
+ }
if (dma_fence_is_signaled(_fence->finished) &&
s_fence->finished.timestamp < now)
*total += ktime_sub(s_fence->finished.timestamp, t1);
--
2.31.1
___
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[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 61
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 104 +
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 +
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 20
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 45 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 +
11 files changed, 288 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 125b25a5ce5b..3365feae15e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
idr_destroy(>ctx_handles);
mutex_destroy(>lock);
}
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max)
+{
+ ktime_t now, t1;
+ uint32_t i;
+
+ now = ktime_get();
+ for (i = 0; i < amdgpu_sched_jobs; i++) {
+ struct dma_fence *fence;
+ struct drm_sched_fence *s_fence;
+
+ spin_lock(>ring_lock);
+ fence = dma_fence_get(centity->fences[i]);
+ spin_unlock(>ring_lock);
+ if (!fence)
+ continue;
+ s_fence = to_drm_sched_fence(fence);
+ if (!dma_fence_is_signaled(_fence->scheduled))
+ continue;
+ t1 = s_fence->scheduled.timestamp;
+ if (t1 >= now)
+ continue;
+ if (dma_fence_is_signaled(_fence->finished) &&
+ s_fence->finished.timestamp < now)
+ *total += ktime_sub(s_fence->finished.timestamp, t1);
+ else
+ *total += ktime_sub(now, t1);
+ t1 = ktime_sub(now, t1);
+ dma_fence_put(fence);
+ *max = max(t1, *max);
+ }
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed)
+{
+ struct idr *idp;
+ struct amdgpu_ctx *ctx;
+ uint32_t id;
+ struct amdgpu_ctx_entity *centity;
+ ktime_t total = 0, max = 0;
+
+ if (idx >= AMDGPU_MAX_ENTITY_NUM)
+ return 0;
+ idp = >ctx_handles;
+ mutex_lock(>lock);
+ idr_for_each_entry(idp, ctx, id) {
+ if (!ctx->entities[hwip][idx])
+ continue;
+
+ centity = ctx->entities[hwip][idx];
+ amdgpu_ctx_fence_time(ctx, centity, , );
+ }
+
+ mutex_unlock(>lock);
+ if (elapsed)
+ *elapsed = max;
+
+ return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..f8e39ab0c41b 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs
from pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
We just need to record the scheduled time of the next job. So we
need not to check the rest job.
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
+ >s_fence->finished.flags)) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs
from pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 61 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 98 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 20 +
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 45 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 +
11 files changed, 282 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 125b25a5ce5b..3365feae15e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
idr_destroy(>ctx_handles);
mutex_destroy(>lock);
}
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max)
+{
+ ktime_t now, t1;
+ uint32_t i;
+
+ now = ktime_get();
+ for (i = 0; i < amdgpu_sched_jobs; i++) {
+ struct dma_fence *fence;
+ struct drm_sched_fence *s_fence;
+
+ spin_lock(>ring_lock);
+ fence = dma_fence_get(centity->fences[i]);
+ spin_unlock(>ring_lock);
+ if (!fence)
+ continue;
+ s_fence = to_drm_sched_fence(fence);
+ if (!dma_fence_is_signaled(_fence->scheduled))
+ continue;
+ t1 = s_fence->scheduled.timestamp;
+ if (t1 >= now)
+ continue;
+ if (dma_fence_is_signaled(_fence->finished) &&
+ s_fence->finished.timestamp < now)
+ *total += ktime_sub(s_fence->finished.timestamp, t1);
+ else
+ *total += ktime_sub(now, t1);
+ t1 = ktime_sub(now, t1);
+ dma_fence_put(fence);
+ *max = max(t1, *max);
+ }
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed)
+{
+ struct idr *idp;
+ struct amdgpu_ctx *ctx;
+ uint32_t id;
+ struct amdgpu_ctx_entity *centity;
+ ktime_t total = 0, max = 0;
+
+ if (idx >= AMDGPU_MAX_ENTITY_NUM)
+ return 0;
+ idp = >ctx_handles;
+ mutex_lock(>lock);
+ idr_for_each_entry(idp, ctx, id) {
+ if (!ctx->entities[hwip][idx])
+ continue;
+
+ centity = ctx->entities[hwip][idx];
+ amdgpu_ctx_fence_time(ctx, centity, , );
+ }
+
+ mutex_unlock(>lock);
+ if (elapsed)
+ *elapsed = max;
+
+ return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amd
[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 61 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 96 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 20 +
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 45 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 +
11 files changed, 280 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 125b25a5ce5b..3365feae15e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
idr_destroy(>ctx_handles);
mutex_destroy(>lock);
}
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max)
+{
+ ktime_t now, t1;
+ uint32_t i;
+
+ now = ktime_get();
+ for (i = 0; i < amdgpu_sched_jobs; i++) {
+ struct dma_fence *fence;
+ struct drm_sched_fence *s_fence;
+
+ spin_lock(>ring_lock);
+ fence = dma_fence_get(centity->fences[i]);
+ spin_unlock(>ring_lock);
+ if (!fence)
+ continue;
+ s_fence = to_drm_sched_fence(fence);
+ if (!dma_fence_is_signaled(_fence->scheduled))
+ continue;
+ t1 = s_fence->scheduled.timestamp;
+ if (t1 >= now)
+ continue;
+ if (dma_fence_is_signaled(_fence->finished) &&
+ s_fence->finished.timestamp < now)
+ *total += ktime_sub(s_fence->finished.timestamp, t1);
+ else
+ *total += ktime_sub(now, t1);
+ t1 = ktime_sub(now, t1);
+ dma_fence_put(fence);
+ *max = max(t1, *max);
+ }
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed)
+{
+ struct idr *idp;
+ struct amdgpu_ctx *ctx;
+ uint32_t id;
+ struct amdgpu_ctx_entity *centity;
+ ktime_t total = 0, max = 0;
+
+ if (idx >= AMDGPU_MAX_ENTITY_NUM)
+ return 0;
+ idp = >ctx_handles;
+ mutex_lock(>lock);
+ idr_for_each_entry(idp, ctx, id) {
+ if (!ctx->entities[hwip][idx])
+ continue;
+
+ centity = ctx->entities[hwip][idx];
+ amdgpu_ctx_fence_time(ctx, centity, , );
+ }
+
+ mutex_unlock(>lock);
+ if (elapsed)
+ *elapsed = max;
+
+ return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amd
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
This is the patch that just return the memory size.
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs
from pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs
from pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 61 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 92 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 1 +
8 files changed, 208 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 125b25a5ce5b..3365feae15e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
idr_destroy(>ctx_handles);
mutex_destroy(>lock);
}
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max)
+{
+ ktime_t now, t1;
+ uint32_t i;
+
+ now = ktime_get();
+ for (i = 0; i < amdgpu_sched_jobs; i++) {
+ struct dma_fence *fence;
+ struct drm_sched_fence *s_fence;
+
+ spin_lock(>ring_lock);
+ fence = dma_fence_get(centity->fences[i]);
+ spin_unlock(>ring_lock);
+ if (!fence)
+ continue;
+ s_fence = to_drm_sched_fence(fence);
+ if (!dma_fence_is_signaled(_fence->scheduled))
+ continue;
+ t1 = s_fence->scheduled.timestamp;
+ if (t1 >= now)
+ continue;
+ if (dma_fence_is_signaled(_fence->finished) &&
+ s_fence->finished.timestamp < now)
+ *total += ktime_sub(s_fence->finished.timestamp, t1);
+ else
+ *total += ktime_sub(now, t1);
+ t1 = ktime_sub(now, t1);
+ dma_fence_put(fence);
+ *max = max(t1, *max);
+ }
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed)
+{
+ struct idr *idp;
+ struct amdgpu_ctx *ctx;
+ uint32_t id;
+ struct amdgpu_ctx_entity *centity;
+ ktime_t total = 0, max = 0;
+
+ if (idx >= AMDGPU_MAX_ENTITY_NUM)
+ return 0;
+ idp = >ctx_handles;
+ mutex_lock(>lock);
+ idr_for_each_entry(idp, ctx, id) {
+ if (!ctx->entities[hwip][idx])
+ continue;
+
+ centity = ctx->entities[hwip][idx];
+ amdgpu_ctx_fence_time(ctx, centity, , );
+ }
+
+ mutex_unlock(>lock);
+ if (elapsed)
+ *elapsed = max;
+
+ return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max);
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu
[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 61 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 92 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 1 +
8 files changed, 208 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 125b25a5ce5b..3365feae15e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
idr_destroy(>ctx_handles);
mutex_destroy(>lock);
}
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max)
+{
+ ktime_t now, t1;
+ uint32_t i;
+
+ now = ktime_get();
+ for (i = 0; i < amdgpu_sched_jobs; i++) {
+ struct dma_fence *fence;
+ struct drm_sched_fence *s_fence;
+
+ spin_lock(>ring_lock);
+ fence = dma_fence_get(centity->fences[i]);
+ spin_unlock(>ring_lock);
+ if (!fence)
+ continue;
+ s_fence = to_drm_sched_fence(fence);
+ if (!dma_fence_is_signaled(_fence->scheduled))
+ continue;
+ t1 = s_fence->scheduled.timestamp;
+ if (t1 >= now)
+ continue;
+ if (dma_fence_is_signaled(_fence->finished) &&
+ s_fence->finished.timestamp < now)
+ *total += ktime_sub(s_fence->finished.timestamp, t1);
+ else
+ *total += ktime_sub(now, t1);
+ t1 = ktime_sub(now, t1);
+ dma_fence_put(fence);
+ *max = max(t1, *max);
+ }
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed)
+{
+ struct idr *idp;
+ struct amdgpu_ctx *ctx;
+ uint32_t id;
+ struct amdgpu_ctx_entity *centity;
+ ktime_t total = 0, max = 0;
+
+ if (idx >= AMDGPU_MAX_ENTITY_NUM)
+ return 0;
+ idp = >ctx_handles;
+ mutex_lock(>lock);
+ idr_for_each_entry(idp, ctx, id) {
+ if (!ctx->entities[hwip][idx])
+ continue;
+
+ centity = ctx->entities[hwip][idx];
+ amdgpu_ctx_fence_time(ctx, centity, , );
+ }
+
+ mutex_unlock(>lock);
+ if (elapsed)
+ *elapsed = max;
+
+ return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max);
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs
from pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 61 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 92 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 21 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 +
10 files changed, 233 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 125b25a5ce5b..3365feae15e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
idr_destroy(>ctx_handles);
mutex_destroy(>lock);
}
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max)
+{
+ ktime_t now, t1;
+ uint32_t i;
+
+ now = ktime_get();
+ for (i = 0; i < amdgpu_sched_jobs; i++) {
+ struct dma_fence *fence;
+ struct drm_sched_fence *s_fence;
+
+ spin_lock(>ring_lock);
+ fence = dma_fence_get(centity->fences[i]);
+ spin_unlock(>ring_lock);
+ if (!fence)
+ continue;
+ s_fence = to_drm_sched_fence(fence);
+ if (!dma_fence_is_signaled(_fence->scheduled))
+ continue;
+ t1 = s_fence->scheduled.timestamp;
+ if (t1 >= now)
+ continue;
+ if (dma_fence_is_signaled(_fence->finished) &&
+ s_fence->finished.timestamp < now)
+ *total += ktime_sub(s_fence->finished.timestamp, t1);
+ else
+ *total += ktime_sub(now, t1);
+ t1 = ktime_sub(now, t1);
+ dma_fence_put(fence);
+ *max = max(t1, *max);
+ }
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed)
+{
+ struct idr *idp;
+ struct amdgpu_ctx *ctx;
+ uint32_t id;
+ struct amdgpu_ctx_entity *centity;
+ ktime_t total = 0, max = 0;
+
+ if (idx >= AMDGPU_MAX_ENTITY_NUM)
+ return 0;
+ idp = >ctx_handles;
+ mutex_lock(>lock);
+ idr_for_each_entry(idp, ctx, id) {
+ if (!ctx->entities[hwip][idx])
+ continue;
+
+ centity = ctx->entities[hwip][idx];
+ amdgpu_ctx_fence_time(ctx, centity, , );
+ }
+
+ mutex_unlock(>lock);
+ if (elapsed)
+ *elapsed = max;
+
+ return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total,
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs
from pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 61 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 24 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 +
10 files changed, 239 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 125b25a5ce5b..3365feae15e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
idr_destroy(>ctx_handles);
mutex_destroy(>lock);
}
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max)
+{
+ ktime_t now, t1;
+ uint32_t i;
+
+ now = ktime_get();
+ for (i = 0; i < amdgpu_sched_jobs; i++) {
+ struct dma_fence *fence;
+ struct drm_sched_fence *s_fence;
+
+ spin_lock(>ring_lock);
+ fence = dma_fence_get(centity->fences[i]);
+ spin_unlock(>ring_lock);
+ if (!fence)
+ continue;
+ s_fence = to_drm_sched_fence(fence);
+ if (!dma_fence_is_signaled(_fence->scheduled))
+ continue;
+ t1 = s_fence->scheduled.timestamp;
+ if (t1 >= now)
+ continue;
+ if (dma_fence_is_signaled(_fence->finished) &&
+ s_fence->finished.timestamp < now)
+ *total += ktime_sub(s_fence->finished.timestamp, t1);
+ else
+ *total += ktime_sub(now, t1);
+ t1 = ktime_sub(now, t1);
+ dma_fence_put(fence);
+ *max = max(t1, *max);
+ }
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed)
+{
+ struct idr *idp;
+ struct amdgpu_ctx *ctx;
+ uint32_t id;
+ struct amdgpu_ctx_entity *centity;
+ ktime_t total = 0, max = 0;
+
+ if (idx >= AMDGPU_MAX_ENTITY_NUM)
+ return 0;
+ idp = >ctx_handles;
+ mutex_lock(>lock);
+ idr_for_each_entry(idp, ctx, id) {
+ if (!ctx->entities[hwip][idx])
+ continue;
+
+ centity = ctx->entities[hwip][idx];
+ amdgpu_ctx_fence_time(ctx, centity, , );
+ }
+
+ mutex_unlock(>lock);
+ if (elapsed)
+ *elapsed = max;
+
+ return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total,
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs
from pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 61 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 24 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 +
10 files changed, 239 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 616c85a01299..c2338a0dd1f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
idr_destroy(>ctx_handles);
mutex_destroy(>lock);
}
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max)
+{
+ ktime_t now, t1;
+ uint32_t i;
+
+ now = ktime_get();
+ for (i = 0; i < amdgpu_sched_jobs; i++) {
+ struct dma_fence *fence;
+ struct drm_sched_fence *s_fence;
+
+ spin_lock(>ring_lock);
+ fence = dma_fence_get(centity->fences[i]);
+ spin_unlock(>ring_lock);
+ if (!fence)
+ continue;
+ s_fence = to_drm_sched_fence(fence);
+ if (!dma_fence_is_signaled(_fence->scheduled))
+ continue;
+ t1 = s_fence->scheduled.timestamp;
+ if (t1 >= now)
+ continue;
+ if (dma_fence_is_signaled(_fence->finished) &&
+ s_fence->finished.timestamp < now)
+ *total += ktime_sub(s_fence->finished.timestamp, t1);
+ else
+ *total += ktime_sub(now, t1);
+ t1 = ktime_sub(now, t1);
+ dma_fence_put(fence);
+ *max = max(t1, *max);
+ }
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed)
+{
+ struct idr *idp;
+ struct amdgpu_ctx *ctx;
+ uint32_t id;
+ struct amdgpu_ctx_entity *centity;
+ ktime_t total = 0, max = 0;
+
+ if (idx >= AMDGPU_MAX_ENTITY_NUM)
+ return 0;
+ idp = >ctx_handles;
+ mutex_lock(>lock);
+ idr_for_each_entry(idp, ctx, id) {
+ if (!ctx->entities[hwip][idx])
+ continue;
+
+ centity = ctx->entities[hwip][idx];
+ amdgpu_ctx_fence_time(ctx, centity, , );
+ }
+
+ mutex_unlock(>lock);
+ if (elapsed)
+ *elapsed = max;
+
+ return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total,
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..4e5d8d4af010 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
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[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 61 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 91 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 17
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 +
10 files changed, 227 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 616c85a01299..c2338a0dd1f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
idr_destroy(>ctx_handles);
mutex_destroy(>lock);
}
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total, ktime_t *max)
+{
+ ktime_t now, t1;
+ uint32_t i;
+
+ now = ktime_get();
+ for (i = 0; i < amdgpu_sched_jobs; i++) {
+ struct dma_fence *fence;
+ struct drm_sched_fence *s_fence;
+
+ spin_lock(>ring_lock);
+ fence = dma_fence_get(centity->fences[i]);
+ spin_unlock(>ring_lock);
+ if (!fence)
+ continue;
+ s_fence = to_drm_sched_fence(fence);
+ if (!dma_fence_is_signaled(_fence->scheduled))
+ continue;
+ t1 = s_fence->scheduled.timestamp;
+ if (t1 >= now)
+ continue;
+ if (dma_fence_is_signaled(_fence->finished) &&
+ s_fence->finished.timestamp < now)
+ *total += ktime_sub(s_fence->finished.timestamp, t1);
+ else
+ *total += ktime_sub(now, t1);
+ t1 = ktime_sub(now, t1);
+ dma_fence_put(fence);
+ *max = max(t1, *max);
+ }
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed)
+{
+ struct idr *idp;
+ struct amdgpu_ctx *ctx;
+ uint32_t id;
+ struct amdgpu_ctx_entity *centity;
+ ktime_t total = 0, max = 0;
+
+ if (idx >= AMDGPU_MAX_ENTITY_NUM)
+ return 0;
+ idp = >ctx_handles;
+ mutex_lock(>lock);
+ idr_for_each_entry(idp, ctx, id) {
+ if (!ctx->entities[hwip][idx])
+ continue;
+
+ centity = ctx->entities[hwip][idx];
+ amdgpu_ctx_fence_time(ctx, centity, , );
+ }
+
+ mutex_unlock(>lock);
+ if (elapsed)
+ *elapsed = max;
+
+ return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity
*centity,
+ ktime_t *total,
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..4e5d8d4af010 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
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[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 59
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h| 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 149 +
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c| 21 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h| 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 35 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 +
12 files changed, 321 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 616c85a01299..c2338a0dd1f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..8d33571754d9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,62 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
idr_destroy(>ctx_handles);
mutex_destroy(>lock);
}
+
+ktime_t amdgpu_ctx_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip,
+ uint32_t idx, uint64_t *elapsed)
+{
+ struct amdgpu_ctx_entity *centity;
+ struct idr *idp;
+ struct amdgpu_ctx *ctx;
+ uint32_t id, i;
+ ktime_t now, t1;
+ ktime_t total = 0, max = 0;
+
+
+ if (idx >= AMDGPU_MAX_ENTITY_NUM)
+ return 0;
+
+ idp = >ctx_mgr.ctx_handles;
+
+ mutex_lock(>ctx_mgr.lock);
+ idr_for_each_entry(idp, ctx, id) {
+ if (!ctx->entities[hwip][idx])
+ continue;
+
+ centity = ctx->entities[hwip][idx];
+ now = ktime_get();
+ for (i = 0; i < amdgpu_sched_jobs; i++) {
+ struct dma_fence *fence;
+ struct drm_sched_fence *s_fence;
+
+ spin_lock(>ring_lock);
+ fence = dma_fence_get(centity->fences[i]);
+ spin_unlock(>ring_lock);
+ if (!fence)
+ continue;
+ s_fence = to_drm_sched_fence(fence);
+ if (!dma_fence_is_signaled(_fence->scheduled))
+ continue;
+ t1 = s_fence->scheduled.timestamp;
+ if (t1 >= now)
+ continue;
+ if (dma_fence_is_signaled(_fence->finished) &&
+ s_fence->finished.timestamp <
now)
+ total += ktime_sub(s_fence->finished.timestamp,
t1);
+ else
+ total += ktime_sub(now, t1);
+ t1 = ktime_sub(now, t1);
+ dma_fence_put(fence);
+ if (t1 > max)
+ max = t1;
+ }
+
+ }
+
+ mutex_unlock(>ctx_mgr.lock);
+
+ if (elapsed)
+ *elapsed = max;
+
+ return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..8ee42f12e5f8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,6 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip,
+
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..4e5d8d4af010 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 1/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..4e5d8d4af010 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 207 +
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 50 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c| 21 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h| 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 35
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 +
10 files changed, 325 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 616c85a01299..c2338a0dd1f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 4bcc03c4c6c5..07aed377dec8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -42,7 +42,7 @@
#include "amdgpu_irq.h"
#include "amdgpu_dma_buf.h"
#include "amdgpu_sched.h"
-
+#include "amdgpu_fdinfo.h"
#include "amdgpu_amdkfd.h"
#include "amdgpu_ras.h"
@@ -1691,6 +1691,9 @@ static const struct file_operations
amdgpu_driver_kms_fops = {
#ifdef CONFIG_COMPAT
.compat_ioctl = amdgpu_kms_compat_ioctl,
#endif
+#ifdef CONFIG_PROC_FS
+ .show_fdinfo = amdgpu_show_fdinfo
+#endif
};
int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
new file mode 100644
index ..b6523fb141c2
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: MIT
+/* Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: David Nieto
+ * Roy Sun
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include "amdgpu.h"
+#include "amdgpu_vm.h"
+#include "amdgpu_gem.h"
+#include "amdgpu_fdinfo.h"
+
+
+static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
+ [AMDGPU_HW_IP_GFX] = "gfx",
+ [AMDGPU_HW_IP_COMPUTE] = "compute",
+ [AMDGPU_HW_IP_DMA] = "dma",
+ [AMDGPU_HW_IP_UVD] = "dec",
+ [AMDGPU_HW_IP_VCE] = "enc",
+ [AMDGPU_HW_IP_UVD_ENC] = "enc_1",
+ [AMDGPU_HW_IP_VCN_DEC] = "dec",
+ [AMDGPU_HW_IP_VCN_ENC] = "enc",
+ [AMDGPU_HW_IP_VCN_JPEG] = "jpeg",
+};
+
+uint64_t amdgpu_get_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip,
+
[PATCH] drm/amd/amdgpu: Expose some power info through AMDGPU_INFO
Add interface to get the mm clock, temperature and memory load
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 50 +
include/uapi/drm/amdgpu_drm.h | 12 ++
2 files changed, 62 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index b2e774aeab45..e5b16e0819ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -971,6 +971,56 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
}
ui32 /= 100;
break;
+ case AMDGPU_INFO_SENSOR_UVD_VCLK:
+ /* get mm vclk in Mhz */
+ if (amdgpu_dpm_read_sensor(adev,
+ AMDGPU_PP_SENSOR_UVD_VCLK,
+ (void *), _size)) {
+ return -EINVAL;
+ }
+ ui32 /= 100;
+ break;
+ case AMDGPU_INFO_SENSOR_UVD_DCLK:
+ /* get mm dclk in Mhz */
+ if (amdgpu_dpm_read_sensor(adev,
+ AMDGPU_PP_SENSOR_UVD_DCLK,
+ (void *), _size)) {
+ return -EINVAL;
+ }
+ ui32 /= 100;
+ break;
+ case AMDGPU_INFO_SENSOR_HOTSPOT_TEMP:
+ /* get junction temperature */
+ if (amdgpu_dpm_read_sensor(adev,
+
AMDGPU_PP_SENSOR_HOTSPOT_TEMP,
+ (void *), _size)) {
+ return -EINVAL;
+ }
+ break;
+ case AMDGPU_INFO_SENSOR_EDGE_TEMP:
+ /* get current edge temperature */
+ if (amdgpu_dpm_read_sensor(adev,
+ AMDGPU_PP_SENSOR_EDGE_TEMP,
+ (void *), _size)) {
+ return -EINVAL;
+ }
+ break;
+ case AMDGPU_INFO_SENSOR_MEM_TEMP:
+ /* get current memory temperature */
+ if (amdgpu_dpm_read_sensor(adev,
+ AMDGPU_PP_SENSOR_MEM_TEMP,
+ (void *), _size)) {
+ return -EINVAL;
+ }
+ break;
+ case AMDGPU_INFO_SENSOR_MEM_LOAD:
+ /* get memory load */
+ if (amdgpu_dpm_read_sensor(adev,
+ AMDGPU_PP_SENSOR_MEM_LOAD,
+ (void *), _size)) {
+ return -EINVAL;
+ }
+ break;
default:
DRM_DEBUG_KMS("Invalid request %d\n",
info->sensor_info.type);
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 8b832f7458f2..484c72e17c72 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -780,6 +780,18 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK 0x8
/* Subquery id: Query GPU stable pstate memory clock */
#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK 0x9
+ /* Subquery id: Query GPU mm vclk */
+ #define AMDGPU_INFO_SENSOR_UVD_VCLK 0xa
+ /* Subquery id: Query GPU mm dclk */
+ #define AMDGPU_INFO_SENSOR_UVD_DCLK 0xb
+ /* Subquery id: Query junction temperature */
+ #define AMDGPU_INFO_SENSOR_HOTSPOT_TEMP 0xc
+ /* Subquery id: Query edge temperature */
+ #define AMDGPU_INFO_SENSOR_EDGE_TEMP0xd
+ /* Subquery id: Query memory temperature */
+ #define AMDGPU_INFO_SENSOR_MEM_TEMP 0xe
+ /* Subquery id: Query Memory load */
+ #define AMDGPU_INFO_SENSOR_MEM_LOAD 0xf
/* Number of VRAM page faults on CPU access. */
#define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E
#define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F
--
2.31.1
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/2] drm/scheduler: Change scheduled fence track
Update the timestamp of scheduled fence on HW
completion of the previous fences
This allow more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..4e5d8d4af010 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler
*sched)
EXPORT_SYMBOL(drm_sched_resubmit_jobs);
/**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from
pending list
*
* @sched: scheduler instance
* @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.31.1
___
amd-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 1/2] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 247 +
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 51 +
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 1 +
6 files changed, 306 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
# add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 616c85a01299..c2338a0dd1f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 4bcc03c4c6c5..07aed377dec8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -42,7 +42,7 @@
#include "amdgpu_irq.h"
#include "amdgpu_dma_buf.h"
#include "amdgpu_sched.h"
-
+#include "amdgpu_fdinfo.h"
#include "amdgpu_amdkfd.h"
#include "amdgpu_ras.h"
@@ -1691,6 +1691,9 @@ static const struct file_operations
amdgpu_driver_kms_fops = {
#ifdef CONFIG_COMPAT
.compat_ioctl = amdgpu_kms_compat_ioctl,
#endif
+#ifdef CONFIG_PROC_FS
+ .show_fdinfo = amdgpu_show_fdinfo
+#endif
};
int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
new file mode 100644
index ..72e61a89c0ea
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
@@ -0,0 +1,247 @@
+/*
+ * Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: David Nieto
+ * Roy Sun
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include "amdgpu.h"
+#include "amdgpu_fdinfo.h"
+
+
+static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
+ [AMDGPU_HW_IP_GFX] = "gfx",
+ [AMDGPU_HW_IP_COMPUTE] = "compute",
+ [AMDGPU_HW_IP_DMA] = "dma",
+ [AMDGPU_HW_IP_UVD] = "dec",
+ [AMDGPU_HW_IP_VCE] = "enc",
+ [AMDGPU_HW_IP_UVD_ENC] = "enc_1",
+ [AMDGPU_HW_IP_VCN_DEC] = "dec",
+ [AMDGPU_HW_IP_VCN_ENC] = "enc",
+ [AMDGPU_HW_IP_VCN_JPEG] = "jpeg",
+};
+
+uint64_t amdgpu_get_proc_mem(struct drm_file *file, struct amdgpu_fpriv *fpriv)
+{
+ int id;
+ struct drm_gem_object *gobj;
+ uint64_t total = 0;
+
+ spin_lock(>table_lock);
+ idr_for_each_entry(>object_idr, gobj, id) {
+ struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
+ unsigned int domain = amdgpu_mem_type_to_domain(
[PATCH] drm/amd/amdgpu: Cancel the hrtimer in sw_fini
Move the process of cancelling hrtimer to sw_fini
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 5c11144da051..33324427b555 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -421,6 +421,11 @@ static int dce_virtual_sw_init(void *handle)
static int dce_virtual_sw_fini(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+ int i = 0;
+
+ for (i = 0; i < adev->mode_info.num_crtc; i++)
+ if (adev->mode_info.crtcs[i])
+ hrtimer_cancel(>mode_info.crtcs[i]->vblank_timer);
kfree(adev->mode_info.bios_hardcoded_edid);
@@ -480,13 +485,6 @@ static int dce_virtual_hw_init(void *handle)
static int dce_virtual_hw_fini(void *handle)
{
- struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- int i = 0;
-
- for (i = 0; imode_info.num_crtc; i++)
- if (adev->mode_info.crtcs[i])
- hrtimer_cancel(>mode_info.crtcs[i]->vblank_timer);
-
return 0;
}
--
2.29.0
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[PATCH] drm/amdgpu: Add show_fdinfo() interface
Tracking devices, process info and fence info using
/proc/pid/fdinfo
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 15 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c| 282 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h| 58
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +
drivers/gpu/drm/scheduler/sched_main.c| 11 +-
8 files changed, 371 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..f9de1acc65dd 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -55,7 +55,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \
amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o
amdgpu_vm_cpu.o \
amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \
- amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
+ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o
amdgpu_fdinfo.o\
amdgpu_fw_attestation.o amdgpu_securedisplay.o
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 616c85a01299..35843c8d133d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
#include "amdgpu_gfxhub.h"
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
#define MAX_GPU_INSTANCE 16
@@ -477,6 +478,8 @@ struct amdgpu_fpriv {
struct mutexbo_list_lock;
struct idr bo_list_handles;
struct amdgpu_ctx_mgr ctx_mgr;
+ struct drm_file *file;
+ struct amdgpu_proc *proc;
};
int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index e93850f2f3b1..702fd9054883 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1042,13 +1042,15 @@ int amdgpu_amdkfd_gpuvm_create_process_vm(struct
kgd_dev *kgd, u32 pasid,
struct dma_fence **ef)
{
struct amdgpu_device *adev = get_amdgpu_device(kgd);
+ struct amdgpu_fpriv *fpriv;
struct amdgpu_vm *new_vm;
int ret;
- new_vm = kzalloc(sizeof(*new_vm), GFP_KERNEL);
- if (!new_vm)
+ fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
+ if (!fpriv)
return -ENOMEM;
+ new_vm = >vm;
/* Initialize AMDGPU part of the VM */
ret = amdgpu_vm_init(adev, new_vm, AMDGPU_VM_CONTEXT_COMPUTE, pasid);
if (ret) {
@@ -1063,12 +1065,14 @@ int amdgpu_amdkfd_gpuvm_create_process_vm(struct
kgd_dev *kgd, u32 pasid,
*vm = (void *) new_vm;
+ amdgpu_fdinfo_init(adev, fpriv, pasid);
+
return 0;
init_kfd_vm_fail:
amdgpu_vm_fini(adev, new_vm);
amdgpu_vm_init_fail:
- kfree(new_vm);
+ kfree(fpriv);
return ret;
}
@@ -1142,6 +1146,8 @@ void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct
kgd_dev *kgd, void *vm)
{
struct amdgpu_device *adev = get_amdgpu_device(kgd);
struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
+ struct amdgpu_fpriv *fpriv =
+ container_of(avm, struct amdgpu_fpriv, vm);
if (WARN_ON(!kgd || !vm))
return;
@@ -1149,8 +1155,9 @@ void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct
kgd_dev *kgd, void *vm)
pr_debug("Destroying process vm %p\n", vm);
/* Release the VM context */
+ amdgpu_fdinfo_fini(adev, fpriv);
amdgpu_vm_fini(adev, avm);
- kfree(vm);
+ kfree(fpriv);
}
void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 4bcc03c4c6c5..07aed377dec8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -42,7 +42,7 @@
#include "amdgpu_irq.h"
#include "amdgpu_dma_buf.h"
#include "amdgpu_sched.h"
-
+#include "amdgpu_fdinfo.h"
#include "amdgpu_amdkfd.h"
#include "amdgpu_ras.h"
@@ -1691,6 +1691,9 @@ static const struct file_operations
amdgpu_driver_kms_fops = {
#ifdef CONFIG_COMPAT
.compat_ioctl = amd
[PATCH 6/7] drm/amdkfd: Add fence tracking
From: David M Nieto
Add fence tracking for amdgpu resources on gpuvm creation
Signed-off-by: David M Nieto
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c| 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index e93850f2f3b1..26e84c2d6316 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1042,13 +1042,16 @@ int amdgpu_amdkfd_gpuvm_create_process_vm(struct
kgd_dev *kgd, u32 pasid,
struct dma_fence **ef)
{
struct amdgpu_device *adev = get_amdgpu_device(kgd);
+ struct amdgpu_fpriv *fpriv;
struct amdgpu_vm *new_vm;
int ret;
- new_vm = kzalloc(sizeof(*new_vm), GFP_KERNEL);
- if (!new_vm)
+ fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
+ if (!fpriv)
return -ENOMEM;
+ new_vm = >vm;
+
/* Initialize AMDGPU part of the VM */
ret = amdgpu_vm_init(adev, new_vm, AMDGPU_VM_CONTEXT_COMPUTE, pasid);
if (ret) {
@@ -1063,12 +1066,14 @@ int amdgpu_amdkfd_gpuvm_create_process_vm(struct
kgd_dev *kgd, u32 pasid,
*vm = (void *) new_vm;
+ amdgpu_smi_create_proc_node(adev, fpriv, pasid);
+
return 0;
init_kfd_vm_fail:
amdgpu_vm_fini(adev, new_vm);
amdgpu_vm_init_fail:
- kfree(new_vm);
+ kfree(fpriv);
return ret;
}
@@ -1142,6 +1147,8 @@ void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct
kgd_dev *kgd, void *vm)
{
struct amdgpu_device *adev = get_amdgpu_device(kgd);
struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
+ struct amdgpu_fpriv *fpriv =
+ container_of(avm, struct amdgpu_fpriv, vm);
if (WARN_ON(!kgd || !vm))
return;
@@ -1149,8 +1156,10 @@ void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct
kgd_dev *kgd, void *vm)
pr_debug("Destroying process vm %p\n", vm);
/* Release the VM context */
+ amdgpu_smi_remove_proc_node(adev, fpriv);
+
amdgpu_vm_fini(adev, avm);
- kfree(vm);
+ kfree(fpriv);
}
void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm)
--
2.29.0
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[PATCH 5/7] drm/amdgpu: Track fences on KMS
From: David M Nieto
Create SMI fence tracking structures of KMS open
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 10 ++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index f98843eeb084..bc63a9662ca0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1679,7 +1679,8 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_VA, amdgpu_gem_va_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(AMDGPU_FREESYNC, amdgpu_display_freesync_ioctl,
DRM_MASTER)
+ DRM_IOCTL_DEF_DRV(AMDGPU_FREESYNC, amdgpu_display_freesync_ioctl,
DRM_MASTER),
+ DRM_IOCTL_DEF_DRV(AMDGPU_SMI, amdgpu_smi_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW)
};
static const struct drm_driver amdgpu_kms_driver = {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index ada807de978b..c393cbf87656 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -41,6 +41,7 @@
#include "amdgpu_gem.h"
#include "amdgpu_display.h"
#include "amdgpu_ras.h"
+#include "amdgpu_smi.h"
void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev)
{
@@ -210,6 +211,10 @@ int amdgpu_driver_load_kms(struct amdgpu_device *adev,
unsigned long flags)
pm_runtime_put_autosuspend(dev->dev);
}
+ /* SMI */
+ mutex_init(>proc_lock);
+ idr_init(>procs);
+
out:
if (r) {
/* balance pm_runtime_get_sync in amdgpu_driver_unload_kms */
@@ -1135,6 +1140,9 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct
drm_file *file_priv)
amdgpu_ctx_mgr_init(>ctx_mgr);
file_priv->driver_priv = fpriv;
+ fpriv->file = file_priv;
+
+ amdgpu_smi_create_proc_node(adev, fpriv, pasid);
goto out_suspend;
error_vm:
@@ -1177,6 +1185,8 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
pm_runtime_get_sync(dev->dev);
+ amdgpu_smi_remove_proc_node(adev, fpriv);
+
if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_UVD) != NULL)
amdgpu_uvd_free_handles(adev, file_priv);
if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_VCE) != NULL)
--
2.29.0
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[PATCH 4/7] drm/amdgpu: SMI debugfs tracking
From: David M Nieto
Add folder in debugfs structure for tracking of per
pid fences
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index bcaf271b39bf..02534a059f42 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1544,7 +1544,12 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
struct dentry *ent;
int r, i;
+ ent = debugfs_create_dir("proc", root);
+ if (!ent) {
+ DRM_ERROR("unable to create proc debugfs dir\n");
+ return -EIO;
+ }
ent = debugfs_create_file("amdgpu_preempt_ib", 0600, root, adev,
_ib_preempt);
--
2.29.0
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[PATCH 3/7] drm/amdgpu: SMI-LIB handlers
From: David M Nieto
Add fence tracking interfaces and core
structures for SMI ioctl management
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile | 10 +-
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12 +
drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c | 433
drivers/gpu/drm/amd/amdgpu/amdgpu_smi.h | 61
4 files changed, 514 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_smi.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index 741b68874e53..789800d16804 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -36,7 +36,8 @@ ccflags-y := -I$(FULL_AMD_PATH)/include/asic_reg \
-I$(FULL_AMD_DISPLAY_PATH)/include \
-I$(FULL_AMD_DISPLAY_PATH)/dc \
-I$(FULL_AMD_DISPLAY_PATH)/amdgpu_dm \
- -I$(FULL_AMD_PATH)/amdkfd
+ -I$(FULL_AMD_PATH)/amdkfd \
+ -I$(FULL_AMD_PATH)/amdsmi/inc
amdgpu-y := amdgpu_drv.o
@@ -56,7 +57,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o
amdgpu_vm_cpu.o \
amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
- amdgpu_fw_attestation.o amdgpu_securedisplay.o
+ amdgpu_fw_attestation.o amdgpu_securedisplay.o amdgpu_smi.o
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
@@ -236,4 +237,9 @@ amdgpu-y += $(AMD_DISPLAY_FILES)
endif
+# SMI component
+AMDSMI_PATH := ../amdsmi
+include $(FULL_AMD_PATH)/amdsmi/Makefile
+amdgpu-y += $(AMDSMI_FILES)
+
obj-$(CONFIG_DRM_AMDGPU)+= amdgpu.o
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 7e1f66120c50..b10632866ea6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -108,6 +108,7 @@
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
#include "amdgpu_hdp.h"
+#include "amdgpu_smi.h"
#define MAX_GPU_INSTANCE 16
@@ -268,6 +269,7 @@ struct amdgpu_irq_src;
struct amdgpu_fpriv;
struct amdgpu_bo_va_mapping;
struct amdgpu_atif;
+struct amdgpu_smi_proc;
struct kfd_vm_fault_info;
struct amdgpu_hive_info;
@@ -475,6 +477,9 @@ struct amdgpu_fpriv {
struct mutexbo_list_lock;
struct idr bo_list_handles;
struct amdgpu_ctx_mgr ctx_mgr;
+ struct drm_file *file;
+ struct amdgpu_smi_proc *proc;
+ void*smi_priv;
};
int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv);
@@ -824,6 +829,9 @@ struct amdgpu_device {
struct notifier_block acpi_nb;
struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS];
struct debugfs_blob_wrapper debugfs_vbios_blob;
+#if defined(CONFIG_DEBUG_FS)
+ struct dentry *debugfs_proc;
+#endif
struct amdgpu_atif *atif;
struct amdgpu_atcs atcs;
struct mutexsrbm_mutex;
@@ -1082,6 +1090,10 @@ struct amdgpu_device {
boolin_pci_err_recovery;
struct pci_saved_state *pci_state;
+
+ /* SMI process tracking */
+ struct idr procs;
+ struct mutexproc_lock;
};
static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c
new file mode 100644
index ..c7eb549b7ebb
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c
@@ -0,0 +1,433 @@
+/*
+ * Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+
[PATCH 2/7] drm: Change scheduled fence track
From: David M Nieto
Update the timestamp of the scheduled fence on
HW completion of the previous fence.
This allows more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..952c553c077e 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.29.0
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[PATCH 1/7] drm/amdgpu: Add SMI-LIB ioctl
From: David M Nieto
Add definition for the SMI ioctl
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
include/uapi/drm/amdgpu_drm.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 8b832f7458f2..1d0261239627 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -56,6 +56,7 @@ extern "C" {
#define DRM_AMDGPU_SCHED 0x15
/* not upstream */
#define DRM_AMDGPU_FREESYNC0x5d
+#define DRM_AMDGPU_SMI 0x5e
#define DRM_IOCTL_AMDGPU_GEM_CREATEDRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
#define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@@ -74,6 +75,7 @@ extern "C" {
#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
#define DRM_IOCTL_AMDGPU_SCHED DRM_IOW(DRM_COMMAND_BASE +
DRM_AMDGPU_SCHED, union drm_amdgpu_sched)
#define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_SMI DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_SMI, struct drm_amdgpu_smi)
/**
* DOC: memory domains
@@ -1138,6 +1140,24 @@ struct drm_amdgpu_freesync {
__u32 spare[7];
};
+/* Definition of the SMI handlers */
+#define AMDGPU_SMI_MAX_PAYLOAD 1024
+struct drm_amdgpu_smi_in_hdr {
+ __u32 code;
+ __u16 in_len;
+ __u16 out_len;
+};
+
+struct drm_amdgpu_smi_out_hdr {
+ __s32 status;
+};
+
+struct drm_amdgpu_smi {
+ struct drm_amdgpu_smi_in_hdrin;
+ struct drm_amdgpu_smi_out_hdr out;
+ __u64 payload;
+};
+
#if defined(__cplusplus)
}
#endif
--
2.29.0
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[PATCH 5/7] SWDEV-275015 - drm/amdgpu: Track fences on KMS
From: David M Nieto
Create SMI fence tracking structures of KMS open
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 10 ++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index f98843eeb084..bc63a9662ca0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1679,7 +1679,8 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_VA, amdgpu_gem_va_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(AMDGPU_FREESYNC, amdgpu_display_freesync_ioctl,
DRM_MASTER)
+ DRM_IOCTL_DEF_DRV(AMDGPU_FREESYNC, amdgpu_display_freesync_ioctl,
DRM_MASTER),
+ DRM_IOCTL_DEF_DRV(AMDGPU_SMI, amdgpu_smi_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW)
};
static const struct drm_driver amdgpu_kms_driver = {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index ada807de978b..c393cbf87656 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -41,6 +41,7 @@
#include "amdgpu_gem.h"
#include "amdgpu_display.h"
#include "amdgpu_ras.h"
+#include "amdgpu_smi.h"
void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev)
{
@@ -210,6 +211,10 @@ int amdgpu_driver_load_kms(struct amdgpu_device *adev,
unsigned long flags)
pm_runtime_put_autosuspend(dev->dev);
}
+ /* SMI */
+ mutex_init(>proc_lock);
+ idr_init(>procs);
+
out:
if (r) {
/* balance pm_runtime_get_sync in amdgpu_driver_unload_kms */
@@ -1135,6 +1140,9 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct
drm_file *file_priv)
amdgpu_ctx_mgr_init(>ctx_mgr);
file_priv->driver_priv = fpriv;
+ fpriv->file = file_priv;
+
+ amdgpu_smi_create_proc_node(adev, fpriv, pasid);
goto out_suspend;
error_vm:
@@ -1177,6 +1185,8 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
pm_runtime_get_sync(dev->dev);
+ amdgpu_smi_remove_proc_node(adev, fpriv);
+
if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_UVD) != NULL)
amdgpu_uvd_free_handles(adev, file_priv);
if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_VCE) != NULL)
--
2.29.0
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[PATCH 6/7] SWDEV-275015 - drm/amdkfd: Add fence tracking
From: David M Nieto
Add fence tracking for amdgpu resources on gpuvm creation
Signed-off-by: David M Nieto
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c| 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index e93850f2f3b1..26e84c2d6316 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1042,13 +1042,16 @@ int amdgpu_amdkfd_gpuvm_create_process_vm(struct
kgd_dev *kgd, u32 pasid,
struct dma_fence **ef)
{
struct amdgpu_device *adev = get_amdgpu_device(kgd);
+ struct amdgpu_fpriv *fpriv;
struct amdgpu_vm *new_vm;
int ret;
- new_vm = kzalloc(sizeof(*new_vm), GFP_KERNEL);
- if (!new_vm)
+ fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
+ if (!fpriv)
return -ENOMEM;
+ new_vm = >vm;
+
/* Initialize AMDGPU part of the VM */
ret = amdgpu_vm_init(adev, new_vm, AMDGPU_VM_CONTEXT_COMPUTE, pasid);
if (ret) {
@@ -1063,12 +1066,14 @@ int amdgpu_amdkfd_gpuvm_create_process_vm(struct
kgd_dev *kgd, u32 pasid,
*vm = (void *) new_vm;
+ amdgpu_smi_create_proc_node(adev, fpriv, pasid);
+
return 0;
init_kfd_vm_fail:
amdgpu_vm_fini(adev, new_vm);
amdgpu_vm_init_fail:
- kfree(new_vm);
+ kfree(fpriv);
return ret;
}
@@ -1142,6 +1147,8 @@ void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct
kgd_dev *kgd, void *vm)
{
struct amdgpu_device *adev = get_amdgpu_device(kgd);
struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
+ struct amdgpu_fpriv *fpriv =
+ container_of(avm, struct amdgpu_fpriv, vm);
if (WARN_ON(!kgd || !vm))
return;
@@ -1149,8 +1156,10 @@ void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct
kgd_dev *kgd, void *vm)
pr_debug("Destroying process vm %p\n", vm);
/* Release the VM context */
+ amdgpu_smi_remove_proc_node(adev, fpriv);
+
amdgpu_vm_fini(adev, avm);
- kfree(vm);
+ kfree(fpriv);
}
void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm)
--
2.29.0
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[PATCH 4/7] SWDEV-275015 - drm/amdgpu: SMI debugfs tracking
From: David M Nieto
Add folder in debugfs structure for tracking of per
pid fences
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index bcaf271b39bf..02534a059f42 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1544,7 +1544,12 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
struct dentry *ent;
int r, i;
+ ent = debugfs_create_dir("proc", root);
+ if (!ent) {
+ DRM_ERROR("unable to create proc debugfs dir\n");
+ return -EIO;
+ }
ent = debugfs_create_file("amdgpu_preempt_ib", 0600, root, adev,
_ib_preempt);
--
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[PATCH 3/7] SWDEV-275015 - drm/amdgpu: SMI-LIB handlers
From: David M Nieto
Add fence tracking interfaces and core
structures for SMI ioctl management
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/Makefile | 10 +-
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12 +
drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c | 433
drivers/gpu/drm/amd/amdgpu/amdgpu_smi.h | 61
4 files changed, 514 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_smi.h
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index 741b68874e53..789800d16804 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -36,7 +36,8 @@ ccflags-y := -I$(FULL_AMD_PATH)/include/asic_reg \
-I$(FULL_AMD_DISPLAY_PATH)/include \
-I$(FULL_AMD_DISPLAY_PATH)/dc \
-I$(FULL_AMD_DISPLAY_PATH)/amdgpu_dm \
- -I$(FULL_AMD_PATH)/amdkfd
+ -I$(FULL_AMD_PATH)/amdkfd \
+ -I$(FULL_AMD_PATH)/amdsmi/inc
amdgpu-y := amdgpu_drv.o
@@ -56,7 +57,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o
amdgpu_vm_cpu.o \
amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
- amdgpu_fw_attestation.o amdgpu_securedisplay.o
+ amdgpu_fw_attestation.o amdgpu_securedisplay.o amdgpu_smi.o
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
@@ -236,4 +237,9 @@ amdgpu-y += $(AMD_DISPLAY_FILES)
endif
+# SMI component
+AMDSMI_PATH := ../amdsmi
+include $(FULL_AMD_PATH)/amdsmi/Makefile
+amdgpu-y += $(AMDSMI_FILES)
+
obj-$(CONFIG_DRM_AMDGPU)+= amdgpu.o
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 7e1f66120c50..b10632866ea6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -108,6 +108,7 @@
#include "amdgpu_df.h"
#include "amdgpu_smuio.h"
#include "amdgpu_hdp.h"
+#include "amdgpu_smi.h"
#define MAX_GPU_INSTANCE 16
@@ -268,6 +269,7 @@ struct amdgpu_irq_src;
struct amdgpu_fpriv;
struct amdgpu_bo_va_mapping;
struct amdgpu_atif;
+struct amdgpu_smi_proc;
struct kfd_vm_fault_info;
struct amdgpu_hive_info;
@@ -475,6 +477,9 @@ struct amdgpu_fpriv {
struct mutexbo_list_lock;
struct idr bo_list_handles;
struct amdgpu_ctx_mgr ctx_mgr;
+ struct drm_file *file;
+ struct amdgpu_smi_proc *proc;
+ void*smi_priv;
};
int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv);
@@ -824,6 +829,9 @@ struct amdgpu_device {
struct notifier_block acpi_nb;
struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS];
struct debugfs_blob_wrapper debugfs_vbios_blob;
+#if defined(CONFIG_DEBUG_FS)
+ struct dentry *debugfs_proc;
+#endif
struct amdgpu_atif *atif;
struct amdgpu_atcs atcs;
struct mutexsrbm_mutex;
@@ -1082,6 +1090,10 @@ struct amdgpu_device {
boolin_pci_err_recovery;
struct pci_saved_state *pci_state;
+
+ /* SMI process tracking */
+ struct idr procs;
+ struct mutexproc_lock;
};
static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c
new file mode 100644
index ..c7eb549b7ebb
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c
@@ -0,0 +1,433 @@
+/*
+ * Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+
[PATCH 2/7] SWDEV-275015 - drm: Change scheduled fence track
From: David M Nieto
Update the timestamp of the scheduled fence on
HW completion of the previous fence.
This allows more accurate tracking of the fence
execution in HW
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
drivers/gpu/drm/scheduler/sched_main.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..952c553c077e 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
static struct drm_sched_job *
drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
{
- struct drm_sched_job *job;
+ struct drm_sched_job *job, *next;
/*
* Don't destroy jobs while the timeout worker is running OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
if (job && dma_fence_is_signaled(>s_fence->finished)) {
/* remove job from pending_list */
list_del_init(>list);
+ /* account for the next fence in the queue */
+ next = list_first_entry_or_null(>pending_list,
+ struct drm_sched_job, list);
+ if (next) {
+ next->s_fence->scheduled.timestamp =
+ job->s_fence->finished.timestamp;
+ }
} else {
job = NULL;
/* queue timeout for next job */
--
2.29.0
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[PATCH 1/7] SWDEV-275015 - drm/amdgpu: Add SMI-LIB ioctl
From: David M Nieto
Add definition for the SMI ioctl
Signed-off-by: David M Nieto
Signed-off-by: Roy Sun
---
include/uapi/drm/amdgpu_drm.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 8b832f7458f2..1d0261239627 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -56,6 +56,7 @@ extern "C" {
#define DRM_AMDGPU_SCHED 0x15
/* not upstream */
#define DRM_AMDGPU_FREESYNC0x5d
+#define DRM_AMDGPU_SMI 0x5e
#define DRM_IOCTL_AMDGPU_GEM_CREATEDRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
#define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@@ -74,6 +75,7 @@ extern "C" {
#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
#define DRM_IOCTL_AMDGPU_SCHED DRM_IOW(DRM_COMMAND_BASE +
DRM_AMDGPU_SCHED, union drm_amdgpu_sched)
#define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_SMI DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_SMI, struct drm_amdgpu_smi)
/**
* DOC: memory domains
@@ -1138,6 +1140,24 @@ struct drm_amdgpu_freesync {
__u32 spare[7];
};
+/* Definition of the SMI handlers */
+#define AMDGPU_SMI_MAX_PAYLOAD 1024
+struct drm_amdgpu_smi_in_hdr {
+ __u32 code;
+ __u16 in_len;
+ __u16 out_len;
+};
+
+struct drm_amdgpu_smi_out_hdr {
+ __s32 status;
+};
+
+struct drm_amdgpu_smi {
+ struct drm_amdgpu_smi_in_hdrin;
+ struct drm_amdgpu_smi_out_hdr out;
+ __u64 payload;
+};
+
#if defined(__cplusplus)
}
#endif
--
2.29.0
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[PATCH] drm/amdgpu: change the fence ring wait timeout
This fix bug where when the engine hang, the fence ring will wait without quit
and cause kernel crash
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 48 ---
1 file changed, 43 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 6b0aeee61b8b..738ea65077ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -41,6 +41,8 @@
#include "amdgpu.h"
#include "amdgpu_trace.h"
+#define AMDGPU_FENCE_TIMEOUT msecs_to_jiffies(1000)
+#define AMDGPU_FENCE_GFX_XGMI_TIMEOUT msecs_to_jiffies(2000)
/*
* Fences
* Fences mark an event in the GPUs pipeline and are used
@@ -104,6 +106,38 @@ static void amdgpu_fence_write(struct amdgpu_ring *ring,
u32 seq)
*drv->cpu_addr = cpu_to_le32(seq);
}
+/**
+ * amdgpu_fence_wait_timeout - get the fence wait timeout
+ *
+ * @ring: ring the fence is associated with
+ *
+ * Returns the value of the fence wait timeout.
+ */
+long amdgpu_fence_wait_timeout(struct amdgpu_ring *ring)
+{
+ long tmo_gfx, tmo_mm, tmo;
+ struct amdgpu_device *adev = ring->adev;
+ tmo_mm = tmo_gfx = AMDGPU_FENCE_TIMEOUT;
+ if (amdgpu_sriov_vf(adev)) {
+ tmo_mm = 8 * AMDGPU_FENCE_TIMEOUT;
+ }
+ if (amdgpu_sriov_runtime(adev)) {
+ tmo_gfx = 8 * AMDGPU_FENCE_TIMEOUT;
+ } else if (adev->gmc.xgmi.hive_id) {
+ tmo_gfx = AMDGPU_FENCE_GFX_XGMI_TIMEOUT;
+ }
+ if (ring->funcs->type == AMDGPU_RING_TYPE_UVD ||
+ ring->funcs->type == AMDGPU_RING_TYPE_VCE ||
+ ring->funcs->type == AMDGPU_RING_TYPE_UVD_ENC ||
+ ring->funcs->type == AMDGPU_RING_TYPE_VCN_DEC ||
+ ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC ||
+ ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG)
+ tmo = tmo_mm;
+ else
+ tmo = tmo_gfx;
+ return tmo;
+}
+
/**
* amdgpu_fence_read - read a fence value
*
@@ -166,10 +200,12 @@ int amdgpu_fence_emit(struct amdgpu_ring *ring, struct
dma_fence **f,
rcu_read_unlock();
if (old) {
- r = dma_fence_wait(old, false);
+ long timeout;
+ timeout = amdgpu_fence_wait_timeout(ring);
+ r = dma_fence_wait_timeout(old, false, timeout);
dma_fence_put(old);
if (r)
- return r;
+ return r < 0 ? r : 0;
}
}
@@ -343,10 +379,12 @@ int amdgpu_fence_wait_empty(struct amdgpu_ring *ring)
return 0;
}
rcu_read_unlock();
-
- r = dma_fence_wait(fence, false);
+
+ long timeout;
+ timeout = amdgpu_fence_wait_timeout(ring);
+ r = dma_fence_wait_timeout(fence, false, timeout);
dma_fence_put(fence);
- return r;
+ return r < 0 ? r : 0;
}
/**
--
2.28.0
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