Re: [PATCH] drm/amdgpu: add kernel DOC for ioctls in amdgpu_cs.c file

[Samuel Li]

On 2018-05-31 12:30 PM, Michel Dänzer wrote:
> On 2018-05-30 08:42 PM, Leo Liu wrote:
>> There are four ioctls in this files, and DOC gives details of
>> data structures for each of ioctls, and their functionalities.
>>
>> Signed-off-by: Leo Liu 
> 
> This isn't enough to actually make this part of the generated
> documentation. It needs to be hooked up to a *.rst file for that.
> 
> I'm adding an amdgpu.rst file in
> https://patchwork.freedesktop.org/series/44035/ , where you could hook
> it up accordingly.
Michel, have you submitted this one? So we can hook up the files gradually.
I do not see the patches in this list.

Sam

> 
> Please check that generating the documentation (e.g. with make htmldocs)
> doesn't produce any warnings about amdgpu_cs.c, and that the result
> looks good in Documentation/output/gpu/amdgpu.html . The documentation
> format itself is documented in Documentation/output/doc-guide/index.html .
> 
> 


[...]
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[PATCH 2/2] drm/amdgpu: add kernel doc for memory domains.

[Samuel Li]

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 include/uapi/drm/amdgpu_drm.h | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 5b007fa..a2ae752 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -75,6 +75,25 @@ extern "C" {
 #define DRM_IOCTL_AMDGPU_SCHED DRM_IOW(DRM_COMMAND_BASE + 
DRM_AMDGPU_SCHED, union drm_amdgpu_sched)
 #define DRM_IOCTL_AMDGPU_FREESYNC  DRM_IOWR(DRM_COMMAND_BASE + 
DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
 
+/**
+ * memory domains
+ *
+ * %AMDGPU_GEM_DOMAIN_CPU  System memory
+ *
+ * %AMDGPU_GEM_DOMAIN_GTT  Gart memory linearizes non-contiguous pages of
+ * system memory, allows GPU access system memory in a linezrized fashion
+ *
+ * %AMDGPU_GEM_DOMAIN_VRAM Local video memory. For APUs, it is memory
+ * carved out by BIOS
+ *
+ * %AMDGPU_GEM_DOMAIN_GDS  Global on-chip data storage used to share data
+ *
+ * %AMDGPU_GEM_DOMAIN_GWS  Global wave sync, used to synchronize the
+ * execution of all the waves on a device
+ *
+ * %AMDGPU_GEM_DOMAIN_OA   Ordered append, used by 3D or Compute engines
+ * for appending data
+ */
 #define AMDGPU_GEM_DOMAIN_CPU  0x1
 #define AMDGPU_GEM_DOMAIN_GTT  0x2
 #define AMDGPU_GEM_DOMAIN_VRAM 0x4
-- 
2.7.4

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[PATCH 1/2] drm/amdgpu: add kernel doc for amdgpu_object.c

[Samuel Li]

v2: Add a DOC section and some more clarification.
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 266 +
 1 file changed, 266 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 6a9e46a..c3a7b11 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -38,6 +38,18 @@
 #include "amdgpu_trace.h"
 #include "amdgpu_amdkfd.h"
 
+/**
+ * DOC: amdgpu_object
+ *
+ * This defines the interfaces to operate on an _bo buffer object. The
+ * driver provides DRM/GEM APIs to userspace. DRM/GEM APIs then use these
+ * interfaces to create/destroy/set buffer object which are then managed by
+ * the kernel TTM memory manager.
+ * The interfaces are also used internally by kernel clients, including gfx,
+ * uvd, etc.
+ *
+ */
+
 static bool amdgpu_need_backup(struct amdgpu_device *adev)
 {
if (adev->flags & AMD_IS_APU)
@@ -73,6 +85,15 @@ static void amdgpu_ttm_bo_destroy(struct ttm_buffer_object 
*tbo)
kfree(bo);
 }
 
+/**
+ * amdgpu_ttm_bo_is_amdgpu_bo - check if the buffer object is an _bo
+ * @bo: buffer object to be checked
+ *
+ * Uses destroy function associated with the object to determine if this is
+ * an _bo.
+ *
+ * Returns true if the object belongs to _bo, false if not.
+ */
 bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object *bo)
 {
if (bo->destroy == _ttm_bo_destroy)
@@ -80,6 +101,14 @@ bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object 
*bo)
return false;
 }
 
+/**
+ * amdgpu_ttm_placement_from_domain - set buffer's placement
+ * @abo: _bo buffer object whose placement is to be set
+ * @domain: requested domain
+ *
+ * Sets buffer's placement according to requested domain and the buffer's
+ * flags.
+ */
 void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
 {
struct amdgpu_device *adev = amdgpu_ttm_adev(abo->tbo.bdev);
@@ -498,6 +527,19 @@ static int amdgpu_bo_create_shadow(struct amdgpu_device 
*adev,
return r;
 }
 
+/**
+ * amdgpu_bo_create - create an _bo buffer object
+ * @adev: amdgpu device object
+ * @bp: parameters to be used for the buffer object
+ * @bo_ptr: pointer to the buffer object pointer
+ *
+ * Creates an _bo buffer object; and if requested, also creates a
+ * shadow object.
+ * Shadow object is used to backup the original buffer object, and is always
+ * in GTT.
+ *
+ * Returns 0 for success or a negative error code on failure.
+ */
 int amdgpu_bo_create(struct amdgpu_device *adev,
 struct amdgpu_bo_param *bp,
 struct amdgpu_bo **bo_ptr)
@@ -527,6 +569,20 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
return r;
 }
 
+/**
+ * amdgpu_bo_backup_to_shadow - Backs up an _bo buffer object
+ * @adev: amdgpu device object
+ * @ring: amdgpu_ring for the engine handling the buffer operations
+ * @bo: _bo buffer to be backed up
+ * @resv: reservation object with embedded fence
+ * @fence: dma_fence associated with the operation
+ * @direct: whether to submit the job directly
+ *
+ * Copies an _bo buffer object to its shadow object.
+ * Not used for now.
+ *
+ * Returns 0 for success or a negative error code on failure.
+ */
 int amdgpu_bo_backup_to_shadow(struct amdgpu_device *adev,
   struct amdgpu_ring *ring,
   struct amdgpu_bo *bo,
@@ -559,6 +615,17 @@ int amdgpu_bo_backup_to_shadow(struct amdgpu_device *adev,
return r;
 }
 
+/**
+ * amdgpu_bo_validate - validate an _bo buffer object
+ * @bo: pointer to the buffer object
+ *
+ * Sets placement according to domain; and changes placement and caching
+ * policy of the buffer object according to the placement.
+ * This is used for validating shadow bos.  It calls ttm_bo_validate() to
+ * make sure the buffer is resident where it needs to be.
+ *
+ * Returns 0 for success or a negative error code on failure.
+ */
 int amdgpu_bo_validate(struct amdgpu_bo *bo)
 {
struct ttm_operation_ctx ctx = { false, false };
@@ -581,6 +648,21 @@ int amdgpu_bo_validate(struct amdgpu_bo *bo)
return r;
 }
 
+/**
+ * amdgpu_bo_restore_from_shadow - restore an _bo buffer object
+ * @adev: amdgpu device object
+ * @ring: amdgpu_ring for the engine handling the buffer operations
+ * @bo: _bo buffer to be restored
+ * @resv: reservation object with embedded fence
+ * @fence: dma_fence associated with the operation
+ * @direct: whether to submit the job directly
+ *
+ * Copies a buffer object's shadow content back to the object.
+ * This is used for recovering a buffer from its shadow in case of a gpu
+ * reset where vram context may be lost.
+ *
+ * Returns 0 for success or a negative error code on failure.
+ */
 int amdgpu_bo_restore_from_shadow(struct amdgpu_device *adev,
   

Re: [PATCH 1/1] drm/amdgpu: add kernel doc for amdgpu_object.c

[Samuel Li]

On 2018-05-18 02:54 PM, Alex Deucher wrote:
> On Thu, May 17, 2018 at 6:20 PM, Samuel Li <samuel...@amd.com> wrote:
>> Signed-off-by: Samuel Li <samuel...@amd.com>
> 
> Please also add a separate DOC section at the top of this file giving
> a brief overview of how amdgpu bo API works.  E.g., how you would
> allocate, free, kmap, etc.  What pinning means and why you would need
> to do it, etc.  What domains we support and what they are.  What
> shadow bos are.
OK. For domains, I can create a separate change to add to "amdgpu_drm.h", in 
which they were defined.
For pinning/shadow bo, I can add it before the respective functions.

Sam


> 
> Additional comments below for things to add or clarify to enhance the
> documentation.
> 
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 233 
>> +
>>  1 file changed, 233 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> index 6a9e46a..271dbfa 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> @@ -73,6 +73,15 @@ static void amdgpu_ttm_bo_destroy(struct 
>> ttm_buffer_object *tbo)
>> kfree(bo);
>>  }
>>
>> +/**
>> + * amdgpu_ttm_bo_is_amdgpu_bo - if the buffer object belongs to an 
>> _bo
>> + * @bo: buffer object to be checked
>> + *
>> + * Uses destroy function associated with the object to determine if this is
>> + * _bo.
>> + *
>> + * Returns true if the object belongs to _bo, false if not.
>> + */
> 
> Just to clarify, it checks whether a ttm bo is an amdgpu buffer object or not.
> 
>>  bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object *bo)
>>  {
>> if (bo->destroy == _ttm_bo_destroy)
>> @@ -80,6 +89,14 @@ bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object 
>> *bo)
>> return false;
>>  }
>>
>> +/**
>> + * amdgpu_ttm_placement_from_domain - set buffer's placement
>> + * @abo: _bo buffer object whose placement is to be set
>> + * @domain: requested domain
>> + *
>> + * Sets buffer's placement according to requested domain and the buffer's
>> + * flags.
>> + */
>>  void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
>>  {
>> struct amdgpu_device *adev = amdgpu_ttm_adev(abo->tbo.bdev);
>> @@ -498,6 +515,17 @@ static int amdgpu_bo_create_shadow(struct amdgpu_device 
>> *adev,
>> return r;
>>  }
>>
>> +/**
>> + * amdgpu_bo_create - create an _bo buffer object
>> + * @adev: amdgpu device object
>> + * @bp: parameters to be used for the buffer object
>> + * @bo_ptr: pointer to the buffer object pointer
>> + *
>> + * Creates an _bo buffer object; and if requested, also creates a
>> + * shadow object.
>> + *
>> + * Returns 0 for success or a negative error code on failure.
>> + */
>>  int amdgpu_bo_create(struct amdgpu_device *adev,
>>  struct amdgpu_bo_param *bp,
>>  struct amdgpu_bo **bo_ptr)
>> @@ -527,6 +555,20 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
>> return r;
>>  }
>>
>> +/**
>> + * amdgpu_bo_backup_to_shadow - Backs up an _bo buffer object
>> + * @adev: amdgpu device object
>> + * @ring: amdgpu_ring for the engine handling the buffer operations
>> + * @bo: _bo buffer to be backed up
>> + * @resv: reservation object with embedded fence
>> + * @fence: dma_fence associated with the operation
>> + * @direct: whether to submit the job directly
>> + *
>> + * Copies an _bo buffer object to its shadow object.
>> + * Not used for now.
>> + *
>> + * Returns 0 for success or a negative error code on failure.
>> + */
>>  int amdgpu_bo_backup_to_shadow(struct amdgpu_device *adev,
>>struct amdgpu_ring *ring,
>>struct amdgpu_bo *bo,
>> @@ -559,6 +601,15 @@ int amdgpu_bo_backup_to_shadow(struct amdgpu_device 
>> *adev,
>> return r;
>>  }
>>
>> +/**
>> + * amdgpu_bo_validate - validate an _bo buffer object
>> + * @bo: pointer to the buffer object
>> + *
>> + * Sets placement according to domain; and changes placement and caching
>> + * policy of the buffer object according to the placement.
>> + *
>> + * Returns 0 for success or a negative error code on failure.
>> + */
> 
> This is used for validating shadow bos.  Also worth mentioning that it
>

Re: [PATCH] drm/amdgpu: consider user preference when pinning for SG display

[Samuel Li]

On 2018-05-18 04:21 AM, Michel Dänzer wrote:
> On 2018-05-17 06:55 PM, Alex Deucher wrote:
>> If the pin domain is set to GTT | VRAM, look at the preferred domains
>> for the bo and respect that if it's been set explicitly.
>>
>> Signed-off-by: Alex Deucher 
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 +++--
>>  1 file changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> index 6a9e46ae7f0a..16192f17653e 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> @@ -704,9 +704,14 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 
>> domain,
>>   * See function amdgpu_display_supported_domains()
>>   */
>>  if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
>> -domain = AMDGPU_GEM_DOMAIN_VRAM;
>> -if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
>> +if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_VRAM)
>> +domain = AMDGPU_GEM_DOMAIN_VRAM; /* if user really 
>> wants vram, respect it */
>> +else if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GTT)
>> +domain = AMDGPU_GEM_DOMAIN_GTT; /* if user really wants 
>> gtt, respect it */
> 
> I'd spell VRAM and GTT in capital letters in the comments.
> 
> 
>> +else if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
>>  domain = AMDGPU_GEM_DOMAIN_GTT;
>> +else
>> +domain = AMDGPU_GEM_DOMAIN_VRAM;
>>  }
> 
> Is everything in place to deal with any issues that might occur when
> flipping between buffers in VRAM and GTT?
> 
Besides this question, I am also wondering how to deal with the first display 
buffer created in kernel at amdgpufb_create_pinned_object()?

Sam


> 
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[PATCH 1/1] drm/amdgpu: add kernel doc for amdgpu_object.c

[Samuel Li]

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 233 +
 1 file changed, 233 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 6a9e46a..271dbfa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -73,6 +73,15 @@ static void amdgpu_ttm_bo_destroy(struct ttm_buffer_object 
*tbo)
kfree(bo);
 }
 
+/**
+ * amdgpu_ttm_bo_is_amdgpu_bo - if the buffer object belongs to an _bo
+ * @bo: buffer object to be checked
+ *
+ * Uses destroy function associated with the object to determine if this is
+ * _bo.
+ *
+ * Returns true if the object belongs to _bo, false if not.
+ */
 bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object *bo)
 {
if (bo->destroy == _ttm_bo_destroy)
@@ -80,6 +89,14 @@ bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object *bo)
return false;
 }
 
+/**
+ * amdgpu_ttm_placement_from_domain - set buffer's placement
+ * @abo: _bo buffer object whose placement is to be set
+ * @domain: requested domain
+ *
+ * Sets buffer's placement according to requested domain and the buffer's
+ * flags.
+ */
 void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
 {
struct amdgpu_device *adev = amdgpu_ttm_adev(abo->tbo.bdev);
@@ -498,6 +515,17 @@ static int amdgpu_bo_create_shadow(struct amdgpu_device 
*adev,
return r;
 }
 
+/**
+ * amdgpu_bo_create - create an _bo buffer object
+ * @adev: amdgpu device object
+ * @bp: parameters to be used for the buffer object
+ * @bo_ptr: pointer to the buffer object pointer
+ *
+ * Creates an _bo buffer object; and if requested, also creates a
+ * shadow object.
+ *
+ * Returns 0 for success or a negative error code on failure.
+ */
 int amdgpu_bo_create(struct amdgpu_device *adev,
 struct amdgpu_bo_param *bp,
 struct amdgpu_bo **bo_ptr)
@@ -527,6 +555,20 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
return r;
 }
 
+/**
+ * amdgpu_bo_backup_to_shadow - Backs up an _bo buffer object
+ * @adev: amdgpu device object
+ * @ring: amdgpu_ring for the engine handling the buffer operations
+ * @bo: _bo buffer to be backed up
+ * @resv: reservation object with embedded fence
+ * @fence: dma_fence associated with the operation
+ * @direct: whether to submit the job directly
+ *
+ * Copies an _bo buffer object to its shadow object.
+ * Not used for now.
+ *
+ * Returns 0 for success or a negative error code on failure.
+ */
 int amdgpu_bo_backup_to_shadow(struct amdgpu_device *adev,
   struct amdgpu_ring *ring,
   struct amdgpu_bo *bo,
@@ -559,6 +601,15 @@ int amdgpu_bo_backup_to_shadow(struct amdgpu_device *adev,
return r;
 }
 
+/**
+ * amdgpu_bo_validate - validate an _bo buffer object
+ * @bo: pointer to the buffer object
+ *
+ * Sets placement according to domain; and changes placement and caching
+ * policy of the buffer object according to the placement.
+ *
+ * Returns 0 for success or a negative error code on failure.
+ */
 int amdgpu_bo_validate(struct amdgpu_bo *bo)
 {
struct ttm_operation_ctx ctx = { false, false };
@@ -581,6 +632,19 @@ int amdgpu_bo_validate(struct amdgpu_bo *bo)
return r;
 }
 
+/**
+ * amdgpu_bo_restore_from_shadow - restore an _bo buffer object
+ * @adev: amdgpu device object
+ * @ring: amdgpu_ring for the engine handling the buffer operations
+ * @bo: _bo buffer to be restored
+ * @resv: reservation object with embedded fence
+ * @fence: dma_fence associated with the operation
+ * @direct: whether to submit the job directly
+ *
+ * Copies a buffer object's shadow content back to the object.
+ *
+ * Returns 0 for success or a negative error code on failure.
+ */
 int amdgpu_bo_restore_from_shadow(struct amdgpu_device *adev,
  struct amdgpu_ring *ring,
  struct amdgpu_bo *bo,
@@ -613,6 +677,16 @@ int amdgpu_bo_restore_from_shadow(struct amdgpu_device 
*adev,
return r;
 }
 
+/**
+ * amdgpu_bo_kmap - map an _bo buffer object
+ * @bo: _bo buffer object to be mapped
+ * @ptr: kernel virtual address to be returned
+ *
+ * Calls ttm_bo_kmap() to set up the kernel virtual mapping; calls
+ * amdgpu_bo_kptr() to get the kernel virtual address.
+ *
+ * Returns 0 for success or a negative error code on failure.
+ */
 int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)
 {
void *kptr;
@@ -643,6 +717,14 @@ int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)
return 0;
 }
 
+/**
+ * amdgpu_bo_kptr - returns a kernel virtual address of the buffer object
+ * @bo: _bo buffer object
+ *
+ * Calls ttm_kmap_obj_virtual() to get the kernel virtual address
+ *
+ * Returns the virtual address of a buffer object area.
+ */
 void *amdgpu_bo_kptr(struct amdgpu_bo *bo)
 {
bool is_iomem

Re: [PATCH xf86-video-amdgpu 2/2] Wait for pending flips in drmmode_output_set_tear_free

[Samuel Li]

On 2018-04-26 11:58 AM, Michel Dänzer wrote:
> From: Michel Dänzer <michel.daen...@amd.com>
> 
> This prevents a nested call to drmHandleEvent, which would hang.
> 
> Fixes hangs when disabling TearFree on a CRTC while a DRI3 client is
> page flipping.
> 
> Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
> ---
>  src/drmmode_display.c | 9 +
>  1 file changed, 9 insertions(+)
> 
> diff --git a/src/drmmode_display.c b/src/drmmode_display.c
> index cf1e5d1f1..4fac645b9 100644
> --- a/src/drmmode_display.c
> +++ b/src/drmmode_display.c
> @@ -1750,6 +1750,15 @@ drmmode_output_set_tear_free(AMDGPUEntPtr pAMDGPUEnt,
>   drmmode_output->tear_free = tear_free;
>  
>   if (crtc) {
> + drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
> +
> + /* Wait for pending flips before drmmode_set_mode_major calls 
Trailing white space.
Otherwise the two patches are 
Reviewed-by: Samuel Li <samuel...@amd.com> 

Sam

> +  * drmmode_crtc_update_tear_free, to prevent a nested
> +  * drmHandleEvent call, which would hang
> +  */
> + drmmode_crtc_wait_pending_event(drmmode_crtc,
> + pAMDGPUEnt->fd,
> + drmmode_crtc->flip_pending);
>   drmmode_set_mode_major(crtc, >mode, crtc->rotation,
>  crtc->x, crtc->y);
>   }
> 
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[PATCH v5 1/1] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

Enables sg display if vram size <= THRESHOLD(256M); otherwise
still use vram as display buffer.
This patch fixed some potention issues introduced by change
"allow framebuffer in GART memory as well" due to CZ/ST hardware
limitation.

v2: Change default setting to auto.
v3: Move some logic from amdgpu_display_framebuffer_domains()
to pin function, suggested by Christian.
v4: Split into several patches.
v5: Drop module parameter for now.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 59df4b7..2d75009 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -138,6 +138,7 @@ extern int amdgpu_si_support;
 extern int amdgpu_cik_support;
 #endif
 
+#define AMDGPU_SG_THRESHOLD(256*1024*1024)
 #define AMDGPU_DEFAULT_GTT_SIZE_MB 3072ULL /* 3GB by default */
 #define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000
 #define AMDGPU_MAX_USEC_TIMEOUT10  /* 100 ms */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 1985c08..e62153a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -701,6 +701,15 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 
domain,
return -EINVAL;
}
 
+   /* This assumes only APU display buffers are pinned with (VRAM|GTT).
+* See function amdgpu_display_supported_domains()
+*/
+   if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
+   domain = AMDGPU_GEM_DOMAIN_VRAM;
+   if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
+   domain = AMDGPU_GEM_DOMAIN_GTT;
+   }
+
if (bo->pin_count) {
uint32_t mem_type = bo->tbo.mem.mem_type;
 
-- 
2.7.4

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[PATCH 2/3] drm/amdgpu: Remove VRAM from shared bo domains.

[Samuel Li]

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 24f582c..8dc782a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -689,8 +689,12 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 
domain,
return -EINVAL;
 
/* A shared bo cannot be migrated to VRAM */
-   if (bo->prime_shared_count && (domain == AMDGPU_GEM_DOMAIN_VRAM))
-   return -EINVAL;
+   if (bo->prime_shared_count) {
+   if (domain & AMDGPU_GEM_DOMAIN_GTT)
+   domain = AMDGPU_GEM_DOMAIN_GTT;
+   else
+   return -EINVAL;
+   }
 
if (bo->pin_count) {
uint32_t mem_type = bo->tbo.mem.mem_type;
-- 
2.7.4

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[PATCH 3/3] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

It's auto by default. For CZ/ST, auto setting enables sg display
when vram size is small; otherwise still uses vram.
This patch fixed some potention issues introduced by change
"allow framebuffer in GART memory as well" due to CZ/ST hardware
limitation.

v2: Change default setting to auto.
v3: Move some logic from amdgpu_display_framebuffer_domains()
to pin function, suggested by Christian.
v4: Split into several patches.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h|  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c|  4 
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 11 +++
 3 files changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b3d047d..26429de 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -129,6 +129,7 @@ extern int amdgpu_lbpw;
 extern int amdgpu_compute_multipipe;
 extern int amdgpu_gpu_recovery;
 extern int amdgpu_emu_mode;
+extern int amdgpu_sg_display;
 
 #ifdef CONFIG_DRM_AMDGPU_SI
 extern int amdgpu_si_support;
@@ -137,6 +138,7 @@ extern int amdgpu_si_support;
 extern int amdgpu_cik_support;
 #endif
 
+#define AMDGPU_SG_THRESHOLD(256*1024*1024)
 #define AMDGPU_DEFAULT_GTT_SIZE_MB 3072ULL /* 3GB by default */
 #define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000
 #define AMDGPU_MAX_USEC_TIMEOUT10  /* 100 ms */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0b19482..85dcd1c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -132,6 +132,7 @@ int amdgpu_lbpw = -1;
 int amdgpu_compute_multipipe = -1;
 int amdgpu_gpu_recovery = -1; /* auto */
 int amdgpu_emu_mode = 0;
+int amdgpu_sg_display = -1;
 
 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
@@ -290,6 +291,9 @@ module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 
0444);
 MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
 module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);
 
+MODULE_PARM_DESC(sg_display, "Enable scatter gather display, (1 = enable, 0 = 
disable, -1 = auto");
+module_param_named(sg_display, amdgpu_sg_display, int, 0444);
+
 #ifdef CONFIG_DRM_AMDGPU_SI
 
 #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 8dc782a..cb0807c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -696,6 +696,17 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 
domain,
return -EINVAL;
}
 
+   /* This assumes only apu display buffers pin with (VRAM|GTT) */
+   if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
+   domain = AMDGPU_GEM_DOMAIN_VRAM;
+   if (amdgpu_sg_display == 1)
+   domain = AMDGPU_GEM_DOMAIN_GTT;
+   else if (amdgpu_sg_display == -1) {
+   if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
+   domain = AMDGPU_GEM_DOMAIN_GTT;
+   }
+   }
+
if (bo->pin_count) {
uint32_t mem_type = bo->tbo.mem.mem_type;
 
-- 
2.7.4

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[PATCH 1/3] drm/amdgpu: Rename amdgpu_display_framebuffer_domains()

[Samuel Li]

It returns supported domains, and domains actually used are to be
decided later.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +--
 5 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 50f98df..0caa3d2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -189,7 +189,7 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc 
*crtc,
goto cleanup;
}
 
-   r = amdgpu_bo_pin(new_abo, amdgpu_display_framebuffer_domains(adev), 
);
+   r = amdgpu_bo_pin(new_abo, amdgpu_display_supported_domains(adev), 
);
if (unlikely(r != 0)) {
DRM_ERROR("failed to pin new abo buffer before flip\n");
goto unreserve;
@@ -484,7 +484,7 @@ static const struct drm_framebuffer_funcs amdgpu_fb_funcs = 
{
.create_handle = drm_gem_fb_create_handle,
 };
 
-uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev)
+uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev)
 {
uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 2b11d80..f66e3e3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -23,7 +23,7 @@
 #ifndef __AMDGPU_DISPLAY_H__
 #define __AMDGPU_DISPLAY_H__
 
-uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev);
+uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev);
 struct drm_framebuffer *
 amdgpu_display_user_framebuffer_create(struct drm_device *dev,
   struct drm_file *file_priv,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index ff89e84..bc5fd8e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -137,7 +137,7 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
/* need to align pitch with crtc limits */
mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
  fb_tiled);
-   domain = amdgpu_display_framebuffer_domains(adev);
+   domain = amdgpu_display_supported_domains(adev);
 
height = ALIGN(mode_cmd->height, 8);
size = mode_cmd->pitches[0] * height;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index 4b584cb7..cf0749f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -209,7 +209,7 @@ static int amdgpu_gem_begin_cpu_access(struct dma_buf 
*dma_buf,
struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
struct ttm_operation_ctx ctx = { true, false };
-   u32 domain = amdgpu_display_framebuffer_domains(adev);
+   u32 domain = amdgpu_display_supported_domains(adev);
int ret;
bool reads = (direction == DMA_BIDIRECTIONAL ||
  direction == DMA_FROM_DEVICE);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 6f92a19..1f5603a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3109,12 +3109,11 @@ static int dm_plane_helper_prepare_fb(struct drm_plane 
*plane,
return r;
 
if (plane->type != DRM_PLANE_TYPE_CURSOR)
-   domain = amdgpu_display_framebuffer_domains(adev);
+   domain = amdgpu_display_supported_domains(adev);
else
domain = AMDGPU_GEM_DOMAIN_VRAM;
 
r = amdgpu_bo_pin(rbo, domain, >address);
-
amdgpu_bo_unreserve(rbo);
 
if (unlikely(r != 0)) {
-- 
2.7.4

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Re: [PATCH 1/1] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

On 2018-04-18 12:16 PM, Christian König wrote:
> Am 18.04.2018 um 17:29 schrieb Samuel Li:
>>
>> On 2018-04-18 12:14 AM, Alex Deucher wrote:
>>> On Tue, Apr 17, 2018 at 8:40 PM, Samuel Li <samuel...@amd.com> wrote:
>>>> It's auto by default. For CZ/ST, auto setting enables sg display
>>>> when vram size is small; otherwise still uses vram.
>>>> This patch fixed some potention hang issue introduced by change
>>>> "allow framebuffer in GART memory as well" due to CZ/ST hardware
>>>> limitation.
>>>>
>>>
>> OK.
>>

[...]

> 
> Mhm, for developer testing we can easily modify 
> amdgpu_display_supported_domains().
> 
> The real question is should we give an end user the ability to modify the 
> behavior? I currently can't think of a reason for that.
Yes, we do. For example, there are cases that user prefers GTT(VRAM can run 
out), also there are cases user prefers VRAM for performance.

Regards,
Sam


> 
> Regards,
> Christian.
> 
>>
>> Regards,
>> Samuel Li
>>
>>> Alex
>>>
>>>> +   }
>>>> +#endif
>>>>
>>>>  if (bo->pin_count) {
>>>>  uint32_t mem_type = bo->tbo.mem.mem_type;
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>>>> index 4b584cb7..cf0749f 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>>>> @@ -209,7 +209,7 @@ static int amdgpu_gem_begin_cpu_access(struct dma_buf 
>>>> *dma_buf,
>>>>  struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
>>>>  struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
>>>>  struct ttm_operation_ctx ctx = { true, false };
>>>> -   u32 domain = amdgpu_display_framebuffer_domains(adev);
>>>> +   u32 domain = amdgpu_display_supported_domains(adev);
>>>>  int ret;
>>>>  bool reads = (direction == DMA_BIDIRECTIONAL ||
>>>>    direction == DMA_FROM_DEVICE);
>>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
>>>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>> index 6f92a19..1f5603a 100644
>>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>> @@ -3109,12 +3109,11 @@ static int dm_plane_helper_prepare_fb(struct 
>>>> drm_plane *plane,
>>>>  return r;
>>>>
>>>>  if (plane->type != DRM_PLANE_TYPE_CURSOR)
>>>> -   domain = amdgpu_display_framebuffer_domains(adev);
>>>> +   domain = amdgpu_display_supported_domains(adev);
>>>>  else
>>>>  domain = AMDGPU_GEM_DOMAIN_VRAM;
>>>>
>>>>  r = amdgpu_bo_pin(rbo, domain, >address);
>>>> -
>>>>  amdgpu_bo_unreserve(rbo);
>>>>
>>>>  if (unlikely(r != 0)) {
>>>> -- 
>>>> 2.7.4
>>>>
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Re: [PATCH 1/1] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

On 2018-04-18 04:34 AM, Christian König wrote:
> Am 18.04.2018 um 06:14 schrieb Alex Deucher:
>> On Tue, Apr 17, 2018 at 8:40 PM, Samuel Li <samuel...@amd.com> wrote:
>>> It's auto by default. For CZ/ST, auto setting enables sg display
>>> when vram size is small; otherwise still uses vram.
>>> This patch fixed some potention hang issue introduced by change
>>> "allow framebuffer in GART memory as well" due to CZ/ST hardware
>>> limitation.
>>>
>>> v2: Change default setting to auto.
>>> v3: Move some logic from amdgpu_display_framebuffer_domains()
>>>  to pin function, suggested by Christian.
>>> Signed-off-by: Samuel Li <samuel...@amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  2 ++
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   |  4 ++--
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |  2 +-
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  4 
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c    |  2 +-
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_object.c    | 25 
>>> +--
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c |  2 +-
>>>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  3 +--
>>>   8 files changed, 35 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h

[...]

>> This is a bug fix and should be split out into a separate patch.
>>
>>> +
>>> +   /* display buffer */
>>> +#if defined(CONFIG_DRM_AMD_DC)
> 
> Please drop that #if, we certainly don't want this to be depend on any define.
OK.


> 
>>> +   if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN 
>>> &&
>>> +   adev->flags & AMD_IS_APU &&
>>> +   amdgpu_device_asic_has_dc_support(adev->asic_type) &&
> 
> Those checks are static and don't depend on the BO. So they should be in 
> amdgpu_display_supported_domains().
OK. That is going to be risky for the future though.


Regards,
Samuel Li

> 
> Regards,
> Christian.
> 
>>> +   domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
>>> +   if (amdgpu_sg_display == 1)
>>> +   domain = AMDGPU_GEM_DOMAIN_GTT;
>>> +   else if (amdgpu_sg_display == -1) {
>>> +   if (adev->gmc.real_vram_size < AMDGPU_SG_THRESHOLD)
>>> +   domain = AMDGPU_GEM_DOMAIN_GTT;
>>> +   else
>>> +   domain = AMDGPU_GEM_DOMAIN_VRAM;
>>> +   }
>> I thought we were dropping the module parameter.  Also, we had talked
>> about taking preferred domains into account here as well, but that can
>> be a follow on patch.
>>
>> Alex
>>
>>> +   }
>>> +#endif
>>>
>>>  if (bo->pin_count) {
>>>  uint32_t mem_type = bo->tbo.mem.mem_type;
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>>> index 4b584cb7..cf0749f 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>>> @@ -209,7 +209,7 @@ static int amdgpu_gem_begin_cpu_access(struct dma_buf 
>>> *dma_buf,
>>>  struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
>>>  struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
>>>  struct ttm_operation_ctx ctx = { true, false };
>>> -   u32 domain = amdgpu_display_framebuffer_domains(adev);
>>> +   u32 domain = amdgpu_display_supported_domains(adev);
>>>  int ret;
>>>  bool reads = (direction == DMA_BIDIRECTIONAL ||
>>>    direction == DMA_FROM_DEVICE);
>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
>>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> index 6f92a19..1f5603a 100644
>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> @@ -3109,12 +3109,11 @@ static int dm_plane_helper_prepare_fb(struct 
>>> drm_plane *plane,
>>>  return r;
>>>
>>>  if (plane->type != DRM_PLANE_TYPE_CURSOR)
>>> -   domain = am

Re: [PATCH 1/1] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

On 2018-04-18 12:14 AM, Alex Deucher wrote:
> On Tue, Apr 17, 2018 at 8:40 PM, Samuel Li <samuel...@amd.com> wrote:
>> It's auto by default. For CZ/ST, auto setting enables sg display
>> when vram size is small; otherwise still uses vram.
>> This patch fixed some potention hang issue introduced by change
>> "allow framebuffer in GART memory as well" due to CZ/ST hardware
>> limitation.
>>
>> v2: Change default setting to auto.
>> v3: Move some logic from amdgpu_display_framebuffer_domains()
>> to pin function, suggested by Christian.
>> Signed-off-by: Samuel Li <samuel...@amd.com>
>> [...]
>> @@ -484,7 +484,7 @@ static const struct drm_framebuffer_funcs 
>> amdgpu_fb_funcs = {
>> .create_handle = drm_gem_fb_create_handle,
>>  };
>>
>> -uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev)
>> +uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev)
> 
> This change should be a separate patch,
> 
OK.

[...]

>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> index 24f582c..f0f1f8a 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> @@ -689,8 +689,29 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 
>> domain,
>> return -EINVAL;
>>
>> /* A shared bo cannot be migrated to VRAM */
>> -   if (bo->prime_shared_count && (domain == AMDGPU_GEM_DOMAIN_VRAM))
>> -   return -EINVAL;
>> +   if (bo->prime_shared_count) {
>> +   if (domain & AMDGPU_GEM_DOMAIN_GTT)
>> +   domain = AMDGPU_GEM_DOMAIN_GTT;
>> +   else
>> +   return -EINVAL;
>> +   }
> 
> This is a bug fix and should be split out into a separate patch.
> 
OK.

>> +
>> +   /* display buffer */
>> +#if defined(CONFIG_DRM_AMD_DC)
>> +   if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN 
>> &&
>> +   adev->flags & AMD_IS_APU &&
>> +   amdgpu_device_asic_has_dc_support(adev->asic_type) &&
>> +   domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
>> +   if (amdgpu_sg_display == 1)
>> +   domain = AMDGPU_GEM_DOMAIN_GTT;
>> +   else if (amdgpu_sg_display == -1) {
>> +   if (adev->gmc.real_vram_size < AMDGPU_SG_THRESHOLD)
>> +   domain = AMDGPU_GEM_DOMAIN_GTT;
>> +   else
>> +   domain = AMDGPU_GEM_DOMAIN_VRAM;
>> +   }
> 
> I thought we were dropping the module parameter.  Also, we had talked
> about taking preferred domains into account here as well, but that can
> be a follow on patch.
As per the documents, SG display feature can affect other features. The option 
has been used for debugging on Windows by development, testing and supported 
teams. So I prefer to keep it.

Regards,
Samuel Li

> 
> Alex
> 
>> +   }
>> +#endif
>>
>> if (bo->pin_count) {
>> uint32_t mem_type = bo->tbo.mem.mem_type;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>> index 4b584cb7..cf0749f 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>> @@ -209,7 +209,7 @@ static int amdgpu_gem_begin_cpu_access(struct dma_buf 
>> *dma_buf,
>> struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
>> struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
>> struct ttm_operation_ctx ctx = { true, false };
>> -   u32 domain = amdgpu_display_framebuffer_domains(adev);
>> +   u32 domain = amdgpu_display_supported_domains(adev);
>> int ret;
>> bool reads = (direction == DMA_BIDIRECTIONAL ||
>>   direction == DMA_FROM_DEVICE);
>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> index 6f92a19..1f5603a 100644
>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> @@ -3109,12 +3109,11 @@ static int dm_plane_helper_prepare_fb(struct 
>> drm_plane *plane,
>> return r;
>>
>> if (plane->type != DRM_

[PATCH 1/1] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

It's auto by default. For CZ/ST, auto setting enables sg display
when vram size is small; otherwise still uses vram.
This patch fixed some potention hang issue introduced by change
"allow framebuffer in GART memory as well" due to CZ/ST hardware
limitation.

v2: Change default setting to auto.
v3: Move some logic from amdgpu_display_framebuffer_domains()
to pin function, suggested by Christian.
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  4 
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c| 25 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c |  2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  3 +--
 8 files changed, 35 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b3d047d..26429de 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -129,6 +129,7 @@ extern int amdgpu_lbpw;
 extern int amdgpu_compute_multipipe;
 extern int amdgpu_gpu_recovery;
 extern int amdgpu_emu_mode;
+extern int amdgpu_sg_display;
 
 #ifdef CONFIG_DRM_AMDGPU_SI
 extern int amdgpu_si_support;
@@ -137,6 +138,7 @@ extern int amdgpu_si_support;
 extern int amdgpu_cik_support;
 #endif
 
+#define AMDGPU_SG_THRESHOLD(256*1024*1024)
 #define AMDGPU_DEFAULT_GTT_SIZE_MB 3072ULL /* 3GB by default */
 #define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000
 #define AMDGPU_MAX_USEC_TIMEOUT10  /* 100 ms */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 50f98df..0caa3d2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -189,7 +189,7 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc 
*crtc,
goto cleanup;
}
 
-   r = amdgpu_bo_pin(new_abo, amdgpu_display_framebuffer_domains(adev), 
);
+   r = amdgpu_bo_pin(new_abo, amdgpu_display_supported_domains(adev), 
);
if (unlikely(r != 0)) {
DRM_ERROR("failed to pin new abo buffer before flip\n");
goto unreserve;
@@ -484,7 +484,7 @@ static const struct drm_framebuffer_funcs amdgpu_fb_funcs = 
{
.create_handle = drm_gem_fb_create_handle,
 };
 
-uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev)
+uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev)
 {
uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 2b11d80..f66e3e3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -23,7 +23,7 @@
 #ifndef __AMDGPU_DISPLAY_H__
 #define __AMDGPU_DISPLAY_H__
 
-uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev);
+uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev);
 struct drm_framebuffer *
 amdgpu_display_user_framebuffer_create(struct drm_device *dev,
   struct drm_file *file_priv,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0b19482..85dcd1c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -132,6 +132,7 @@ int amdgpu_lbpw = -1;
 int amdgpu_compute_multipipe = -1;
 int amdgpu_gpu_recovery = -1; /* auto */
 int amdgpu_emu_mode = 0;
+int amdgpu_sg_display = -1;
 
 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
@@ -290,6 +291,9 @@ module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 
0444);
 MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
 module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);
 
+MODULE_PARM_DESC(sg_display, "Enable scatter gather display, (1 = enable, 0 = 
disable, -1 = auto");
+module_param_named(sg_display, amdgpu_sg_display, int, 0444);
+
 #ifdef CONFIG_DRM_AMDGPU_SI
 
 #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index ff89e84..bc5fd8e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -137,7 +137,7 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
/* need to align pitch with crtc limits */
mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
  fb_ti

Re: [PATCH v2 1/1] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

Hi Christian,

If you have any good proposal, please describe here.
Otherwise kindly avoid saying anything based on your emotion.

Regards,
Sam



On 2018-04-12 04:13 PM, Christian König wrote:
> Am 12.04.2018 um 22:01 schrieb Samuel Li:
>> The 4th proposal :)
>>
>>> In other words add something like the following:
>>>
>>> if (domain & AMDGPU_GEM_DOMAIN_GTT && bo->preferred_domains & 
>>> AMDGPU_GEM_DOMAIN_GTT)
>>>  domain = AMDGPU_GEM_DOMAIN_GTT;
>>>
>>> That should be everything we need here.
>> This is basically against the idea of Marek's change: in Mesa, both GTT/VRAM 
>> are allowed; but now in your kernel change, all buffers uses GTT only(not 
>> limited to display buffer now).
>> To compare, current patch still seems better, since it only circumscribes 
>> display buffer.
> 
> What I suggested here is for pinning preference, that only affects BOs used 
> for scanout and it also only affects them while they are scanned out.
> 
> Please implement as advised or otherwise we need to assign the work to 
> somebody else.
> 
> Thanks,
> Christian.
> 
>>
>> Sam
>>
>>
>> On 2018-04-12 02:47 PM, Christian König wrote:
>>> Patch #1: Avoid the hardware bug!
>>>
>>> E.g. even when we avoid different placements it would be good to have a 
>>> patch which turns off immediate flipping when switching from VRAM to GTT.
>>>
>>> That is as safety net and to document that we need to avoid this condition 
>>> on the hardware.
>>>
>>> Patch #2: Go into amdgpu_bo_pin_restricted() and change the pinning 
>>> preference.
>>>
>>> In other words add something like the following:
>>>
>>> if (domain & AMDGPU_GEM_DOMAIN_GTT && bo->preferred_domains & 
>>> AMDGPU_GEM_DOMAIN_GTT)
>>>  domain = AMDGPU_GEM_DOMAIN_GTT;
>>>
>>> That should be everything we need here.
>>>
>>> Regards,
>>> Christian.
>>>
>>> Am 12.04.2018 um 20:07 schrieb Samuel Li:
>>>> Please clarify, Christian. How would you like it to be implemented?
>>>>
>>>> Sam
>>>>
>>>>
>>>> On 2018-04-12 02:00 PM, Christian König wrote:
>>>>>> 1) Turn off immediate mode when flipping between VRAM/GTT.
>>>>> That must be implemented independently.
>>>>>
>>>>> See working around the hardware bug should be a different patch than 
>>>>> implementing a placement policy.
>>>>>
>>>>>> As per discussion, the 3rd one, which is the current patch, seems the 
>>>>>> best so far.
>>>>> And I can only repeat myself. Alex and I are the maintainers of the 
>>>>> kernel module, so we are the one who decide on how to implement things 
>>>>> here.
>>>>>
>>>>> And we both noted that this approach of overriding user space decisions 
>>>>> is not a good design.
>>>>>
>>>>> The placement policy I suggest by preferring GTT over VRAM on APUs should 
>>>>> be trivial to implement and as far as I can see avoids all negative side 
>>>>> effects.
>>>>>
>>>>> Regards,
>>>>> Christian.
>>>>>
>>>>> Am 12.04.2018 um 19:21 schrieb Samuel Li:
>>>>>>> The point is this kernel change now needs to be reworked and adapted to 
>>>>>>> what Mesa is doing.
>>>>>> Three options have been brought up for kernel,
>>>>>> 1) Turn off immediate mode when flipping between VRAM/GTT.
>>>>>> 2) Check the domain of the current fb and then adjust the new one before 
>>>>>> pinning it.
>>>>>> 3) Use only VRAM or GTT depending on a threshhold.
>>>>>>
>>>>>> As per discussion, the 3rd one, which is the current patch, seems the 
>>>>>> best so far.
>>>>>>
>>>>>> Regards,
>>>>>> Samuel Li
>>>>>>
>>>>>>
>>>>>>
>>>>>> On 2018-04-12 01:03 PM, Christian König wrote:
>>>>>>>> Can you be more specific, Christian? Mesa has this, I don't think it 
>>>>>>>> needs anything else:
>>>>>>> Completely agree, that's what I suggested to implement.
>>>>>>>
>>>>>>> The point is this kernel

Re: [PATCH v2 1/1] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

The 4th proposal :)

> In other words add something like the following:
> 
> if (domain & AMDGPU_GEM_DOMAIN_GTT && bo->preferred_domains & 
> AMDGPU_GEM_DOMAIN_GTT)
> domain = AMDGPU_GEM_DOMAIN_GTT;
> 
> That should be everything we need here.

This is basically against the idea of Marek's change: in Mesa, both GTT/VRAM 
are allowed; but now in your kernel change, all buffers uses GTT only(not 
limited to display buffer now).
To compare, current patch still seems better, since it only circumscribes 
display buffer.

Sam


On 2018-04-12 02:47 PM, Christian König wrote:
> Patch #1: Avoid the hardware bug!
> 
> E.g. even when we avoid different placements it would be good to have a patch 
> which turns off immediate flipping when switching from VRAM to GTT.
> 
> That is as safety net and to document that we need to avoid this condition on 
> the hardware.
> 
> Patch #2: Go into amdgpu_bo_pin_restricted() and change the pinning 
> preference.
> 
> In other words add something like the following:
> 
> if (domain & AMDGPU_GEM_DOMAIN_GTT && bo->preferred_domains & 
> AMDGPU_GEM_DOMAIN_GTT)
>     domain = AMDGPU_GEM_DOMAIN_GTT;
> 
> That should be everything we need here.
> 
> Regards,
> Christian.
> 
> Am 12.04.2018 um 20:07 schrieb Samuel Li:
>> Please clarify, Christian. How would you like it to be implemented?
>>
>> Sam
>>
>>
>> On 2018-04-12 02:00 PM, Christian König wrote:
>>>> 1) Turn off immediate mode when flipping between VRAM/GTT.
>>> That must be implemented independently.
>>>
>>> See working around the hardware bug should be a different patch than 
>>> implementing a placement policy.
>>>
>>>> As per discussion, the 3rd one, which is the current patch, seems the best 
>>>> so far.
>>> And I can only repeat myself. Alex and I are the maintainers of the kernel 
>>> module, so we are the one who decide on how to implement things here.
>>>
>>> And we both noted that this approach of overriding user space decisions is 
>>> not a good design.
>>>
>>> The placement policy I suggest by preferring GTT over VRAM on APUs should 
>>> be trivial to implement and as far as I can see avoids all negative side 
>>> effects.
>>>
>>> Regards,
>>> Christian.
>>>
>>> Am 12.04.2018 um 19:21 schrieb Samuel Li:
>>>>> The point is this kernel change now needs to be reworked and adapted to 
>>>>> what Mesa is doing.
>>>> Three options have been brought up for kernel,
>>>> 1) Turn off immediate mode when flipping between VRAM/GTT.
>>>> 2) Check the domain of the current fb and then adjust the new one before 
>>>> pinning it.
>>>> 3) Use only VRAM or GTT depending on a threshhold.
>>>>
>>>> As per discussion, the 3rd one, which is the current patch, seems the best 
>>>> so far.
>>>>
>>>> Regards,
>>>> Samuel Li
>>>>
>>>>
>>>>
>>>> On 2018-04-12 01:03 PM, Christian König wrote:
>>>>>> Can you be more specific, Christian? Mesa has this, I don't think it 
>>>>>> needs anything else:
>>>>> Completely agree, that's what I suggested to implement.
>>>>>
>>>>> The point is this kernel change now needs to be reworked and adapted to 
>>>>> what Mesa is doing.
>>>>>
>>>>> Regards,
>>>>> Christian.
>>>>>
>>>>> Am 12.04.2018 um 18:40 schrieb Marek Olšák:
>>>>>> Can you be more specific, Christian? Mesa has this, I don't think it 
>>>>>> needs anything else:
>>>>>> https://cgit.freedesktop.org/mesa/mesa/commit/?id=7d2079908d9ef05ec3f35b7078833e57846cab5b
>>>>>>
>>>>>> Marek
>>>>>>
>>>>>> On Wed, Mar 28, 2018 at 3:46 AM, Christian König 
>>>>>> <ckoenig.leichtzumer...@gmail.com 
>>>>>> <mailto:ckoenig.leichtzumer...@gmail.com>> wrote:
>>>>>>
>>>>>>   Am 28.03.2018 um 00:22 schrieb Samuel Li:
>>>>>>
>>>>>>   It's auto by default. For CZ/ST, auto setting enables sg 
>>>>>> display
>>>>>>   when vram size is small; otherwise still uses vram.
>>>>>>   This patch fixed some potential hang issue introduced by change
>>>>>>   "allow framebuffer in

Re: [PATCH v2 1/1] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

Please clarify, Christian. How would you like it to be implemented?

Sam


On 2018-04-12 02:00 PM, Christian König wrote:
>> 1) Turn off immediate mode when flipping between VRAM/GTT.
> That must be implemented independently.
> 
> See working around the hardware bug should be a different patch than 
> implementing a placement policy.
> 
>> As per discussion, the 3rd one, which is the current patch, seems the best 
>> so far.
> And I can only repeat myself. Alex and I are the maintainers of the kernel 
> module, so we are the one who decide on how to implement things here.
> 
> And we both noted that this approach of overriding user space decisions is 
> not a good design.
> 
> The placement policy I suggest by preferring GTT over VRAM on APUs should be 
> trivial to implement and as far as I can see avoids all negative side effects.
> 
> Regards,
> Christian.
> 
> Am 12.04.2018 um 19:21 schrieb Samuel Li:
>>> The point is this kernel change now needs to be reworked and adapted to 
>>> what Mesa is doing.
>> Three options have been brought up for kernel,
>> 1) Turn off immediate mode when flipping between VRAM/GTT.
>> 2) Check the domain of the current fb and then adjust the new one before 
>> pinning it.
>> 3) Use only VRAM or GTT depending on a threshhold.
>>
>> As per discussion, the 3rd one, which is the current patch, seems the best 
>> so far.
>>
>> Regards,
>> Samuel Li
>>
>>
>>
>> On 2018-04-12 01:03 PM, Christian König wrote:
>>>> Can you be more specific, Christian? Mesa has this, I don't think it needs 
>>>> anything else:
>>> Completely agree, that's what I suggested to implement.
>>>
>>> The point is this kernel change now needs to be reworked and adapted to 
>>> what Mesa is doing.
>>>
>>> Regards,
>>> Christian.
>>>
>>> Am 12.04.2018 um 18:40 schrieb Marek Olšák:
>>>> Can you be more specific, Christian? Mesa has this, I don't think it needs 
>>>> anything else:
>>>> https://cgit.freedesktop.org/mesa/mesa/commit/?id=7d2079908d9ef05ec3f35b7078833e57846cab5b
>>>>
>>>> Marek
>>>>
>>>> On Wed, Mar 28, 2018 at 3:46 AM, Christian König 
>>>> <ckoenig.leichtzumer...@gmail.com 
>>>> <mailto:ckoenig.leichtzumer...@gmail.com>> wrote:
>>>>
>>>>  Am 28.03.2018 um 00:22 schrieb Samuel Li:
>>>>
>>>>  It's auto by default. For CZ/ST, auto setting enables sg display
>>>>  when vram size is small; otherwise still uses vram.
>>>>  This patch fixed some potential hang issue introduced by change
>>>>  "allow framebuffer in GART memory as well" due to CZ/ST hardware
>>>>  limitation.
>>>>
>>>>
>>>>  Well that is still a NAK.
>>>>
>>>>  As discussed now multiple times please implement the necessary
>>>>  changes in Mesa.
>>>>
>>>>  Regards,
>>>>  Christian.
>>>>
>>>>
>>>>
>>>>  v2: Change default setting to auto, also some misc changes.
>>>>  Signed-off-by: Samuel Li <samuel...@amd.com
>>>>  <mailto:samuel...@amd.com>>
>>>>  ---
>>>>    drivers/gpu/drm/amd/amdgpu/amdgpu.h    |  1 +
>>>>    drivers/gpu/drm/amd/amdgpu/amdgpu_display.c    | 10 --
>>>>    drivers/gpu/drm/amd/amdgpu/amdgpu_display.h    |  2 ++
>>>>    drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c    |  4 
>>>>    drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c   |  2 ++
>>>>    drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  3 ++-
>>>>    6 files changed, 19 insertions(+), 3 deletions(-)
>>>>
>>>>  diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>>>  b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>>>  index a7e2229..c942362 100644
>>>>  --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>>>  +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>>>  @@ -129,6 +129,7 @@ extern int amdgpu_lbpw;
>>>>    extern int amdgpu_compute_multipipe;
>>>>    extern int amdgpu_gpu_recovery;
>>>>    extern int amdgpu_emu_mode;
>>>>  +extern int amdgpu_sg_display;
>>>>      #ifdef CONFIG_DRM_AMDGPU_SI
>>>

Re: [PATCH v2 1/1] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

> The point is this kernel change now needs to be reworked and adapted to what 
> Mesa is doing.
Three options have been brought up for kernel,
1) Turn off immediate mode when flipping between VRAM/GTT.
2) Check the domain of the current fb and then adjust the new one before 
pinning it.
3) Use only VRAM or GTT depending on a threshhold.

As per discussion, the 3rd one, which is the current patch, seems the best so 
far.

Regards,
Samuel Li



On 2018-04-12 01:03 PM, Christian König wrote:
>> Can you be more specific, Christian? Mesa has this, I don't think it needs 
>> anything else:
> Completely agree, that's what I suggested to implement.
> 
> The point is this kernel change now needs to be reworked and adapted to what 
> Mesa is doing.
> 
> Regards,
> Christian.
> 
> Am 12.04.2018 um 18:40 schrieb Marek Olšák:
>> Can you be more specific, Christian? Mesa has this, I don't think it needs 
>> anything else:
>> https://cgit.freedesktop.org/mesa/mesa/commit/?id=7d2079908d9ef05ec3f35b7078833e57846cab5b
>>
>> Marek
>>
>> On Wed, Mar 28, 2018 at 3:46 AM, Christian König 
>> <ckoenig.leichtzumer...@gmail.com <mailto:ckoenig.leichtzumer...@gmail.com>> 
>> wrote:
>>
>>     Am 28.03.2018 um 00:22 schrieb Samuel Li:
>>
>>     It's auto by default. For CZ/ST, auto setting enables sg display
>>     when vram size is small; otherwise still uses vram.
>>     This patch fixed some potential hang issue introduced by change
>>     "allow framebuffer in GART memory as well" due to CZ/ST hardware
>>     limitation.
>>
>>
>>     Well that is still a NAK.
>>
>>     As discussed now multiple times please implement the necessary
>>     changes in Mesa.
>>
>>     Regards,
>>     Christian.
>>
>>
>>
>>     v2: Change default setting to auto, also some misc changes.
>>     Signed-off-by: Samuel Li <samuel...@amd.com
>>     <mailto:samuel...@amd.com>>
>>     ---
>>       drivers/gpu/drm/amd/amdgpu/amdgpu.h    |  1 +
>>       drivers/gpu/drm/amd/amdgpu/amdgpu_display.c    | 10 --
>>       drivers/gpu/drm/amd/amdgpu/amdgpu_display.h    |  2 ++
>>       drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c    |  4 
>>       drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c   |  2 ++
>>       drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  3 ++-
>>       6 files changed, 19 insertions(+), 3 deletions(-)
>>
>>     diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>     b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>     index a7e2229..c942362 100644
>>     --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>     +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>     @@ -129,6 +129,7 @@ extern int amdgpu_lbpw;
>>       extern int amdgpu_compute_multipipe;
>>       extern int amdgpu_gpu_recovery;
>>       extern int amdgpu_emu_mode;
>>     +extern int amdgpu_sg_display;
>>         #ifdef CONFIG_DRM_AMDGPU_SI
>>       extern int amdgpu_si_support;
>>     diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>>     b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>>     index 5495b29..1e7b950 100644
>>     --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>>     +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>>     @@ -513,8 +513,14 @@ uint32_t
>>     amdgpu_display_framebuffer_domains(struct amdgpu_device *adev)
>>       #if defined(CONFIG_DRM_AMD_DC)
>>             if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type
>>     < CHIP_RAVEN &&
>>                 adev->flags & AMD_IS_APU &&
>>     -           amdgpu_device_asic_has_dc_support(adev->asic_type))
>>     -               domain |= AMDGPU_GEM_DOMAIN_GTT;
>>     +           amdgpu_device_asic_has_dc_support(adev->asic_type)) {
>>     +               if (amdgpu_sg_display == 1)
>>     +                       domain = AMDGPU_GEM_DOMAIN_GTT;
>>     +               else if (amdgpu_sg_display == -1) {
>>     +                       if (adev->gmc.real_vram_size <
>>     AMDGPU_SG_THRESHOLD)
>>     +                               domain = AMDGPU_GEM_DOMAIN_GTT;
>>     +               }
>>     +       }
>>       #endif
>>             return domain;
>>     diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
>>     b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
>>     index 2b11d80..2b25393

[PATCH v2 1/1] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

It's auto by default. For CZ/ST, auto setting enables sg display
when vram size is small; otherwise still uses vram.
This patch fixed some potential hang issue introduced by change
"allow framebuffer in GART memory as well" due to CZ/ST hardware
limitation.

v2: Change default setting to auto, also some misc changes.
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 10 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  4 
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c|  2 ++
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  3 ++-
 6 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a7e2229..c942362 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -129,6 +129,7 @@ extern int amdgpu_lbpw;
 extern int amdgpu_compute_multipipe;
 extern int amdgpu_gpu_recovery;
 extern int amdgpu_emu_mode;
+extern int amdgpu_sg_display;
 
 #ifdef CONFIG_DRM_AMDGPU_SI
 extern int amdgpu_si_support;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 5495b29..1e7b950 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -513,8 +513,14 @@ uint32_t amdgpu_display_framebuffer_domains(struct 
amdgpu_device *adev)
 #if defined(CONFIG_DRM_AMD_DC)
if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN &&
adev->flags & AMD_IS_APU &&
-   amdgpu_device_asic_has_dc_support(adev->asic_type))
-   domain |= AMDGPU_GEM_DOMAIN_GTT;
+   amdgpu_device_asic_has_dc_support(adev->asic_type)) {
+   if (amdgpu_sg_display == 1)
+   domain = AMDGPU_GEM_DOMAIN_GTT;
+   else if (amdgpu_sg_display == -1) {
+   if (adev->gmc.real_vram_size < AMDGPU_SG_THRESHOLD)
+   domain = AMDGPU_GEM_DOMAIN_GTT;
+   }
+   }
 #endif
 
return domain;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 2b11d80..2b25393 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -23,6 +23,8 @@
 #ifndef __AMDGPU_DISPLAY_H__
 #define __AMDGPU_DISPLAY_H__
 
+#define AMDGPU_SG_THRESHOLD  (256*1024*1024)
+
 uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev);
 struct drm_framebuffer *
 amdgpu_display_user_framebuffer_create(struct drm_device *dev,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 1bfce79..19f11a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -132,6 +132,7 @@ int amdgpu_lbpw = -1;
 int amdgpu_compute_multipipe = -1;
 int amdgpu_gpu_recovery = -1; /* auto */
 int amdgpu_emu_mode = 0;
+int amdgpu_sg_display = -1;
 
 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
@@ -290,6 +291,9 @@ module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 
0444);
 MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
 module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);
 
+MODULE_PARM_DESC(sg_display, "Enable scatter gather display, (1 = enable, 0 = 
disable, -1 = auto");
+module_param_named(sg_display, amdgpu_sg_display, int, 0444);
+
 #ifdef CONFIG_DRM_AMDGPU_SI
 
 #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 1206301..f57c355 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -138,6 +138,8 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
  fb_tiled);
domain = amdgpu_display_framebuffer_domains(adev);
+   if (domain & AMDGPU_GEM_DOMAIN_GTT)
+   DRM_DEBUG_DRIVER("Scatter gather display: enabled\n");
 
height = ALIGN(mode_cmd->height, 8);
size = mode_cmd->pitches[0] * height;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 68ab325..7e9f247 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3074,7 +3074,8 @@ static int dm_plane_helper_prepare_fb(struct drm_plane 
*plane,
domain = AMD

[PATCH 1/1] drm: add parameter explanation for some gem dmabuf_ops

[Samuel Li]

To reduce some warnings.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/drm_prime.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 7856a9b..caf675e 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -331,6 +331,9 @@ EXPORT_SYMBOL(drm_gem_map_dma_buf);
 
 /**
  * drm_gem_unmap_dma_buf - unmap_dma_buf implementation for GEM
+ * @attach: attachment to unmap buffer from
+ * @sgt: scatterlist info of the buffer to unmap
+ * @dir: direction of DMA transfer
  *
  * Not implemented. The unmap is done at drm_gem_map_detach().  This can be
  * used as the _buf_ops.unmap_dma_buf callback.
@@ -429,6 +432,8 @@ EXPORT_SYMBOL(drm_gem_dmabuf_vunmap);
 
 /**
  * drm_gem_dmabuf_kmap_atomic - map_atomic implementation for GEM
+ * @dma_buf: buffer to be mapped
+ * @page_num: page number within the buffer
  *
  * Not implemented. This can be used as the _buf_ops.map_atomic callback.
  */
@@ -441,6 +446,9 @@ EXPORT_SYMBOL(drm_gem_dmabuf_kmap_atomic);
 
 /**
  * drm_gem_dmabuf_kunmap_atomic - unmap_atomic implementation for GEM
+ * @dma_buf: buffer to be unmapped
+ * @page_num: page number within the buffer
+ * @addr: virtual address of the buffer
  *
  * Not implemented. This can be used as the _buf_ops.unmap_atomic callback.
  */
@@ -453,6 +461,8 @@ EXPORT_SYMBOL(drm_gem_dmabuf_kunmap_atomic);
 
 /**
  * drm_gem_dmabuf_kmap - map implementation for GEM
+ * @dma_buf: buffer to be mapped
+ * @page_num: page number within the buffer
  *
  * Not implemented. This can be used as the _buf_ops.map callback.
  */
@@ -464,6 +474,9 @@ EXPORT_SYMBOL(drm_gem_dmabuf_kmap);
 
 /**
  * drm_gem_dmabuf_kunmap - unmap implementation for GEM
+ * @dma_buf: buffer to be unmapped
+ * @page_num: page number within the buffer
+ * @addr: virtual address of the buffer
  *
  * Not implemented. This can be used as the _buf_ops.unmap callback.
  */
-- 
2.7.4

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Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

> You might also want to prefer VRAM, but also allow buffers to fall back to 
> GTT if
> necessary.
For display buffer, this case seems not really attractive. When display buffer 
changes between GTT and VRAM dynamically, our driver needs to adpat too, which 
is hard to see the benefits and not really worth the effort.

Sam



On 2018-03-07 01:27 PM, Alex Deucher wrote:
> On Wed, Mar 7, 2018 at 1:18 PM, Samuel Li <samuel...@amd.com> wrote:
>> I think it's not useful though. Think about that, SG display feature is 
>> intended to use as less VRAM as possible. Will someone want a display buffer 
>> sometimes VRAM, sometimes GTT?
>> Hardly a case to me, and I think it's a waste of effort. That also might 
>> explain no driver does that now.
> 
> You might want different strategies depending on how much VRAM you
> have.  If you have a bunch and it performs better, prefer it.  If you
> have limited VRAM, you might want to prefer GTT.  You might also want
> to prefer VRAM, but also allow buffers to fall back to GTT if
> necessary.  This would make the logic dynamic and all in one place.
> The kernel can advertise what asics support scanout from system ram
> and then UMDs can just query that to choose placements rather than
> adding hardcoded logic for specific asics.
> 
> Alex
> 
>>
>> Sam
>>
>>
>>
>> On 2018-03-07 12:50 PM, Michel Dänzer wrote:
>>> On 2018-03-07 06:38 PM, Alex Deucher wrote:
>>>> On Wed, Mar 7, 2018 at 12:29 PM, Samuel Li <samuel...@amd.com> wrote:
>>>>>
>>>>> Why so complicated? If old user space compatibility is required, just use 
>>>>> sg_display=0.
>>>>
>>>> It will always just work in that case and we can adjust for the
>>>> optimal scenario by default in all cases without requiring the user to
>>>> set misc parameters to tune their setup that may break in the future
>>>> or hide bugs because a user sets it and forgets it.
>>>
>>> Right. I don't agree it's all that complicated anyway, we do this sort
>>> of thing all the time, it also makes our lives easier down the road.
>>>
>>>
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Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

I think it's not useful though. Think about that, SG display feature is 
intended to use as less VRAM as possible. Will someone want a display buffer 
sometimes VRAM, sometimes GTT?
Hardly a case to me, and I think it's a waste of effort. That also might 
explain no driver does that now.

Sam



On 2018-03-07 12:50 PM, Michel Dänzer wrote:
> On 2018-03-07 06:38 PM, Alex Deucher wrote:
>> On Wed, Mar 7, 2018 at 12:29 PM, Samuel Li <samuel...@amd.com> wrote:
>>>
>>> Why so complicated? If old user space compatibility is required, just use 
>>> sg_display=0.
>>
>> It will always just work in that case and we can adjust for the
>> optimal scenario by default in all cases without requiring the user to
>> set misc parameters to tune their setup that may break in the future
>> or hide bugs because a user sets it and forgets it.
> 
> Right. I don't agree it's all that complicated anyway, we do this sort
> of thing all the time, it also makes our lives easier down the road.
> 
> 
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Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

Why so complicated? If old user space compatibility is required, just use 
sg_display=0.

Sam


On 2018-03-07 05:12 AM, Michel Dänzer wrote:
> On 2018-03-07 11:04 AM, Christian König wrote:
>> Am 07.03.2018 um 10:53 schrieb Michel Dänzer:
>>> On 2018-03-07 10:47 AM, Christian König wrote:
 See when I tested this the DDX and Mesa where unmodified, so both still
 assumed VRAM as placement for scanout BOs, but the kernel forced scanout
 BOs into GTT for testing.

 So what happened was that on scanout we moved the VRAM BO to GTT and
 after unpinning it on the first command submission which used the BO we
 moved it back to VRAM again.

 So as long as we don't want a severe performance penalty when you
 combine old userspace with new kernel using a kernel parameter to force
 scanout from GTT is not possible.
>>> That means we either need to come up with a different workaround for
>>> hardware issues transitioning between scanout from VRAM and GTT, or we
>>> can't scan out from GTT in that case.
>>
>> What exactly was the problem with the transition from VRAM to GTT?
>>
>> I mean what we can rather easily do is check where the existing BO is
>> pinned and then always pin into the same domain on page flip.
> 
> Yeah, something like that could work. In which case, all that's needed
> is a way for userspace to know that GTT scanout can work, right? With
> that information, it can manage the domains of scanout BOs as it wants.
> 
> 
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Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

>>   domain = amdgpu_display_framebuffer_domains(adev);
>> +if (domain == AMDGPU_GEM_DOMAIN_GTT) {
>> +DRM_INFO("Scatter gather display: enabled\n");
>> +} else if (domain & AMDGPU_GEM_DOMAIN_GTT) {
>> +DRM_INFO("Scatter gather display: auto\n");
>> +}
> 
> Dito and printing that here is not a good idea as far as I can see.
> 
> Christian.


The intention here is to print out when fb is created. You have other 
suggestions?

Sam


On 2018-03-03 08:41 AM, Christian König wrote:
> Am 03.03.2018 um 00:25 schrieb Samuel Li:
>> It's enabled by default. -1 is auto, to allow both vram and gtt
>> memory be available, for testing purpose only.
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 9 +++--
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c  | 5 +
>>   4 files changed, 17 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> index 292c7e7..6b0ee34 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> @@ -129,6 +129,7 @@ extern int amdgpu_lbpw;
>>   extern int amdgpu_compute_multipipe;
>>   extern int amdgpu_gpu_recovery;
>>   extern int amdgpu_emu_mode;
>> +extern int amdgpu_sg_display;
>>     #ifdef CONFIG_DRM_AMDGPU_SI
>>   extern int amdgpu_si_support;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>> index 5495b29..dfa11b1 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>> @@ -513,8 +513,13 @@ uint32_t amdgpu_display_framebuffer_domains(struct 
>> amdgpu_device *adev)
>>   #if defined(CONFIG_DRM_AMD_DC)
>>   if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN &&
>>   adev->flags & AMD_IS_APU &&
>> -    amdgpu_device_asic_has_dc_support(adev->asic_type))
>> -    domain |= AMDGPU_GEM_DOMAIN_GTT;
>> +    amdgpu_device_asic_has_dc_support(adev->asic_type)) {
>> +    if (amdgpu_sg_display == 1) {
>> +    domain = AMDGPU_GEM_DOMAIN_GTT;
>> +    } else if (amdgpu_sg_display == -1) {
>> +    domain |= AMDGPU_GEM_DOMAIN_GTT;
>> +    }
> 
> Coding style, that if shouldn't use "{" and "}".
> 
>> +    }
>>   #endif
>>     return domain;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> index e670936..f0ada24 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> @@ -132,6 +132,7 @@ int amdgpu_lbpw = -1;
>>   int amdgpu_compute_multipipe = -1;
>>   int amdgpu_gpu_recovery = -1; /* auto */
>>   int amdgpu_emu_mode = 0;
>> +int amdgpu_sg_display = 1;
>>     MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
>>   module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
>> @@ -290,6 +291,9 @@ module_param_named(gpu_recovery, amdgpu_gpu_recovery, 
>> int, 0444);
>>   MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
>>   module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);
>>   +MODULE_PARM_DESC(sg_display, "Enable scatter gather display, (1 = enable, 
>> 0 = disable, -1 = auto");
>> +module_param_named(sg_display, amdgpu_sg_display, int, 0444);
>> +
>>   #ifdef CONFIG_DRM_AMDGPU_SI
>>     #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
>> index 1206301..10f1f4f 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
>> @@ -138,6 +138,11 @@ static int amdgpufb_create_pinned_object(struct 
>> amdgpu_fbdev *rfbdev,
>>   mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
>>     fb_tiled);
>>   domain = amdgpu_display_framebuffer_domains(adev);
>> +    if (domain == AMDGPU_GEM_DOMAIN_GTT) {
>> +    DRM_INFO("Scatter gather display: enabled\n");
>> +    } else if (domain & AMDGPU_GEM_DOMAIN_GTT) {
>> +    DRM_INFO("Scatter gather display: auto\n");
>> +    }
> 
> Dito and printing that here is not a good idea as far as I can see.
> 
> Christian.
> 
>>     height = ALIGN(mode_cmd->height, 8);
>>   size = mode_cmd->pitches[0] * height;
> 
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Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

There are three major options when SG capability is enabled,
1) Allocate everything when possible from GTT memory
2) Allocate everything when possible from VRAM
3) Allow both VRAM/GTT to be available
Each has its own pros/cons, and it has not been decided which direction is 
going to be used for all PCs. So it seems beneficial to provide all the options.

Sam

On 2018-03-05 05:17 AM, Michel Dänzer wrote:
> On 2018-03-03 12:25 AM, Samuel Li wrote:
>> It's enabled by default. -1 is auto, to allow both vram and gtt
>> memory be available, for testing purpose only.
> 
> Do we really need a module parameter for this? There's already too many
> of them. The driver should know which to use in which cases, and
> developers can easily tweak the code. Users should never need to change
> this.
> 
> 
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Re: [PATCH 2/2] drm/amdgpu: Expose scatter gather display to user space.

[Samuel Li]

>> +if (amdgpu_display_framebuffer_domains(adev) == 
>> AMDGPU_GEM_DOMAIN_GTT)
> 
> This check should probably be & instead of ==.

Thought about that as well. For mixed VRAM/GTT display case, since it has some 
complications, I prefer to do it later.

Sam


On 2018-03-03 08:42 AM, Christian König wrote:
> Am 03.03.2018 um 00:26 schrieb Samuel Li:
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
>>   include/uapi/drm/amdgpu_drm.h   | 1 +
>>   2 files changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> index 51a4b08..2cb344f 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> @@ -31,6 +31,7 @@
>>   #include "amdgpu_sched.h"
>>   #include "amdgpu_uvd.h"
>>   #include "amdgpu_vce.h"
>> +#include "amdgpu_display.h"
>>     #include 
>>   #include 
>> @@ -578,6 +579,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, 
>> void *data, struct drm_file
>>   dev_info.ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
>>   if (amdgpu_sriov_vf(adev))
>>   dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
>> +    if (amdgpu_display_framebuffer_domains(adev) == 
>> AMDGPU_GEM_DOMAIN_GTT)
> 
> This check should probably be & instead of ==.
> 
> Christian.
> 
>> +    dev_info.ids_flags |= AMDGPU_IDS_FLAGS_SGDISPLAY;
>>     vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
>>   vm_size -= AMDGPU_VA_RESERVED_SIZE;
>> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
>> index fe17b67..2f30b98 100644
>> --- a/include/uapi/drm/amdgpu_drm.h
>> +++ b/include/uapi/drm/amdgpu_drm.h
>> @@ -584,6 +584,7 @@ struct drm_amdgpu_cs_chunk_data {
>>    */
>>   #define AMDGPU_IDS_FLAGS_FUSION 0x1
>>   #define AMDGPU_IDS_FLAGS_PREEMPTION 0x2
>> +#define AMDGPU_IDS_FLAGS_SGDISPLAY  0x4
>>     /* indicate if acceleration can be working */
>>   #define AMDGPU_INFO_ACCEL_WORKING    0x00
> 
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[PATCH 1/1] amdgpu: add scatter gather display flag

[Samuel Li]

---
 include/drm/amdgpu_drm.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index d9aa4a3..dc4d8bd 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -526,6 +526,7 @@ struct drm_amdgpu_cs_chunk_data {
  */
 #define AMDGPU_IDS_FLAGS_FUSION 0x1
 #define AMDGPU_IDS_FLAGS_PREEMPTION 0x2
+#define AMDGPU_IDS_FLAGS_SGDISPLAY  0x4
 
 /* indicate if acceleration can be working */
 #define AMDGPU_INFO_ACCEL_WORKING  0x00
-- 
2.7.4

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[PATCH 2/2] drm/amdgpu: Expose scatter gather display to user space.

[Samuel Li]

---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
 include/uapi/drm/amdgpu_drm.h   | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 51a4b08..2cb344f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -31,6 +31,7 @@
 #include "amdgpu_sched.h"
 #include "amdgpu_uvd.h"
 #include "amdgpu_vce.h"
+#include "amdgpu_display.h"
 
 #include 
 #include 
@@ -578,6 +579,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void 
*data, struct drm_file
dev_info.ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
if (amdgpu_sriov_vf(adev))
dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
+   if (amdgpu_display_framebuffer_domains(adev) == 
AMDGPU_GEM_DOMAIN_GTT)
+   dev_info.ids_flags |= AMDGPU_IDS_FLAGS_SGDISPLAY;
 
vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
vm_size -= AMDGPU_VA_RESERVED_SIZE;
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index fe17b67..2f30b98 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -584,6 +584,7 @@ struct drm_amdgpu_cs_chunk_data {
  */
 #define AMDGPU_IDS_FLAGS_FUSION 0x1
 #define AMDGPU_IDS_FLAGS_PREEMPTION 0x2
+#define AMDGPU_IDS_FLAGS_SGDISPLAY  0x4
 
 /* indicate if acceleration can be working */
 #define AMDGPU_INFO_ACCEL_WORKING  0x00
-- 
2.7.4

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[PATCH 1/2] drm/amdgpu: Enable scatter gather display support

[Samuel Li]

It's enabled by default. -1 is auto, to allow both vram and gtt
memory be available, for testing purpose only.
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 9 +++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c  | 5 +
 4 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 292c7e7..6b0ee34 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -129,6 +129,7 @@ extern int amdgpu_lbpw;
 extern int amdgpu_compute_multipipe;
 extern int amdgpu_gpu_recovery;
 extern int amdgpu_emu_mode;
+extern int amdgpu_sg_display;
 
 #ifdef CONFIG_DRM_AMDGPU_SI
 extern int amdgpu_si_support;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 5495b29..dfa11b1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -513,8 +513,13 @@ uint32_t amdgpu_display_framebuffer_domains(struct 
amdgpu_device *adev)
 #if defined(CONFIG_DRM_AMD_DC)
if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN &&
adev->flags & AMD_IS_APU &&
-   amdgpu_device_asic_has_dc_support(adev->asic_type))
-   domain |= AMDGPU_GEM_DOMAIN_GTT;
+   amdgpu_device_asic_has_dc_support(adev->asic_type)) {
+   if (amdgpu_sg_display == 1) {
+   domain = AMDGPU_GEM_DOMAIN_GTT;
+   } else if (amdgpu_sg_display == -1) {
+   domain |= AMDGPU_GEM_DOMAIN_GTT;
+   }
+   }
 #endif
 
return domain;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index e670936..f0ada24 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -132,6 +132,7 @@ int amdgpu_lbpw = -1;
 int amdgpu_compute_multipipe = -1;
 int amdgpu_gpu_recovery = -1; /* auto */
 int amdgpu_emu_mode = 0;
+int amdgpu_sg_display = 1;
 
 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
@@ -290,6 +291,9 @@ module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 
0444);
 MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
 module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);
 
+MODULE_PARM_DESC(sg_display, "Enable scatter gather display, (1 = enable, 0 = 
disable, -1 = auto");
+module_param_named(sg_display, amdgpu_sg_display, int, 0444);
+
 #ifdef CONFIG_DRM_AMDGPU_SI
 
 #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 1206301..10f1f4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -138,6 +138,11 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
  fb_tiled);
domain = amdgpu_display_framebuffer_domains(adev);
+   if (domain == AMDGPU_GEM_DOMAIN_GTT) {
+   DRM_INFO("Scatter gather display: enabled\n");
+   } else if (domain & AMDGPU_GEM_DOMAIN_GTT) {
+   DRM_INFO("Scatter gather display: auto\n");
+   }
 
height = ALIGN(mode_cmd->height, 8);
size = mode_cmd->pitches[0] * height;
-- 
2.7.4

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[PATCH 12/13] drm/amdgpu: rename amdgpu_crtc_idx_to_irq_type

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 5 +++--
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 6 --
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 6 --
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 6 --
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c  | 3 ++-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
 9 files changed, 22 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index d650e23..4a2f4f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -889,7 +889,7 @@ int amdgpu_display_get_crtc_scanoutpos(struct drm_device 
*dev,
return ret;
 }
 
-int amdgpu_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc)
+int amdgpu_display_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc)
 {
if (crtc < 0 || crtc >= adev->mode_info.num_crtc)
return AMDGPU_CRTC_IRQ_NONE;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 29fbcb7..c7eaf93 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -1025,7 +1025,7 @@ u32 amdgpu_get_vblank_counter_kms(struct drm_device *dev, 
unsigned int pipe)
 int amdgpu_enable_vblank_kms(struct drm_device *dev, unsigned int pipe)
 {
struct amdgpu_device *adev = dev->dev_private;
-   int idx = amdgpu_crtc_idx_to_irq_type(adev, pipe);
+   int idx = amdgpu_display_crtc_idx_to_irq_type(adev, pipe);
 
return amdgpu_irq_get(adev, >crtc_irq, idx);
 }
@@ -1041,7 +1041,7 @@ int amdgpu_enable_vblank_kms(struct drm_device *dev, 
unsigned int pipe)
 void amdgpu_disable_vblank_kms(struct drm_device *dev, unsigned int pipe)
 {
struct amdgpu_device *adev = dev->dev_private;
-   int idx = amdgpu_crtc_idx_to_irq_type(adev, pipe);
+   int idx = amdgpu_display_crtc_idx_to_irq_type(adev, pipe);
 
amdgpu_irq_put(adev, >crtc_irq, idx);
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 6e348fa..7e6ab48 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -655,7 +655,7 @@ bool amdgpu_display_crtc_scaling_mode_fixup(struct drm_crtc 
*crtc,
struct drm_display_mode *adjusted_mode);
 void amdgpu_panel_mode_fixup(struct drm_encoder *encoder,
 struct drm_display_mode *adjusted_mode);
-int amdgpu_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc);
+int amdgpu_display_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc);
 
 /* fbdev layer */
 int amdgpu_fbdev_init(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 865e8ca..c7d1ef0 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2537,7 +2537,8 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, 
int mode)
amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
dce_v10_0_vga_enable(crtc, false);
/* Make sure VBLANK and PFLIP interrupts are still enabled */
-   type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
+   type = amdgpu_display_crtc_idx_to_irq_type(adev,
+   amdgpu_crtc->crtc_id);
amdgpu_irq_update(adev, >crtc_irq, type);
amdgpu_irq_update(adev, >pageflip_irq, type);
drm_crtc_vblank_on(crtc);
@@ -3249,7 +3250,7 @@ static int dce_v10_0_crtc_irq(struct amdgpu_device *adev,
 {
unsigned crtc = entry->src_id - 1;
uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg);
-   unsigned irq_type = amdgpu_crtc_idx_to_irq_type(adev, crtc);
+   unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, crtc);
 
switch (entry->src_data[0]) {
case 0: /* vblank */
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index fe88728..99bc1f36 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2612,7 +2612,8 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, 
int mode)
amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);
dce_v11_0_vga_enable(crtc, false);
/* Make sure VBLANK and PFLIP interrupts are still enabled */
-   type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id);
+  

[PATCH 13/13] drm/amdgpu: rename amdgpu_freesync_ioctl

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f02b7f8..716fd13 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1256,8 +1256,8 @@ int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, 
void *data,
 int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp);
 
-int amdgpu_freesync_ioctl(struct drm_device *dev, void *data,
-   struct drm_file *filp);
+int amdgpu_display_freesync_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *filp);
 
 /* VRAM scratch page for HDP bug, default vram page */
 struct amdgpu_vram_scratch {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 4a2f4f0..5495b29 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -912,8 +912,8 @@ int amdgpu_display_crtc_idx_to_irq_type(struct 
amdgpu_device *adev, int crtc)
}
 }
 
-int amdgpu_freesync_ioctl(struct drm_device *dev, void *data,
-   struct drm_file *filp)
+int amdgpu_display_freesync_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *filp)
 {
int ret = -EPERM;
struct amdgpu_device *adev = dev->dev_private;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index c7eaf93..9a96064 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -1064,7 +1064,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_VA, amdgpu_gem_va_ioctl, 
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl, 
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl, 
DRM_AUTH|DRM_RENDER_ALLOW),
-   DRM_IOCTL_DEF_DRV(AMDGPU_FREESYNC, amdgpu_freesync_ioctl, DRM_MASTER)
+   DRM_IOCTL_DEF_DRV(AMDGPU_FREESYNC, amdgpu_display_freesync_ioctl, 
DRM_MASTER)
 };
 const int amdgpu_max_kms_ioctl = ARRAY_SIZE(amdgpu_ioctls_kms);
 
-- 
2.7.4

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[PATCH 11/13] drm/amdgpu: rename amdgpu_get_crtc_scanoutpos

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 14 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c   |  8 
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h  | 10 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 +++---
 drivers/gpu/drm/amd/display/dc/dc_stream.h|  2 +-
 6 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 3654157..d650e23 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -90,9 +90,9 @@ static void amdgpu_display_flip_work_func(struct work_struct 
*__work)
 * targeted by the flip
 */
if (amdgpu_crtc->enabled &&
-   (amdgpu_get_crtc_scanoutpos(adev->ddev, work->crtc_id, 0,
-   , , NULL, NULL,
-   >hwmode)
+   (amdgpu_display_get_crtc_scanoutpos(adev->ddev, work->crtc_id, 0,
+   , , NULL, NULL,
+   >hwmode)
 & (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK)) ==
(DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK) &&
(int)(work->target_vblank -
@@ -794,10 +794,10 @@ bool amdgpu_display_crtc_scaling_mode_fixup(struct 
drm_crtc *crtc,
  * unknown small number of scanlines wrt. real scanout position.
  *
  */
-int amdgpu_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe,
-  unsigned int flags, int *vpos, int *hpos,
-  ktime_t *stime, ktime_t *etime,
-  const struct drm_display_mode *mode)
+int amdgpu_display_get_crtc_scanoutpos(struct drm_device *dev,
+   unsigned int pipe, unsigned int flags, int *vpos,
+   int *hpos, ktime_t *stime, ktime_t *etime,
+   const struct drm_display_mode *mode)
 {
u32 vbl = 0, position = 0;
int vbl_start, vbl_end, vtotal, ret = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 24bc3e9..b10ffb2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -837,8 +837,8 @@ amdgpu_get_crtc_scanout_position(struct drm_device *dev, 
unsigned int pipe,
 ktime_t *stime, ktime_t *etime,
 const struct drm_display_mode *mode)
 {
-   return amdgpu_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos,
- stime, etime, mode);
+   return amdgpu_display_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos,
+ stime, etime, mode);
 }
 
 static struct drm_driver kms_driver = {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 219b8a9..29fbcb7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -980,11 +980,11 @@ u32 amdgpu_get_vblank_counter_kms(struct drm_device *dev, 
unsigned int pipe)
 */
do {
count = amdgpu_display_vblank_get_counter(adev, pipe);
-   /* Ask amdgpu_get_crtc_scanoutpos to return vpos as
-* distance to start of vblank, instead of regular
-* vertical scanout pos.
+   /* Ask amdgpu_display_get_crtc_scanoutpos to return
+* vpos as distance to start of vblank, instead of
+* regular vertical scanout pos.
 */
-   stat = amdgpu_get_crtc_scanoutpos(
+   stat = amdgpu_display_get_crtc_scanoutpos(
dev, pipe, GET_DISTANCE_TO_VBLANKSTART,
, , NULL, NULL,
>mode_info.crtcs[pipe]->base.hwmode);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 650..6e348fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -612,7 +612,7 @@ struct amdgpu_mst_connector {
 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
((em) == ATOM_ENCODER_MODE_DP_MST))
 
-/* Driver internal use only flags of amdgpu_get_crtc_scanoutpos() */
+/* Driver internal use only flags of amdgpu_display_get_crtc_scanoutpos() */
 #define DRM_SCANOUTPOS_VALID(1 << 0)
 #define DRM_SCANOUTPOS_IN_VBLANK(1 << 1)
 #define DRM_SCANOUTPOS_ACCUR

[PATCH 04/13] drm/amdgpu: rename amdgpu_print_display_setup

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h| 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c   | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 4f9c880..cb01c5c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -355,7 +355,7 @@ static const char *hpd_names[6] = {
"HPD6",
 };
 
-void amdgpu_print_display_setup(struct drm_device *dev)
+void amdgpu_display_print_display_setup(struct drm_device *dev)
 {
struct drm_connector *connector;
struct amdgpu_connector *amdgpu_connector;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 83205a0..fa5dda0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -666,7 +666,7 @@ bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, 
struct amdgpu_bo *robj)
 int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool 
tiled);
 
 /* amdgpu_display.c */
-void amdgpu_print_display_setup(struct drm_device *dev);
+void amdgpu_display_print_display_setup(struct drm_device *dev);
 int amdgpu_modeset_create_props(struct amdgpu_device *adev);
 int amdgpu_display_crtc_set_config(struct drm_mode_set *set,
   struct drm_modeset_acquire_ctx *ctx);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index a5d401a..fa8bf00 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2841,7 +2841,7 @@ static int dce_v10_0_sw_init(void *handle)
}
 
if (amdgpu_atombios_get_connector_info_from_object_table(adev))
-   amdgpu_print_display_setup(adev->ddev);
+   amdgpu_display_print_display_setup(adev->ddev);
else
return -EINVAL;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 90900f7..b8baa73 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2957,7 +2957,7 @@ static int dce_v11_0_sw_init(void *handle)
}
 
if (amdgpu_atombios_get_connector_info_from_object_table(adev))
-   amdgpu_print_display_setup(adev->ddev);
+   amdgpu_display_print_display_setup(adev->ddev);
else
return -EINVAL;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 9d4eeeb..91b91a6 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2711,7 +2711,7 @@ static int dce_v6_0_sw_init(void *handle)
 
ret = amdgpu_atombios_get_connector_info_from_object_table(adev);
if (ret)
-   amdgpu_print_display_setup(adev->ddev);
+   amdgpu_display_print_display_setup(adev->ddev);
else
return -EINVAL;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 6fb31aa..1386424 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2741,7 +2741,7 @@ static int dce_v8_0_sw_init(void *handle)
}
 
if (amdgpu_atombios_get_connector_info_from_object_table(adev))
-   amdgpu_print_display_setup(adev->ddev);
+   amdgpu_display_print_display_setup(adev->ddev);
else
return -EINVAL;
 
-- 
2.7.4

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[PATCH 02/13] drm/amdgpu: rename amdgpu_crtc_page_flip_target

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 10 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h| 10 +-
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c|  2 +-
 7 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index cbf8a74..55997d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -142,11 +142,11 @@ static void amdgpu_display_unpin_work_func(struct 
work_struct *__work)
kfree(work);
 }
 
-int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
-struct drm_framebuffer *fb,
-struct drm_pending_vblank_event *event,
-uint32_t page_flip_flags, uint32_t target,
-struct drm_modeset_acquire_ctx *ctx)
+int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,
+   struct drm_framebuffer *fb,
+   struct drm_pending_vblank_event *event,
+   uint32_t page_flip_flags, uint32_t target,
+   struct drm_modeset_acquire_ctx *ctx)
 {
struct drm_device *dev = crtc->dev;
struct amdgpu_device *adev = dev->dev_private;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 5a14be4..9e99679 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -670,11 +670,11 @@ void amdgpu_print_display_setup(struct drm_device *dev);
 int amdgpu_modeset_create_props(struct amdgpu_device *adev);
 int amdgpu_crtc_set_config(struct drm_mode_set *set,
   struct drm_modeset_acquire_ctx *ctx);
-int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
-struct drm_framebuffer *fb,
-struct drm_pending_vblank_event *event,
-uint32_t page_flip_flags, uint32_t target,
-struct drm_modeset_acquire_ctx *ctx);
+int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,
+   struct drm_framebuffer *fb,
+   struct drm_pending_vblank_event *event,
+   uint32_t page_flip_flags, uint32_t target,
+   struct drm_modeset_acquire_ctx *ctx);
 extern const struct drm_mode_config_funcs amdgpu_mode_funcs;
 
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 5590bf1..751b52f 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2519,7 +2519,7 @@ static const struct drm_crtc_funcs dce_v10_0_crtc_funcs = 
{
.gamma_set = dce_v10_0_crtc_gamma_set,
.set_config = amdgpu_crtc_set_config,
.destroy = dce_v10_0_crtc_destroy,
-   .page_flip_target = amdgpu_crtc_page_flip_target,
+   .page_flip_target = amdgpu_display_crtc_page_flip_target,
 };
 
 static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 8ee4fc4..6502e5f 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2594,7 +2594,7 @@ static const struct drm_crtc_funcs dce_v11_0_crtc_funcs = 
{
.gamma_set = dce_v11_0_crtc_gamma_set,
.set_config = amdgpu_crtc_set_config,
.destroy = dce_v11_0_crtc_destroy,
-   .page_flip_target = amdgpu_crtc_page_flip_target,
+   .page_flip_target = amdgpu_display_crtc_page_flip_target,
 };
 
 static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index c943ad1..433de9f 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2409,7 +2409,7 @@ static const struct drm_crtc_funcs dce_v6_0_crtc_funcs = {
.gamma_set = dce_v6_0_crtc_gamma_set,
.set_config = amdgpu_crtc_set_config,
.destroy = dce_v6_0_crtc_destroy,
-   .page_flip_target = amdgpu_crtc_page_flip_target,
+   .page_flip_target = amdgpu_display_crtc_page_flip_target,
 };
 
 static void dce_v6_0_crtc_dpms(struct drm_crtc *crtc, int mode)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index c02308c..0988751 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.

[PATCH 06/13] drm/amdgpu: rename amdgpu_framebuffer_init

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 11 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c  |  3 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h|  8 
 3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index ebf4145..c14b578 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -520,11 +520,10 @@ uint32_t amdgpu_display_framebuffer_domains(struct 
amdgpu_device *adev)
return domain;
 }
 
-int
-amdgpu_framebuffer_init(struct drm_device *dev,
-   struct amdgpu_framebuffer *rfb,
-   const struct drm_mode_fb_cmd2 *mode_cmd,
-   struct drm_gem_object *obj)
+int amdgpu_display_framebuffer_init(struct drm_device *dev,
+   struct amdgpu_framebuffer *rfb,
+   const struct drm_mode_fb_cmd2 *mode_cmd,
+   struct drm_gem_object *obj)
 {
int ret;
rfb->obj = obj;
@@ -565,7 +564,7 @@ amdgpu_user_framebuffer_create(struct drm_device *dev,
return ERR_PTR(-ENOMEM);
}
 
-   ret = amdgpu_framebuffer_init(dev, amdgpu_fb, mode_cmd, obj);
+   ret = amdgpu_display_framebuffer_init(dev, amdgpu_fb, mode_cmd, obj);
if (ret) {
kfree(amdgpu_fb);
drm_gem_object_put_unlocked(obj);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index a7423dd..1206301 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -227,7 +227,8 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
info->par = rfbdev;
info->skip_vt_switch = true;
 
-   ret = amdgpu_framebuffer_init(adev->ddev, >rfb, _cmd, 
gobj);
+   ret = amdgpu_display_framebuffer_init(adev->ddev, >rfb,
+ _cmd, gobj);
if (ret) {
DRM_ERROR("failed to initialize framebuffer %d\n", ret);
goto out;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 00f8ef3..1e8806edf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -641,10 +641,10 @@ int amdgpu_get_crtc_scanoutpos(struct drm_device *dev, 
unsigned int pipe,
   ktime_t *stime, ktime_t *etime,
   const struct drm_display_mode *mode);
 
-int amdgpu_framebuffer_init(struct drm_device *dev,
-struct amdgpu_framebuffer *rfb,
-const struct drm_mode_fb_cmd2 *mode_cmd,
-struct drm_gem_object *obj);
+int amdgpu_display_framebuffer_init(struct drm_device *dev,
+   struct amdgpu_framebuffer *rfb,
+   const struct drm_mode_fb_cmd2 *mode_cmd,
+   struct drm_gem_object *obj);
 
 int amdgpufb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
 
-- 
2.7.4

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[PATCH 09/13] drm/amdgpu: rename amdgpu_update_display_priority

[Samuel Li]

Rename as amdgpu_display_update_priority for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c   | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 93eae39..f02b7f8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1834,7 +1834,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
  struct amdgpu_job* job, bool force);
 void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
 bool amdgpu_device_need_post(struct amdgpu_device *adev);
-void amdgpu_update_display_priority(struct amdgpu_device *adev);
+void amdgpu_display_update_priority(struct amdgpu_device *adev);
 
 void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
  u64 num_vis_bytes);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 73f3759..733f5a0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -659,7 +659,7 @@ int amdgpu_display_modeset_create_props(struct 
amdgpu_device *adev)
return 0;
 }
 
-void amdgpu_update_display_priority(struct amdgpu_device *adev)
+void amdgpu_display_update_priority(struct amdgpu_device *adev)
 {
/* adjustment options for the display watermarks */
if ((amdgpu_disp_priority == 0) || (amdgpu_disp_priority > 2))
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 256e528..ad5e74a 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -1205,7 +1205,7 @@ static void dce_v10_0_bandwidth_update(struct 
amdgpu_device *adev)
u32 num_heads = 0, lb_size;
int i;
 
-   amdgpu_update_display_priority(adev);
+   amdgpu_display_update_priority(adev);
 
for (i = 0; i < adev->mode_info.num_crtc; i++) {
if (adev->mode_info.crtcs[i]->base.enabled)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 1ae6765..dbf9d75 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -1229,7 +1229,7 @@ static void dce_v11_0_bandwidth_update(struct 
amdgpu_device *adev)
u32 num_heads = 0, lb_size;
int i;
 
-   amdgpu_update_display_priority(adev);
+   amdgpu_display_update_priority(adev);
 
for (i = 0; i < adev->mode_info.num_crtc; i++) {
if (adev->mode_info.crtcs[i]->base.enabled)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index af82e39..4161417 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -1108,7 +1108,7 @@ static void dce_v6_0_bandwidth_update(struct 
amdgpu_device *adev)
if (!adev->mode_info.mode_config_initialized)
return;
 
-   amdgpu_update_display_priority(adev);
+   amdgpu_display_update_priority(adev);
 
for (i = 0; i < adev->mode_info.num_crtc; i++) {
if (adev->mode_info.crtcs[i]->base.enabled)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index af0c237..ff29f30 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -1144,7 +1144,7 @@ static void dce_v8_0_bandwidth_update(struct 
amdgpu_device *adev)
u32 num_heads = 0, lb_size;
int i;
 
-   amdgpu_update_display_priority(adev);
+   amdgpu_display_update_priority(adev);
 
for (i = 0; i < adev->mode_info.num_crtc; i++) {
if (adev->mode_info.crtcs[i]->base.enabled)
-- 
2.7.4

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[PATCH 05/13] drm/amdgpu: rename amdgpu_ddc_probe

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 10 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c|  6 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h   |  3 ++-
 3 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
index 8ca3783..ffc1f6f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
@@ -877,7 +877,7 @@ amdgpu_connector_vga_detect(struct drm_connector 
*connector, bool force)
ret = connector_status_disconnected;
 
if (amdgpu_connector->ddc_bus)
-   dret = amdgpu_ddc_probe(amdgpu_connector, false);
+   dret = amdgpu_display_ddc_probe(amdgpu_connector, false);
if (dret) {
amdgpu_connector->detected_by_load = false;
amdgpu_connector_free_edid(connector);
@@ -998,7 +998,7 @@ amdgpu_connector_dvi_detect(struct drm_connector 
*connector, bool force)
}
 
if (amdgpu_connector->ddc_bus)
-   dret = amdgpu_ddc_probe(amdgpu_connector, false);
+   dret = amdgpu_display_ddc_probe(amdgpu_connector, false);
if (dret) {
amdgpu_connector->detected_by_load = false;
amdgpu_connector_free_edid(connector);
@@ -1401,7 +1401,8 @@ amdgpu_connector_dp_detect(struct drm_connector 
*connector, bool force)
/* setup ddc on the bridge */
amdgpu_atombios_encoder_setup_ext_encoder_ddc(encoder);
/* bridge chips are always aux */
-   if (amdgpu_ddc_probe(amdgpu_connector, true)) /* try 
DDC */
+   /* try DDC */
+   if (amdgpu_display_ddc_probe(amdgpu_connector, true))
ret = connector_status_connected;
else if (amdgpu_connector->dac_load_detect) { /* try 
load detection */
const struct drm_encoder_helper_funcs 
*encoder_funcs = encoder->helper_private;
@@ -1421,7 +1422,8 @@ amdgpu_connector_dp_detect(struct drm_connector 
*connector, bool force)
ret = connector_status_connected;
} else {
/* try non-aux ddc (DP to DVI/HDMI/etc. 
adapter) */
-   if (amdgpu_ddc_probe(amdgpu_connector, false))
+   if (amdgpu_display_ddc_probe(amdgpu_connector,
+false))
ret = connector_status_connected;
}
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index cb01c5c..ebf4145 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -432,11 +432,11 @@ void amdgpu_display_print_display_setup(struct drm_device 
*dev)
 }
 
 /**
- * amdgpu_ddc_probe
+ * amdgpu_display_ddc_probe
  *
  */
-bool amdgpu_ddc_probe(struct amdgpu_connector *amdgpu_connector,
-  bool use_aux)
+bool amdgpu_display_ddc_probe(struct amdgpu_connector *amdgpu_connector,
+ bool use_aux)
 {
u8 out = 0x0;
u8 buf[8];
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index fa5dda0..00f8ef3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -631,7 +631,8 @@ bool amdgpu_dig_monitor_is_duallink(struct drm_encoder 
*encoder,
 u16 amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
 struct drm_encoder *amdgpu_get_external_encoder(struct drm_encoder *encoder);
 
-bool amdgpu_ddc_probe(struct amdgpu_connector *amdgpu_connector, bool use_aux);
+bool amdgpu_display_ddc_probe(struct amdgpu_connector *amdgpu_connector,
+ bool use_aux);
 
 void amdgpu_encoder_set_active_device(struct drm_encoder *encoder);
 
-- 
2.7.4

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[PATCH 07/13] drm/amdgpu: rename amdgpu_user_framebuffer_create

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 8 
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   | 6 +++---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index c14b578..14896e2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -537,9 +537,9 @@ int amdgpu_display_framebuffer_init(struct drm_device *dev,
 }
 
 struct drm_framebuffer *
-amdgpu_user_framebuffer_create(struct drm_device *dev,
-  struct drm_file *file_priv,
-  const struct drm_mode_fb_cmd2 *mode_cmd)
+amdgpu_display_user_framebuffer_create(struct drm_device *dev,
+  struct drm_file *file_priv,
+  const struct drm_mode_fb_cmd2 *mode_cmd)
 {
struct drm_gem_object *obj;
struct amdgpu_framebuffer *amdgpu_fb;
@@ -575,7 +575,7 @@ amdgpu_user_framebuffer_create(struct drm_device *dev,
 }
 
 const struct drm_mode_config_funcs amdgpu_mode_funcs = {
-   .fb_create = amdgpu_user_framebuffer_create,
+   .fb_create = amdgpu_display_user_framebuffer_create,
.output_poll_changed = drm_fb_helper_output_poll_changed,
 };
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 1ef79d2..2b11d808 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -25,8 +25,8 @@
 
 uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev);
 struct drm_framebuffer *
-amdgpu_user_framebuffer_create(struct drm_device *dev,
-  struct drm_file *file_priv,
-  const struct drm_mode_fb_cmd2 *mode_cmd);
+amdgpu_display_user_framebuffer_create(struct drm_device *dev,
+  struct drm_file *file_priv,
+  const struct drm_mode_fb_cmd2 *mode_cmd);
 
 #endif
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ebcad30..b0205b8 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -826,7 +826,7 @@ dm_atomic_state_alloc_free(struct drm_atomic_state *state)
 }
 
 static const struct drm_mode_config_funcs amdgpu_dm_mode_funcs = {
-   .fb_create = amdgpu_user_framebuffer_create,
+   .fb_create = amdgpu_display_user_framebuffer_create,
.output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = amdgpu_dm_atomic_check,
.atomic_commit = amdgpu_dm_atomic_commit,
-- 
2.7.4

___
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 10/13] drm/amdgpu: rename amdgpu_crtc_scaling_mode_fixup

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h| 6 +++---
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c   | 2 +-
 6 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 733f5a0..3654157 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -681,9 +681,9 @@ static bool amdgpu_display_is_hdtv_mode(const struct 
drm_display_mode *mode)
return false;
 }
 
-bool amdgpu_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
-   const struct drm_display_mode *mode,
-   struct drm_display_mode *adjusted_mode)
+bool amdgpu_display_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
+   const struct drm_display_mode *mode,
+   struct drm_display_mode *adjusted_mode)
 {
struct drm_device *dev = crtc->dev;
struct drm_encoder *encoder;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 9b0d34f..650 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -650,9 +650,9 @@ int amdgpufb_remove(struct drm_device *dev, struct 
drm_framebuffer *fb);
 
 void amdgpu_enc_destroy(struct drm_encoder *encoder);
 void amdgpu_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
-bool amdgpu_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
-   const struct drm_display_mode *mode,
-   struct drm_display_mode *adjusted_mode);
+bool amdgpu_display_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
+   const struct drm_display_mode *mode,
+   struct drm_display_mode *adjusted_mode);
 void amdgpu_panel_mode_fixup(struct drm_encoder *encoder,
 struct drm_display_mode *adjusted_mode);
 int amdgpu_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index ad5e74a..865e8ca 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2676,7 +2676,7 @@ static bool dce_v10_0_crtc_mode_fixup(struct drm_crtc 
*crtc,
amdgpu_crtc->connector = NULL;
return false;
}
-   if (!amdgpu_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
+   if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
return false;
if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode))
return false;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index dbf9d75..fe88728 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2779,7 +2779,7 @@ static bool dce_v11_0_crtc_mode_fixup(struct drm_crtc 
*crtc,
amdgpu_crtc->connector = NULL;
return false;
}
-   if (!amdgpu_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
+   if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
return false;
if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode))
return false;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 4161417..3436de3 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2562,7 +2562,7 @@ static bool dce_v6_0_crtc_mode_fixup(struct drm_crtc 
*crtc,
amdgpu_crtc->connector = NULL;
return false;
}
-   if (!amdgpu_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
+   if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
return false;
if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode))
return false;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index ff29f30..6f44146 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2587,7 +2587,7 @@ static bool dce_v8_0_crtc_mode_fixup(struct drm_crtc 
*crtc,
amdgpu_crtc->connector = NULL;
return false;
}
-   if (!amdgpu_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
+   if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
   

[PATCH 08/13] drm/amdgpu: rename amdgpu_modeset_create_props

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c  | 2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 14896e2..73f3759 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -597,7 +597,7 @@ static const struct drm_prop_enum_list 
amdgpu_dither_enum_list[] =
{ AMDGPU_FMT_DITHER_ENABLE, "on" },
 };
 
-int amdgpu_modeset_create_props(struct amdgpu_device *adev)
+int amdgpu_display_modeset_create_props(struct amdgpu_device *adev)
 {
int sz;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 1e8806edf..9b0d34f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -668,7 +668,7 @@ int amdgpu_align_pitch(struct amdgpu_device *adev, int 
width, int bpp, bool tile
 
 /* amdgpu_display.c */
 void amdgpu_display_print_display_setup(struct drm_device *dev);
-int amdgpu_modeset_create_props(struct amdgpu_device *adev);
+int amdgpu_display_modeset_create_props(struct amdgpu_device *adev);
 int amdgpu_display_crtc_set_config(struct drm_mode_set *set,
   struct drm_modeset_acquire_ctx *ctx);
 int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index fa8bf00..256e528 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2826,7 +2826,7 @@ static int dce_v10_0_sw_init(void *handle)
 
adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
 
-   r = amdgpu_modeset_create_props(adev);
+   r = amdgpu_display_modeset_create_props(adev);
if (r)
return r;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index b8baa73..1ae6765 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2941,7 +2941,7 @@ static int dce_v11_0_sw_init(void *handle)
 
adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
 
-   r = amdgpu_modeset_create_props(adev);
+   r = amdgpu_display_modeset_create_props(adev);
if (r)
return r;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 91b91a6..af82e39 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2695,7 +2695,7 @@ static int dce_v6_0_sw_init(void *handle)
adev->ddev->mode_config.prefer_shadow = 1;
adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
 
-   r = amdgpu_modeset_create_props(adev);
+   r = amdgpu_display_modeset_create_props(adev);
if (r)
return r;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 1386424..af0c237 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2726,7 +2726,7 @@ static int dce_v8_0_sw_init(void *handle)
 
adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
 
-   r = amdgpu_modeset_create_props(adev);
+   r = amdgpu_display_modeset_create_props(adev);
if (r)
return r;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c 
b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 0c3d250..3d1954a 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -408,7 +408,7 @@ static int dce_virtual_sw_init(void *handle)
 
adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
 
-   r = amdgpu_modeset_create_props(adev);
+   r = amdgpu_display_modeset_create_props(adev);
if (r)
return r;
 
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b0205b8..1d538c0 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1316,7 +1316,7 @@ static int amdgpu_dm_mode_config_init(struct 
amdgpu_device *adev)
 
adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
 
-   r = amdgpu_modeset_create_props(adev);
+   r = amdgpu_display_mode

[PATCH 03/13] drm/amdgpu: rename amdgpu_crtc_set_config

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c| 2 +-
 7 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 55997d4..4f9c880 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -257,8 +257,8 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc 
*crtc,
return r;
 }
 
-int amdgpu_crtc_set_config(struct drm_mode_set *set,
-  struct drm_modeset_acquire_ctx *ctx)
+int amdgpu_display_crtc_set_config(struct drm_mode_set *set,
+  struct drm_modeset_acquire_ctx *ctx)
 {
struct drm_device *dev;
struct amdgpu_device *adev;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 9e99679..83205a0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -668,8 +668,8 @@ int amdgpu_align_pitch(struct amdgpu_device *adev, int 
width, int bpp, bool tile
 /* amdgpu_display.c */
 void amdgpu_print_display_setup(struct drm_device *dev);
 int amdgpu_modeset_create_props(struct amdgpu_device *adev);
-int amdgpu_crtc_set_config(struct drm_mode_set *set,
-  struct drm_modeset_acquire_ctx *ctx);
+int amdgpu_display_crtc_set_config(struct drm_mode_set *set,
+  struct drm_modeset_acquire_ctx *ctx);
 int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,
struct drm_framebuffer *fb,
struct drm_pending_vblank_event *event,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 751b52f..a5d401a 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2517,7 +2517,7 @@ static const struct drm_crtc_funcs dce_v10_0_crtc_funcs = 
{
.cursor_set2 = dce_v10_0_crtc_cursor_set2,
.cursor_move = dce_v10_0_crtc_cursor_move,
.gamma_set = dce_v10_0_crtc_gamma_set,
-   .set_config = amdgpu_crtc_set_config,
+   .set_config = amdgpu_display_crtc_set_config,
.destroy = dce_v10_0_crtc_destroy,
.page_flip_target = amdgpu_display_crtc_page_flip_target,
 };
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 6502e5f..90900f7 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2592,7 +2592,7 @@ static const struct drm_crtc_funcs dce_v11_0_crtc_funcs = 
{
.cursor_set2 = dce_v11_0_crtc_cursor_set2,
.cursor_move = dce_v11_0_crtc_cursor_move,
.gamma_set = dce_v11_0_crtc_gamma_set,
-   .set_config = amdgpu_crtc_set_config,
+   .set_config = amdgpu_display_crtc_set_config,
.destroy = dce_v11_0_crtc_destroy,
.page_flip_target = amdgpu_display_crtc_page_flip_target,
 };
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 433de9f..9d4eeeb 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2407,7 +2407,7 @@ static const struct drm_crtc_funcs dce_v6_0_crtc_funcs = {
.cursor_set2 = dce_v6_0_crtc_cursor_set2,
.cursor_move = dce_v6_0_crtc_cursor_move,
.gamma_set = dce_v6_0_crtc_gamma_set,
-   .set_config = amdgpu_crtc_set_config,
+   .set_config = amdgpu_display_crtc_set_config,
.destroy = dce_v6_0_crtc_destroy,
.page_flip_target = amdgpu_display_crtc_page_flip_target,
 };
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 0988751..6fb31aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2421,7 +2421,7 @@ static const struct drm_crtc_funcs dce_v8_0_crtc_funcs = {
.cursor_set2 = dce_v8_0_crtc_cursor_set2,
.cursor_move = dce_v8_0_crtc_cursor_move,
.gamma_set = dce_v8_0_crtc_gamma_set,
-   .set_config = amdgpu_crtc_set_config,
+   .set_config = amdgpu_display_crtc_set_config,
.destroy = dce_v8_0_crtc_destroy,
.page_flip_target = amdgpu_display_crtc_page_flip_target,
 };
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c 
b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 7b03787..0c3d250 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -130,7 +130,7 @@ static const struct drm_crtc

[PATCH 01/13] drm/amdgpu: rename static functions in amdgpu_display.c

[Samuel Li]

Add display to the name for consistency.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 41 -
 1 file changed, 22 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 22edfe0..cbf8a74 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -37,7 +37,8 @@
 #include 
 #include 
 
-static void amdgpu_flip_callback(struct dma_fence *f, struct dma_fence_cb *cb)
+static void amdgpu_display_flip_callback(struct dma_fence *f,
+struct dma_fence_cb *cb)
 {
struct amdgpu_flip_work *work =
container_of(cb, struct amdgpu_flip_work, cb);
@@ -46,8 +47,8 @@ static void amdgpu_flip_callback(struct dma_fence *f, struct 
dma_fence_cb *cb)
schedule_work(>flip_work.work);
 }
 
-static bool amdgpu_flip_handle_fence(struct amdgpu_flip_work *work,
-struct dma_fence **f)
+static bool amdgpu_display_flip_handle_fence(struct amdgpu_flip_work *work,
+struct dma_fence **f)
 {
struct dma_fence *fence= *f;
 
@@ -56,14 +57,15 @@ static bool amdgpu_flip_handle_fence(struct 
amdgpu_flip_work *work,
 
*f = NULL;
 
-   if (!dma_fence_add_callback(fence, >cb, amdgpu_flip_callback))
+   if (!dma_fence_add_callback(fence, >cb,
+   amdgpu_display_flip_callback))
return true;
 
dma_fence_put(fence);
return false;
 }
 
-static void amdgpu_flip_work_func(struct work_struct *__work)
+static void amdgpu_display_flip_work_func(struct work_struct *__work)
 {
struct delayed_work *delayed_work =
container_of(__work, struct delayed_work, work);
@@ -77,11 +79,11 @@ static void amdgpu_flip_work_func(struct work_struct 
*__work)
unsigned i;
int vpos, hpos;
 
-   if (amdgpu_flip_handle_fence(work, >excl))
+   if (amdgpu_display_flip_handle_fence(work, >excl))
return;
 
for (i = 0; i < work->shared_count; ++i)
-   if (amdgpu_flip_handle_fence(work, >shared[i]))
+   if (amdgpu_display_flip_handle_fence(work, >shared[i]))
return;
 
/* Wait until we're out of the vertical blank period before the one
@@ -118,7 +120,7 @@ static void amdgpu_flip_work_func(struct work_struct 
*__work)
 /*
  * Handle unpin events outside the interrupt handler proper.
  */
-static void amdgpu_unpin_work_func(struct work_struct *__work)
+static void amdgpu_display_unpin_work_func(struct work_struct *__work)
 {
struct amdgpu_flip_work *work =
container_of(__work, struct amdgpu_flip_work, unpin_work);
@@ -163,8 +165,8 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
if (work == NULL)
return -ENOMEM;
 
-   INIT_DELAYED_WORK(>flip_work, amdgpu_flip_work_func);
-   INIT_WORK(>unpin_work, amdgpu_unpin_work_func);
+   INIT_DELAYED_WORK(>flip_work, amdgpu_display_flip_work_func);
+   INIT_WORK(>unpin_work, amdgpu_display_unpin_work_func);
 
work->event = event;
work->adev = adev;
@@ -229,7 +231,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
/* update crtc fb */
crtc->primary->fb = fb;
spin_unlock_irqrestore(>dev->event_lock, flags);
-   amdgpu_flip_work_func(>flip_work.work);
+   amdgpu_display_flip_work_func(>flip_work.work);
return 0;
 
 pflip_cleanup:
@@ -480,7 +482,7 @@ bool amdgpu_ddc_probe(struct amdgpu_connector 
*amdgpu_connector,
return true;
 }
 
-static void amdgpu_user_framebuffer_destroy(struct drm_framebuffer *fb)
+static void amdgpu_display_user_framebuffer_destroy(struct drm_framebuffer *fb)
 {
struct amdgpu_framebuffer *amdgpu_fb = to_amdgpu_framebuffer(fb);
 
@@ -489,9 +491,10 @@ static void amdgpu_user_framebuffer_destroy(struct 
drm_framebuffer *fb)
kfree(amdgpu_fb);
 }
 
-static int amdgpu_user_framebuffer_create_handle(struct drm_framebuffer *fb,
- struct drm_file *file_priv,
- unsigned int *handle)
+static int amdgpu_display_user_framebuffer_create_handle(
+   struct drm_framebuffer *fb,
+   struct drm_file *file_priv,
+   unsigned int *handle)
 {
struct amdgpu_framebuffer *amdgpu_fb = to_amdgpu_framebuffer(fb);
 
@@ -499,8 +502,8 @@ static int amdgpu_user_framebuffer_create_handle(struct 
drm_framebuffer *fb,
 }
 
 static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
-   .destroy = amdgpu_user_framebuffer_destroy,
-   .create_handle = amdgpu_user_framebuffer_crea

[PATCH v2 1/1] drm: add kernel doc for exported gem dmabuf_ops

[Samuel Li]

Signed-off-by: Samuel Li <samuel...@amd.com>
Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch>
---
 drivers/gpu/drm/drm_prime.c | 88 +
 1 file changed, 88 insertions(+)

diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index ca09ce7..e82a976 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -73,6 +73,9 @@
  * Drivers should detect this situation and return back the gem object
  * from the dma-buf private.  Prime will do this automatically for drivers that
  * use the drm_gem_prime_{import,export} helpers.
+ *
+ * GEM struct _buf_ops symbols are now exported. They can be resued by
+ * drivers which implement GEM interface.
  */
 
 struct drm_prime_member {
@@ -180,6 +183,18 @@ static int drm_prime_lookup_buf_handle(struct 
drm_prime_file_private *prime_fpri
return -ENOENT;
 }
 
+/**
+ * drm_gem_map_attach - dma_buf attach implementation for GEM
+ * @dma_buf: buffer to attach device to
+ * @target_dev: not used
+ * @attach: buffer attachment data
+ *
+ * Allocates _prime_attachment and calls _driver.gem_prime_pin for
+ * device specific attachment. This can be used as the _buf_ops.attach
+ * callback.
+ *
+ * Returns 0 on success, negative error code on failure.
+ */
 int drm_gem_map_attach(struct dma_buf *dma_buf, struct device *target_dev,
   struct dma_buf_attachment *attach)
 {
@@ -201,6 +216,14 @@ int drm_gem_map_attach(struct dma_buf *dma_buf, struct 
device *target_dev,
 }
 EXPORT_SYMBOL(drm_gem_map_attach);
 
+/**
+ * drm_gem_map_detach - dma_buf detach implementation for GEM
+ * @dma_buf: buffer to detach from
+ * @attach: attachment to be detached
+ *
+ * Cleans up _buf_attachment. This can be used as the _buf_ops.detach
+ * callback.
+ */
 void drm_gem_map_detach(struct dma_buf *dma_buf,
struct dma_buf_attachment *attach)
 {
@@ -255,6 +278,18 @@ void drm_prime_remove_buf_handle_locked(struct 
drm_prime_file_private *prime_fpr
}
 }
 
+/**
+ * drm_gem_map_dma_buf - map_dma_buf implementation for GEM
+ * @attach: attachment whose scatterlist is to be returned
+ * @dir: direction of DMA transfer
+ *
+ * Calls _driver.gem_prime_get_sg_table and then maps the scatterlist. This
+ * can be used as the _buf_ops.map_dma_buf callback.
+ *
+ * Returns sg_table containing the scatterlist to be returned; returns ERR_PTR
+ * on error. May return -EINTR if it is interrupted by a signal.
+ */
+
 struct sg_table *drm_gem_map_dma_buf(struct dma_buf_attachment *attach,
 enum dma_data_direction dir)
 {
@@ -294,6 +329,12 @@ struct sg_table *drm_gem_map_dma_buf(struct 
dma_buf_attachment *attach,
 }
 EXPORT_SYMBOL(drm_gem_map_dma_buf);
 
+/**
+ * drm_gem_unmap_dma_buf - unmap_dma_buf implementation for GEM
+ *
+ * Not implemented. The unmap is done at drm_gem_map_detach().  This can be
+ * used as the _buf_ops.unmap_dma_buf callback.
+ */
 void drm_gem_unmap_dma_buf(struct dma_buf_attachment *attach,
   struct sg_table *sgt,
   enum dma_data_direction dir)
@@ -351,6 +392,15 @@ void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_release);
 
+/**
+ * drm_gem_dmabuf_vmap - dma_buf vmap implementation for GEM
+ * @dma_buf: buffer to be mapped
+ *
+ * Sets up a kernel virtual mapping. This can be used as the _buf_ops.vmap
+ * callback.
+ *
+ * Returns the kernel virtual address.
+ */
 void *drm_gem_dmabuf_vmap(struct dma_buf *dma_buf)
 {
struct drm_gem_object *obj = dma_buf->priv;
@@ -360,6 +410,14 @@ void *drm_gem_dmabuf_vmap(struct dma_buf *dma_buf)
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_vmap);
 
+/**
+ * drm_gem_dmabuf_vunmap - dma_buf vunmap implementation for GEM
+ * @dma_buf: buffer to be unmapped
+ * @vaddr: the virtual address of the buffer
+ *
+ * Releases a kernel virtual mapping. This can be used as the
+ * _buf_ops.vunmap callback.
+ */
 void drm_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void *vaddr)
 {
struct drm_gem_object *obj = dma_buf->priv;
@@ -369,6 +427,11 @@ void drm_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void 
*vaddr)
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_vunmap);
 
+/**
+ * drm_gem_dmabuf_kmap_atomic - map_atomic implementation for GEM
+ *
+ * Not implemented. This can be used as the _buf_ops.map_atomic callback.
+ */
 void *drm_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf,
 unsigned long page_num)
 {
@@ -376,6 +439,11 @@ void *drm_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf,
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_kmap_atomic);
 
+/**
+ * drm_gem_dmabuf_kunmap_atomic - unmap_atomic implementation for GEM
+ *
+ * Not implemented. This can be used as the _buf_ops.unmap_atomic callback.
+ */
 void drm_gem_dmabuf_kunmap_atomic(struct dma_buf *dma_buf,
  unsigned long page_num, void *addr)
 {
@@ -383,12 +451,22 @@ void drm_gem_dmabuf_kunmap_ato

[PATCH 1/1] drm: add kernel doc for exported gem dmabuf_ops

[Samuel Li]

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/drm_prime.c | 81 +
 1 file changed, 81 insertions(+)

diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index ca09ce7..3ead5a6 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -73,6 +73,9 @@
  * Drivers should detect this situation and return back the gem object
  * from the dma-buf private.  Prime will do this automatically for drivers that
  * use the drm_gem_prime_{import,export} helpers.
+ *
+ * GEM dmabuf_ops symbols are now exported. They can be resued by drivers
+ * which implement GEM interface.
  */
 
 struct drm_prime_member {
@@ -180,6 +183,17 @@ static int drm_prime_lookup_buf_handle(struct 
drm_prime_file_private *prime_fpri
return -ENOENT;
 }
 
+/**
+ * drm_gem_map_attach - dma_buf attach implementation for GEM
+ * @dmabuf: buffer to attach device to.
+ * @target_dev: not used
+ * @attach: buffer attachment data
+ *
+ * Allocates drm_prime_attachment and calls driver's gem_prime_pin for device
+ * specific attachment.
+ *
+ * Returns 0 on success, negative error code on failure.
+ */
 int drm_gem_map_attach(struct dma_buf *dma_buf, struct device *target_dev,
   struct dma_buf_attachment *attach)
 {
@@ -201,6 +215,13 @@ int drm_gem_map_attach(struct dma_buf *dma_buf, struct 
device *target_dev,
 }
 EXPORT_SYMBOL(drm_gem_map_attach);
 
+/**
+ * drm_gem_map_detach - dma_buf detach implementation for GEM
+ * @dmabuf: buffer to detach from.
+ * @attach: attachment to be detached.
+ *
+ * Cleans up dma_buf_attachment.
+ */
 void drm_gem_map_detach(struct dma_buf *dma_buf,
struct dma_buf_attachment *attach)
 {
@@ -255,6 +276,17 @@ void drm_prime_remove_buf_handle_locked(struct 
drm_prime_file_private *prime_fpr
}
 }
 
+/**
+ * drm_gem_map_dma_buf - map_dma_buf implementation for GEM
+ * @attach: attachment whose scatterlist is to be returned
+ * @dir: direction of DMA transfer
+ *
+ * This calls driver's gem_prime_get_sg_table() and then maps the scatterlist.
+ *
+ * Returns sg_table containing the scatterlist to be returned; returns ERR_PTR
+ * on error. May return -EINTR if it is interrupted by a signal.
+ */
+
 struct sg_table *drm_gem_map_dma_buf(struct dma_buf_attachment *attach,
 enum dma_data_direction dir)
 {
@@ -294,6 +326,11 @@ struct sg_table *drm_gem_map_dma_buf(struct 
dma_buf_attachment *attach,
 }
 EXPORT_SYMBOL(drm_gem_map_dma_buf);
 
+/**
+ * drm_gem_unmap_dma_buf - unmap_dma_buf implementation for GEM
+ *
+ * Not implemented. The unmap is done at drm_gem_map_detach().
+ */
 void drm_gem_unmap_dma_buf(struct dma_buf_attachment *attach,
   struct sg_table *sgt,
   enum dma_data_direction dir)
@@ -351,6 +388,14 @@ void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_release);
 
+/**
+ * drm_gem_dmabuf_vmap - dma_buf vmap implementation for GEM
+ * @dma_buf: buffer to be mapped
+ *
+ * Sets up a kernel virtual mapping.
+ *
+ * Returns the kernel virtual address.
+ */
 void *drm_gem_dmabuf_vmap(struct dma_buf *dma_buf)
 {
struct drm_gem_object *obj = dma_buf->priv;
@@ -360,6 +405,13 @@ void *drm_gem_dmabuf_vmap(struct dma_buf *dma_buf)
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_vmap);
 
+/**
+ * drm_gem_dmabuf_vunmap - dma_buf vunmap implementation for GEM
+ * @dma_buf: buffer to be unmapped
+ * @vaddr: the virtual address of the buffer
+ *
+ * Releases a kernel virtual mapping.
+ */
 void drm_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void *vaddr)
 {
struct drm_gem_object *obj = dma_buf->priv;
@@ -369,6 +421,11 @@ void drm_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void 
*vaddr)
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_vunmap);
 
+/**
+ * drm_gem_dmabuf_kmap_atomic - map_atomic implementation for GEM
+ *
+ * Not implemented.
+ */
 void *drm_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf,
 unsigned long page_num)
 {
@@ -376,6 +433,11 @@ void *drm_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf,
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_kmap_atomic);
 
+/**
+ * drm_gem_dmabuf_kunmap_atomic - unmap_atomic implementation for GEM
+ *
+ * Not implemented.
+ */
 void drm_gem_dmabuf_kunmap_atomic(struct dma_buf *dma_buf,
  unsigned long page_num, void *addr)
 {
@@ -383,12 +445,22 @@ void drm_gem_dmabuf_kunmap_atomic(struct dma_buf *dma_buf,
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_kunmap_atomic);
 
+/**
+ * drm_gem_dmabuf_kmap - map implementation for GEM
+ *
+ * Not implemented.
+ */
 void *drm_gem_dmabuf_kmap(struct dma_buf *dma_buf, unsigned long page_num)
 {
return NULL;
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_kmap);
 
+/**
+ * drm_gem_dmabuf_kunmap - unmap implementation for GEM
+ *
+ * Not implemented.
+ */
 void drm_gem_dmabuf_kunmap(struct dma_buf *dma_buf, unsigned l

Re: [PATCH 1/3] drm/amdgpu: remove agp_base

[Samuel Li]

The series  
Reviewed-by: Samuel Li <samuel...@amd.com>

Sam

On 2018-01-15 06:51 AM, Christian König wrote:
> No AGP support for in this driver.
> 
> Signed-off-by: Christian König <christian.koe...@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index a40c821832c0..6462738021d5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -514,7 +514,6 @@ struct amdgpu_vmhub {
>  struct amdgpu_mc {
>   resource_size_t aper_size;
>   resource_size_t aper_base;
> - resource_size_t agp_base;
>   /* for some chips with <= 32MB we need to lie
>* about vram size near mc fb location */
>   u64 mc_vram_size;
> 
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[PATCH 1/1] drm/amdgpu: only set dma_buf ops when it is valid

[Samuel Li]

Change-Id: I37daecbf695da13eaeea1d362c270b92a894393a
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index a14234b..8afec21 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -221,9 +221,10 @@ struct dma_buf *amdgpu_gem_prime_export(struct drm_device 
*dev,
return ERR_PTR(-EPERM);
 
buf = drm_gem_prime_export(dev, gobj, flags);
-   if (!IS_ERR(buf))
+   if (!IS_ERR(buf)) {
buf->file->f_mapping = dev->anon_inode->i_mapping;
-   buf->ops = _dmabuf_ops;
+   buf->ops = _dmabuf_ops;
+   }
 
return buf;
 }
-- 
2.7.4

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Re: [PATCH 1/3] drm/amdgpu: allow framebuffer in GART memory as well

[Samuel Li]

> to make all the files use consistent naming going forward to make the code 
> more
> readable.
OK. Will do.

Sam


On 2018-01-04 05:43 PM, Alex Deucher wrote:
> On Thu, Jan 4, 2018 at 5:26 PM, Samuel Li <samuel...@amd.com> wrote:
>>>> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
>>>
>>> Please rename this amdgpu_display_framebuffer_domains() for consistency.
>> Currently all the functions in this file are named without _display_. Am I 
>> missing something?
> 
> That file is still a bit of a mess but I'm trying to make all the
> files use consistent naming going forward to make the code more
> readable.  The IP files (gfx, uvd, gmc, etc.) already do and I
> recently cleaned up amdgpu_device.c.
> 
>>
>>>> +   if (plane->type != DRM_PLANE_TYPE_CURSOR)
>>>
>>> Do cursors have to be in vram?  It seems like they shouldn't.
>> I checked some design documentation and related implementation just now. 
>> Looks like cursor is still supposed to be put in vram now.
>>
> 
> Sounds good.  thanks for checking.
> 
> Alex
> 
>> Regards,
>> Sam
>>
>>
>>
>> On 2018-01-04 04:18 PM, Alex Deucher wrote:
>>> On Thu, Jan 4, 2018 at 4:11 PM, Samuel Li <samuel...@amd.com> wrote:
>>>> From: Christian König <christian.koe...@amd.com>
>>>>
>>>> On CZ and newer APUs we can pin the fb into GART as well as VRAM.
>>>>
>>>> v2: Don't enable gpu_vm_support for Raven yet since it leads to
>>>> a black screen. Need to debug this further before enabling.
>>>>
>>>> Change-Id: Id0f8af3110e54a3aabf7a258871867bc121cc1a2
>>>> Signed-off-by: Christian König <christian.koe...@amd.com>
>>>> Reviewed-by: Andrey Grodzovsky <andrey.grodzov...@amd.com>
>>>> Acked-by: Alex Deucher <alexander.deuc...@amd.com>
>>>> Signed-off-by: Samuel Li <samuel...@amd.com>
>>>> ---
>>>>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 14 +-
>>>>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |  1 +
>>>>  drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c| 10 ++
>>>>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +--
>>>>  4 files changed, 29 insertions(+), 7 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>>>> index d704a45..d9fdc19 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>>>> @@ -29,6 +29,7 @@
>>>>  #include "amdgpu_i2c.h"
>>>>  #include "atom.h"
>>>>  #include "amdgpu_connectors.h"
>>>> +#include "amdgpu_display.h"
>>>>  #include 
>>>>
>>>>  #include 
>>>> @@ -188,7 +189,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
>>>> goto cleanup;
>>>> }
>>>>
>>>> -   r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, );
>>>> +   r = amdgpu_bo_pin(new_abo, amdgpu_framebuffer_domains(adev), 
>>>> );
>>>> if (unlikely(r != 0)) {
>>>> DRM_ERROR("failed to pin new abo buffer before flip\n");
>>>> goto unreserve;
>>>> @@ -501,6 +502,17 @@ static const struct drm_framebuffer_funcs 
>>>> amdgpu_fb_funcs = {
>>>> .create_handle = amdgpu_user_framebuffer_create_handle,
>>>>  };
>>>>
>>>> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
>>>
>>> Please rename this amdgpu_display_framebuffer_domains() for consistency.
>>>
>>>> +{
>>>> +   uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
>>>> +
>>>> +   if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < 
>>>> CHIP_RAVEN &&
>>>> +   adev->flags & AMD_IS_APU)
>>>> +   domain |= AMDGPU_GEM_DOMAIN_GTT;
>>>> +
>>>> +   return domain;
>>>> +}
>>>> +
>>>>  int
>>>>  amdgpu_framebuffer_init(struct drm_device *dev,
>>>> struct amdgpu_framebuffer *rfb,
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
>

Re: [PATCH 1/3] drm/amdgpu: allow framebuffer in GART memory as well

[Samuel Li]

>> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
> 
> Please rename this amdgpu_display_framebuffer_domains() for consistency.
Currently all the functions in this file are named without _display_. Am I 
missing something?

>> +   if (plane->type != DRM_PLANE_TYPE_CURSOR)
> 
> Do cursors have to be in vram?  It seems like they shouldn't.
I checked some design documentation and related implementation just now. Looks 
like cursor is still supposed to be put in vram now.

Regards,
Sam



On 2018-01-04 04:18 PM, Alex Deucher wrote:
> On Thu, Jan 4, 2018 at 4:11 PM, Samuel Li <samuel...@amd.com> wrote:
>> From: Christian König <christian.koe...@amd.com>
>>
>> On CZ and newer APUs we can pin the fb into GART as well as VRAM.
>>
>> v2: Don't enable gpu_vm_support for Raven yet since it leads to
>> a black screen. Need to debug this further before enabling.
>>
>> Change-Id: Id0f8af3110e54a3aabf7a258871867bc121cc1a2
>> Signed-off-by: Christian König <christian.koe...@amd.com>
>> Reviewed-by: Andrey Grodzovsky <andrey.grodzov...@amd.com>
>> Acked-by: Alex Deucher <alexander.deuc...@amd.com>
>> Signed-off-by: Samuel Li <samuel...@amd.com>
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 14 +-
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |  1 +
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c| 10 ++
>>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +--
>>  4 files changed, 29 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>> index d704a45..d9fdc19 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>> @@ -29,6 +29,7 @@
>>  #include "amdgpu_i2c.h"
>>  #include "atom.h"
>>  #include "amdgpu_connectors.h"
>> +#include "amdgpu_display.h"
>>  #include 
>>
>>  #include 
>> @@ -188,7 +189,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
>> goto cleanup;
>> }
>>
>> -   r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, );
>> +   r = amdgpu_bo_pin(new_abo, amdgpu_framebuffer_domains(adev), );
>> if (unlikely(r != 0)) {
>> DRM_ERROR("failed to pin new abo buffer before flip\n");
>> goto unreserve;
>> @@ -501,6 +502,17 @@ static const struct drm_framebuffer_funcs 
>> amdgpu_fb_funcs = {
>> .create_handle = amdgpu_user_framebuffer_create_handle,
>>  };
>>
>> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
> 
> Please rename this amdgpu_display_framebuffer_domains() for consistency.
> 
>> +{
>> +   uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
>> +
>> +   if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN 
>> &&
>> +   adev->flags & AMD_IS_APU)
>> +   domain |= AMDGPU_GEM_DOMAIN_GTT;
>> +
>> +   return domain;
>> +}
>> +
>>  int
>>  amdgpu_framebuffer_init(struct drm_device *dev,
>> struct amdgpu_framebuffer *rfb,
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
>> index 11ae4ab..f241949 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
>> @@ -23,6 +23,7 @@
>>  #ifndef __AMDGPU_DISPLAY_H__
>>  #define __AMDGPU_DISPLAY_H__
>>
>> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev);
>>  struct drm_framebuffer *
>>  amdgpu_user_framebuffer_create(struct drm_device *dev,
>>struct drm_file *file_priv,
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
>> index 90fa8e8..9be3228 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
>> @@ -38,6 +38,8 @@
>>
>>  #include 
>>
>> +#include "amdgpu_display.h"
>> +
>>  /* object hierarchy -
>> this contains a helper + a amdgpu fb
>> the helper contains a pointer to amdgpu framebuffer baseclass.
>> @@ -124,7 +126,7 @@ static int amdgpufb_create_pinned_object(struct 
>> amdgpu_fbdev *rfbdev,
>> struct drm_gem_object *gobj = NULL;
>> struct amdgpu_bo *abo = NULL;
>>

[PATCH 3/3] drm/amdgpu: Move to gtt before cpu accesses dma buf.

[Samuel Li]

To improve cpu read performance. This is implemented for APUs currently.

v2: Adapt to change 
https://lists.freedesktop.org/archives/amd-gfx/2017-October/015174.html
v3: Adapt to change "forward begin_cpu_access callback to drivers"
v4: Instead of v3, reuse drm_gem dmabuf_ops here. Also some minor fixes as 
suggested.

Change-Id: I7a583e23a9ee706e0edd2a46f4e4186a609368e3

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 67 +++
 3 files changed, 70 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f8657c3..193db70 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -417,6 +417,8 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *gobj,
int flags);
+struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
+   struct dma_buf *dma_buf);
 int amdgpu_gem_prime_pin(struct drm_gem_object *obj);
 void amdgpu_gem_prime_unpin(struct drm_gem_object *obj);
 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 31383e0..df30b08 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -868,7 +868,7 @@ static struct drm_driver kms_driver = {
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
.gem_prime_export = amdgpu_gem_prime_export,
-   .gem_prime_import = drm_gem_prime_import,
+   .gem_prime_import = amdgpu_gem_prime_import,
.gem_prime_pin = amdgpu_gem_prime_pin,
.gem_prime_unpin = amdgpu_gem_prime_unpin,
.gem_prime_res_obj = amdgpu_gem_prime_res_obj,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index ae9c106..283b523 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -26,6 +26,7 @@
 #include 
 
 #include "amdgpu.h"
+#include "amdgpu_display.h"
 #include 
 #include 
 
@@ -164,6 +165,50 @@ struct reservation_object *amdgpu_gem_prime_res_obj(struct 
drm_gem_object *obj)
return bo->tbo.resv;
 }
 
+static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf,
+  enum dma_data_direction direction)
+{
+   struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
+   struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+   struct ttm_operation_ctx ctx = { true, false };
+   u32 domain = amdgpu_framebuffer_domains(adev);
+   int ret = 0;
+   bool reads = (direction == DMA_BIDIRECTIONAL ||
+ direction == DMA_FROM_DEVICE);
+
+   if (!reads || !(domain & AMDGPU_GEM_DOMAIN_GTT))
+   return 0;
+
+   /* move to gtt */
+   ret = amdgpu_bo_reserve(bo, false);
+   if (unlikely(ret != 0))
+   return ret;
+
+   if (!bo->pin_count && (bo->allowed_domains & AMDGPU_GEM_DOMAIN_GTT)) {
+   amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
+   ret = ttm_bo_validate(>tbo, >placement, );
+   }
+
+   amdgpu_bo_unreserve(bo);
+   return ret;
+}
+
+static const struct dma_buf_ops amdgpu_dmabuf_ops = {
+   .attach = drm_gem_map_attach,
+   .detach = drm_gem_map_detach,
+   .map_dma_buf = drm_gem_map_dma_buf,
+   .unmap_dma_buf = drm_gem_unmap_dma_buf,
+   .release = drm_gem_dmabuf_release,
+   .begin_cpu_access = amdgpu_gem_begin_cpu_access,
+   .map = drm_gem_dmabuf_kmap,
+   .map_atomic = drm_gem_dmabuf_kmap_atomic,
+   .unmap = drm_gem_dmabuf_kunmap,
+   .unmap_atomic = drm_gem_dmabuf_kunmap_atomic,
+   .mmap = drm_gem_dmabuf_mmap,
+   .vmap = drm_gem_dmabuf_vmap,
+   .vunmap = drm_gem_dmabuf_vunmap,
+};
+
 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *gobj,
int flags)
@@ -178,5 +223,27 @@ struct dma_buf *amdgpu_gem_prime_export(struct drm_device 
*dev,
buf = drm_gem_prime_export(dev, gobj, flags);
if (!IS_ERR(buf))
buf->file->f_mapping = dev->anon_inode->i_mapping;
+   buf->ops = _dmabuf_ops;
+
return buf;
 }
+
+struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
+   struct dma_buf *dma_buf)
+{
+   stru

[PATCH 2/3] drm: export gem dmabuf_ops for drivers to reuse

[Samuel Li]

Change-Id: I03c22a890d2305f3243d88019d1a28bddd4ddda7
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/drm_prime.c | 53 ++---
 include/drm/drm_prime.h | 22 +++
 2 files changed, 53 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 8de93a2..68a69e9 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -180,9 +180,8 @@ static int drm_prime_lookup_buf_handle(struct 
drm_prime_file_private *prime_fpri
return -ENOENT;
 }
 
-static int drm_gem_map_attach(struct dma_buf *dma_buf,
- struct device *target_dev,
- struct dma_buf_attachment *attach)
+int drm_gem_map_attach(struct dma_buf *dma_buf, struct device *target_dev,
+  struct dma_buf_attachment *attach)
 {
struct drm_prime_attachment *prime_attach;
struct drm_gem_object *obj = dma_buf->priv;
@@ -200,9 +199,10 @@ static int drm_gem_map_attach(struct dma_buf *dma_buf,
 
return dev->driver->gem_prime_pin(obj);
 }
+EXPORT_SYMBOL(drm_gem_map_attach);
 
-static void drm_gem_map_detach(struct dma_buf *dma_buf,
-  struct dma_buf_attachment *attach)
+void drm_gem_map_detach(struct dma_buf *dma_buf,
+   struct dma_buf_attachment *attach)
 {
struct drm_prime_attachment *prime_attach = attach->priv;
struct drm_gem_object *obj = dma_buf->priv;
@@ -227,6 +227,7 @@ static void drm_gem_map_detach(struct dma_buf *dma_buf,
kfree(prime_attach);
attach->priv = NULL;
 }
+EXPORT_SYMBOL(drm_gem_map_detach);
 
 void drm_prime_remove_buf_handle_locked(struct drm_prime_file_private 
*prime_fpriv,
struct dma_buf *dma_buf)
@@ -253,8 +254,8 @@ void drm_prime_remove_buf_handle_locked(struct 
drm_prime_file_private *prime_fpr
}
 }
 
-static struct sg_table *drm_gem_map_dma_buf(struct dma_buf_attachment *attach,
-   enum dma_data_direction dir)
+struct sg_table *drm_gem_map_dma_buf(struct dma_buf_attachment *attach,
+enum dma_data_direction dir)
 {
struct drm_prime_attachment *prime_attach = attach->priv;
struct drm_gem_object *obj = attach->dmabuf->priv;
@@ -289,13 +290,15 @@ static struct sg_table *drm_gem_map_dma_buf(struct 
dma_buf_attachment *attach,
 
return sgt;
 }
+EXPORT_SYMBOL(drm_gem_map_dma_buf);
 
-static void drm_gem_unmap_dma_buf(struct dma_buf_attachment *attach,
- struct sg_table *sgt,
- enum dma_data_direction dir)
+void drm_gem_unmap_dma_buf(struct dma_buf_attachment *attach,
+  struct sg_table *sgt,
+  enum dma_data_direction dir)
 {
/* nothing to be done here */
 }
+EXPORT_SYMBOL(drm_gem_unmap_dma_buf);
 
 /**
  * drm_gem_dmabuf_export - dma_buf export implementation for GEM
@@ -346,47 +349,52 @@ void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_release);
 
-static void *drm_gem_dmabuf_vmap(struct dma_buf *dma_buf)
+void *drm_gem_dmabuf_vmap(struct dma_buf *dma_buf)
 {
struct drm_gem_object *obj = dma_buf->priv;
struct drm_device *dev = obj->dev;
 
return dev->driver->gem_prime_vmap(obj);
 }
+EXPORT_SYMBOL(drm_gem_dmabuf_vmap);
 
-static void drm_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void *vaddr)
+void drm_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void *vaddr)
 {
struct drm_gem_object *obj = dma_buf->priv;
struct drm_device *dev = obj->dev;
 
dev->driver->gem_prime_vunmap(obj, vaddr);
 }
+EXPORT_SYMBOL(drm_gem_dmabuf_vunmap);
 
-static void *drm_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf,
-   unsigned long page_num)
+void *drm_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf,
+unsigned long page_num)
 {
return NULL;
 }
+EXPORT_SYMBOL(drm_gem_dmabuf_kmap_atomic);
 
-static void drm_gem_dmabuf_kunmap_atomic(struct dma_buf *dma_buf,
-unsigned long page_num, void *addr)
+void drm_gem_dmabuf_kunmap_atomic(struct dma_buf *dma_buf,
+ unsigned long page_num, void *addr)
 {
 
 }
-static void *drm_gem_dmabuf_kmap(struct dma_buf *dma_buf,
-unsigned long page_num)
+EXPORT_SYMBOL(drm_gem_dmabuf_kunmap_atomic);
+
+void *drm_gem_dmabuf_kmap(struct dma_buf *dma_buf, unsigned long page_num)
 {
return NULL;
 }
+EXPORT_SYMBOL(drm_gem_dmabuf_kmap);
 
-static void drm_gem_dmabuf_kunmap(struct dma_buf *dma_buf,
- unsigned long page_num, void *addr)
+void drm_gem_dmabuf_kunmap(struct dma_buf *dma_buf, unsi

[PATCH 1/3] drm/amdgpu: allow framebuffer in GART memory as well

[Samuel Li]

From: Christian König <christian.koe...@amd.com>

On CZ and newer APUs we can pin the fb into GART as well as VRAM.

v2: Don't enable gpu_vm_support for Raven yet since it leads to
a black screen. Need to debug this further before enabling.

Change-Id: Id0f8af3110e54a3aabf7a258871867bc121cc1a2
Signed-off-by: Christian König <christian.koe...@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzov...@amd.com>
Acked-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 14 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c| 10 ++
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +--
 4 files changed, 29 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index d704a45..d9fdc19 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -29,6 +29,7 @@
 #include "amdgpu_i2c.h"
 #include "atom.h"
 #include "amdgpu_connectors.h"
+#include "amdgpu_display.h"
 #include 
 
 #include 
@@ -188,7 +189,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
goto cleanup;
}
 
-   r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, );
+   r = amdgpu_bo_pin(new_abo, amdgpu_framebuffer_domains(adev), );
if (unlikely(r != 0)) {
DRM_ERROR("failed to pin new abo buffer before flip\n");
goto unreserve;
@@ -501,6 +502,17 @@ static const struct drm_framebuffer_funcs amdgpu_fb_funcs 
= {
.create_handle = amdgpu_user_framebuffer_create_handle,
 };
 
+uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
+{
+   uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
+
+   if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN &&
+   adev->flags & AMD_IS_APU)
+   domain |= AMDGPU_GEM_DOMAIN_GTT;
+
+   return domain;
+}
+
 int
 amdgpu_framebuffer_init(struct drm_device *dev,
struct amdgpu_framebuffer *rfb,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 11ae4ab..f241949 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -23,6 +23,7 @@
 #ifndef __AMDGPU_DISPLAY_H__
 #define __AMDGPU_DISPLAY_H__
 
+uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev);
 struct drm_framebuffer *
 amdgpu_user_framebuffer_create(struct drm_device *dev,
   struct drm_file *file_priv,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 90fa8e8..9be3228 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -38,6 +38,8 @@
 
 #include 
 
+#include "amdgpu_display.h"
+
 /* object hierarchy -
this contains a helper + a amdgpu fb
the helper contains a pointer to amdgpu framebuffer baseclass.
@@ -124,7 +126,7 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
struct drm_gem_object *gobj = NULL;
struct amdgpu_bo *abo = NULL;
bool fb_tiled = false; /* useful for testing */
-   u32 tiling_flags = 0;
+   u32 tiling_flags = 0, domain;
int ret;
int aligned_size, size;
int height = mode_cmd->height;
@@ -135,12 +137,12 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
/* need to align pitch with crtc limits */
mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
  fb_tiled);
+   domain = amdgpu_framebuffer_domains(adev);
 
height = ALIGN(mode_cmd->height, 8);
size = mode_cmd->pitches[0] * height;
aligned_size = ALIGN(size, PAGE_SIZE);
-   ret = amdgpu_gem_object_create(adev, aligned_size, 0,
-  AMDGPU_GEM_DOMAIN_VRAM,
+   ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
   AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
   AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
   AMDGPU_GEM_CREATE_VRAM_CLEARED,
@@ -166,7 +168,7 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
}
 
 
-   ret = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, NULL);
+   ret = amdgpu_bo_pin(abo, domain, NULL);
if (ret) {
amdgpu_bo_unreserve(abo);
goto out_unref;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index a3bf021..9b05abd 100644
--- a/

[PATCH 3/3] drm/amdgpu: Move to gtt before cpu accesses dma buf.

[Samuel Li]

To improve cpu read performance. This is implemented for APUs currently.

v2: Adapt to change 
https://lists.freedesktop.org/archives/amd-gfx/2017-October/015174.html
v3: Adapt to change "forward begin_cpu_access callback to drivers"

Change-Id: I7a583e23a9ee706e0edd2a46f4e4186a609368e3
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 26 ++
 3 files changed, 28 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f8657c3..4204d87 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -420,6 +420,7 @@ struct dma_buf *amdgpu_gem_prime_export(struct drm_device 
*dev,
 int amdgpu_gem_prime_pin(struct drm_gem_object *obj);
 void amdgpu_gem_prime_unpin(struct drm_gem_object *obj);
 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
+int amdgpu_gem_prime_begin_cpu_access(struct drm_gem_object *obj, enum 
dma_data_direction direction);
 void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj);
 void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
 int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct 
*vma);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 31383e0..87d05b5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -874,6 +874,7 @@ static struct drm_driver kms_driver = {
.gem_prime_res_obj = amdgpu_gem_prime_res_obj,
.gem_prime_get_sg_table = amdgpu_gem_prime_get_sg_table,
.gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
+   .gem_prime_begin_cpu_access = amdgpu_gem_prime_begin_cpu_access,
.gem_prime_vmap = amdgpu_gem_prime_vmap,
.gem_prime_vunmap = amdgpu_gem_prime_vunmap,
.gem_prime_mmap = amdgpu_gem_prime_mmap,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index ae9c106..1f5063e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -26,6 +26,7 @@
 #include 
 
 #include "amdgpu.h"
+#include "amdgpu_display.h"
 #include 
 #include 
 
@@ -164,6 +165,30 @@ struct reservation_object *amdgpu_gem_prime_res_obj(struct 
drm_gem_object *obj)
return bo->tbo.resv;
 }
 
+int amdgpu_gem_prime_begin_cpu_access(struct drm_gem_object *obj, enum 
dma_data_direction direction)
+{
+   struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
+   struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+   struct ttm_operation_ctx ctx = { true, false };
+   u32 domain = amdgpu_framebuffer_domains(adev);
+   long ret = 0;
+   bool reads = (direction == DMA_BIDIRECTIONAL || direction == 
DMA_FROM_DEVICE);
+
+   if (!reads || !(domain & AMDGPU_GEM_DOMAIN_GTT) || bo->pin_count)
+   return 0;
+
+   /* move to gtt */
+   ret = amdgpu_bo_reserve(bo, false);
+   if (unlikely(ret != 0))
+   return ret;
+
+   amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
+   ret = ttm_bo_validate(>tbo, >placement, );
+
+   amdgpu_bo_unreserve(bo);
+   return ret;
+}
+
 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *gobj,
int flags)
@@ -178,5 +203,6 @@ struct dma_buf *amdgpu_gem_prime_export(struct drm_device 
*dev,
buf = drm_gem_prime_export(dev, gobj, flags);
if (!IS_ERR(buf))
buf->file->f_mapping = dev->anon_inode->i_mapping;
+
return buf;
 }
-- 
2.7.4

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[PATCH 2/3] drm/amdgpu: allow framebuffer in GART memory as well

[Samuel Li]

From: Christian König <christian.koe...@amd.com>

On CZ and newer APUs we can pin the fb into GART as well as VRAM.

v2: Don't enable gpu_vm_support for Raven yet since it leads to
a black screen. Need to debug this further before enabling.

Change-Id: Id0f8af3110e54a3aabf7a258871867bc121cc1a2
Signed-off-by: Christian König <christian.koe...@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzov...@amd.com>
Acked-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 14 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c| 10 ++
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +--
 4 files changed, 29 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index d704a45..d9fdc19 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -29,6 +29,7 @@
 #include "amdgpu_i2c.h"
 #include "atom.h"
 #include "amdgpu_connectors.h"
+#include "amdgpu_display.h"
 #include 
 
 #include 
@@ -188,7 +189,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
goto cleanup;
}
 
-   r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, );
+   r = amdgpu_bo_pin(new_abo, amdgpu_framebuffer_domains(adev), );
if (unlikely(r != 0)) {
DRM_ERROR("failed to pin new abo buffer before flip\n");
goto unreserve;
@@ -501,6 +502,17 @@ static const struct drm_framebuffer_funcs amdgpu_fb_funcs 
= {
.create_handle = amdgpu_user_framebuffer_create_handle,
 };
 
+uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
+{
+   uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
+
+   if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN &&
+   adev->flags & AMD_IS_APU)
+   domain |= AMDGPU_GEM_DOMAIN_GTT;
+
+   return domain;
+}
+
 int
 amdgpu_framebuffer_init(struct drm_device *dev,
struct amdgpu_framebuffer *rfb,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 11ae4ab..f241949 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -23,6 +23,7 @@
 #ifndef __AMDGPU_DISPLAY_H__
 #define __AMDGPU_DISPLAY_H__
 
+uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev);
 struct drm_framebuffer *
 amdgpu_user_framebuffer_create(struct drm_device *dev,
   struct drm_file *file_priv,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 90fa8e8..9be3228 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -38,6 +38,8 @@
 
 #include 
 
+#include "amdgpu_display.h"
+
 /* object hierarchy -
this contains a helper + a amdgpu fb
the helper contains a pointer to amdgpu framebuffer baseclass.
@@ -124,7 +126,7 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
struct drm_gem_object *gobj = NULL;
struct amdgpu_bo *abo = NULL;
bool fb_tiled = false; /* useful for testing */
-   u32 tiling_flags = 0;
+   u32 tiling_flags = 0, domain;
int ret;
int aligned_size, size;
int height = mode_cmd->height;
@@ -135,12 +137,12 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
/* need to align pitch with crtc limits */
mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
  fb_tiled);
+   domain = amdgpu_framebuffer_domains(adev);
 
height = ALIGN(mode_cmd->height, 8);
size = mode_cmd->pitches[0] * height;
aligned_size = ALIGN(size, PAGE_SIZE);
-   ret = amdgpu_gem_object_create(adev, aligned_size, 0,
-  AMDGPU_GEM_DOMAIN_VRAM,
+   ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
   AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
   AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
   AMDGPU_GEM_CREATE_VRAM_CLEARED,
@@ -166,7 +168,7 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
}
 
 
-   ret = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, NULL);
+   ret = amdgpu_bo_pin(abo, domain, NULL);
if (ret) {
amdgpu_bo_unreserve(abo);
goto out_unref;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index a3bf021..9b05abd 100644
--- a/

[PATCH 1/3] drm/prime: forward begin_cpu_access callback to drivers

[Samuel Li]

From: Christian König 

Allow drivers to implement their own begin_cpu_access callback.

Change-Id: I97709b42b9351a04ee7e01106107a87bc56ea258
Signed-off-by: Christian König 
---
 drivers/gpu/drm/drm_prime.c | 13 +
 include/drm/drm_drv.h   |  2 ++
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 8de93a2..b4b0e64 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -346,6 +346,18 @@ void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
 }
 EXPORT_SYMBOL(drm_gem_dmabuf_release);
 
+static int drm_gem_dmabuf_begin_cpu_access(struct dma_buf *dma_buf,
+   enum dma_data_direction direction)
+{
+   struct drm_gem_object *obj = dma_buf->priv;
+   struct drm_device *dev = obj->dev;
+
+   if (!dev->driver->gem_prime_begin_cpu_access)
+   return 0;
+
+   return dev->driver->gem_prime_begin_cpu_access(obj, direction);
+}
+
 static void *drm_gem_dmabuf_vmap(struct dma_buf *dma_buf)
 {
struct drm_gem_object *obj = dma_buf->priv;
@@ -403,6 +415,7 @@ static const struct dma_buf_ops drm_gem_prime_dmabuf_ops =  
{
.map_dma_buf = drm_gem_map_dma_buf,
.unmap_dma_buf = drm_gem_unmap_dma_buf,
.release = drm_gem_dmabuf_release,
+   .begin_cpu_access = drm_gem_dmabuf_begin_cpu_access,
.map = drm_gem_dmabuf_kmap,
.map_atomic = drm_gem_dmabuf_kmap_atomic,
.unmap = drm_gem_dmabuf_kunmap,
diff --git a/include/drm/drm_drv.h b/include/drm/drm_drv.h
index 412e83a..1fbf298 100644
--- a/include/drm/drm_drv.h
+++ b/include/drm/drm_drv.h
@@ -475,6 +475,8 @@ struct drm_driver {
struct drm_device *dev,
struct dma_buf_attachment *attach,
struct sg_table *sgt);
+   int (*gem_prime_begin_cpu_access)(struct drm_gem_object *obj,
+  enum dma_data_direction direction);
void *(*gem_prime_vmap)(struct drm_gem_object *obj);
void (*gem_prime_vunmap)(struct drm_gem_object *obj, void *vaddr);
int (*gem_prime_mmap)(struct drm_gem_object *obj,
-- 
2.7.4

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Re: FW: [PATCH v2 2/2] drm/amdgpu: Move to gtt before cpu accesses dma buf.

[Samuel Li]

> This is for the DMA-buf mapping function, not the normal driver mmap 
> implementation. So we can be pretty sure that the memory will be CPU accessed.
> 
> The question in my mind is if it really is such a good idea to ping/pong the 
> page when the GPU/CPU is accessing them. Not that I want to block this patch, 
> but that is usually something we try to avoid.
Between mmap and cpu access, there could be other operations, so we only 
migrate once when cpu when CPU read is requested.

Sam



On 2017-12-14 12:27 PM, Christian König wrote:
> Am 14.12.2017 um 17:16 schrieb Michel Dänzer:
>> On 2017-12-14 09:07 AM, Christian König wrote:
>>> Please CC Michel as well,
>> No need, I read the lists (just sometimes get a little swamped and take
>> time to catch up).
>>
>>
>>> he originally commented that we should try to solve this in the DDX instead.
>> I don't think a DDX driver is even involved in the scenario Sam's
>> working on.
>>
>> Do you mean that the BO should be created in GTT in the first place if
>> possible?
> 
> Yes, well as far as I understood that's what you suggested.
> 
>>   I did suggest that before, but I'm not sure it's feasible in
>> this scenario.
> 
> I agree, not the slightest idea how the user space app created the BO in the 
> first place.
> 
>>
>>
>>> And BTW: Why don't we just do the migration during the mmap call?
>> At mmap time, we don't know when the BO will actually be accessed by the
>> CPU (or indeed whether at all). If we do the migration at that point,
>> there's no guarantee that the BO will still be in GTT when it's accessed
>> by the CPU.
> 
> This is for the DMA-buf mapping function, not the normal driver mmap 
> implementation. So we can be pretty sure that the memory will be CPU accessed.
> 
> The question in my mind is if it really is such a good idea to ping/pong the 
> page when the GPU/CPU is accessing them. Not that I want to block this patch, 
> but that is usually something we try to avoid.
> 
> Regards,
> Christian.
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Re: FW: [PATCH v2 2/2] drm/amdgpu: Move to gtt before cpu accesses dma buf.

[Samuel Li]

For the record.


On 2017-12-13 01:26 PM, Christian König wrote:
> Actually we try to avoid that drivers define their own dma_buf_ops in DRM.
> 
> That's why you have all those callbacks in drm_driver which just mirror the 
> dma_buf interface but unpack the GEM object from the dma-buf object.
> 
> There are quite a number of exceptions, but those drivers then implement 
> everything on their own because the DRM marshaling doesn't make sense for 
> them.
> 
> Christian.
> 
> Am 13.12.2017 um 19:01 schrieb Samuel Li:
>> That is an approach. The cost is to add a new call back, which is not 
>> necessary though, since driver can always actually define their own 
>> dma_buf_ops.
>> The intention here is to allow a driver reuse drm_gem_prime_dmabuf_ops{}. If 
>> you would like to go this far, maybe a more straight forward way is to 
>> export those ops, e.g. drm_gem_map_attach, so that a driver can use them in 
>> its own definitions.
>>
>> Sam
>>
>>
>>
>> On 2017-12-13 05:23 AM, Christian König wrote:
>>> Something like the attached patch. Not even compile tested.
>>>
>>> Christian.
>>>
>>> Am 12.12.2017 um 20:13 schrieb Samuel Li:
>>>> Not sure if I understand your comments correctly. Currently amdgpu prime 
>>>> reuses drm_gem_prime_dmabuf_ops{}, and it is defined as static which is 
>>>> reasonable. I do not see an easier way to introduce 
>>>> amdgpu_gem_begin_cpu_access().
>>>>
>>>> Sam
>>>>
>>>> On 2017-12-12 01:30 PM, Christian König wrote:
>>>>>> +    while (amdgpu_dmabuf_ops.begin_cpu_access != 
>>>>>> amdgpu_gem_begin_cpu_access)
>>>>> I would rather just add the four liner code to drm to forward the 
>>>>> begin_cpu_access callback into a drm_driver callback instead of all this.
>>>>>
>>>>> But apart from that it looks good to me.
>>>>>
>>>>> Christian.
>>>>>
>>>>> Am 12.12.2017 um 19:14 schrieb Li, Samuel:
>>>>>> A gentle ping on this one, Christian, can you take a look at this?
>>>>>>
>>>>>> Sam
>>>>>>
>>>>>> -Original Message-
>>>>>> From: Li, Samuel
>>>>>> Sent: Friday, December 08, 2017 5:22 PM
>>>>>> To: amd-gfx@lists.freedesktop.org
>>>>>> Cc: Li, Samuel <samuel...@amd.com>
>>>>>> Subject: [PATCH v2 2/2] drm/amdgpu: Move to gtt before cpu accesses dma 
>>>>>> buf.
>>>>>>
>>>>>> To improve cpu read performance. This is implemented for APUs currently.
>>>>>>
>>>>>> v2: Adapt to change 
>>>>>> https://lists.freedesktop.org/archives/amd-gfx/2017-October/015174.html
>>>>>>
>>>>>> Change-Id: I7a583e23a9ee706e0edd2a46f4e4186a609368e3
>>>>>> ---
>>>>>>     drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  2 ++
>>>>>>     drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  2 +-
>>>>>>     drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 58 
>>>>>> +++
>>>>>>     3 files changed, 61 insertions(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
>>>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>>>>> index f8657c3..193db70 100644
>>>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>>>>> @@ -417,6 +417,8 @@ amdgpu_gem_prime_import_sg_table(struct drm_device 
>>>>>> *dev,  struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
>>>>>>     struct drm_gem_object *gobj,
>>>>>>     int flags);
>>>>>> +struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
>>>>>> +    struct dma_buf *dma_buf);
>>>>>>     int amdgpu_gem_prime_pin(struct drm_gem_object *obj);  void 
>>>>>> amdgpu_gem_prime_unpin(struct drm_gem_object *obj);  struct 
>>>>>> reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *); 
>>>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
>>>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>>>>>> index 31383e0..df30b08 100644
>>>

[PATCH v2 1/2] drm/amdgpu: allow framebuffer in GART memory as well

[Samuel Li]

From: Christian König <christian.koe...@amd.com>

On CZ and newer APUs we can pin the fb into GART as well as VRAM.

v2: Don't enable gpu_vm_support for Raven yet since it leads to
a black screen. Need to debug this further before enabling.

Change-Id: Id0f8af3110e54a3aabf7a258871867bc121cc1a2
Signed-off-by: Christian König <christian.koe...@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzov...@amd.com>
Acked-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 14 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c| 10 ++
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +--
 4 files changed, 29 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index d704a45..d9fdc19 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -29,6 +29,7 @@
 #include "amdgpu_i2c.h"
 #include "atom.h"
 #include "amdgpu_connectors.h"
+#include "amdgpu_display.h"
 #include 
 
 #include 
@@ -188,7 +189,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
goto cleanup;
}
 
-   r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, );
+   r = amdgpu_bo_pin(new_abo, amdgpu_framebuffer_domains(adev), );
if (unlikely(r != 0)) {
DRM_ERROR("failed to pin new abo buffer before flip\n");
goto unreserve;
@@ -501,6 +502,17 @@ static const struct drm_framebuffer_funcs amdgpu_fb_funcs 
= {
.create_handle = amdgpu_user_framebuffer_create_handle,
 };
 
+uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
+{
+   uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
+
+   if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN &&
+   adev->flags & AMD_IS_APU)
+   domain |= AMDGPU_GEM_DOMAIN_GTT;
+
+   return domain;
+}
+
 int
 amdgpu_framebuffer_init(struct drm_device *dev,
struct amdgpu_framebuffer *rfb,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 11ae4ab..f241949 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -23,6 +23,7 @@
 #ifndef __AMDGPU_DISPLAY_H__
 #define __AMDGPU_DISPLAY_H__
 
+uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev);
 struct drm_framebuffer *
 amdgpu_user_framebuffer_create(struct drm_device *dev,
   struct drm_file *file_priv,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 90fa8e8..9be3228 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -38,6 +38,8 @@
 
 #include 
 
+#include "amdgpu_display.h"
+
 /* object hierarchy -
this contains a helper + a amdgpu fb
the helper contains a pointer to amdgpu framebuffer baseclass.
@@ -124,7 +126,7 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
struct drm_gem_object *gobj = NULL;
struct amdgpu_bo *abo = NULL;
bool fb_tiled = false; /* useful for testing */
-   u32 tiling_flags = 0;
+   u32 tiling_flags = 0, domain;
int ret;
int aligned_size, size;
int height = mode_cmd->height;
@@ -135,12 +137,12 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
/* need to align pitch with crtc limits */
mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
  fb_tiled);
+   domain = amdgpu_framebuffer_domains(adev);
 
height = ALIGN(mode_cmd->height, 8);
size = mode_cmd->pitches[0] * height;
aligned_size = ALIGN(size, PAGE_SIZE);
-   ret = amdgpu_gem_object_create(adev, aligned_size, 0,
-  AMDGPU_GEM_DOMAIN_VRAM,
+   ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
   AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
   AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
   AMDGPU_GEM_CREATE_VRAM_CLEARED,
@@ -166,7 +168,7 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
}
 
 
-   ret = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, NULL);
+   ret = amdgpu_bo_pin(abo, domain, NULL);
if (ret) {
amdgpu_bo_unreserve(abo);
goto out_unref;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 0d5047e..5e58dba 100644
--- a/

[PATCH v2 2/2] drm/amdgpu: Move to gtt before cpu accesses dma buf.

[Samuel Li]

To improve cpu read performance. This is implemented for APUs currently.

v2: Adapt to change 
https://lists.freedesktop.org/archives/amd-gfx/2017-October/015174.html

Change-Id: I7a583e23a9ee706e0edd2a46f4e4186a609368e3
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 58 +++
 3 files changed, 61 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f8657c3..193db70 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -417,6 +417,8 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *gobj,
int flags);
+struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
+   struct dma_buf *dma_buf);
 int amdgpu_gem_prime_pin(struct drm_gem_object *obj);
 void amdgpu_gem_prime_unpin(struct drm_gem_object *obj);
 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 31383e0..df30b08 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -868,7 +868,7 @@ static struct drm_driver kms_driver = {
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
.gem_prime_export = amdgpu_gem_prime_export,
-   .gem_prime_import = drm_gem_prime_import,
+   .gem_prime_import = amdgpu_gem_prime_import,
.gem_prime_pin = amdgpu_gem_prime_pin,
.gem_prime_unpin = amdgpu_gem_prime_unpin,
.gem_prime_res_obj = amdgpu_gem_prime_res_obj,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index ae9c106..de6f599 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -26,6 +26,7 @@
 #include 
 
 #include "amdgpu.h"
+#include "amdgpu_display.h"
 #include 
 #include 
 
@@ -164,6 +165,33 @@ struct reservation_object *amdgpu_gem_prime_res_obj(struct 
drm_gem_object *obj)
return bo->tbo.resv;
 }
 
+static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf, enum 
dma_data_direction direction)
+{
+   struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
+   struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+   struct ttm_operation_ctx ctx = { true, false };
+   u32 domain = amdgpu_framebuffer_domains(adev);
+   long ret = 0;
+   bool reads = (direction == DMA_BIDIRECTIONAL || direction == 
DMA_FROM_DEVICE);
+
+   if (!reads || !(domain | AMDGPU_GEM_DOMAIN_GTT) || bo->pin_count)
+   return 0;
+
+   /* move to gtt */
+   ret = amdgpu_bo_reserve(bo, false);
+   if (unlikely(ret != 0))
+   return ret;
+
+   amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
+   ret = ttm_bo_validate(>tbo, >placement, );
+
+   amdgpu_bo_unreserve(bo);
+   return ret;
+}
+
+static struct dma_buf_ops amdgpu_dmabuf_ops;
+static atomic_t aops_lock;
+
 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *gobj,
int flags)
@@ -178,5 +206,35 @@ struct dma_buf *amdgpu_gem_prime_export(struct drm_device 
*dev,
buf = drm_gem_prime_export(dev, gobj, flags);
if (!IS_ERR(buf))
buf->file->f_mapping = dev->anon_inode->i_mapping;
+
+   while (amdgpu_dmabuf_ops.begin_cpu_access != 
amdgpu_gem_begin_cpu_access)
+   {
+   if (!atomic_cmpxchg(_lock, 0, 1)) {
+   amdgpu_dmabuf_ops = *(buf->ops);
+   amdgpu_dmabuf_ops.begin_cpu_access = 
amdgpu_gem_begin_cpu_access;
+   }
+   }
+   buf->ops = _dmabuf_ops;
+
return buf;
 }
+
+struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
+   struct dma_buf *dma_buf)
+{
+   struct drm_gem_object *obj;
+
+   if (dma_buf->ops == _dmabuf_ops) {
+   obj = dma_buf->priv;
+   if (obj->dev == dev) {
+   /*
+* Importing dmabuf exported from out own gem increases
+* refcount on gem itself instead of f_count of dmabuf.
+*/
+   drm_gem_object_get(obj);
+   return obj;
+   }
+   }
+
+   return drm_gem_prime_import(dev, dma_buf);
+}
-- 
2.7.4

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[PATCH 1/1] drm/amdgpu: Pin to gtt before cpu accesses dma buf.

[Samuel Li]

To improve cpu read performance. This is implemented for APUs currently.

Change-Id: I300a7daed8f2b0ba6be71a43196a6b8617ddc62e
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |   2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   |  10 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |   2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 108 ++
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   8 +-
 5 files changed, 126 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f8657c3..193db70 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -417,6 +417,8 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *gobj,
int flags);
+struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
+   struct dma_buf *dma_buf);
 int amdgpu_gem_prime_pin(struct drm_gem_object *obj);
 void amdgpu_gem_prime_unpin(struct drm_gem_object *obj);
 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index d704a45..b5483e4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -147,6 +147,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
struct drm_device *dev = crtc->dev;
struct amdgpu_device *adev = dev->dev_private;
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+   bool gtt_scannable = (adev->asic_type >= CHIP_CARRIZO && adev->flags & 
AMD_IS_APU);
struct amdgpu_framebuffer *old_amdgpu_fb;
struct amdgpu_framebuffer *new_amdgpu_fb;
struct drm_gem_object *obj;
@@ -190,8 +191,13 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
 
r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, );
if (unlikely(r != 0)) {
-   DRM_ERROR("failed to pin new abo buffer before flip\n");
-   goto unreserve;
+   /* latest APUs support gtt scan out */
+   if (gtt_scannable)
+   r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_GTT, 
);
+   if (unlikely(r != 0)) {
+   DRM_ERROR("failed to pin new abo buffer before flip\n");
+   goto unreserve;
+   }
}
 
r = reservation_object_get_fences_rcu(new_abo->tbo.resv, >excl,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 31383e0..df30b08 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -868,7 +868,7 @@ static struct drm_driver kms_driver = {
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
.gem_prime_export = amdgpu_gem_prime_export,
-   .gem_prime_import = drm_gem_prime_import,
+   .gem_prime_import = amdgpu_gem_prime_import,
.gem_prime_pin = amdgpu_gem_prime_pin,
.gem_prime_unpin = amdgpu_gem_prime_unpin,
.gem_prime_res_obj = amdgpu_gem_prime_res_obj,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index ae9c106..9e1424d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -164,6 +164,82 @@ struct reservation_object *amdgpu_gem_prime_res_obj(struct 
drm_gem_object *obj)
return bo->tbo.resv;
 }
 
+static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf, enum 
dma_data_direction direction)
+{
+   struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
+   struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+   long i, ret = 0;
+   unsigned old_count;
+   bool reads = (direction == DMA_BIDIRECTIONAL || direction == 
DMA_FROM_DEVICE);
+   bool gtt_scannable = (adev->asic_type >= CHIP_CARRIZO && adev->flags & 
AMD_IS_APU);
+   u32 domain;
+
+   if (!reads || !gtt_scannable)
+   return 0;
+
+   ret = amdgpu_bo_reserve(bo, false);
+   if (unlikely(ret != 0))
+   return ret;
+
+   /*
+* Wait for all shared fences to complete before we switch to future
+* use of exclusive fence on this prime shared bo.
+*/
+   ret = reservation_object_wait_timeout_rcu(bo->tbo.resv, true, false,
+ MAX_SCHEDULE_TIMEOUT);
+
+   if (unlikely(ret < 0)) {
+   DRM_DEBUG_PRIME("Fence wait failed: %li\n", ret);
+   amdgpu_bo_unreserve(bo);
+   return ret;
+   }
+
+   ret = 0;
+   /* Pin to gtt */
+   domain = 

[PATCH v4 1/1] drm/amdgpu: Add gem_prime_mmap support

[Samuel Li]

v2: drop hdp invalidate/flush.
v3: honor pgoff during prime mmap. Add a barrier after cpu access.
v4: drop begin/end_cpu_access() for now, revisit later.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 34 +++
 3 files changed, 36 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index d2aaad7..edcfa13 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -400,6 +400,7 @@ void amdgpu_gem_prime_unpin(struct drm_gem_object *obj);
 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
 void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj);
 void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
+int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct 
*vma);
 int amdgpu_gem_debugfs_init(struct amdgpu_device *adev);
 
 /* sub-allocation manager, it has to be protected by another lock.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 2cdf844..19c0499 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -843,6 +843,7 @@ static struct drm_driver kms_driver = {
.gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
.gem_prime_vmap = amdgpu_gem_prime_vmap,
.gem_prime_vunmap = amdgpu_gem_prime_vunmap,
+   .gem_prime_mmap = amdgpu_gem_prime_mmap,
 
.name = DRIVER_NAME,
.desc = DRIVER_DESC,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index 5b3f928..83241ca 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -57,6 +57,40 @@ void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, 
void *vaddr)
ttm_bo_kunmap(>dma_buf_vmap);
 }
 
+int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct 
*vma)
+{
+   struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
+   struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+   unsigned asize = amdgpu_bo_size(bo);
+   int ret;
+
+   if (!vma->vm_file)
+   return -ENODEV;
+
+   if (adev == NULL)
+   return -ENODEV;
+
+   /* Check for valid size. */
+   if (asize < vma->vm_end - vma->vm_start)
+   return -EINVAL;
+
+   if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
+   (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
+   return -EPERM;
+   }
+   vma->vm_pgoff += amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
+
+   /* prime mmap does not need to check access, so allow here */
+   ret = drm_vma_node_allow(>vma_node, vma->vm_file->private_data);
+   if (ret)
+   return ret;
+
+   ret = ttm_bo_mmap(vma->vm_file, vma, >mman.bdev);
+   drm_vma_node_revoke(>vma_node, vma->vm_file->private_data);
+
+   return ret;
+}
+
 struct drm_gem_object *
 amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
 struct dma_buf_attachment *attach,
-- 
2.7.4

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Re: [PATCH v2 1/1] drm/amdgpu: Add gem_prime_mmap support

[Samuel Li]

>> +vma->vm_pgoff = amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
> Maybe better use "vma->vm_pgoff += amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;", 
> but I'm not sure.
> How other drivers handle this?
This is a good catch. Looks like pgoff is honored during prime mmap, not a fake 
offset here.

>> +dma_buf->ops = _dmabuf_ops;
> This isn't race free and needs to be fixed.
> Better add callbacks to drm_prime.c similar to drm_gem_dmabuf_mmap().
What do you mean "This isn't race free"?

Regards,
Sam



On 2017-09-15 11:05 AM, Christian König wrote:
> Am 14.09.2017 um 00:39 schrieb Samuel Li:
>> v2: drop hdp invalidate/flush.
>>
>> Signed-off-by: Samuel Li <samuel...@amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  3 ++
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  3 +-
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 77 
>> ++-
>>   3 files changed, 81 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> index d2aaad7..188b705 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> @@ -395,11 +395,14 @@ amdgpu_gem_prime_import_sg_table(struct drm_device 
>> *dev,
>>   struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
>>   struct drm_gem_object *gobj,
>>   int flags);
>> +struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
>> +struct dma_buf *dma_buf);
>>   int amdgpu_gem_prime_pin(struct drm_gem_object *obj);
>>   void amdgpu_gem_prime_unpin(struct drm_gem_object *obj);
>>   struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object 
>> *);
>>   void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj);
>>   void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
>> +int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct 
>> *vma);
>>   int amdgpu_gem_debugfs_init(struct amdgpu_device *adev);
>> /* sub-allocation manager, it has to be protected by another lock.
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> index 2cdf844..9b63ac5 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> @@ -835,7 +835,7 @@ static struct drm_driver kms_driver = {
>>   .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
>>   .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
>>   .gem_prime_export = amdgpu_gem_prime_export,
>> -.gem_prime_import = drm_gem_prime_import,
>> +.gem_prime_import = amdgpu_gem_prime_import,
>>   .gem_prime_pin = amdgpu_gem_prime_pin,
>>   .gem_prime_unpin = amdgpu_gem_prime_unpin,
>>   .gem_prime_res_obj = amdgpu_gem_prime_res_obj,
>> @@ -843,6 +843,7 @@ static struct drm_driver kms_driver = {
>>   .gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
>>   .gem_prime_vmap = amdgpu_gem_prime_vmap,
>>   .gem_prime_vunmap = amdgpu_gem_prime_vunmap,
>> +.gem_prime_mmap = amdgpu_gem_prime_mmap,
>> .name = DRIVER_NAME,
>>   .desc = DRIVER_DESC,
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>> index 5b3f928..13c977a 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
>> @@ -57,6 +57,40 @@ void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, 
>> void *vaddr)
>>   ttm_bo_kunmap(>dma_buf_vmap);
>>   }
>>   +int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct 
>> vm_area_struct *vma)
>> +{
>> +struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
>> +struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
>> +unsigned asize = amdgpu_bo_size(bo);
>> +int ret;
>> +
>> +if (!vma->vm_file)
>> +return -ENODEV;
>> +
>> +if (adev == NULL)
>> +return -ENODEV;
>> +
>> +/* Check for valid size. */
>> +if (asize < vma->vm_end - vma->vm_start)
>> +return -EINVAL;
>> +
>> +if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
>> +(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
>> +return -EPERM;
>> +}
>> +vma->vm_pgoff = amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
> 
> Maybe better use "vma->vm_pgoff += 

[PATCH v2 1/1] drm/amdgpu: Add gem_prime_mmap support

[Samuel Li]

v2: drop hdp invalidate/flush.

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  3 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 77 ++-
 3 files changed, 81 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index d2aaad7..188b705 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -395,11 +395,14 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *gobj,
int flags);
+struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
+   struct dma_buf *dma_buf);
 int amdgpu_gem_prime_pin(struct drm_gem_object *obj);
 void amdgpu_gem_prime_unpin(struct drm_gem_object *obj);
 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
 void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj);
 void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
+int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct 
*vma);
 int amdgpu_gem_debugfs_init(struct amdgpu_device *adev);
 
 /* sub-allocation manager, it has to be protected by another lock.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 2cdf844..9b63ac5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -835,7 +835,7 @@ static struct drm_driver kms_driver = {
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
.gem_prime_export = amdgpu_gem_prime_export,
-   .gem_prime_import = drm_gem_prime_import,
+   .gem_prime_import = amdgpu_gem_prime_import,
.gem_prime_pin = amdgpu_gem_prime_pin,
.gem_prime_unpin = amdgpu_gem_prime_unpin,
.gem_prime_res_obj = amdgpu_gem_prime_res_obj,
@@ -843,6 +843,7 @@ static struct drm_driver kms_driver = {
.gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
.gem_prime_vmap = amdgpu_gem_prime_vmap,
.gem_prime_vunmap = amdgpu_gem_prime_vunmap,
+   .gem_prime_mmap = amdgpu_gem_prime_mmap,
 
.name = DRIVER_NAME,
.desc = DRIVER_DESC,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index 5b3f928..13c977a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -57,6 +57,40 @@ void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, 
void *vaddr)
ttm_bo_kunmap(>dma_buf_vmap);
 }
 
+int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct 
*vma)
+{
+   struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
+   struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+   unsigned asize = amdgpu_bo_size(bo);
+   int ret;
+
+   if (!vma->vm_file)
+   return -ENODEV;
+
+   if (adev == NULL)
+   return -ENODEV;
+
+   /* Check for valid size. */
+   if (asize < vma->vm_end - vma->vm_start)
+   return -EINVAL;
+
+   if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
+   (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
+   return -EPERM;
+   }
+   vma->vm_pgoff = amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
+
+   /* prime mmap does not need to check access, so allow here */
+   ret = drm_vma_node_allow(>vma_node, vma->vm_file->private_data);
+   if (ret)
+   return ret;
+
+   ret = ttm_bo_mmap(vma->vm_file, vma, >mman.bdev);
+   drm_vma_node_revoke(>vma_node, vma->vm_file->private_data);
+
+   return ret;
+}
+
 struct drm_gem_object *
 amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
 struct dma_buf_attachment *attach,
@@ -130,14 +164,55 @@ struct reservation_object 
*amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
return bo->tbo.resv;
 }
 
+static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf, enum 
dma_data_direction direction)
+{
+   return amdgpu_gem_prime_pin(dma_buf->priv);
+}
+
+static int amdgpu_gem_end_cpu_access(struct dma_buf *dma_buf, enum 
dma_data_direction direction)
+{
+   amdgpu_gem_prime_unpin(dma_buf->priv);
+
+   return 0;
+}
+
+static struct dma_buf_ops amdgpu_dmabuf_ops;
+
 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *gobj,
int flags)
 {
struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
+   struct dma_buf *dma_buf;
 
if (amdgpu_ttm_tt_get_u

Re: [PATCH 6/6] drm/amdgpu: Add gem_prime_mmap support

[Samuel Li]

>>+if (write)
>>+amdgpu_asic_invalidate_hdp(adev);
> You can drop the HDP invalidation here. amdgpu_gem_prime_pin() will pin the 
> BO into system memory.

My understanding here is between CPU and GPU access, the invalidate/flush is 
still needed, since amdgpu_gem_prime_pin() does not do that.
For this one, I might need to move the invalidate() before pin(). Thoughts?

> BTW: You mixed up flush and invalidate. If we need to implement CPU access to 
> VRAM you need to flush when the cpu access starts and invalidate when it ends.
As per the doc I forwarded to you (HDP coherency check), I think the code here 
is correct.

Regards,
Sam




On 2017-09-07 03:02 AM, Christian König wrote:
Am 07.09.2017 um 00:07 schrieb Samuel Li:
> Signed-off-by: Samuel Li <samuel...@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  3 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  3 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 95 
> ++-
>   3 files changed, 99 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 6f262ce..3c43acf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -395,11 +395,14 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
>   struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
>   struct drm_gem_object *gobj,
>   int flags);
> +struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
> +struct dma_buf *dma_buf);
>   int amdgpu_gem_prime_pin(struct drm_gem_object *obj);
>   void amdgpu_gem_prime_unpin(struct drm_gem_object *obj);
>   struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object 
> *);
>   void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj);
>   void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
> +int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct 
> *vma);
>   int amdgpu_gem_debugfs_init(struct amdgpu_device *adev);
> /* sub-allocation manager, it has to be protected by another lock.
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 2cdf844..9b63ac5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -835,7 +835,7 @@ static struct drm_driver kms_driver = {
>   .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
>   .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
>   .gem_prime_export = amdgpu_gem_prime_export,
> -.gem_prime_import = drm_gem_prime_import,
> +.gem_prime_import = amdgpu_gem_prime_import,
>   .gem_prime_pin = amdgpu_gem_prime_pin,
>   .gem_prime_unpin = amdgpu_gem_prime_unpin,
>   .gem_prime_res_obj = amdgpu_gem_prime_res_obj,
> @@ -843,6 +843,7 @@ static struct drm_driver kms_driver = {
>   .gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
>   .gem_prime_vmap = amdgpu_gem_prime_vmap,
>   .gem_prime_vunmap = amdgpu_gem_prime_vunmap,
> +.gem_prime_mmap = amdgpu_gem_prime_mmap,
> .name = DRIVER_NAME,
>   .desc = DRIVER_DESC,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
> index 5b3f928..629a654 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
> @@ -57,6 +57,42 @@ void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, 
> void *vaddr)
>   ttm_bo_kunmap(>dma_buf_vmap);
>   }
>   +int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct 
> vm_area_struct *vma)
> +{
> +struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
> +struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
> +unsigned asize = amdgpu_bo_size(bo);
> +int ret;
> +
> +if (!obj->filp || !vma->vm_file)
> +return -ENODEV;
> +
> +if (adev == NULL)
> +return -ENODEV;
> +
> +/* Check for valid size. */
> +if (asize < vma->vm_end - vma->vm_start)
> +return -EINVAL;
> +
> +if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
> +(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
> +return -EPERM;
> +}
> +vma->vm_pgoff = amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
> +
> +/* prime mmap does not need to check access, so allow here */
> +ret = drm_vma_node_allow(>vma_node, vma->vm_file->private_data);
> +if (ret)
> +return ret;
> +
> +ret = ttm_bo_mmap(vma->vm_file, vma, >mman.bdev);
> +drm_vma_node_revoke(>vma_node, vma->v

[PATCH 4/6] drm/amdgpu/vi: add HDP asic callbacks for VI

[Samuel Li]

From: Alex Deucher <alexander.deuc...@amd.com>

Needed to flush and invalidate the HDP block using the CPU.

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/vi.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 18bb3cb..4ffb40b 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -852,6 +852,18 @@ static uint32_t vi_get_rev_id(struct amdgpu_device *adev)
>> PCIE_EFUSE4__STRAP_BIF_ATI_REV_ID__SHIFT;
 }
 
+static void vi_flush_hdp(struct amdgpu_device *adev)
+{
+   WREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1);
+   RREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL);
+}
+
+static void vi_invalidate_hdp(struct amdgpu_device *adev)
+{
+   WREG32(mmHDP_DEBUG0, 1);
+   RREG32(mmHDP_DEBUG0);
+}
+
 static const struct amdgpu_asic_funcs vi_asic_funcs =
 {
.read_disabled_bios = _read_disabled_bios,
@@ -863,6 +875,8 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
.set_uvd_clocks = _set_uvd_clocks,
.set_vce_clocks = _set_vce_clocks,
.get_config_memsize = _get_config_memsize,
+   .flush_hdp = _flush_hdp,
+   .invalidate_hdp = _invalidate_hdp,
 };
 
 #define CZ_REV_BRISTOL(rev) \
-- 
2.7.4

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[PATCH 6/6] drm/amdgpu: Add gem_prime_mmap support

[Samuel Li]

Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  3 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 95 ++-
 3 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 6f262ce..3c43acf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -395,11 +395,14 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *gobj,
int flags);
+struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
+   struct dma_buf *dma_buf);
 int amdgpu_gem_prime_pin(struct drm_gem_object *obj);
 void amdgpu_gem_prime_unpin(struct drm_gem_object *obj);
 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
 void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj);
 void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
+int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct 
*vma);
 int amdgpu_gem_debugfs_init(struct amdgpu_device *adev);
 
 /* sub-allocation manager, it has to be protected by another lock.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 2cdf844..9b63ac5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -835,7 +835,7 @@ static struct drm_driver kms_driver = {
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
.gem_prime_export = amdgpu_gem_prime_export,
-   .gem_prime_import = drm_gem_prime_import,
+   .gem_prime_import = amdgpu_gem_prime_import,
.gem_prime_pin = amdgpu_gem_prime_pin,
.gem_prime_unpin = amdgpu_gem_prime_unpin,
.gem_prime_res_obj = amdgpu_gem_prime_res_obj,
@@ -843,6 +843,7 @@ static struct drm_driver kms_driver = {
.gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
.gem_prime_vmap = amdgpu_gem_prime_vmap,
.gem_prime_vunmap = amdgpu_gem_prime_vunmap,
+   .gem_prime_mmap = amdgpu_gem_prime_mmap,
 
.name = DRIVER_NAME,
.desc = DRIVER_DESC,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index 5b3f928..629a654 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -57,6 +57,42 @@ void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, 
void *vaddr)
ttm_bo_kunmap(>dma_buf_vmap);
 }
 
+int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct 
*vma)
+{
+   struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
+   struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+   unsigned asize = amdgpu_bo_size(bo);
+   int ret;
+
+   if (!obj->filp || !vma->vm_file)
+   return -ENODEV;
+
+   if (adev == NULL)
+   return -ENODEV;
+
+   /* Check for valid size. */
+   if (asize < vma->vm_end - vma->vm_start)
+   return -EINVAL;
+
+   if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
+   (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
+   return -EPERM;
+   }
+   vma->vm_pgoff = amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
+
+   /* prime mmap does not need to check access, so allow here */
+   ret = drm_vma_node_allow(>vma_node, vma->vm_file->private_data);
+   if (ret)
+   return ret;
+
+   ret = ttm_bo_mmap(vma->vm_file, vma, >mman.bdev);
+   drm_vma_node_revoke(>vma_node, vma->vm_file->private_data);
+   if (ret)
+   return ret;
+
+   return 0;
+}
+
 struct drm_gem_object *
 amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
 struct dma_buf_attachment *attach,
@@ -130,14 +166,71 @@ struct reservation_object 
*amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
return bo->tbo.resv;
 }
 
+static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf, enum 
dma_data_direction direction)
+{
+   struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
+   struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+   bool write = (direction == DMA_BIDIRECTIONAL || direction == 
DMA_TO_DEVICE);
+   int ret;
+
+   ret = amdgpu_gem_prime_pin(dma_buf->priv);
+   if (ret)
+   return ret;
+   /* invalidate the HDP read cache */
+   if (write)
+   amdgpu_asic_invalidate_hdp(adev);
+
+   return ret;
+}
+
+static int amdgpu_gem_end_cpu_access(struct dma_buf *dma_buf, enum 
dma_data_dir

[PATCH 2/6] drm/amdgpu/vi: add HDP asic callbacks for SI

[Samuel Li]

From: Alex Deucher <alexander.deuc...@amd.com>

Needed to flush and invalidate the HDP block using the CPU.

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/si.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 99760c8..ad4b19e 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -1230,6 +1230,18 @@ static void si_detect_hw_virtualization(struct 
amdgpu_device *adev)
adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE;
 }
 
+static void si_flush_hdp(struct amdgpu_device *adev)
+{
+   WREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1);
+   RREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL);
+}
+
+static void si_invalidate_hdp(struct amdgpu_device *adev)
+{
+   WREG32(mmHDP_DEBUG0, 1);
+   RREG32(mmHDP_DEBUG0);
+}
+
 static const struct amdgpu_asic_funcs si_asic_funcs =
 {
.read_disabled_bios = _read_disabled_bios,
@@ -1241,6 +1253,8 @@ static const struct amdgpu_asic_funcs si_asic_funcs =
.set_uvd_clocks = _set_uvd_clocks,
.set_vce_clocks = NULL,
.get_config_memsize = _get_config_memsize,
+   .flush_hdp = _flush_hdp,
+   .invalidate_hdp = _invalidate_hdp,
 };
 
 static uint32_t si_get_rev_id(struct amdgpu_device *adev)
-- 
2.7.4

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[PATCH 5/6] drm/amdgpu/vi: add HDP asic callbacks for SOC15

[Samuel Li]

From: Alex Deucher <alexander.deuc...@amd.com>

Needed to flush and invalidate the HDP block using the CPU.

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/soc15.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c 
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index a74d616..9dff294 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -578,6 +578,20 @@ static uint32_t soc15_get_rev_id(struct amdgpu_device 
*adev)
return nbio_v6_1_get_rev_id(adev);
 }
 
+static void soc15_flush_hdp(struct amdgpu_device *adev)
+{
+   if (adev->flags & AMD_IS_APU)
+   nbio_v7_0_hdp_flush(adev);
+   else
+   nbio_v6_1_hdp_flush(adev);
+}
+
+static void soc15_invalidate_hdp(struct amdgpu_device *adev)
+{
+   WREG32_SOC15(HDP, 0, mmHDP_DEBUG0, 1);
+   RREG32_SOC15(HDP, 0, mmHDP_DEBUG0);
+}
+
 static const struct amdgpu_asic_funcs soc15_asic_funcs =
 {
.read_disabled_bios = _read_disabled_bios,
@@ -589,6 +603,8 @@ static const struct amdgpu_asic_funcs soc15_asic_funcs =
.set_uvd_clocks = _set_uvd_clocks,
.set_vce_clocks = _set_vce_clocks,
.get_config_memsize = _get_config_memsize,
+   .flush_hdp = _flush_hdp,
+   .invalidate_hdp = _invalidate_hdp,
 };
 
 static int soc15_common_early_init(void *handle)
-- 
2.7.4

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[PATCH 3/6] drm/amdgpu/vi: add HDP asic callbacks for CIK

[Samuel Li]

From: Alex Deucher <alexander.deuc...@amd.com>

Needed to flush and invalidate the HDP block using the CPU.

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/cik.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index f3464e7..26807d7 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -1636,6 +1636,18 @@ static void cik_detect_hw_virtualization(struct 
amdgpu_device *adev)
adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE;
 }
 
+static void cik_flush_hdp(struct amdgpu_device *adev)
+{
+   WREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1);
+   RREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL);
+}
+
+static void cik_invalidate_hdp(struct amdgpu_device *adev)
+{
+   WREG32(mmHDP_DEBUG0, 1);
+   RREG32(mmHDP_DEBUG0);
+}
+
 static const struct amdgpu_asic_funcs cik_asic_funcs =
 {
.read_disabled_bios = _read_disabled_bios,
@@ -1647,6 +1659,8 @@ static const struct amdgpu_asic_funcs cik_asic_funcs =
.set_uvd_clocks = _set_uvd_clocks,
.set_vce_clocks = _set_vce_clocks,
.get_config_memsize = _get_config_memsize,
+   .flush_hdp = _flush_hdp,
+   .invalidate_hdp = _invalidate_hdp,
 };
 
 static int cik_common_early_init(void *handle)
-- 
2.7.4

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[PATCH 1/6] drm/amdgpu: add new asic callbacks for HDP flush/invalidation

[Samuel Li]

From: Alex Deucher <alexander.deuc...@amd.com>

Needed to properly flush the HDP cache with the CPU from rather
than the GPU.

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index d2aaad7..6f262ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1279,6 +1279,10 @@ struct amdgpu_asic_funcs {
void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
/* get config memsize register */
u32 (*get_config_memsize)(struct amdgpu_device *adev);
+   /* flush hdp write queue */
+   void (*flush_hdp)(struct amdgpu_device *adev);
+   /* invalidate hdp read cache */
+   void (*invalidate_hdp)(struct amdgpu_device *adev);
 };
 
 /*
@@ -1737,6 +1741,8 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 #define amdgpu_asic_read_bios_from_rom(adev, b, l) 
(adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))
 #define amdgpu_asic_read_register(adev, se, sh, offset, 
v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))
 #define amdgpu_asic_get_config_memsize(adev) 
(adev)->asic_funcs->get_config_memsize((adev))
+#define amdgpu_asic_flush_hdp(adev) (adev)->asic_funcs->flush_hdp((adev))
+#define amdgpu_asic_invalidate_hdp(adev) 
(adev)->asic_funcs->invalidate_hdp((adev))
 #define amdgpu_gart_flush_gpu_tlb(adev, vmid) 
(adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))
 #define amdgpu_gart_set_pte_pde(adev, pt, idx, addr, flags) 
(adev)->gart.gart_funcs->set_pte_pde((adev), (pt), (idx), (addr), (flags))
 #define amdgpu_gart_get_vm_pde(adev, addr) 
(adev)->gart.gart_funcs->get_vm_pde((adev), (addr))
-- 
2.7.4

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[PATCH libdrm 2/2] radeon: use asic id table to get chipset name

[Samuel Li]

Change-Id: I24b6624789d1a9dc0fd3a446b0e6f21ed5183ff2
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 radeon/Makefile.am  |   6 +++
 radeon/Makefile.sources |   6 ++-
 radeon/radeon_asic_id.c | 106 
 radeon/radeon_asic_id.h |  37 +
 4 files changed, 153 insertions(+), 2 deletions(-)
 create mode 100644 radeon/radeon_asic_id.c
 create mode 100644 radeon/radeon_asic_id.h

diff --git a/radeon/Makefile.am b/radeon/Makefile.am
index e241531..69407bc 100644
--- a/radeon/Makefile.am
+++ b/radeon/Makefile.am
@@ -30,6 +30,12 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
 
+libdrmdatadir = @libdrmdatadir@
+ASIC_ID_TABLE_NUM_ENTRIES := $(shell egrep -ci '^[0-9a-f]{4},.*[0-9a-f]+,' \
+   $(top_srcdir)/data/amdgpu.ids)
+AM_CPPFLAGS = -DRADEON_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\" \
+   -DRADEON_ASIC_ID_TABLE_NUM_ENTRIES=$(ASIC_ID_TABLE_NUM_ENTRIES)
+
 libdrm_radeon_la_LTLIBRARIES = libdrm_radeon.la
 libdrm_radeon_ladir = $(libdir)
 libdrm_radeon_la_LDFLAGS = -version-number 1:0:1 -no-undefined
diff --git a/radeon/Makefile.sources b/radeon/Makefile.sources
index 1cf482a..8eaf1c6 100644
--- a/radeon/Makefile.sources
+++ b/radeon/Makefile.sources
@@ -4,7 +4,8 @@ LIBDRM_RADEON_FILES := \
radeon_cs_space.c \
radeon_bo.c \
radeon_cs.c \
-   radeon_surface.c
+   radeon_surface.c \
+   radeon_asic_id.c
 
 LIBDRM_RADEON_H_FILES := \
radeon_bo.h \
@@ -14,7 +15,8 @@ LIBDRM_RADEON_H_FILES := \
radeon_cs_gem.h \
radeon_bo_int.h \
radeon_cs_int.h \
-   r600_pci_ids.h
+   r600_pci_ids.h \
+   radeon_asic_id.h
 
 LIBDRM_RADEON_BOF_FILES := \
bof.c \
diff --git a/radeon/radeon_asic_id.c b/radeon/radeon_asic_id.c
new file mode 100644
index 000..b03502b
--- /dev/null
+++ b/radeon/radeon_asic_id.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/**
+ * \file radeon_asic_id.c
+ *
+ *  Implementation of chipset name lookup functions for radeon device
+ *
+ */
+
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+//#include 
+//#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "xf86atomic.h"
+#include "util/util_asic_id.h"
+#include "radeon_asic_id.h"
+
+
+static pthread_mutex_t asic_id_mutex = PTHREAD_MUTEX_INITIALIZER;
+static struct util_asic_id *radeon_asic_ids;
+static atomic_t refcount;
+
+int radeon_asic_id_initialize(void)
+{
+   int r = 0;
+   pthread_mutex_lock(_id_mutex);
+   if (radeon_asic_ids) {
+   atomic_inc();
+   pthread_mutex_unlock(_id_mutex);
+   return r;
+   }
+
+   r = util_parse_asic_ids(_asic_ids, RADEON_ASIC_ID_TABLE,
+   RADEON_ASIC_ID_TABLE_NUM_ENTRIES);
+   if (r) {
+   fprintf(stderr, "%s: Cannot parse ASIC IDs, 0x%x.",
+   __func__, r);
+   } else
+   atomic_inc();
+
+   pthread_mutex_unlock(_id_mutex);
+   return r;
+}
+
+void radeon_asic_id_deinitialize(void)
+{
+   const struct util_asic_id *id;
+
+   assert(atomic_read() > 0);
+   pthread_mutex_lock(_id_mutex);
+   if (atomic_dec_and_test()) {
+   if (radeon_asic_ids) {
+   for (id = radeon_asic_ids; id->did; id++)
+   free(id->marketing_name);
+   free(radeon_asic_ids);
+   radeon_asic_ids = NULL;
+   }
+   }
+   pthread_mutex_unlock(_id_mutex);
+}
+
+const char *radeon_get_marketing_name(uint32_t device_id, uint32_t pci_rev_id)
+{
+   const struct util_asic_id *id;
+
+   if (!radeon_asic_ids)
+   return NULL;

[PATCH libdrm 1/2] util: move some files to an ASIC neutral directory.

[Samuel Li]

Change-Id: Iac1c4870253e8b8860a61b7cf175e7a25cc95921
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 Makefile.sources |  10 +-
 amdgpu/Makefile.am   |   3 +-
 amdgpu/Makefile.sources  |   7 +-
 amdgpu/amdgpu_asic_id.c  | 219 ---
 amdgpu/amdgpu_device.c   |   7 +-
 amdgpu/amdgpu_internal.h |  11 +-
 amdgpu/util_hash.c   | 387 ---
 amdgpu/util_hash.h   | 107 -
 amdgpu/util_hash_table.c | 262 
 amdgpu/util_hash_table.h |  73 -
 util/util_asic_id.c  | 217 ++
 util/util_asic_id.h  |  39 +
 util/util_hash.c | 387 +++
 util/util_hash.h | 107 +
 util/util_hash_table.c   | 262 
 util/util_hash_table.h   |  73 +
 16 files changed, 1102 insertions(+), 1069 deletions(-)
 delete mode 100644 amdgpu/amdgpu_asic_id.c
 delete mode 100644 amdgpu/util_hash.c
 delete mode 100644 amdgpu/util_hash.h
 delete mode 100644 amdgpu/util_hash_table.c
 delete mode 100644 amdgpu/util_hash_table.h
 create mode 100644 util/util_asic_id.c
 create mode 100644 util/util_asic_id.h
 create mode 100644 util/util_hash.c
 create mode 100644 util/util_hash.h
 create mode 100644 util/util_hash_table.c
 create mode 100644 util/util_hash_table.h

diff --git a/Makefile.sources b/Makefile.sources
index 10aa1d0..f2b0ec6 100644
--- a/Makefile.sources
+++ b/Makefile.sources
@@ -10,12 +10,18 @@ LIBDRM_FILES := \
libdrm_macros.h \
libdrm_lists.h \
util_double_list.h \
-   util_math.h
+   util_math.h \
+   util/util_asic_id.c \
+   util/util_hash.c \
+   util/util_hash_table.c
 
 LIBDRM_H_FILES := \
libsync.h \
xf86drm.h \
-   xf86drmMode.h
+   xf86drmMode.h \
+   util/util_asic_id.h \
+   util/util_hash.h \
+   util/util_hash_table.h
 
 LIBDRM_INCLUDE_H_FILES := \
include/drm/drm.h \
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index 66f6f67..c3e83d6 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -28,7 +28,8 @@ AM_CFLAGS = \
$(WARN_CFLAGS) \
-I$(top_srcdir) \
$(PTHREADSTUBS_CFLAGS) \
-   -I$(top_srcdir)/include/drm
+   -I$(top_srcdir)/include/drm \
+   -I$(top_srcdir)/util
 
 libdrmdatadir = @libdrmdatadir@
 ASIC_ID_TABLE_NUM_ENTRIES := $(shell egrep -ci '^[0-9a-f]{4},.*[0-9a-f]+,' \
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index bc3abaa..23e9e69 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,15 +1,10 @@
 LIBDRM_AMDGPU_FILES := \
-   amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
amdgpu_gpu_info.c \
amdgpu_internal.h \
-   amdgpu_vamgr.c \
-   util_hash.c \
-   util_hash.h \
-   util_hash_table.c \
-   util_hash_table.h
+   amdgpu_vamgr.c
 
 LIBDRM_AMDGPU_H_FILES := \
amdgpu.h
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
deleted file mode 100644
index 3a88896..000
--- a/amdgpu/amdgpu_asic_id.c
+++ /dev/null
@@ -1,219 +0,0 @@
-/*
- * Copyright © 2017 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "xf86drm.h"
-#include "amdgpu_drm.h"
-#include "amdgpu_internal.h"
-
-static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
-{
-   char *buf, *saveptr;
-   char *s_did;
-   char *s_rid;
-   char *s_name;
-   char *endptr;
-   int r = 0;
-
-   buf = strdup(line);
-   if (!buf)
-   return -ENOMEM;
-
-   /* ignore empt

[PATCH libdrm v5 1/1] amdgpu: move asic id table to a separate file

[Samuel Li]

From: Xiaojie Yuan <xiaojie.y...@amd.com>

v2: fix an off by one error and leading white spaces
v3: use thread safe strtok_r(); initialize len before calling getline();
change printf() to drmMsg(); add initial amdgpu.ids
v4: integrate some recent internal changes, including format changes
v5: fix line number for empty/commented lines; realloc to save memory; 
indentation changes

Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Reviewed-by: Junwei Zhang <jerry.zh...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 Makefile.am  |   3 +
 amdgpu/Makefile.am   |   2 +
 amdgpu/Makefile.sources  |   2 +-
 amdgpu/amdgpu_asic_id.c  | 211 +++
 amdgpu/amdgpu_asic_id.h  | 165 
 amdgpu/amdgpu_device.c   |  28 +--
 amdgpu/amdgpu_internal.h |  10 +++
 include/drm/amdgpu.ids   | 170 ++
 8 files changed, 418 insertions(+), 173 deletions(-)
 create mode 100644 amdgpu/amdgpu_asic_id.c
 delete mode 100644 amdgpu/amdgpu_asic_id.h
 create mode 100644 include/drm/amdgpu.ids

diff --git a/Makefile.am b/Makefile.am
index dfb8fcd..8de8f6c 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -45,6 +45,9 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
 
 pkgconfigdir = @pkgconfigdir@
 pkgconfig_DATA = libdrm.pc
+libdrmdatadir = $(datadir)/libdrm
+dist_libdrmdata_DATA = include/drm/amdgpu.ids
+export libdrmdatadir
 
 if HAVE_LIBKMS
 LIBKMS_SUBDIR = libkms
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1b..da71c1c 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,8 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
 
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\"
+
 libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
 libdrm_amdgpu_ladir = $(libdir)
 libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0..bc3abaa 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
 LIBDRM_AMDGPU_FILES := \
-   amdgpu_asic_id.h \
+   amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 000..be39f4e
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "xf86drm.h"
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+   char *buf, *saveptr;
+   char *s_did;
+   char *s_rid;
+   char *s_name;
+   char *endptr;
+   int r = 0;
+
+   buf = strdup(line);
+   if (!buf)
+   return -ENOMEM;
+
+   /* ignore empty line and commented line */
+   if (strlen(line) == 0 || line[0] == '#') {
+   r = -EAGAIN;
+   goto out;
+   }
+
+   /* device id */
+   s_did = strtok_r(buf, ",", );
+   if (!s_did) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->did = strtol(s_did, , 16);
+   if (*endptr) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   /* revision id */
+   s_rid = strtok_r(NULL, ",", );
+   if (!s_rid) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->rid = strtol(s_rid, , 16);
+   if (*endptr) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   /* marketing name */
+ 

[PATCH libdrm v4 1/1] amdgpu: move asic id table to a separate file

[Samuel Li]

From: Xiaojie Yuan <xiaojie.y...@amd.com>

v2: fix an off by one error and leading white spaces
v3: use thread safe strtok_r(); initialize len before calling getline();
change printf() to drmMsg(); add initial amdgpu.ids
v4: integrate some recent internal changes, including format changes

Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Reviewed-by: Junwei Zhang <jerry.zh...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 Makefile.am  |   3 +
 amdgpu/Makefile.am   |   2 +
 amdgpu/Makefile.sources  |   2 +-
 amdgpu/amdgpu_asic_id.c  | 206 +++
 amdgpu/amdgpu_asic_id.h  | 165 -
 amdgpu/amdgpu_device.c   |  28 +--
 amdgpu/amdgpu_internal.h |  10 +++
 include/drm/amdgpu.ids   | 170 ++
 8 files changed, 413 insertions(+), 173 deletions(-)
 create mode 100644 amdgpu/amdgpu_asic_id.c
 delete mode 100644 amdgpu/amdgpu_asic_id.h
 create mode 100644 include/drm/amdgpu.ids

diff --git a/Makefile.am b/Makefile.am
index dfb8fcd..8de8f6c 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -45,6 +45,9 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
 
 pkgconfigdir = @pkgconfigdir@
 pkgconfig_DATA = libdrm.pc
+libdrmdatadir = $(datadir)/libdrm
+dist_libdrmdata_DATA = include/drm/amdgpu.ids
+export libdrmdatadir
 
 if HAVE_LIBKMS
 LIBKMS_SUBDIR = libkms
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1b..da71c1c 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,8 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
 
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\"
+
 libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
 libdrm_amdgpu_ladir = $(libdir)
 libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0..bc3abaa 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
 LIBDRM_AMDGPU_FILES := \
-   amdgpu_asic_id.h \
+   amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 000..a43ca33
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,206 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "xf86drm.h"
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+   char *buf, *saveptr;
+   char *s_did;
+   char *s_rid;
+   char *s_name;
+   char *endptr;
+   int r = 0;
+
+   buf = strdup(line);
+   if (!buf)
+   return -ENOMEM;
+
+   /* ignore empty line and commented line */
+   if (strlen(line) == 0 || line[0] == '#') {
+   r = -EAGAIN;
+   goto out;
+   }
+
+   /* device id */
+   s_did = strtok_r(buf, ",", );
+   if (!s_did) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->did = strtol(s_did, , 16);
+   if (*endptr) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   /* revision id */
+   s_rid = strtok_r(NULL, ",", );
+   if (!s_rid) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->rid = strtol(s_rid, , 16);
+   if (*endptr) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   /* marketing name */
+   s_name = strtok_r(NULL, ",", );
+   if (!s_name) {
+   r = -EINVAL;
+ 

[PATCH libdrm v3 1/1] amdgpu: move asic id table to a separate file

[Samuel Li]

From: Xiaojie Yuan <xiaojie.y...@amd.com>

v2: fix an off by one error and leading white spaces
v3: use thread safe strtok_r(); initialize len before calling getline();
change printf() to drmMsg(); add initial amdgpu.ids

Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Reviewed-by: Junwei Zhang <jerry.zh...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 Makefile.am  |   3 +
 amdgpu/Makefile.am   |   2 +
 amdgpu/Makefile.sources  |   2 +-
 amdgpu/amdgpu_asic_id.c  | 199 +++
 amdgpu/amdgpu_asic_id.h  | 165 ---
 amdgpu/amdgpu_device.c   |  28 +--
 amdgpu/amdgpu_internal.h |  10 +++
 include/drm/amdgpu.ids   | 154 
 8 files changed, 390 insertions(+), 173 deletions(-)
 create mode 100644 amdgpu/amdgpu_asic_id.c
 delete mode 100644 amdgpu/amdgpu_asic_id.h
 create mode 100644 include/drm/amdgpu.ids

diff --git a/Makefile.am b/Makefile.am
index dfb8fcd..8de8f6c 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -45,6 +45,9 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
 
 pkgconfigdir = @pkgconfigdir@
 pkgconfig_DATA = libdrm.pc
+libdrmdatadir = $(datadir)/libdrm
+dist_libdrmdata_DATA = include/drm/amdgpu.ids
+export libdrmdatadir
 
 if HAVE_LIBKMS
 LIBKMS_SUBDIR = libkms
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1b..da71c1c 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,8 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
 
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${libdrmdatadir}/amdgpu.ids\"
+
 libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
 libdrm_amdgpu_ladir = $(libdir)
 libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0..bc3abaa 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
 LIBDRM_AMDGPU_FILES := \
-   amdgpu_asic_id.h \
+   amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 000..5b415e3
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,199 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "xf86drm.h"
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+   char *buf, *saveptr;
+   char *s_did;
+   char *s_rid;
+   char *s_name;
+   char *endptr;
+   int r = 0;
+
+   buf = strdup(line);
+   if (!buf)
+   return -ENOMEM;
+
+   /* ignore empty line and commented line */
+   if (strlen(line) == 0 || line[0] == '#') {
+   r = -EAGAIN;
+   goto out;
+   }
+
+   /* device id */
+   s_did = strtok_r(buf, ",", );
+   if (!s_did) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->did = strtol(s_did, , 16);
+   if (*endptr) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   /* revision id */
+   s_rid = strtok_r(NULL, ",", );
+   if (!s_rid) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->rid = strtol(s_rid, , 16);
+   if (*endptr) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   /* marketing name */
+   s_name = strtok_r(NULL, ",", );
+   if (!s_name) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->marketing_name = st

[PATCH libdrm v2 1/1] amdgpu: move asic id table to a separate file

[Samuel Li]

From: Xiaojie Yuan <xiaojie.y...@amd.com>

v2: fix an off by one error and leading white spaces

Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Reviewed-by: Junwei Zhang <jerry.zh...@amd.com>
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 amdgpu/Makefile.am   |   2 +
 amdgpu/Makefile.sources  |   2 +-
 amdgpu/amdgpu_asic_id.c  | 198 +++
 amdgpu/amdgpu_asic_id.h  | 165 ---
 amdgpu/amdgpu_device.c   |  28 +--
 amdgpu/amdgpu_internal.h |  10 +++
 6 files changed, 232 insertions(+), 173 deletions(-)
 create mode 100644 amdgpu/amdgpu_asic_id.c
 delete mode 100644 amdgpu/amdgpu_asic_id.h

diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1b..ecf9e82 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,8 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
 
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${datadir}/libdrm/amdgpu.ids\"
+
 libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
 libdrm_amdgpu_ladir = $(libdir)
 libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0..bc3abaa 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
 LIBDRM_AMDGPU_FILES := \
-   amdgpu_asic_id.h \
+   amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 000..067f38c
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,198 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+   char *buf;
+   char *s_did;
+   char *s_rid;
+   char *s_name;
+   char *endptr;
+   int r = 0;
+
+   buf = strdup(line);
+   if (!buf)
+   return -ENOMEM;
+
+   /* ignore empty line and commented line */
+   if (strlen(line) == 0 || line[0] == '#') {
+   r = -EAGAIN;
+   goto out;
+   }
+
+   /* device id */
+   s_did = strtok(buf, ",");
+   if (!s_did) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->did = strtol(s_did, , 16);
+   if (*endptr) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   /* revision id */
+   s_rid = strtok(NULL, ",");
+   if (!s_rid) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->rid = strtol(s_rid, , 16);
+   if (*endptr) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   /* marketing name */
+   s_name = strtok(NULL, ",");
+   if (!s_name) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->marketing_name = strdup(s_name);
+   if (id->marketing_name == NULL) {
+   r = -EINVAL;
+   goto out;
+   }
+
+out:
+   free(buf);
+
+   return r;
+}
+
+int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
+{
+   struct amdgpu_asic_id *asic_id_table;
+   struct amdgpu_asic_id *id;
+   FILE *fp;
+   char *line = NULL;
+   size_t len;
+   ssize_t n;
+   int line_num = 1;
+   size_t table_size = 0;
+   size_t table_max_size = 256;
+   int r = 0;
+
+   fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
+   if (!fp) {
+   fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
+ 

[PATCH 1/1] amdgpu: move asic id table to a separate file

[Samuel Li]

From: Xiaojie Yuan <xiaojie.y...@amd.com>

Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Signed-off-by: Samuel Li <samuel...@amd.com>
---
 amdgpu/Makefile.am   |   2 +
 amdgpu/Makefile.sources  |   2 +-
 amdgpu/amdgpu_asic_id.c  | 198 +++
 amdgpu/amdgpu_asic_id.h  | 165 ---
 amdgpu/amdgpu_device.c   |  28 +--
 amdgpu/amdgpu_internal.h |  10 +++
 6 files changed, 232 insertions(+), 173 deletions(-)
 create mode 100644 amdgpu/amdgpu_asic_id.c
 delete mode 100644 amdgpu/amdgpu_asic_id.h

diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1b..ecf9e82 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,8 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
 
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${datadir}/libdrm/amdgpu.ids\"
+
 libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
 libdrm_amdgpu_ladir = $(libdir)
 libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0..bc3abaa 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
 LIBDRM_AMDGPU_FILES := \
-   amdgpu_asic_id.h \
+   amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 000..d50e21a
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,198 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+   char *buf;
+   char *s_did;
+   char *s_rid;
+   char *s_name;
+   char *endptr;
+   int r = 0;
+
+   buf = strdup(line);
+   if (!buf)
+   return -ENOMEM;
+
+   /* ignore empty line and commented line */
+   if (strlen(line) == 0 || line[0] == '#') {
+   r = -EAGAIN;
+   goto out;
+   }
+
+   /* device id */
+   s_did = strtok(buf, ",");
+   if (!s_did) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->did = strtol(s_did, , 16);
+   if (*endptr) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   /* revision id */
+   s_rid = strtok(NULL, ",");
+   if (!s_rid) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->rid = strtol(s_rid, , 16);
+   if (*endptr) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   /* marketing name */
+   s_name = strtok(NULL, ",");
+   if (!s_name) {
+   r = -EINVAL;
+   goto out;
+   }
+
+   id->marketing_name = strdup(s_name);
+   if (id->marketing_name == NULL) {
+   r = -EINVAL;
+   goto out;
+   }
+
+out:
+   free(buf);
+
+   return r;
+}
+
+int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
+{
+   struct amdgpu_asic_id *asic_id_table;
+   struct amdgpu_asic_id *id;
+   FILE *fp;
+   char *line = NULL;
+   size_t len;
+   ssize_t n;
+   int line_num = 1;
+   size_t table_size = 0;
+   size_t table_max_size = 256;
+   int r = 0;
+
+   fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
+   if (!fp) {
+   fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
+   strerror(errno));
+   return -EINVAL;
+   }
+
+   asic_id_table =