[PATCH v2] drm/amd/pm: Vangogh: Add new gpu_metrics_v2_4 to acquire gpu_metrics
To acquire the voltage and current info from gpu_metrics interface,
but gpu_metrics_v2_3 doesn't contain them, and to be backward compatible,
add new gpu_metrics_v2_4 structure.
Reviewed-by: Mario Limonciello
Acked-by: Evan Quan
Signed-off-by: Wenyou Yang
---
.../gpu/drm/amd/include/kgd_pp_interface.h| 69 +++
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 109 --
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c| 3 +
3 files changed, 172 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index 9f542f6e19ed..90989405eddc 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -892,4 +892,73 @@ struct gpu_metrics_v2_3 {
uint16_taverage_temperature_core[8]; // average
CPU core temperature on APUs
uint16_taverage_temperature_l3[2];
};
+
+struct gpu_metrics_v2_4 {
+ struct metrics_table_header common_header;
+
+ /* Temperature (unit: centi-Celsius) */
+ uint16_ttemperature_gfx;
+ uint16_ttemperature_soc;
+ uint16_ttemperature_core[8];
+ uint16_ttemperature_l3[2];
+
+ /* Utilization (unit: centi) */
+ uint16_taverage_gfx_activity;
+ uint16_taverage_mm_activity;
+
+ /* Driver attached timestamp (in ns) */
+ uint64_tsystem_clock_counter;
+
+ /* Power/Energy (unit: mW) */
+ uint16_taverage_socket_power;
+ uint16_taverage_cpu_power;
+ uint16_taverage_soc_power;
+ uint16_taverage_gfx_power;
+ uint16_taverage_core_power[8];
+
+ /* Average clocks (unit: MHz) */
+ uint16_taverage_gfxclk_frequency;
+ uint16_taverage_socclk_frequency;
+ uint16_taverage_uclk_frequency;
+ uint16_taverage_fclk_frequency;
+ uint16_taverage_vclk_frequency;
+ uint16_taverage_dclk_frequency;
+
+ /* Current clocks (unit: MHz) */
+ uint16_tcurrent_gfxclk;
+ uint16_tcurrent_socclk;
+ uint16_tcurrent_uclk;
+ uint16_tcurrent_fclk;
+ uint16_tcurrent_vclk;
+ uint16_tcurrent_dclk;
+ uint16_tcurrent_coreclk[8];
+ uint16_tcurrent_l3clk[2];
+
+ /* Throttle status (ASIC dependent) */
+ uint32_tthrottle_status;
+
+ /* Fans */
+ uint16_tfan_pwm;
+
+ uint16_tpadding[3];
+
+ /* Throttle status (ASIC independent) */
+ uint64_tindep_throttle_status;
+
+ /* Average Temperature (unit: centi-Celsius) */
+ uint16_taverage_temperature_gfx;
+ uint16_taverage_temperature_soc;
+ uint16_taverage_temperature_core[8];
+ uint16_taverage_temperature_l3[2];
+
+ /* Power/Voltage (unit: mV) */
+ uint16_taverage_cpu_voltage;
+ uint16_taverage_soc_voltage;
+ uint16_taverage_gfx_voltage;
+
+ /* Power/Current (unit: mA) */
+ uint16_taverage_cpu_current;
+ uint16_taverage_soc_current;
+ uint16_taverage_gfx_current;
+};
#endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 067b4e0b026c..185d0b50ee8e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -1854,6 +1854,86 @@ static ssize_t vangogh_get_gpu_metrics_v2_3(struct
smu_context *smu,
return sizeof(struct gpu_metrics_v2_3);
}
+static ssize_t vangogh_get_gpu_metrics_v2_4(struct smu_context *smu,
+ void **table)
+{
+ SmuMetrics_t metrics;
+ struct smu_table_context *smu_table = &smu->smu_table;
+ struct gpu_metrics_v2_4 *gpu_metrics =
+ (struct gpu_metrics_v2_4
*)smu_table->gpu_metrics_table;
+ int ret = 0;
+
+ ret = smu_cmn_get_metrics_table(smu, &metrics, true);
+ if (ret)
+ return ret;
+
+ smu_cmn_init_soft_gpu_metric
[PATCH] drm/amd/pm: Vangogh: Add new gpu_metrics_v2_4 to acquire gpu_metrics
To acquire the voltage and current info from gpu_metrics interface,
but gpu_metrics_v2_3 doesn't contain them, and to be backward compatible,
add new gpu_metrics_v2_4 structure.
Acked-by: Evan Quan
Signed-off-by: Wenyou Yang
---
.../gpu/drm/amd/include/kgd_pp_interface.h| 69 +++
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 109 --
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c| 3 +
3 files changed, 172 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index 9f542f6e19ed..0f37dafafcf9 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -892,4 +892,73 @@ struct gpu_metrics_v2_3 {
uint16_taverage_temperature_core[8]; // average
CPU core temperature on APUs
uint16_taverage_temperature_l3[2];
};
+
+struct gpu_metrics_v2_4 {
+ struct metrics_table_header common_header;
+
+ /* Temperature */
+ uint16_ttemperature_gfx;
+ uint16_ttemperature_soc;
+ uint16_ttemperature_core[8];
+ uint16_ttemperature_l3[2];
+
+ /* Utilization */
+ uint16_taverage_gfx_activity;
+ uint16_taverage_mm_activity;
+
+ /* Driver attached timestamp (in ns) */
+ uint64_tsystem_clock_counter;
+
+ /* Power/Energy */
+ uint16_taverage_socket_power;
+ uint16_taverage_cpu_power;
+ uint16_taverage_soc_power;
+ uint16_taverage_gfx_power;
+ uint16_taverage_core_power[8];
+
+ /* Average clocks */
+ uint16_taverage_gfxclk_frequency;
+ uint16_taverage_socclk_frequency;
+ uint16_taverage_uclk_frequency;
+ uint16_taverage_fclk_frequency;
+ uint16_taverage_vclk_frequency;
+ uint16_taverage_dclk_frequency;
+
+ /* Current clocks */
+ uint16_tcurrent_gfxclk;
+ uint16_tcurrent_socclk;
+ uint16_tcurrent_uclk;
+ uint16_tcurrent_fclk;
+ uint16_tcurrent_vclk;
+ uint16_tcurrent_dclk;
+ uint16_tcurrent_coreclk[8];
+ uint16_tcurrent_l3clk[2];
+
+ /* Throttle status (ASIC dependent) */
+ uint32_tthrottle_status;
+
+ /* Fans */
+ uint16_tfan_pwm;
+
+ uint16_tpadding[3];
+
+ /* Throttle status (ASIC independent) */
+ uint64_tindep_throttle_status;
+
+ /* Average Temperature */
+ uint16_taverage_temperature_gfx;
+ uint16_taverage_temperature_soc;
+ uint16_taverage_temperature_core[8];
+ uint16_taverage_temperature_l3[2];
+
+ /* Power/Voltage */
+ uint16_taverage_cpu_voltage;
+ uint16_taverage_soc_voltage;
+ uint16_taverage_gfx_voltage;
+
+ /* Power/Current */
+ uint16_taverage_cpu_current;
+ uint16_taverage_soc_current;
+ uint16_taverage_gfx_current;
+};
#endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 067b4e0b026c..185d0b50ee8e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -1854,6 +1854,86 @@ static ssize_t vangogh_get_gpu_metrics_v2_3(struct
smu_context *smu,
return sizeof(struct gpu_metrics_v2_3);
}
+static ssize_t vangogh_get_gpu_metrics_v2_4(struct smu_context *smu,
+ void **table)
+{
+ SmuMetrics_t metrics;
+ struct smu_table_context *smu_table = &smu->smu_table;
+ struct gpu_metrics_v2_4 *gpu_metrics =
+ (struct gpu_metrics_v2_4
*)smu_table->gpu_metrics_table;
+ int ret = 0;
+
+ ret = smu_cmn_get_metrics_table(smu, &metrics, true);
+ if (ret)
+ return ret;
+
+ smu_cmn_init_soft_gpu_metrics(gpu_metrics, 2, 4);
+
+ gpu_metrics->temperature_gfx = metrics.Current.GfxTemperature;
+ gpu_metrics->temperature_soc = metri
[PATCH v6 1/2] drm/amd/pm: Add support to check SMT state periodically
Add a timer to poll the SMT state periodically, if the SMT state
is changed, invoke the interface to notify the PMFW.
Signed-off-by: Wenyou Yang
---
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 8
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c| 44 +++
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h| 5 +++
3 files changed, 57 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 09469c750a96..fc571c122e87 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -566,6 +566,9 @@ struct smu_context
struct firmware pptable_firmware;
+ bool last_smt_active;
+ struct timer_list smt_timer;
+
u32 param_reg;
u32 msg_reg;
u32 resp_reg;
@@ -1354,6 +1357,11 @@ struct pptable_funcs {
* @init_pptable_microcode: Prepare the pptable microcode to upload via
PSP
*/
int (*init_pptable_microcode)(struct smu_context *smu);
+
+ /**
+* @set_cpu_smt_enable: Set the CPU SMT status.
+*/
+ int (*set_cpu_smt_enable)(struct smu_context *smu, bool smt_enable);
};
typedef enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index 3ecb900e6ecd..81c547a03f97 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -26,6 +26,7 @@
#include "amdgpu_smu.h"
#include "smu_cmn.h"
#include "soc15_common.h"
+#include
/*
* DO NOT use these for err/warn/info/debug messages.
@@ -1058,3 +1059,46 @@ bool smu_cmn_is_audio_func_enabled(struct amdgpu_device
*adev)
return snd_driver_loaded;
}
+
+#define TIME_INTERVAL 200
+
+static int smu_set_cpu_smt_enable(struct smu_context *smu, bool enable)
+{
+ int ret = -EINVAL;
+
+ if (smu->ppt_funcs && smu->ppt_funcs->set_cpu_smt_enable)
+ ret = smu->ppt_funcs->set_cpu_smt_enable(smu, enable);
+
+ return ret;
+}
+
+static void smu_smt_timer_callback(struct timer_list *timer)
+{
+ struct smu_context *smu = container_of(timer,
+ struct smu_context, smt_timer);
+ bool smt_active;
+
+ smt_active = sched_smt_active();
+ if (smt_active != smu->last_smt_active) {
+ if (!smu_set_cpu_smt_enable(smu, smt_active))
+ smu->last_smt_active = smt_active;
+ }
+
+ mod_timer(timer, jiffies + msecs_to_jiffies(TIME_INTERVAL));
+}
+
+void smu_smt_timer_init(struct smu_context *smu)
+{
+ struct timer_list *timer = &smu->smt_timer;
+
+ smu->last_smt_active = sched_smt_active();
+
+ timer_setup(timer, smu_smt_timer_callback, 0);
+
+ mod_timer(timer, jiffies + msecs_to_jiffies(TIME_INTERVAL));
+}
+
+void smu_smt_timer_fini(struct smu_context *smu)
+{
+ del_timer(&smu->smt_timer);
+}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
index d7cd358a53bd..928dd9e30d83 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
@@ -127,5 +127,10 @@ static inline void smu_cmn_get_sysfs_buf(char **buf, int
*offset)
bool smu_cmn_is_audio_func_enabled(struct amdgpu_device *adev);
+void smu_smt_timer_init(struct smu_context *smu);
+
#endif
+
+void smu_smt_timer_fini(struct smu_context *smu);
+
#endif
--
2.39.2
[PATCH v6 2/2] drm/amd/pm/vangogh: Send SMT enable message to PMFW
When the SMT state is changed on the fly, sent the SMT enable
message to the PMFW to notify it that the SMT state changed.
Add the support to send PPSMC_MSG_SetCClkSMTEnable(0x58) message
to the PMFW for Vangogh.
Signed-off-by: Wenyou Yang
---
.../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 +-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +-
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 32 ++-
3 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
index 7471e2df2828..a6bfa1912c42 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
@@ -111,7 +111,8 @@
#define PPSMC_MSG_GetGfxOffStatus 0x50
#define PPSMC_MSG_GetGfxOffEntryCount 0x51
#define PPSMC_MSG_LogGfxOffResidency 0x52
-#define PPSMC_Message_Count0x53
+#define PPSMC_MSG_SetCClkSMTEnable0x58
+#define PPSMC_Message_Count0x59
//Argument for PPSMC_MSG_GfxDeviceDriverReset
enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 297b70b9388f..820812d910bf 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -245,7 +245,8 @@
__SMU_DUMMY_MAP(AllowGpo), \
__SMU_DUMMY_MAP(Mode2Reset),\
__SMU_DUMMY_MAP(RequestI2cTransaction), \
- __SMU_DUMMY_MAP(GetMetricsTable),
+ __SMU_DUMMY_MAP(GetMetricsTable), \
+ __SMU_DUMMY_MAP(SetCClkSMTEnable),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 7433dcaa16e0..cda5a8ee2aeb 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -141,6 +141,7 @@ static struct cmn2asic_msg_mapping
vangogh_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(GetGfxOffStatus,PPSMC_MSG_GetGfxOffStatus,
0),
MSG_MAP(GetGfxOffEntryCount,
PPSMC_MSG_GetGfxOffEntryCount, 0),
MSG_MAP(LogGfxOffResidency,
PPSMC_MSG_LogGfxOffResidency, 0),
+ MSG_MAP(SetCClkSMTEnable, PPSMC_MSG_SetCClkSMTEnable,
0),
};
static struct cmn2asic_mapping vangogh_feature_mask_map[SMU_FEATURE_COUNT] = {
@@ -460,6 +461,7 @@ static int vangogh_allocate_dpm_context(struct smu_context
*smu)
static int vangogh_init_smc_tables(struct smu_context *smu)
{
+ uint32_t smu_version;
int ret = 0;
ret = vangogh_tables_init(smu);
@@ -477,9 +479,30 @@ static int vangogh_init_smc_tables(struct smu_context *smu)
smu->cpu_core_num = 4;
#endif
+ if (!smu->adev->pm.fw_version) {
+ ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+ if (ret)
+ return ret;
+
+ smu->adev->pm.fw_version = smu_version;
+ }
+
+ if (smu->adev->pm.fw_version >= 0x063F0600)
+ smu_smt_timer_init(smu);
+
return smu_v11_0_init_smc_tables(smu);
}
+static int vangogh_fini_smc_tables(struct smu_context *smu)
+{
+ if (smu->adev->pm.fw_version >= 0x063F0600)
+ smu_smt_timer_fini(smu);
+
+ smu_v11_0_fini_smc_tables(smu);
+
+ return 0;
+}
+
static int vangogh_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
{
int ret = 0;
@@ -2428,12 +2451,18 @@ static u32 vangogh_get_gfxoff_entrycount(struct
smu_context *smu, uint64_t *entr
return ret;
}
+static int vangogh_set_cpu_smt_enable(struct smu_context *smu, bool enable)
+{
+ return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetCClkSMTEnable,
+ enable ? 1 : 0, NULL);
+}
+
static const struct pptable_funcs vangogh_ppt_funcs = {
.check_fw_status = smu_v11_0_check_fw_status,
.check_fw_version = smu_v11_0_check_fw_version,
.init_smc_tables = vangogh_init_smc_tables,
- .fini_smc_tables = smu_v11_0_fini_smc_tables,
+ .fini_smc_tables = vangogh_fini_smc_tables,
.init_power = smu_v11_0_init_power,
.fini_power = smu_v11_0_fini_power,
.register_irq_handler = smu_v11_0_register_irq_handler,
@@ -2474,6 +2503,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
.get_power_limit = vangogh_get_power_limit,
.set_power_limit = vangogh_set_power_limit,
.get_vbios_bootup_values = smu_v11_0_get_vbios_bootu
[PATCH v6 0/2] Send message to PMFW when SMT changes
When the SMT changes on the fly, send the message to the PMFW to notify the SMT status changed. Changes in v6 1./ Update last_smt_active only when the return from smu_set_cpu_smt_enable() successfully. 2./ Use smu->adev->pm.fw_version to check smu version, if it is not assigned, get the smu version and assigned it. 3./ Remove the redundant error message print. Changes in v5 1./ Add a new vangogh_fini_smc_tables() to accommodate the timer fini and smu_v11_0_fini_smc_tables(). 2./ Move the version check of SMU version before initializing the timer. Changes in v4 1./ Since we didn't find a good solution to handle the case that manually offlining all the SMT siblings using /sys/devices/system/cpu/cpu*/online to disable or enable SMT. Come up with a new solution, add a timer to poll the SMT state periodically, if finding that the SMT state is changed, it invokes the interface to notify the PMFW. 2./ Move the generic code to smu_cmn.c. 3./ Add PMFW version check for this feature. Changes in v3 1./ Because it is only required for Vangogh, move registering notifier to vangogh_ppt.c, then remove the patch 2, and the number of patches decreased to 2. Changes in v2: 1/. Embed the smt notifer callback into "struct smu_context" structure. 2/. Correct the PPSMC_Message_Count value. 3/. Improve several code styles and others. Wenyou Yang (2): drm/amd/pm: Add support to check SMT state periodically drm/amd/pm/vangogh: Send SMT enable message to PMFW drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 8 .../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +- .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 32 +- drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c| 44 +++ drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h| 5 +++ 6 files changed, 92 insertions(+), 3 deletions(-) -- 2.39.2
[PATCH v5 2/2] drm/amd/pm/vangogh: Send SMT enable message to PMFW
When the SMT state is changed on the fly, sent the SMT enable
message to the PMFW to notify it that the SMT state changed.
Add the support to send PPSMC_MSG_SetCClkSMTEnable(0x58) message
to the PMFW for Vangogh.
Signed-off-by: Wenyou Yang
---
.../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 +-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +-
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 32 ++-
3 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
index 7471e2df2828..a6bfa1912c42 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
@@ -111,7 +111,8 @@
#define PPSMC_MSG_GetGfxOffStatus 0x50
#define PPSMC_MSG_GetGfxOffEntryCount 0x51
#define PPSMC_MSG_LogGfxOffResidency 0x52
-#define PPSMC_Message_Count0x53
+#define PPSMC_MSG_SetCClkSMTEnable0x58
+#define PPSMC_Message_Count0x59
//Argument for PPSMC_MSG_GfxDeviceDriverReset
enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 297b70b9388f..820812d910bf 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -245,7 +245,8 @@
__SMU_DUMMY_MAP(AllowGpo), \
__SMU_DUMMY_MAP(Mode2Reset),\
__SMU_DUMMY_MAP(RequestI2cTransaction), \
- __SMU_DUMMY_MAP(GetMetricsTable),
+ __SMU_DUMMY_MAP(GetMetricsTable), \
+ __SMU_DUMMY_MAP(SetCClkSMTEnable),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 7433dcaa16e0..ca1ff97f3353 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -141,6 +141,7 @@ static struct cmn2asic_msg_mapping
vangogh_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(GetGfxOffStatus,PPSMC_MSG_GetGfxOffStatus,
0),
MSG_MAP(GetGfxOffEntryCount,
PPSMC_MSG_GetGfxOffEntryCount, 0),
MSG_MAP(LogGfxOffResidency,
PPSMC_MSG_LogGfxOffResidency, 0),
+ MSG_MAP(SetCClkSMTEnable, PPSMC_MSG_SetCClkSMTEnable,
0),
};
static struct cmn2asic_mapping vangogh_feature_mask_map[SMU_FEATURE_COUNT] = {
@@ -460,6 +461,7 @@ static int vangogh_allocate_dpm_context(struct smu_context
*smu)
static int vangogh_init_smc_tables(struct smu_context *smu)
{
+ uint32_t smu_version;
int ret = 0;
ret = vangogh_tables_init(smu);
@@ -477,9 +479,24 @@ static int vangogh_init_smc_tables(struct smu_context *smu)
smu->cpu_core_num = 4;
#endif
+ ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+ if (ret)
+ return ret;
+
+ if (smu_version >= 0x063F0600)
+ smu_smt_timer_init(smu);
+
return smu_v11_0_init_smc_tables(smu);
}
+static int vangogh_fini_smc_tables(struct smu_context *smu)
+{
+ smu_smt_timer_fini(smu);
+ smu_v11_0_fini_smc_tables(smu);
+
+ return 0;
+}
+
static int vangogh_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
{
int ret = 0;
@@ -2428,12 +2445,24 @@ static u32 vangogh_get_gfxoff_entrycount(struct
smu_context *smu, uint64_t *entr
return ret;
}
+static int vangogh_set_cpu_smt_enable(struct smu_context *smu, bool enable)
+{
+ int ret;
+
+ ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetCClkSMTEnable,
+ enable ? 1 : 0, NULL);
+ if (ret)
+ dev_err(smu->adev->dev, "Set CPU SMT state failed!\n");
+
+ return ret;
+}
+
static const struct pptable_funcs vangogh_ppt_funcs = {
.check_fw_status = smu_v11_0_check_fw_status,
.check_fw_version = smu_v11_0_check_fw_version,
.init_smc_tables = vangogh_init_smc_tables,
- .fini_smc_tables = smu_v11_0_fini_smc_tables,
+ .fini_smc_tables = vangogh_fini_smc_tables,
.init_power = smu_v11_0_init_power,
.fini_power = smu_v11_0_fini_power,
.register_irq_handler = smu_v11_0_register_irq_handler,
@@ -2474,6 +2503,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
.get_power_limit = vangogh_get_power_limit,
.set_power_limit = vangogh_set_power_limit,
.get_vbios_bootup_values = smu_v11_0_get_vbios_bootup_values,
+ .set_cpu_smt_enable = vangogh_set_cpu_smt_enable,
};
void vangogh_set_ppt_fun
[PATCH v5 1/2] drm/amd/pm: Add support to check SMT state periodically
Add a timer to poll the SMT state periodically, if the SMT state
is changed, invoke the interface to notify the PMFW.
Signed-off-by: Wenyou Yang
---
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 8
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c| 44 +++
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h| 5 +++
3 files changed, 57 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 09469c750a96..fc571c122e87 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -566,6 +566,9 @@ struct smu_context
struct firmware pptable_firmware;
+ bool last_smt_active;
+ struct timer_list smt_timer;
+
u32 param_reg;
u32 msg_reg;
u32 resp_reg;
@@ -1354,6 +1357,11 @@ struct pptable_funcs {
* @init_pptable_microcode: Prepare the pptable microcode to upload via
PSP
*/
int (*init_pptable_microcode)(struct smu_context *smu);
+
+ /**
+* @set_cpu_smt_enable: Set the CPU SMT status.
+*/
+ int (*set_cpu_smt_enable)(struct smu_context *smu, bool smt_enable);
};
typedef enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index 3ecb900e6ecd..b0e0c6664ac3 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -26,6 +26,7 @@
#include "amdgpu_smu.h"
#include "smu_cmn.h"
#include "soc15_common.h"
+#include
/*
* DO NOT use these for err/warn/info/debug messages.
@@ -1058,3 +1059,46 @@ bool smu_cmn_is_audio_func_enabled(struct amdgpu_device
*adev)
return snd_driver_loaded;
}
+
+#define TIME_INTERVAL 200
+
+static int smu_set_cpu_smt_enable(struct smu_context *smu, bool enable)
+{
+ int ret = -EINVAL;
+
+ if (smu->ppt_funcs && smu->ppt_funcs->set_cpu_smt_enable)
+ ret = smu->ppt_funcs->set_cpu_smt_enable(smu, enable);
+
+ return ret;
+}
+
+static void smu_smt_timer_callback(struct timer_list *timer)
+{
+ struct smu_context *smu = container_of(timer,
+ struct smu_context, smt_timer);
+ bool smt_active;
+
+ smt_active = sched_smt_active();
+ if (smt_active != smu->last_smt_active) {
+ smu->last_smt_active = smt_active;
+ smu_set_cpu_smt_enable(smu, smt_active);
+ }
+
+ mod_timer(timer, jiffies + msecs_to_jiffies(TIME_INTERVAL));
+}
+
+void smu_smt_timer_init(struct smu_context *smu)
+{
+ struct timer_list *timer = &smu->smt_timer;
+
+ smu->last_smt_active = sched_smt_active();
+
+ timer_setup(timer, smu_smt_timer_callback, 0);
+
+ mod_timer(timer, jiffies + msecs_to_jiffies(TIME_INTERVAL));
+}
+
+void smu_smt_timer_fini(struct smu_context *smu)
+{
+ del_timer(&smu->smt_timer);
+}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
index d7cd358a53bd..928dd9e30d83 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
@@ -127,5 +127,10 @@ static inline void smu_cmn_get_sysfs_buf(char **buf, int
*offset)
bool smu_cmn_is_audio_func_enabled(struct amdgpu_device *adev);
+void smu_smt_timer_init(struct smu_context *smu);
+
#endif
+
+void smu_smt_timer_fini(struct smu_context *smu);
+
#endif
--
2.39.2
[PATCH v5 0/2] Send message to PMFW when SMT changes
When the SMT changes on the fly, send the message to the PMFW to notify the SMT status changed. Changes in v5 1./ Add a new vangogh_fini_smc_tables() to accommodate the timer fini and smu_v11_0_fini_smc_tables(). 2./ Move the version check of SMU version before initializing the timer. Changes in v4 1./ Since we didn't find a good solution to handle the case that manually offlining all the SMT siblings using /sys/devices/system/cpu/cpu*/online to disable or enable SMT. Come up with a new solution, add a timer to poll the SMT state periodically, if finding that the SMT state is changed, it invokes the interface to notify the PMFW. 2./ Move the generic code to smu_cmn.c. 3./ Add PMFW version check for this feature. Changes in v3 1./ Because it is only required for Vangogh, move registering notifier to vangogh_ppt.c, then remove the patch 2, and the number of patches decreased to 2. Changes in v2: 1/. Embed the smt notifer callback into "struct smu_context" structure. 2/. Correct the PPSMC_Message_Count value. 3/. Improve several code styles and others. Wenyou Yang (2): drm/amd/pm: Add support to check SMT state periodically drm/amd/pm/vangogh: Send SMT enable message to PMFW drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 8 .../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +- .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 32 +- drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c| 44 +++ drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h| 5 +++ 6 files changed, 92 insertions(+), 3 deletions(-) -- 2.39.2
[PATCH v3 2/2] drm/amd/pm: vangogh: send the SMT enable message to pmfw
When the CPU SMT status is changed in the fly, sent the SMT enable
message to pmfw to notify it that the SMT status changed.
Add the support to send PPSMC_MSG_SetCClkSMTEnable(0x58) message
to pmfw for vangogh.
Signed-off-by: Wenyou Yang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 5 +++
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 7 +++
.../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 +-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +-
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 43 +++
5 files changed, 59 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index b5d64749990e..d53d2acc9b46 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -69,6 +69,8 @@ static int smu_set_fan_speed_rpm(void *handle, uint32_t
speed);
static int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled);
static int smu_set_mp1_state(void *handle, enum pp_mp1_state mp1_state);
+extern struct raw_notifier_head smt_notifier_head;
+
static int smu_sys_get_pp_feature_mask(void *handle,
char *buf)
{
@@ -1122,6 +1124,9 @@ static int smu_sw_fini(void *handle)
smu_fini_microcode(smu);
+ if (smu->nb.notifier_call != NULL)
+ raw_notifier_chain_unregister(&smt_notifier_head, &smu->nb);
+
return 0;
}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 09469c750a96..4d51ac5ec8ba 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -566,6 +566,8 @@ struct smu_context
struct firmware pptable_firmware;
+ struct notifier_block nb;
+
u32 param_reg;
u32 msg_reg;
u32 resp_reg;
@@ -1354,6 +1356,11 @@ struct pptable_funcs {
* @init_pptable_microcode: Prepare the pptable microcode to upload via
PSP
*/
int (*init_pptable_microcode)(struct smu_context *smu);
+
+ /**
+* @set_cpu_smt_enable: Set the CPU SMT status.
+*/
+ int (*set_cpu_smt_enable)(struct smu_context *smu, bool smt_enable);
};
typedef enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
index 7471e2df2828..a6bfa1912c42 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
@@ -111,7 +111,8 @@
#define PPSMC_MSG_GetGfxOffStatus 0x50
#define PPSMC_MSG_GetGfxOffEntryCount 0x51
#define PPSMC_MSG_LogGfxOffResidency 0x52
-#define PPSMC_Message_Count0x53
+#define PPSMC_MSG_SetCClkSMTEnable0x58
+#define PPSMC_Message_Count0x59
//Argument for PPSMC_MSG_GfxDeviceDriverReset
enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 297b70b9388f..820812d910bf 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -245,7 +245,8 @@
__SMU_DUMMY_MAP(AllowGpo), \
__SMU_DUMMY_MAP(Mode2Reset),\
__SMU_DUMMY_MAP(RequestI2cTransaction), \
- __SMU_DUMMY_MAP(GetMetricsTable),
+ __SMU_DUMMY_MAP(GetMetricsTable), \
+ __SMU_DUMMY_MAP(SetCClkSMTEnable),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 7433dcaa16e0..07f8822f2eb0 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -35,6 +35,7 @@
#include "asic_reg/gc/gc_10_3_0_offset.h"
#include "asic_reg/gc/gc_10_3_0_sh_mask.h"
#include
+#include
/*
* DO NOT use these for err/warn/info/debug messages.
@@ -70,6 +71,8 @@
FEATURE_MASK(FEATURE_DCFCLK_DPM_BIT)| \
FEATURE_MASK(FEATURE_GFX_DPM_BIT))
+extern struct raw_notifier_head smt_notifier_head;
+
static struct cmn2asic_msg_mapping vangogh_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(TestMessage,PPSMC_MSG_TestMessage,
0),
MSG_MAP(GetSmuVersion, PPSMC_MSG_GetSmuVersion,
0),
@@ -141,6 +144,7 @@ static struct cmn2asic_msg_mapping
vangogh_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(GetGfxOffStatus,PPSMC_MSG_GetGfxOffStatus,
0),
MSG_MAP(GetGfxOffEntryCount,
PPSMC_MSG_GetGfxOffEntryCount, 0),
MSG_MAP(LogGfxOffResidency,
PPSMC_MSG_LogGfxOffResidency,
[PATCH v3 1/2] cpu/smt: add a notifier to notify the SMT changes
Add the notifier chain to notify the cpu SMT status changes
Signed-off-by: Wenyou Yang
---
include/linux/cpu.h | 5 +
kernel/cpu.c| 10 +-
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 314802f98b9d..9a842317fe2d 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -213,6 +213,11 @@ enum cpuhp_smt_control {
CPU_SMT_NOT_IMPLEMENTED,
};
+enum cpuhp_smt_status {
+ SMT_ENABLED,
+ SMT_DISABLED,
+};
+
#if defined(CONFIG_SMP) && defined(CONFIG_HOTPLUG_SMT)
extern enum cpuhp_smt_control cpu_smt_control;
extern void cpu_smt_disable(bool force);
diff --git a/kernel/cpu.c b/kernel/cpu.c
index 6c0a92ca6bb5..1af66a3ffd99 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -89,6 +89,9 @@ static DEFINE_PER_CPU(struct cpuhp_cpu_state, cpuhp_state) = {
cpumask_t cpus_booted_once_mask;
#endif
+RAW_NOTIFIER_HEAD(smt_notifier_head);
+EXPORT_SYMBOL(smt_notifier_head);
+
#if defined(CONFIG_LOCKDEP) && defined(CONFIG_SMP)
static struct lockdep_map cpuhp_state_up_map =
STATIC_LOCKDEP_MAP_INIT("cpuhp_state-up", &cpuhp_state_up_map);
@@ -2281,8 +2284,10 @@ int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval)
*/
cpuhp_offline_cpu_device(cpu);
}
- if (!ret)
+ if (!ret) {
cpu_smt_control = ctrlval;
+ raw_notifier_call_chain(&smt_notifier_head, SMT_DISABLED, NULL);
+ }
cpu_maps_update_done();
return ret;
}
@@ -2303,6 +2308,9 @@ int cpuhp_smt_enable(void)
/* See comment in cpuhp_smt_disable() */
cpuhp_online_cpu_device(cpu);
}
+ if (!ret)
+ raw_notifier_call_chain(&smt_notifier_head, SMT_ENABLED, NULL);
+
cpu_maps_update_done();
return ret;
}
--
2.39.2
[PATCH v3 0/2] send message to pmfw when SMT changes
When the CPU SMT changes on the fly, send the message to pmfw to notify the SMT status changed. Changes in v3 1./ Because it is only required for Vangogh, move registering notifier to vangogh_ppt.c, then remove the patch 2, and the number of patches decreased to 2. Changes in v2: 1/. Embed the smt notifer callback into "struct smu_context" structure. 2/. Correct the PPSMC_Message_Count value. 3/. Improve several code styles and others. Wenyou Yang (2): cpu/smt: add a notifier to notify the SMT changes drm/amd/pm: vangogh: send the SMT enable message to pmfw drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 5 +++ drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 7 +++ .../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +- .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 43 +++ include/linux/cpu.h | 5 +++ kernel/cpu.c | 10 - 7 files changed, 73 insertions(+), 3 deletions(-) -- 2.39.2
[PATCH v2 3/3] drm/amd/pm: vangogh: support to send SMT enable message
Add the support to send PPSMC_MSG_SetCClkSMTEnable(0x58) message
to pmfw for vangogh.
Signed-off-by: Wenyou Yang
---
.../gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 ++-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 ++-
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 8
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
index 7471e2df2828..a6bfa1912c42 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
@@ -111,7 +111,8 @@
#define PPSMC_MSG_GetGfxOffStatus 0x50
#define PPSMC_MSG_GetGfxOffEntryCount 0x51
#define PPSMC_MSG_LogGfxOffResidency 0x52
-#define PPSMC_Message_Count0x53
+#define PPSMC_MSG_SetCClkSMTEnable0x58
+#define PPSMC_Message_Count0x59
//Argument for PPSMC_MSG_GfxDeviceDriverReset
enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 297b70b9388f..820812d910bf 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -245,7 +245,8 @@
__SMU_DUMMY_MAP(AllowGpo), \
__SMU_DUMMY_MAP(Mode2Reset),\
__SMU_DUMMY_MAP(RequestI2cTransaction), \
- __SMU_DUMMY_MAP(GetMetricsTable),
+ __SMU_DUMMY_MAP(GetMetricsTable), \
+ __SMU_DUMMY_MAP(SetCClkSMTEnable),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 7433dcaa16e0..68a2987e17c9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -141,6 +141,7 @@ static struct cmn2asic_msg_mapping
vangogh_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(GetGfxOffStatus,PPSMC_MSG_GetGfxOffStatus,
0),
MSG_MAP(GetGfxOffEntryCount,
PPSMC_MSG_GetGfxOffEntryCount, 0),
MSG_MAP(LogGfxOffResidency,
PPSMC_MSG_LogGfxOffResidency, 0),
+ MSG_MAP(SetCClkSMTEnable, PPSMC_MSG_SetCClkSMTEnable,
0),
};
static struct cmn2asic_mapping vangogh_feature_mask_map[SMU_FEATURE_COUNT] = {
@@ -2428,6 +2429,12 @@ static u32 vangogh_get_gfxoff_entrycount(struct
smu_context *smu, uint64_t *entr
return ret;
}
+static int vangogh_set_cpu_smt_enable(struct smu_context *smu, bool enable)
+{
+ return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetCClkSMTEnable,
+ enable ? 1 : 0, NULL);
+}
+
static const struct pptable_funcs vangogh_ppt_funcs = {
.check_fw_status = smu_v11_0_check_fw_status,
@@ -2474,6 +2481,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
.get_power_limit = vangogh_get_power_limit,
.set_power_limit = vangogh_set_power_limit,
.get_vbios_bootup_values = smu_v11_0_get_vbios_bootup_values,
+ .set_cpu_smt_enable = vangogh_set_cpu_smt_enable,
};
void vangogh_set_ppt_funcs(struct smu_context *smu)
--
2.39.2
[PATCH v2 2/3] drm/amd/pm: send the SMT enable message to pmfw
When the CPU SMT status is changed in the fly, sent the SMT enable
message to pmfw to notify it that the SMT status changed.
Signed-off-by: Wenyou Yang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 39 +++
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 7
2 files changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index b5d64749990e..eb4c49f38292 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -22,6 +22,7 @@
#define SWSMU_CODE_LAYER_L1
+#include
#include
#include
@@ -54,6 +55,8 @@
#undef pr_info
#undef pr_debug
+extern struct raw_notifier_head smt_notifier_head;
+
static const struct amd_pm_funcs swsmu_pm_funcs;
static int smu_force_smuclk_levels(struct smu_context *smu,
enum smu_clk_type clk_type,
@@ -69,6 +72,9 @@ static int smu_set_fan_speed_rpm(void *handle, uint32_t
speed);
static int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled);
static int smu_set_mp1_state(void *handle, enum pp_mp1_state mp1_state);
+static int smt_notifier_callback(struct notifier_block *nb,
+unsigned long action, void *data);
+
static int smu_sys_get_pp_feature_mask(void *handle,
char *buf)
{
@@ -647,6 +653,8 @@ static int smu_early_init(void *handle)
adev->powerplay.pp_handle = smu;
adev->powerplay.pp_funcs = &swsmu_pm_funcs;
+ smu->nb.notifier_call = smt_notifier_callback;
+
r = smu_set_funcs(adev);
if (r)
return r;
@@ -1105,6 +1113,8 @@ static int smu_sw_init(void *handle)
if (!smu->ppt_funcs->get_fan_control_mode)
smu->adev->pm.no_fan = true;
+ raw_notifier_chain_register(&smt_notifier_head, &smu->nb);
+
return 0;
}
@@ -1122,6 +1132,9 @@ static int smu_sw_fini(void *handle)
smu_fini_microcode(smu);
+ if (smu->nb.notifier_call != NULL)
+ raw_notifier_chain_unregister(&smt_notifier_head, &smu->nb);
+
return 0;
}
@@ -3241,3 +3254,29 @@ int smu_send_hbm_bad_channel_flag(struct smu_context
*smu, uint32_t size)
return ret;
}
+
+static int smu_set_cpu_smt_enable(struct smu_context *smu, bool enable)
+{
+ int ret = -EINVAL;
+
+ if (smu->ppt_funcs && smu->ppt_funcs->set_cpu_smt_enable)
+ ret = smu->ppt_funcs->set_cpu_smt_enable(smu, enable);
+
+ return ret;
+}
+
+static int smt_notifier_callback(struct notifier_block *nb,
+unsigned long action, void *data)
+{
+ struct smu_context *smu = container_of(nb, struct smu_context, nb);
+ int ret;
+
+ smu = container_of(nb, struct smu_context, nb);
+
+ ret = smu_set_cpu_smt_enable(smu, action == SMT_ENABLED);
+
+ dev_dbg(smu->adev->dev, "failed to set cclk_pd_limit for SMT %sabled:
%d\n",
+ action == SMT_ENABLED ? "en" : "dis", ret);
+
+ return ret ? NOTIFY_BAD : NOTIFY_OK;
+}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 09469c750a96..4d51ac5ec8ba 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -566,6 +566,8 @@ struct smu_context
struct firmware pptable_firmware;
+ struct notifier_block nb;
+
u32 param_reg;
u32 msg_reg;
u32 resp_reg;
@@ -1354,6 +1356,11 @@ struct pptable_funcs {
* @init_pptable_microcode: Prepare the pptable microcode to upload via
PSP
*/
int (*init_pptable_microcode)(struct smu_context *smu);
+
+ /**
+* @set_cpu_smt_enable: Set the CPU SMT status.
+*/
+ int (*set_cpu_smt_enable)(struct smu_context *smu, bool smt_enable);
};
typedef enum {
--
2.39.2
[PATCH v2 1/3] cpu/smt: add a notifier to notify the SMT changes
Add the notifier chain to notify the cpu SMT status changes
Signed-off-by: Wenyou Yang
---
include/linux/cpu.h | 5 +
kernel/cpu.c| 10 +-
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 314802f98b9d..9a842317fe2d 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -213,6 +213,11 @@ enum cpuhp_smt_control {
CPU_SMT_NOT_IMPLEMENTED,
};
+enum cpuhp_smt_status {
+ SMT_ENABLED,
+ SMT_DISABLED,
+};
+
#if defined(CONFIG_SMP) && defined(CONFIG_HOTPLUG_SMT)
extern enum cpuhp_smt_control cpu_smt_control;
extern void cpu_smt_disable(bool force);
diff --git a/kernel/cpu.c b/kernel/cpu.c
index 6c0a92ca6bb5..1af66a3ffd99 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -89,6 +89,9 @@ static DEFINE_PER_CPU(struct cpuhp_cpu_state, cpuhp_state) = {
cpumask_t cpus_booted_once_mask;
#endif
+RAW_NOTIFIER_HEAD(smt_notifier_head);
+EXPORT_SYMBOL(smt_notifier_head);
+
#if defined(CONFIG_LOCKDEP) && defined(CONFIG_SMP)
static struct lockdep_map cpuhp_state_up_map =
STATIC_LOCKDEP_MAP_INIT("cpuhp_state-up", &cpuhp_state_up_map);
@@ -2281,8 +2284,10 @@ int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval)
*/
cpuhp_offline_cpu_device(cpu);
}
- if (!ret)
+ if (!ret) {
cpu_smt_control = ctrlval;
+ raw_notifier_call_chain(&smt_notifier_head, SMT_DISABLED, NULL);
+ }
cpu_maps_update_done();
return ret;
}
@@ -2303,6 +2308,9 @@ int cpuhp_smt_enable(void)
/* See comment in cpuhp_smt_disable() */
cpuhp_online_cpu_device(cpu);
}
+ if (!ret)
+ raw_notifier_call_chain(&smt_notifier_head, SMT_ENABLED, NULL);
+
cpu_maps_update_done();
return ret;
}
--
2.39.2
[PATCH v2 0/3] send message to pmfw when SMT changes
When the CPU SMT changes on the fly, send the message to pmfw to notify the SMT status changed. Changes in v2: 1/. Embed the smt notifer callback into "struct smu_context" structure. 2/. Correct the PPSMC_Message_Count value. 3./ Improve several code styles and others. Wenyou Yang (3): cpu/smt: add a notifier to notify the SMT changes drm/amd/pm: send the SMT enable message to pmfw drm/amd/pm: vangogh: support to send SMT enable message drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 39 +++ drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 7 .../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +- .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 8 include/linux/cpu.h | 5 +++ kernel/cpu.c | 10 - 7 files changed, 72 insertions(+), 3 deletions(-) -- 2.39.2
[Resend PATCH v1 2/3] drm/amd/pm: send the SMT-enable message to pmfw
When the CPU SMT status change in the fly, sent the SMT-enable
message to pmfw to notify it that the SMT status changed.
Signed-off-by: Wenyou Yang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 41 +++
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 5 +++
2 files changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index b5d64749990e..5cd85a9d149d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -22,6 +22,7 @@
#define SWSMU_CODE_LAYER_L1
+#include
#include
#include
@@ -69,6 +70,14 @@ static int smu_set_fan_speed_rpm(void *handle, uint32_t
speed);
static int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled);
static int smu_set_mp1_state(void *handle, enum pp_mp1_state mp1_state);
+static int smt_notifier_callback(struct notifier_block *nb, unsigned long
action, void *data);
+
+extern struct raw_notifier_head smt_notifier_head;
+
+static struct notifier_block smt_notifier = {
+ .notifier_call = smt_notifier_callback,
+};
+
static int smu_sys_get_pp_feature_mask(void *handle,
char *buf)
{
@@ -625,6 +634,8 @@ static int smu_set_funcs(struct amdgpu_device *adev)
return 0;
}
+static struct smu_context *current_smu;
+
static int smu_early_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -645,6 +656,7 @@ static int smu_early_init(void *handle)
mutex_init(&smu->message_lock);
adev->powerplay.pp_handle = smu;
+ current_smu = smu;
adev->powerplay.pp_funcs = &swsmu_pm_funcs;
r = smu_set_funcs(adev);
@@ -1105,6 +1117,8 @@ static int smu_sw_init(void *handle)
if (!smu->ppt_funcs->get_fan_control_mode)
smu->adev->pm.no_fan = true;
+ raw_notifier_chain_register(&smt_notifier_head, &smt_notifier);
+
return 0;
}
@@ -1122,6 +1136,8 @@ static int smu_sw_fini(void *handle)
smu_fini_microcode(smu);
+ raw_notifier_chain_unregister(&smt_notifier_head, &smt_notifier);
+
return 0;
}
@@ -3241,3 +3257,28 @@ int smu_send_hbm_bad_channel_flag(struct smu_context
*smu, uint32_t size)
return ret;
}
+
+static int smu_set_cpu_smt_enable(struct smu_context *smu, bool enable)
+{
+ int ret = -EINVAL;
+
+ if (smu->ppt_funcs && smu->ppt_funcs->set_cpu_smt_enable)
+ ret = smu->ppt_funcs->set_cpu_smt_enable(smu, enable);
+
+ return ret;
+}
+
+static int smt_notifier_callback(struct notifier_block *nb,
+unsigned long action, void *data)
+{
+ struct smu_context *smu = current_smu;
+ int ret = NOTIFY_OK;
+
+ ret = (action == SMT_ENABLED) ?
+ smu_set_cpu_smt_enable(smu, true) :
+ smu_set_cpu_smt_enable(smu, false);
+ if (ret)
+ ret = NOTIFY_BAD;
+
+ return ret;
+}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 09469c750a96..7c6594bba796 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -1354,6 +1354,11 @@ struct pptable_funcs {
* @init_pptable_microcode: Prepare the pptable microcode to upload via
PSP
*/
int (*init_pptable_microcode)(struct smu_context *smu);
+
+ /**
+* @set_cpu_smt_enable: Set the CPU SMT status
+*/
+ int (*set_cpu_smt_enable)(struct smu_context *smu, bool enable);
};
typedef enum {
--
2.39.2
[Resend PATCH v1 3/3] drm/amd/pm: vangogh: support to send SMT enable message
Add the support to PPSMC_MSG_SetCClkSMTEnable(0x58) message to pmfw
for vangogh.
Signed-off-by: Wenyou Yang
---
.../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 ++-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 ++-
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 19 +++
3 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
index 7471e2df2828..2b182dbc6f9c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
@@ -111,7 +111,8 @@
#define PPSMC_MSG_GetGfxOffStatus 0x50
#define PPSMC_MSG_GetGfxOffEntryCount 0x51
#define PPSMC_MSG_LogGfxOffResidency 0x52
-#define PPSMC_Message_Count0x53
+#define PPSMC_MSG_SetCClkSMTEnable0x58
+#define PPSMC_Message_Count0x54
//Argument for PPSMC_MSG_GfxDeviceDriverReset
enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 297b70b9388f..820812d910bf 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -245,7 +245,8 @@
__SMU_DUMMY_MAP(AllowGpo), \
__SMU_DUMMY_MAP(Mode2Reset),\
__SMU_DUMMY_MAP(RequestI2cTransaction), \
- __SMU_DUMMY_MAP(GetMetricsTable),
+ __SMU_DUMMY_MAP(GetMetricsTable), \
+ __SMU_DUMMY_MAP(SetCClkSMTEnable),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 7433dcaa16e0..f0eeb42df96b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -141,6 +141,7 @@ static struct cmn2asic_msg_mapping
vangogh_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(GetGfxOffStatus,PPSMC_MSG_GetGfxOffStatus,
0),
MSG_MAP(GetGfxOffEntryCount,
PPSMC_MSG_GetGfxOffEntryCount, 0),
MSG_MAP(LogGfxOffResidency,
PPSMC_MSG_LogGfxOffResidency, 0),
+ MSG_MAP(SetCClkSMTEnable, PPSMC_MSG_SetCClkSMTEnable,
0),
};
static struct cmn2asic_mapping vangogh_feature_mask_map[SMU_FEATURE_COUNT] = {
@@ -2428,6 +2429,23 @@ static u32 vangogh_get_gfxoff_entrycount(struct
smu_context *smu, uint64_t *entr
return ret;
}
+static int vangogh_set_cpu_smt_enable(struct smu_context *smu, bool enable)
+{
+ int ret = 0;
+
+ if (enable) {
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_SetCClkSMTEnable,
+ 1, NULL);
+ } else {
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_SetCClkSMTEnable,
+ 0, NULL);
+ }
+
+ return ret;
+}
+
static const struct pptable_funcs vangogh_ppt_funcs = {
.check_fw_status = smu_v11_0_check_fw_status,
@@ -2474,6 +2492,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
.get_power_limit = vangogh_get_power_limit,
.set_power_limit = vangogh_set_power_limit,
.get_vbios_bootup_values = smu_v11_0_get_vbios_bootup_values,
+ .set_cpu_smt_enable = vangogh_set_cpu_smt_enable,
};
void vangogh_set_ppt_funcs(struct smu_context *smu)
--
2.39.2
[Resend PATCH v1 1/3] cpu/smt: add a notifier to notify the SMT changes
Add the notifier chain to notify the cpu SMT status changes
Signed-off-by: Wenyou Yang
---
include/linux/cpu.h | 5 +
kernel/cpu.c| 11 ++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 314802f98b9d..9a842317fe2d 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -213,6 +213,11 @@ enum cpuhp_smt_control {
CPU_SMT_NOT_IMPLEMENTED,
};
+enum cpuhp_smt_status {
+ SMT_ENABLED,
+ SMT_DISABLED,
+};
+
#if defined(CONFIG_SMP) && defined(CONFIG_HOTPLUG_SMT)
extern enum cpuhp_smt_control cpu_smt_control;
extern void cpu_smt_disable(bool force);
diff --git a/kernel/cpu.c b/kernel/cpu.c
index 6c0a92ca6bb5..accae0fa9868 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -89,6 +89,9 @@ static DEFINE_PER_CPU(struct cpuhp_cpu_state, cpuhp_state) = {
cpumask_t cpus_booted_once_mask;
#endif
+RAW_NOTIFIER_HEAD(smt_notifier_head);
+EXPORT_SYMBOL(smt_notifier_head);
+
#if defined(CONFIG_LOCKDEP) && defined(CONFIG_SMP)
static struct lockdep_map cpuhp_state_up_map =
STATIC_LOCKDEP_MAP_INIT("cpuhp_state-up", &cpuhp_state_up_map);
@@ -2281,8 +2284,10 @@ int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval)
*/
cpuhp_offline_cpu_device(cpu);
}
- if (!ret)
+ if (!ret) {
cpu_smt_control = ctrlval;
+ raw_notifier_call_chain(&smt_notifier_head, SMT_DISABLED, NULL);
+ }
cpu_maps_update_done();
return ret;
}
@@ -2303,7 +2308,11 @@ int cpuhp_smt_enable(void)
/* See comment in cpuhp_smt_disable() */
cpuhp_online_cpu_device(cpu);
}
+ if (!ret)
+ raw_notifier_call_chain(&smt_notifier_head, SMT_ENABLED, NULL);
+
cpu_maps_update_done();
+
return ret;
}
#endif
--
2.39.2
[Resend PATCH v1 0/3] send message to pmfw when SMT changes
When the CPU SMT changes on the fly, send the message to pmfw to notify the SMT status changed. Wenyou Yang (3): cpu/smt: add a notifier to notify the SMT changes drm/amd/pm: send the SMT-enable message to pmfw drm/amd/pm: vangogh: support to send SMT enable message drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 41 +++ drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 5 +++ .../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +- .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 19 + include/linux/cpu.h | 5 +++ kernel/cpu.c | 11 - 7 files changed, 84 insertions(+), 3 deletions(-) -- 2.39.2
[PATCH v1 3/3] drm/amd/pm: vangogh: support to send SMT enable message
Add the support to PPSMC_MSG_SetCClkSMTEnable(0x58) message to pmfw
for vangogh.
Signed-off-by: Wenyou Yang
---
.../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 ++-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 ++-
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 19 +++
3 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
index 7471e2df2828..2b182dbc6f9c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
@@ -111,7 +111,8 @@
#define PPSMC_MSG_GetGfxOffStatus 0x50
#define PPSMC_MSG_GetGfxOffEntryCount 0x51
#define PPSMC_MSG_LogGfxOffResidency 0x52
-#define PPSMC_Message_Count0x53
+#define PPSMC_MSG_SetCClkSMTEnable0x58
+#define PPSMC_Message_Count0x54
//Argument for PPSMC_MSG_GfxDeviceDriverReset
enum {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 297b70b9388f..820812d910bf 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -245,7 +245,8 @@
__SMU_DUMMY_MAP(AllowGpo), \
__SMU_DUMMY_MAP(Mode2Reset),\
__SMU_DUMMY_MAP(RequestI2cTransaction), \
- __SMU_DUMMY_MAP(GetMetricsTable),
+ __SMU_DUMMY_MAP(GetMetricsTable), \
+ __SMU_DUMMY_MAP(SetCClkSMTEnable),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 7433dcaa16e0..f0eeb42df96b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -141,6 +141,7 @@ static struct cmn2asic_msg_mapping
vangogh_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(GetGfxOffStatus,PPSMC_MSG_GetGfxOffStatus,
0),
MSG_MAP(GetGfxOffEntryCount,
PPSMC_MSG_GetGfxOffEntryCount, 0),
MSG_MAP(LogGfxOffResidency,
PPSMC_MSG_LogGfxOffResidency, 0),
+ MSG_MAP(SetCClkSMTEnable, PPSMC_MSG_SetCClkSMTEnable,
0),
};
static struct cmn2asic_mapping vangogh_feature_mask_map[SMU_FEATURE_COUNT] = {
@@ -2428,6 +2429,23 @@ static u32 vangogh_get_gfxoff_entrycount(struct
smu_context *smu, uint64_t *entr
return ret;
}
+static int vangogh_set_cpu_smt_enable(struct smu_context *smu, bool enable)
+{
+ int ret = 0;
+
+ if (enable) {
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_SetCClkSMTEnable,
+ 1, NULL);
+ } else {
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_SetCClkSMTEnable,
+ 0, NULL);
+ }
+
+ return ret;
+}
+
static const struct pptable_funcs vangogh_ppt_funcs = {
.check_fw_status = smu_v11_0_check_fw_status,
@@ -2474,6 +2492,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
.get_power_limit = vangogh_get_power_limit,
.set_power_limit = vangogh_set_power_limit,
.get_vbios_bootup_values = smu_v11_0_get_vbios_bootup_values,
+ .set_cpu_smt_enable = vangogh_set_cpu_smt_enable,
};
void vangogh_set_ppt_funcs(struct smu_context *smu)
--
2.39.2
[PATCH v1 1/3] cpu/smt: add a notifier to notify the SMT changes
Add the notifier chain to notify the cpu SMT status changes
Signed-off-by: Wenyou Yang
---
include/linux/cpu.h | 5 +
kernel/cpu.c| 11 ++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 314802f98b9d..9a842317fe2d 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -213,6 +213,11 @@ enum cpuhp_smt_control {
CPU_SMT_NOT_IMPLEMENTED,
};
+enum cpuhp_smt_status {
+ SMT_ENABLED,
+ SMT_DISABLED,
+};
+
#if defined(CONFIG_SMP) && defined(CONFIG_HOTPLUG_SMT)
extern enum cpuhp_smt_control cpu_smt_control;
extern void cpu_smt_disable(bool force);
diff --git a/kernel/cpu.c b/kernel/cpu.c
index 6c0a92ca6bb5..accae0fa9868 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -89,6 +89,9 @@ static DEFINE_PER_CPU(struct cpuhp_cpu_state, cpuhp_state) = {
cpumask_t cpus_booted_once_mask;
#endif
+RAW_NOTIFIER_HEAD(smt_notifier_head);
+EXPORT_SYMBOL(smt_notifier_head);
+
#if defined(CONFIG_LOCKDEP) && defined(CONFIG_SMP)
static struct lockdep_map cpuhp_state_up_map =
STATIC_LOCKDEP_MAP_INIT("cpuhp_state-up", &cpuhp_state_up_map);
@@ -2281,8 +2284,10 @@ int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval)
*/
cpuhp_offline_cpu_device(cpu);
}
- if (!ret)
+ if (!ret) {
cpu_smt_control = ctrlval;
+ raw_notifier_call_chain(&smt_notifier_head, SMT_DISABLED, NULL);
+ }
cpu_maps_update_done();
return ret;
}
@@ -2303,7 +2308,11 @@ int cpuhp_smt_enable(void)
/* See comment in cpuhp_smt_disable() */
cpuhp_online_cpu_device(cpu);
}
+ if (!ret)
+ raw_notifier_call_chain(&smt_notifier_head, SMT_ENABLED, NULL);
+
cpu_maps_update_done();
+
return ret;
}
#endif
--
2.39.2
[PATCH v1 2/3] drm/amd/pm: send the SMT-enable message to pmfw
When the CPU SMT status change in the fly, sent the SMT-enable
message to pmfw to notify it that the SMT status changed.
Signed-off-by: Wenyou Yang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 41 +++
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 5 +++
2 files changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index b5d64749990e..5cd85a9d149d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -22,6 +22,7 @@
#define SWSMU_CODE_LAYER_L1
+#include
#include
#include
@@ -69,6 +70,14 @@ static int smu_set_fan_speed_rpm(void *handle, uint32_t
speed);
static int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled);
static int smu_set_mp1_state(void *handle, enum pp_mp1_state mp1_state);
+static int smt_notifier_callback(struct notifier_block *nb, unsigned long
action, void *data);
+
+extern struct raw_notifier_head smt_notifier_head;
+
+static struct notifier_block smt_notifier = {
+ .notifier_call = smt_notifier_callback,
+};
+
static int smu_sys_get_pp_feature_mask(void *handle,
char *buf)
{
@@ -625,6 +634,8 @@ static int smu_set_funcs(struct amdgpu_device *adev)
return 0;
}
+static struct smu_context *current_smu;
+
static int smu_early_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -645,6 +656,7 @@ static int smu_early_init(void *handle)
mutex_init(&smu->message_lock);
adev->powerplay.pp_handle = smu;
+ current_smu = smu;
adev->powerplay.pp_funcs = &swsmu_pm_funcs;
r = smu_set_funcs(adev);
@@ -1105,6 +1117,8 @@ static int smu_sw_init(void *handle)
if (!smu->ppt_funcs->get_fan_control_mode)
smu->adev->pm.no_fan = true;
+ raw_notifier_chain_register(&smt_notifier_head, &smt_notifier);
+
return 0;
}
@@ -1122,6 +1136,8 @@ static int smu_sw_fini(void *handle)
smu_fini_microcode(smu);
+ raw_notifier_chain_unregister(&smt_notifier_head, &smt_notifier);
+
return 0;
}
@@ -3241,3 +3257,28 @@ int smu_send_hbm_bad_channel_flag(struct smu_context
*smu, uint32_t size)
return ret;
}
+
+static int smu_set_cpu_smt_enable(struct smu_context *smu, bool enable)
+{
+ int ret = -EINVAL;
+
+ if (smu->ppt_funcs && smu->ppt_funcs->set_cpu_smt_enable)
+ ret = smu->ppt_funcs->set_cpu_smt_enable(smu, enable);
+
+ return ret;
+}
+
+static int smt_notifier_callback(struct notifier_block *nb,
+unsigned long action, void *data)
+{
+ struct smu_context *smu = current_smu;
+ int ret = NOTIFY_OK;
+
+ ret = (action == SMT_ENABLED) ?
+ smu_set_cpu_smt_enable(smu, true) :
+ smu_set_cpu_smt_enable(smu, false);
+ if (ret)
+ ret = NOTIFY_BAD;
+
+ return ret;
+}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 09469c750a96..7c6594bba796 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -1354,6 +1354,11 @@ struct pptable_funcs {
* @init_pptable_microcode: Prepare the pptable microcode to upload via
PSP
*/
int (*init_pptable_microcode)(struct smu_context *smu);
+
+ /**
+* @set_cpu_smt_enable: Set the CPU SMT status
+*/
+ int (*set_cpu_smt_enable)(struct smu_context *smu, bool enable);
};
typedef enum {
--
2.39.2
[PATCH v1 0/3] send message to pmfw when SMT changes
When the CPU SMT changes on the fly, send the message to pmfw to notify the SMT status changed. Wenyou Yang (3): cpu/smt: add a notifier to notify the SMT changes drm/amd/pm: send the SMT-enable message to pmfw drm/amd/pm: vangogh: support to send SMT enable message drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 41 +++ drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 5 +++ .../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h| 3 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +- .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 19 + include/linux/cpu.h | 5 +++ kernel/cpu.c | 11 - 7 files changed, 84 insertions(+), 3 deletions(-) -- 2.39.2
