[PATCH] drm/radeon:WARNING opportunity for max()
Fix following coccicheck warning: drivers/gpu/drm/radeon/r100.c:3450:26-27: WARNING opportunity for max() drivers/gpu/drm/radeon/r100.c:2812:23-24: WARNING opportunity for max() Signed-off-by: zhaoxiao --- drivers/gpu/drm/radeon/r100.c | 10 ++ 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 2dd85ba1faa2..c65ee6f44af2 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -2809,10 +2809,7 @@ void r100_vram_init_sizes(struct radeon_device *rdev) if (rdev->mc.aper_size > config_aper_size) config_aper_size = rdev->mc.aper_size; - if (config_aper_size > rdev->mc.real_vram_size) - rdev->mc.mc_vram_size = config_aper_size; - else - rdev->mc.mc_vram_size = rdev->mc.real_vram_size; + rdev->mc.mc_vram_size = max(config_aper_size, rdev->mc.real_vram_size); } } @@ -3447,10 +3444,7 @@ void r100_bandwidth_update(struct radeon_device *rdev) mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full; mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full; - if (mc_latency_mclk.full > mc_latency_sclk.full) - disp_latency.full = mc_latency_mclk.full; - else - disp_latency.full = mc_latency_sclk.full; + disp_latency.full = max(mc_latency_mclk.full, mc_latency_sclk.full); /* setup Max GRPH_STOP_REQ default value */ if (ASIC_IS_RV100(rdev)) -- 2.20.1
[PATCH] drm: radeon: r600_dma: Replace cpu_to_le32() by lower_32_bits()
This patch fixes the following sparse errors: drivers/gpu/drm/radeon/r600_dma.c:247:30: warning: incorrect type in assignment (different base types) drivers/gpu/drm/radeon/r600_dma.c:247:30:expected unsigned int volatile [usertype] drivers/gpu/drm/radeon/r600_dma.c:247:30:got restricted __le32 [usertype] Signed-off-by: zhaoxiao --- drivers/gpu/drm/radeon/r600_dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c index fb65e6fb5c4f..a2d0b1edcd22 100644 --- a/drivers/gpu/drm/radeon/r600_dma.c +++ b/drivers/gpu/drm/radeon/r600_dma.c @@ -244,7 +244,7 @@ int r600_dma_ring_test(struct radeon_device *rdev, gpu_addr = rdev->wb.gpu_addr + index; tmp = 0xCAFEDEAD; - rdev->wb.wb[index/4] = cpu_to_le32(tmp); + rdev->wb.wb[index/4] = lower_32_bits(tmp); r = radeon_ring_lock(rdev, ring, 4); if (r) { -- 2.20.1 F
[PATCH] drm/amd/display: remove variable backlight
The variable backlight is being initialized with a value that is never read, it is being re-assigned immediately afterwards. Clean up the code by removing the need for variable backlight. Signed-off-by: zhaoxiao --- drivers/gpu/drm/amd/display/dc/dce/dce_abm.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c index 874b132fe1d7..0808433185f8 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c @@ -177,23 +177,21 @@ static void dce_abm_init(struct abm *abm, uint32_t backlight) static unsigned int dce_abm_get_current_backlight(struct abm *abm) { struct dce_abm *abm_dce = TO_DCE_ABM(abm); - unsigned int backlight = REG_READ(BL1_PWM_CURRENT_ABM_LEVEL); /* return backlight in hardware format which is unsigned 17 bits, with * 1 bit integer and 16 bit fractional */ - return backlight; + return REG_READ(BL1_PWM_CURRENT_ABM_LEVEL); } static unsigned int dce_abm_get_target_backlight(struct abm *abm) { struct dce_abm *abm_dce = TO_DCE_ABM(abm); - unsigned int backlight = REG_READ(BL1_PWM_TARGET_ABM_LEVEL); /* return backlight in hardware format which is unsigned 17 bits, with * 1 bit integer and 16 bit fractional */ - return backlight; + return REG_READ(BL1_PWM_TARGET_ABM_LEVEL); } static bool dce_abm_set_level(struct abm *abm, uint32_t level) -- 2.20.1