RE: [PATCH] drm/amdgpu: During s0ix don't wait to signal GFXOFF

2021-10-01 Thread Limonciello, Mario 
[Public]



> -Original Message-
> From: Alex Deucher 
> Sent: Friday, October 1, 2021 08:26
> To: Lazar, Lijo 
> Cc: amd-gfx list ; Deucher, Alexander
> ; Limonciello, Mario
> ; Zhang, Hawking ;
> Wang, Yang(Kevin) ; Quan, Evan
> 
> Subject: Re: [PATCH] drm/amdgpu: During s0ix don't wait to signal GFXOFF
> 
> On Fri, Oct 1, 2021 at 6:16 AM Lijo Lazar  wrote:
> >
> > In the rare event when GFX IP suspend coincides with a s0ix entry, don't
> > schedule a delayed work, instead signal PMFW immediately to allow GFXOFF
> > entry. GFXOFF is a prerequisite for s0ix entry. PMFW needs to be
> > signaled about GFXOFF status before amd-pmc module passes OS HINT
> > to PMFW telling that everything is ready for a safe s0ix entry.
> >
> > Bug:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.fr
> eedesktop.org%2Fdrm%2Famd%2F-
> %2Fissues%2F1712&data=04%7C01%7CMario.Limonciello%40amd.com%7
> C0ff4fe8eaf34471369ff08d984df1a33%7C3dd8961fe4884e608e11a82d994e183
> d%7C0%7C0%7C637686916025223001%7CUnknown%7CTWFpbGZsb3d8eyJWIj
> oiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C100
> 0&sdata=x4FS7%2B8uSPiNwYhQdDLekjBabrQwvkBfb%2BjlVbxJWB0%3D&a
> mp;reserved=0
> >
> > Signed-off-by: Lijo Lazar 
> 
> Reviewed-by: Alex Deucher 

Reviewed-by: Mario Limonciello 

> 
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 14 --
> >  1 file changed, 12 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > index e7f06bd0f0cd..1916ec84dd71 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > @@ -31,6 +31,8 @@
> >  /* delay 0.1 second to enable gfx off feature */
> >  #define GFX_OFF_DELAY_ENABLE msecs_to_jiffies(100)
> >
> > +#define GFX_OFF_NO_DELAY 0
> > +
> >  /*
> >   * GPU GFX IP block helpers function.
> >   */
> > @@ -558,6 +560,8 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device
> *adev)
> >
> >  void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable)
> >  {
> > +   unsigned long delay = GFX_OFF_DELAY_ENABLE;
> > +
> > if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
> > return;
> >
> > @@ -573,8 +577,14 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device
> *adev, bool enable)
> >
> > adev->gfx.gfx_off_req_count--;
> >
> > -   if (adev->gfx.gfx_off_req_count == 0 && 
> > !adev->gfx.gfx_off_state)
> > -   schedule_delayed_work(&adev->gfx.gfx_off_delay_work,
> GFX_OFF_DELAY_ENABLE);
> > +   if (adev->gfx.gfx_off_req_count == 0 &&
> > +   !adev->gfx.gfx_off_state) {
> > +   /* If going to s2idle, no need to wait */
> > +   if (adev->in_s0ix)
> > +   delay = GFX_OFF_NO_DELAY;
> > +   schedule_delayed_work(&adev->gfx.gfx_off_delay_work,
> > + delay);
> > +   }
> > } else {
> > if (adev->gfx.gfx_off_req_count == 0) {
> > 
> > cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work);
> > --
> > 2.17.1
> >

Re: [PATCH] drm/amdgpu: During s0ix don't wait to signal GFXOFF

2021-10-01 Thread Alex Deucher 
On Fri, Oct 1, 2021 at 6:16 AM Lijo Lazar  wrote:
>
> In the rare event when GFX IP suspend coincides with a s0ix entry, don't
> schedule a delayed work, instead signal PMFW immediately to allow GFXOFF
> entry. GFXOFF is a prerequisite for s0ix entry. PMFW needs to be
> signaled about GFXOFF status before amd-pmc module passes OS HINT
> to PMFW telling that everything is ready for a safe s0ix entry.
>
> Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1712
>
> Signed-off-by: Lijo Lazar 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 14 --
>  1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index e7f06bd0f0cd..1916ec84dd71 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -31,6 +31,8 @@
>  /* delay 0.1 second to enable gfx off feature */
>  #define GFX_OFF_DELAY_ENABLE msecs_to_jiffies(100)
>
> +#define GFX_OFF_NO_DELAY 0
> +
>  /*
>   * GPU GFX IP block helpers function.
>   */
> @@ -558,6 +560,8 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev)
>
>  void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable)
>  {
> +   unsigned long delay = GFX_OFF_DELAY_ENABLE;
> +
> if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
> return;
>
> @@ -573,8 +577,14 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, 
> bool enable)
>
> adev->gfx.gfx_off_req_count--;
>
> -   if (adev->gfx.gfx_off_req_count == 0 && 
> !adev->gfx.gfx_off_state)
> -   schedule_delayed_work(&adev->gfx.gfx_off_delay_work, 
> GFX_OFF_DELAY_ENABLE);
> +   if (adev->gfx.gfx_off_req_count == 0 &&
> +   !adev->gfx.gfx_off_state) {
> +   /* If going to s2idle, no need to wait */
> +   if (adev->in_s0ix)
> +   delay = GFX_OFF_NO_DELAY;
> +   schedule_delayed_work(&adev->gfx.gfx_off_delay_work,
> + delay);
> +   }
> } else {
> if (adev->gfx.gfx_off_req_count == 0) {
> 
> cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work);
> --
> 2.17.1
>

[PATCH] drm/amdgpu: During s0ix don't wait to signal GFXOFF

2021-10-01 Thread Lijo Lazar 
In the rare event when GFX IP suspend coincides with a s0ix entry, don't
schedule a delayed work, instead signal PMFW immediately to allow GFXOFF
entry. GFXOFF is a prerequisite for s0ix entry. PMFW needs to be
signaled about GFXOFF status before amd-pmc module passes OS HINT
to PMFW telling that everything is ready for a safe s0ix entry.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1712

Signed-off-by: Lijo Lazar 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index e7f06bd0f0cd..1916ec84dd71 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -31,6 +31,8 @@
 /* delay 0.1 second to enable gfx off feature */
 #define GFX_OFF_DELAY_ENABLE msecs_to_jiffies(100)
 
+#define GFX_OFF_NO_DELAY 0
+
 /*
  * GPU GFX IP block helpers function.
  */
@@ -558,6 +560,8 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev)
 
 void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable)
 {
+   unsigned long delay = GFX_OFF_DELAY_ENABLE;
+
if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
return;
 
@@ -573,8 +577,14 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool 
enable)
 
adev->gfx.gfx_off_req_count--;
 
-   if (adev->gfx.gfx_off_req_count == 0 && 
!adev->gfx.gfx_off_state)
-   schedule_delayed_work(&adev->gfx.gfx_off_delay_work, 
GFX_OFF_DELAY_ENABLE);
+   if (adev->gfx.gfx_off_req_count == 0 &&
+   !adev->gfx.gfx_off_state) {
+   /* If going to s2idle, no need to wait */
+   if (adev->in_s0ix)
+   delay = GFX_OFF_NO_DELAY;
+   schedule_delayed_work(&adev->gfx.gfx_off_delay_work,
+ delay);
+   }
} else {
if (adev->gfx.gfx_off_req_count == 0) {
cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work);
-- 
2.17.1