RE: [PATCH] drm/amdgpu: add rlc_sr_cntl_list to firmware array

2022-09-26 Thread Gao, Likun
[AMD Official Use Only - General]

Reviewed-by: Likun Gao .

Regards,
Likun

-Original Message-
From: Zhang, Hawking  
Sent: Tuesday, September 27, 2022 10:31 AM
To: amd-gfx@lists.freedesktop.org; Gao, Likun ; Deucher, 
Alexander 
Cc: Zhang, Hawking 
Subject: [PATCH] drm/amdgpu: add rlc_sr_cntl_list to firmware array

To allow upload the list via psp

Signed-off-by: Hawking Zhang 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
index 13675b3aa218..792333206362 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
@@ -359,6 +359,14 @@ static void amdgpu_gfx_rlc_init_microcode_v2_1(struct 
amdgpu_device *adev)
le32_to_cpu(rlc_hdr->reg_list_format_direct_reg_list_length);
 
if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
+   if (adev->gfx.rlc.save_restore_list_cntl_size_bytes) {
+   info = 
>firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL];
+   info->ucode_id = AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL;
+   info->fw = adev->gfx.rlc_fw;
+   adev->firmware.fw_size +=
+   
ALIGN(adev->gfx.rlc.save_restore_list_cntl_size_bytes, PAGE_SIZE);
+   }
+
if (adev->gfx.rlc.save_restore_list_gpm_size_bytes) {
info = 
>firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM];
info->ucode_id = 
AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM;
-- 
2.17.1


[PATCH] drm/amdgpu: add rlc_sr_cntl_list to firmware array

2022-09-26 Thread Hawking Zhang
To allow upload the list via psp

Signed-off-by: Hawking Zhang 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
index 13675b3aa218..792333206362 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
@@ -359,6 +359,14 @@ static void amdgpu_gfx_rlc_init_microcode_v2_1(struct 
amdgpu_device *adev)
le32_to_cpu(rlc_hdr->reg_list_format_direct_reg_list_length);
 
if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
+   if (adev->gfx.rlc.save_restore_list_cntl_size_bytes) {
+   info = 
>firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL];
+   info->ucode_id = AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL;
+   info->fw = adev->gfx.rlc_fw;
+   adev->firmware.fw_size +=
+   
ALIGN(adev->gfx.rlc.save_restore_list_cntl_size_bytes, PAGE_SIZE);
+   }
+
if (adev->gfx.rlc.save_restore_list_gpm_size_bytes) {
info = 
>firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM];
info->ucode_id = 
AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM;
-- 
2.17.1