RE: [PATCH] drm/amdgpu: enable smart shift on dGPU (v5)
[AMD Official Use Only]
Acked-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of
> Sathishkumar S
> Sent: Sunday, May 30, 2021 5:19 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Sundararaju,
> Sathishkumar ; Sharma, Shashank
>
> Subject: [PATCH] drm/amdgpu: enable smart shift on dGPU (v5)
>
> enable smart shift on dGPU if it is part of HG system and the platform
> supports ATCS method to handle power shift.
>
> V2: avoid psc updates in baco enter and exit (Lijo)
> fix alignment (Shashank)
> V3: rebased on unified ATCS handling. (Alex)
> V4: check for return value and warn on failed update (Shashank)
> return 0 if device does not support smart shift. (Lizo)
> V5: rebased on ATPX/ATCS structures global (Alex)
>
> Signed-off-by: Sathishkumar S
> Reviewed-by: Lijo Lazar
> Reviewed-by: Shashank Sharma
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h| 18
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 49
> ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 24 +++
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 6 +++
> 4 files changed, 97 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 0ea2ed3a55f1..827533a543c6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -130,6 +130,13 @@ struct amdgpu_mgpu_info
> boolpending_reset;
> };
>
> +enum amdgpu_ss {
> + AMDGPU_SS_DRV_LOAD,
> + AMDGPU_SS_DEV_D0,
> + AMDGPU_SS_DEV_D3,
> + AMDGPU_SS_DRV_UNLOAD
> +};
> +
> struct amdgpu_watchdog_timer
> {
> bool timeout_fatal_disable;
> @@ -1267,6 +1274,7 @@ int amdgpu_device_mode1_reset(struct
> amdgpu_device *adev); bool amdgpu_device_supports_atpx(struct
> drm_device *dev); bool amdgpu_device_supports_px(struct drm_device
> *dev); bool amdgpu_device_supports_boco(struct drm_device *dev);
> +bool amdgpu_device_supports_smart_shift(struct drm_device *dev);
> bool amdgpu_device_supports_baco(struct drm_device *dev); bool
> amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
> struct amdgpu_device *peer_adev); @@ -
> 1339,6 +1347,13 @@ struct amdgpu_afmt_acr { struct amdgpu_afmt_acr
> amdgpu_afmt_acr(uint32_t clock);
>
> /* amdgpu_acpi.c */
> +
> +/* ATCS Device/Driver State */
> +#define AMDGPU_ATCS_PSC_DEV_STATE_D0 0
> +#define AMDGPU_ATCS_PSC_DEV_STATE_D3_HOT 3
> +#define AMDGPU_ATCS_PSC_DRV_STATE_OPR0
> +#define AMDGPU_ATCS_PSC_DRV_STATE_NOT_OPR1
> +
> #if defined(CONFIG_ACPI)
> int amdgpu_acpi_init(struct amdgpu_device *adev); void
> amdgpu_acpi_fini(struct amdgpu_device *adev); @@ -1348,6 +1363,7 @@
> int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev,
> u8 perf_req, bool advertise);
> int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
> u8 dev_state, bool drv_state);
> +int amdgpu_acpi_smart_shift_update(struct drm_device *dev, enum
> +amdgpu_ss ss_state);
> int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
>
> void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps
> *caps); @@ -1361,6 +1377,8 @@ static inline void amdgpu_acpi_detect(void)
> { } static inline bool amdgpu_acpi_is_power_shift_control_supported(void)
> { return false; } static inline int amdgpu_acpi_power_shift_control(struct
> amdgpu_device *adev,
> u8 dev_state, bool drv_state)
> { return 0; }
> +static inline int amdgpu_acpi_smart_shift_update(struct drm_device *dev,
> + enum amdgpu_ss ss_state)
> { return 0; }
> #endif
>
> int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser, diff --git
> a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> index b631316bfe5b..84a1b4bc9bb4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> @@ -754,6 +754,55 @@ int amdgpu_acpi_power_shift_control(struct
> amdgpu_device *adev,
> return 0;
> }
>
> +/**
> + * amdgpu_acpi_smart_shift_update - update dGPU device state to SBIOS
> + *
> + * @dev: drm_device pointer
> + * @ss_state: current smart shift event
> + *
> + * returns 0 on success,
> + * otherwise return error number.
> + */
> +int amdgpu_acpi_smart_shift_update(struct drm_device *dev, enum
> +amdgpu_ss ss_state) {
> + struct amdgpu_device *adev = drm_to_adev(dev);
>
[PATCH] drm/amdgpu: enable smart shift on dGPU (v5)
enable smart shift on dGPU if it is part of HG system and
the platform supports ATCS method to handle power shift.
V2: avoid psc updates in baco enter and exit (Lijo)
fix alignment (Shashank)
V3: rebased on unified ATCS handling. (Alex)
V4: check for return value and warn on failed update (Shashank)
return 0 if device does not support smart shift. (Lizo)
V5: rebased on ATPX/ATCS structures global (Alex)
Signed-off-by: Sathishkumar S
Reviewed-by: Lijo Lazar
Reviewed-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 18
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 49 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 24 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 6 +++
4 files changed, 97 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 0ea2ed3a55f1..827533a543c6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -130,6 +130,13 @@ struct amdgpu_mgpu_info
boolpending_reset;
};
+enum amdgpu_ss {
+ AMDGPU_SS_DRV_LOAD,
+ AMDGPU_SS_DEV_D0,
+ AMDGPU_SS_DEV_D3,
+ AMDGPU_SS_DRV_UNLOAD
+};
+
struct amdgpu_watchdog_timer
{
bool timeout_fatal_disable;
@@ -1267,6 +1274,7 @@ int amdgpu_device_mode1_reset(struct amdgpu_device *adev);
bool amdgpu_device_supports_atpx(struct drm_device *dev);
bool amdgpu_device_supports_px(struct drm_device *dev);
bool amdgpu_device_supports_boco(struct drm_device *dev);
+bool amdgpu_device_supports_smart_shift(struct drm_device *dev);
bool amdgpu_device_supports_baco(struct drm_device *dev);
bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
struct amdgpu_device *peer_adev);
@@ -1339,6 +1347,13 @@ struct amdgpu_afmt_acr {
struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock);
/* amdgpu_acpi.c */
+
+/* ATCS Device/Driver State */
+#define AMDGPU_ATCS_PSC_DEV_STATE_D0 0
+#define AMDGPU_ATCS_PSC_DEV_STATE_D3_HOT 3
+#define AMDGPU_ATCS_PSC_DRV_STATE_OPR 0
+#define AMDGPU_ATCS_PSC_DRV_STATE_NOT_OPR 1
+
#if defined(CONFIG_ACPI)
int amdgpu_acpi_init(struct amdgpu_device *adev);
void amdgpu_acpi_fini(struct amdgpu_device *adev);
@@ -1348,6 +1363,7 @@ int amdgpu_acpi_pcie_performance_request(struct
amdgpu_device *adev,
u8 perf_req, bool advertise);
int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
u8 dev_state, bool drv_state);
+int amdgpu_acpi_smart_shift_update(struct drm_device *dev, enum amdgpu_ss
ss_state);
int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);
@@ -1361,6 +1377,8 @@ static inline void amdgpu_acpi_detect(void) { }
static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return
false; }
static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
u8 dev_state, bool drv_state)
{ return 0; }
+static inline int amdgpu_acpi_smart_shift_update(struct drm_device *dev,
+enum amdgpu_ss ss_state) {
return 0; }
#endif
int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index b631316bfe5b..84a1b4bc9bb4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -754,6 +754,55 @@ int amdgpu_acpi_power_shift_control(struct amdgpu_device
*adev,
return 0;
}
+/**
+ * amdgpu_acpi_smart_shift_update - update dGPU device state to SBIOS
+ *
+ * @dev: drm_device pointer
+ * @ss_state: current smart shift event
+ *
+ * returns 0 on success,
+ * otherwise return error number.
+ */
+int amdgpu_acpi_smart_shift_update(struct drm_device *dev, enum amdgpu_ss
ss_state)
+{
+ struct amdgpu_device *adev = drm_to_adev(dev);
+ int r;
+
+ if (!amdgpu_device_supports_smart_shift(dev))
+ return 0;
+
+ switch (ss_state) {
+ /* SBIOS trigger “stop”, “enable” and “start” at D0, Driver Operational.
+* SBIOS trigger “stop” at D3, Driver Not Operational.
+* SBIOS trigger “stop” and “disable” at D0, Driver NOT operational.
+*/
+ case AMDGPU_SS_DRV_LOAD:
+ r = amdgpu_acpi_power_shift_control(adev,
+
AMDGPU_ATCS_PSC_DEV_STATE_D0,
+
AMDGPU_ATCS_PSC_DRV_STATE_OPR);
+ break;
+ case AMDGPU_SS_DEV_D0:
+ r = amdgpu_acpi_power_shift_control(adev,
+
AMDGPU_ATCS_PSC_DEV_STATE_D0,
+
