[PATCH] drm/amdgpu/: use VCN firmware offset for cache window

2019-07-18 Thread Liu, Leo
Since we are using the signed FW now, and also using PSP firmware loading,
but it's still potential to break driver when loading FW directly
instead of PSP, so we should add offset.

Signed-off-by: Leo Liu 
---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 3cb62e448a37..88e3dedcf926 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -379,11 +379,8 @@ static void vcn_v2_0_mc_resume(struct amdgpu_device *adev)
WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
upper_32_bits(adev->vcn.inst->gpu_addr));
offset = size;
-   /* No signed header for now from firmware
WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,
AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
-   */
-   WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0);
}
 
WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size);
-- 
2.20.1

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[PATCH] drm/amdgpu: use VCN firmware offset for cache window

2019-07-18 Thread Liu, Leo
Since we are using the signed FW now, and also using PSP firmware loading,
but it's still potential to break driver when loading FW directly
instead of PSP, so we should add offset.

Signed-off-by: Leo Liu 
---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 3cb62e448a37..88e3dedcf926 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -379,11 +379,8 @@ static void vcn_v2_0_mc_resume(struct amdgpu_device *adev)
WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
upper_32_bits(adev->vcn.inst->gpu_addr));
offset = size;
-   /* No signed header for now from firmware
WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,
AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
-   */
-   WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0);
}
 
WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size);
-- 
2.20.1

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Re: [PATCH] drm/amdgpu/: use VCN firmware offset for cache window

2019-07-18 Thread Deucher, Alexander
Acked-by: Alex Deucher 

From: amd-gfx  on behalf of Liu, Leo 

Sent: Thursday, July 18, 2019 11:46 AM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Leo
Subject: [PATCH] drm/amdgpu/: use VCN firmware offset for cache window

Since we are using the signed FW now, and also using PSP firmware loading,
but it's still potential to break driver when loading FW directly
instead of PSP, so we should add offset.

Signed-off-by: Leo Liu 
---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 3cb62e448a37..88e3dedcf926 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -379,11 +379,8 @@ static void vcn_v2_0_mc_resume(struct amdgpu_device *adev)
 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
 upper_32_bits(adev->vcn.inst->gpu_addr));
 offset = size;
-   /* No signed header for now from firmware
 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,
 AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
-   */
-   WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0);
 }

 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size);
--
2.20.1

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Re: [PATCH] drm/amdgpu: use VCN firmware offset for cache window

2019-07-19 Thread Christian König

Am 18.07.19 um 17:49 schrieb Liu, Leo:

Since we are using the signed FW now, and also using PSP firmware loading,
but it's still potential to break driver when loading FW directly
instead of PSP, so we should add offset.

Signed-off-by: Leo Liu 


Acked-by: Christian König 


---
  drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 3 ---
  1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 3cb62e448a37..88e3dedcf926 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -379,11 +379,8 @@ static void vcn_v2_0_mc_resume(struct amdgpu_device *adev)
WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
upper_32_bits(adev->vcn.inst->gpu_addr));
offset = size;
-   /* No signed header for now from firmware
WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,
AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
-   */
-   WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0);
}
  
  	WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size);


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RE: [PATCH] drm/amdgpu: use VCN firmware offset for cache window

2019-07-19 Thread Huang, Ray
> -Original Message-
> From: amd-gfx  On Behalf Of
> Christian K?nig
> Sent: Friday, July 19, 2019 3:33 PM
> To: Liu, Leo ; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu: use VCN firmware offset for cache
> window
> 
> Am 18.07.19 um 17:49 schrieb Liu, Leo:
> > Since we are using the signed FW now, and also using PSP firmware
> > loading, but it's still potential to break driver when loading FW
> > directly instead of PSP, so we should add offset.
> >
> > Signed-off-by: Leo Liu 
> 
> Acked-by: Christian König 

Thanks Leo!  

Patch is
Reviewed-by: Huang Rui 

> 
> > ---
> >   drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 3 ---
> >   1 file changed, 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> > b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> > index 3cb62e448a37..88e3dedcf926 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> > @@ -379,11 +379,8 @@ static void vcn_v2_0_mc_resume(struct
> amdgpu_device *adev)
> > WREG32_SOC15(UVD, 0,
> mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
> > upper_32_bits(adev->vcn.inst->gpu_addr));
> > offset = size;
> > -   /* No signed header for now from firmware
> > WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,
> > AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
> > -   */
> > -   WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,
> 0);
> > }
> >
> > WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size);
> 
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RE: [PATCH] drm/amdgpu: use VCN firmware offset for cache window

2019-07-19 Thread Huang, Ray
> -Original Message-
> From: amd-gfx  On Behalf Of Liu,
> Leo
> Sent: Thursday, July 18, 2019 11:50 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, Leo 
> Subject: [PATCH] drm/amdgpu: use VCN firmware offset for cache window
> 
> Since we are using the signed FW now, and also using PSP firmware loading,
> but it's still potential to break driver when loading FW directly instead of 
> PSP,
> so we should add offset.
> 
> Signed-off-by: Leo Liu 

Thanks Leo!
+ Aaron to give a test in our side.

Reviewed-by: Huang Rui 

> ---
>  drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> index 3cb62e448a37..88e3dedcf926 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> @@ -379,11 +379,8 @@ static void vcn_v2_0_mc_resume(struct
> amdgpu_device *adev)
>   WREG32_SOC15(UVD, 0,
> mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
>   upper_32_bits(adev->vcn.inst->gpu_addr));
>   offset = size;
> - /* No signed header for now from firmware
>   WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,
>   AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
> - */
> - WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,
> 0);
>   }
> 
>   WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size);
> --
> 2.20.1
> 
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