RE: [PATCH 08/10] drm/amdgpu: use the accessible target rlc safe mode Apis directly

2018-07-10 Thread Quan, Evan 
Ok, I will drop this patch.

Regards,
Evan
> -Original Message-
> From: Alex Deucher [mailto:alexdeuc...@gmail.com]
> Sent: Wednesday, July 11, 2018 1:24 AM
> To: Quan, Evan 
> Cc: amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 08/10] drm/amdgpu: use the accessible target rlc safe
> mode Apis directly
> 
> On Mon, Jul 9, 2018 at 12:08 AM, Quan, Evan  wrote:
> > Ping..
> >
> >> -Original Message-
> >> From: Evan Quan [mailto:evan.q...@amd.com]
> >> Sent: Thursday, July 05, 2018 5:10 PM
> >> To: amd-gfx@lists.freedesktop.org
> >> Cc: Quan, Evan 
> >> Subject: [PATCH 08/10] drm/amdgpu: use the accessible target rlc safe
> >> mode Apis directly
> >>
> >> No need to do double dereference to reach the Apis. They are
> >> accessible directly.
> >>
> 
> One advantage of using the callback is that you may end up having different
> callbacks for different asics within the gfx9 family.  I don't know if this 
> will be
> the case or not.  IIRC, there were differences between chips on older gfx
> versions.
> 
> Alex
> 
> >> Change-Id: I4b810c5e1981e0810df36a701b20edaf1f6af207
> >> Signed-off-by: Evan Quan 
> >> ---
> >>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 
> >>  1 file changed, 4 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> >> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> >> index cb7f2efa9882..9679bdc0ea2e 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> >> @@ -3618,7 +3618,7 @@ static void
> >> gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev,  {
> >>   uint32_t data, def;
> >>
> >> - adev->gfx.rlc.funcs->enter_safe_mode(adev);
> >> + gfx_v9_0_enter_rlc_safe_mode(adev);
> >>
> >>   /* Enable 3D CGCG/CGLS */
> >>   if (enable && (adev->cg_flags &
> >> AMD_CG_SUPPORT_GFX_3D_CGCG)) { @@ -3658,7 +3658,7 @@ static
> void
> >> gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev,
> >>   WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D,
> >> data);
> >>   }
> >>
> >> - adev->gfx.rlc.funcs->exit_safe_mode(adev);
> >> + gfx_v9_0_exit_rlc_safe_mode(adev);
> >>  }
> >>
> >>  static void gfx_v9_0_update_coarse_grain_clock_gating(struct
> >> amdgpu_device *adev, @@ -3666,7 +3666,7 @@ static void
> >> gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device
> *adev  {
> >>   uint32_t def, data;
> >>
> >> - adev->gfx.rlc.funcs->enter_safe_mode(adev);
> >> + gfx_v9_0_enter_rlc_safe_mode(adev);
> >>
> >>   if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) {
> >>   def = data = RREG32_SOC15(GC, 0,
> >> mmRLC_CGTT_MGCG_OVERRIDE); @@ -3706,7 +3706,7 @@ static void
> >> gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device
> *adev
> >>   WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL,
> >> data);
> >>   }
> >>
> >> - adev->gfx.rlc.funcs->exit_safe_mode(adev);
> >> + gfx_v9_0_exit_rlc_safe_mode(adev);
> >>  }
> >>
> >>  static int gfx_v9_0_update_gfx_clock_gating(struct amdgpu_device
> >> *adev,
> >> --
> >> 2.18.0
> >
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Re: [PATCH 08/10] drm/amdgpu: use the accessible target rlc safe mode Apis directly

2018-07-10 Thread Alex Deucher 
On Mon, Jul 9, 2018 at 12:08 AM, Quan, Evan  wrote:
> Ping..
>
>> -Original Message-
>> From: Evan Quan [mailto:evan.q...@amd.com]
>> Sent: Thursday, July 05, 2018 5:10 PM
>> To: amd-gfx@lists.freedesktop.org
>> Cc: Quan, Evan 
>> Subject: [PATCH 08/10] drm/amdgpu: use the accessible target rlc safe mode
>> Apis directly
>>
>> No need to do double dereference to reach the Apis. They are accessible
>> directly.
>>

One advantage of using the callback is that you may end up having
different callbacks for different asics within the gfx9 family.  I
don't know if this will be the case or not.  IIRC, there were
differences between chips on older gfx versions.

Alex

>> Change-Id: I4b810c5e1981e0810df36a701b20edaf1f6af207
>> Signed-off-by: Evan Quan 
>> ---
>>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> index cb7f2efa9882..9679bdc0ea2e 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> @@ -3618,7 +3618,7 @@ static void
>> gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev,  {
>>   uint32_t data, def;
>>
>> - adev->gfx.rlc.funcs->enter_safe_mode(adev);
>> + gfx_v9_0_enter_rlc_safe_mode(adev);
>>
>>   /* Enable 3D CGCG/CGLS */
>>   if (enable && (adev->cg_flags &
>> AMD_CG_SUPPORT_GFX_3D_CGCG)) { @@ -3658,7 +3658,7 @@ static void
>> gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev,
>>   WREG32_SOC15(GC, 0,
>> mmRLC_CGCG_CGLS_CTRL_3D, data);
>>   }
>>
>> - adev->gfx.rlc.funcs->exit_safe_mode(adev);
>> + gfx_v9_0_exit_rlc_safe_mode(adev);
>>  }
>>
>>  static void gfx_v9_0_update_coarse_grain_clock_gating(struct
>> amdgpu_device *adev, @@ -3666,7 +3666,7 @@ static void
>> gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev  {
>>   uint32_t def, data;
>>
>> - adev->gfx.rlc.funcs->enter_safe_mode(adev);
>> + gfx_v9_0_enter_rlc_safe_mode(adev);
>>
>>   if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) {
>>   def = data = RREG32_SOC15(GC, 0,
>> mmRLC_CGTT_MGCG_OVERRIDE); @@ -3706,7 +3706,7 @@ static void
>> gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev
>>   WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL,
>> data);
>>   }
>>
>> - adev->gfx.rlc.funcs->exit_safe_mode(adev);
>> + gfx_v9_0_exit_rlc_safe_mode(adev);
>>  }
>>
>>  static int gfx_v9_0_update_gfx_clock_gating(struct amdgpu_device *adev,
>> --
>> 2.18.0
>
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RE: [PATCH 08/10] drm/amdgpu: use the accessible target rlc safe mode Apis directly

2018-07-08 Thread Quan, Evan 
Ping..

> -Original Message-
> From: Evan Quan [mailto:evan.q...@amd.com]
> Sent: Thursday, July 05, 2018 5:10 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan 
> Subject: [PATCH 08/10] drm/amdgpu: use the accessible target rlc safe mode
> Apis directly
> 
> No need to do double dereference to reach the Apis. They are accessible
> directly.
> 
> Change-Id: I4b810c5e1981e0810df36a701b20edaf1f6af207
> Signed-off-by: Evan Quan 
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index cb7f2efa9882..9679bdc0ea2e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3618,7 +3618,7 @@ static void
> gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev,  {
>   uint32_t data, def;
> 
> - adev->gfx.rlc.funcs->enter_safe_mode(adev);
> + gfx_v9_0_enter_rlc_safe_mode(adev);
> 
>   /* Enable 3D CGCG/CGLS */
>   if (enable && (adev->cg_flags &
> AMD_CG_SUPPORT_GFX_3D_CGCG)) { @@ -3658,7 +3658,7 @@ static void
> gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev,
>   WREG32_SOC15(GC, 0,
> mmRLC_CGCG_CGLS_CTRL_3D, data);
>   }
> 
> - adev->gfx.rlc.funcs->exit_safe_mode(adev);
> + gfx_v9_0_exit_rlc_safe_mode(adev);
>  }
> 
>  static void gfx_v9_0_update_coarse_grain_clock_gating(struct
> amdgpu_device *adev, @@ -3666,7 +3666,7 @@ static void
> gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev  {
>   uint32_t def, data;
> 
> - adev->gfx.rlc.funcs->enter_safe_mode(adev);
> + gfx_v9_0_enter_rlc_safe_mode(adev);
> 
>   if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) {
>   def = data = RREG32_SOC15(GC, 0,
> mmRLC_CGTT_MGCG_OVERRIDE); @@ -3706,7 +3706,7 @@ static void
> gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev
>   WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL,
> data);
>   }
> 
> - adev->gfx.rlc.funcs->exit_safe_mode(adev);
> + gfx_v9_0_exit_rlc_safe_mode(adev);
>  }
> 
>  static int gfx_v9_0_update_gfx_clock_gating(struct amdgpu_device *adev,
> --
> 2.18.0

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[PATCH 08/10] drm/amdgpu: use the accessible target rlc safe mode Apis directly

2018-07-05 Thread Evan Quan 
No need to do double dereference to reach the Apis. They are
accessible directly.

Change-Id: I4b810c5e1981e0810df36a701b20edaf1f6af207
Signed-off-by: Evan Quan 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index cb7f2efa9882..9679bdc0ea2e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3618,7 +3618,7 @@ static void gfx_v9_0_update_3d_clock_gating(struct 
amdgpu_device *adev,
 {
uint32_t data, def;
 
-   adev->gfx.rlc.funcs->enter_safe_mode(adev);
+   gfx_v9_0_enter_rlc_safe_mode(adev);
 
/* Enable 3D CGCG/CGLS */
if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGCG)) {
@@ -3658,7 +3658,7 @@ static void gfx_v9_0_update_3d_clock_gating(struct 
amdgpu_device *adev,
WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data);
}
 
-   adev->gfx.rlc.funcs->exit_safe_mode(adev);
+   gfx_v9_0_exit_rlc_safe_mode(adev);
 }
 
 static void gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device 
*adev,
@@ -3666,7 +3666,7 @@ static void 
gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev
 {
uint32_t def, data;
 
-   adev->gfx.rlc.funcs->enter_safe_mode(adev);
+   gfx_v9_0_enter_rlc_safe_mode(adev);
 
if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) {
def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);
@@ -3706,7 +3706,7 @@ static void 
gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev
WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data);
}
 
-   adev->gfx.rlc.funcs->exit_safe_mode(adev);
+   gfx_v9_0_exit_rlc_safe_mode(adev);
 }
 
 static int gfx_v9_0_update_gfx_clock_gating(struct amdgpu_device *adev,
-- 
2.18.0

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