Re: [PATCH 1/2] drm/amd: Expose the FRU SMU I2C bus
On Thu, Jan 27, 2022 at 1:54 PM Luben Tuikov wrote:
>
> Expose the FRU SMU I2C bus.
Maybe rework the commit message a bit. Something like:
Expose both SMU i2c buses. Some boards use the same bus for both the
RAS and FRU EEPROMs others use different buses. This enables the
additional i2c bus and sets the right buses to use for RAS and FRU.
With that fixed, the series is:
Reviewed-by: Alex Deucher
>
> Cc: Roy Sun
> Co-developed-by: Alex Deucher
> Signed-off-by: Luben Tuikov
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c| 6 +-
> .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c| 14 ++--
> drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c| 80 ---
> drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.h| 6 +-
> drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 14 +++-
> .../amd/pm/powerplay/smumgr/vega20_smumgr.c | 4 +-
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 4 +-
> drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 4 +-
> .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 69 +++-
> .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 68 +++-
> .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 71 +++-
> .../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c| 44 +++---
> drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 4 +-
> 13 files changed, 273 insertions(+), 115 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
> index 60e7e637eaa33d..40180648be3811 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
> @@ -75,7 +75,7 @@ static int amdgpu_fru_read_eeprom(struct amdgpu_device
> *adev, uint32_t addrptr,
> {
> int ret, size;
>
> - ret = amdgpu_eeprom_read(>pm.smu_i2c, addrptr, buff, 1);
> + ret = amdgpu_eeprom_read(adev->pm.fru_eeprom_i2c_bus, addrptr, buff,
> 1);
> if (ret < 1) {
> DRM_WARN("FRU: Failed to get size field");
> return ret;
> @@ -86,7 +86,7 @@ static int amdgpu_fru_read_eeprom(struct amdgpu_device
> *adev, uint32_t addrptr,
> */
> size = buff[0] - I2C_PRODUCT_INFO_OFFSET;
>
> - ret = amdgpu_eeprom_read(>pm.smu_i2c, addrptr + 1, buff, size);
> + ret = amdgpu_eeprom_read(adev->pm.fru_eeprom_i2c_bus, addrptr + 1,
> buff, size);
> if (ret < 1) {
> DRM_WARN("FRU: Failed to get data field");
> return ret;
> @@ -109,7 +109,7 @@ int amdgpu_fru_get_product_info(struct amdgpu_device
> *adev)
> offset = 0;
>
> /* If algo exists, it means that the i2c_adapter's initialized */
> - if (!adev->pm.smu_i2c.algo) {
> + if (!adev->pm.fru_eeprom_i2c_bus ||
> !adev->pm.fru_eeprom_i2c_bus->algo) {
> DRM_WARN("Cannot access FRU, EEPROM accessor not
> initialized");
> return -ENODEV;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> index 05117eda105b55..c09d047272b207 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> @@ -194,7 +194,7 @@ static int __write_table_header(struct
> amdgpu_ras_eeprom_control *control)
>
> /* i2c may be unstable in gpu reset */
> down_read(>reset_sem);
> - res = amdgpu_eeprom_write(>pm.smu_i2c,
> + res = amdgpu_eeprom_write(adev->pm.ras_eeprom_i2c_bus,
> control->i2c_address +
> control->ras_header_offset,
> buf, RAS_TABLE_HEADER_SIZE);
> @@ -389,7 +389,7 @@ static int __amdgpu_ras_eeprom_write(struct
> amdgpu_ras_eeprom_control *control,
> /* i2c may be unstable in gpu reset */
> down_read(>reset_sem);
> buf_size = num * RAS_TABLE_RECORD_SIZE;
> - res = amdgpu_eeprom_write(>pm.smu_i2c,
> + res = amdgpu_eeprom_write(adev->pm.ras_eeprom_i2c_bus,
> control->i2c_address +
> RAS_INDEX_TO_OFFSET(control, fri),
> buf, buf_size);
> @@ -548,7 +548,7 @@ amdgpu_ras_eeprom_update_header(struct
> amdgpu_ras_eeprom_control *control)
> }
>
> down_read(>reset_sem);
> - res = amdgpu_eeprom_read(>pm.smu_i2c,
> + res = amdgpu_eeprom_read(adev->pm.ras_eeprom_i2c_bus,
> control->i2c_address +
> control->ras_record_offset,
> buf, buf_size);
> @@ -644,7 +644,7 @@ static int __amdgpu_ras_eeprom_read(struct
> amdgpu_ras_eeprom_control *control,
> /* i2c may be unstable in gpu reset */
> down_read(>reset_sem);
> buf_size = num * RAS_TABLE_RECORD_SIZE;
> - res = amdgpu_eeprom_read(>pm.smu_i2c,
> + res =
[PATCH 1/2] drm/amd: Expose the FRU SMU I2C bus
Expose the FRU SMU I2C bus.
Cc: Roy Sun
Co-developed-by: Alex Deucher
Signed-off-by: Luben Tuikov
---
.../gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c| 6 +-
.../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c| 14 ++--
drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c| 80 ---
drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.h| 6 +-
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 14 +++-
.../amd/pm/powerplay/smumgr/vega20_smumgr.c | 4 +-
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 4 +-
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 4 +-
.../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 69 +++-
.../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 68 +++-
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 71 +++-
.../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c| 44 +++---
drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 4 +-
13 files changed, 273 insertions(+), 115 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
index 60e7e637eaa33d..40180648be3811 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
@@ -75,7 +75,7 @@ static int amdgpu_fru_read_eeprom(struct amdgpu_device *adev,
uint32_t addrptr,
{
int ret, size;
- ret = amdgpu_eeprom_read(>pm.smu_i2c, addrptr, buff, 1);
+ ret = amdgpu_eeprom_read(adev->pm.fru_eeprom_i2c_bus, addrptr, buff, 1);
if (ret < 1) {
DRM_WARN("FRU: Failed to get size field");
return ret;
@@ -86,7 +86,7 @@ static int amdgpu_fru_read_eeprom(struct amdgpu_device *adev,
uint32_t addrptr,
*/
size = buff[0] - I2C_PRODUCT_INFO_OFFSET;
- ret = amdgpu_eeprom_read(>pm.smu_i2c, addrptr + 1, buff, size);
+ ret = amdgpu_eeprom_read(adev->pm.fru_eeprom_i2c_bus, addrptr + 1,
buff, size);
if (ret < 1) {
DRM_WARN("FRU: Failed to get data field");
return ret;
@@ -109,7 +109,7 @@ int amdgpu_fru_get_product_info(struct amdgpu_device *adev)
offset = 0;
/* If algo exists, it means that the i2c_adapter's initialized */
- if (!adev->pm.smu_i2c.algo) {
+ if (!adev->pm.fru_eeprom_i2c_bus || !adev->pm.fru_eeprom_i2c_bus->algo)
{
DRM_WARN("Cannot access FRU, EEPROM accessor not initialized");
return -ENODEV;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 05117eda105b55..c09d047272b207 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -194,7 +194,7 @@ static int __write_table_header(struct
amdgpu_ras_eeprom_control *control)
/* i2c may be unstable in gpu reset */
down_read(>reset_sem);
- res = amdgpu_eeprom_write(>pm.smu_i2c,
+ res = amdgpu_eeprom_write(adev->pm.ras_eeprom_i2c_bus,
control->i2c_address +
control->ras_header_offset,
buf, RAS_TABLE_HEADER_SIZE);
@@ -389,7 +389,7 @@ static int __amdgpu_ras_eeprom_write(struct
amdgpu_ras_eeprom_control *control,
/* i2c may be unstable in gpu reset */
down_read(>reset_sem);
buf_size = num * RAS_TABLE_RECORD_SIZE;
- res = amdgpu_eeprom_write(>pm.smu_i2c,
+ res = amdgpu_eeprom_write(adev->pm.ras_eeprom_i2c_bus,
control->i2c_address +
RAS_INDEX_TO_OFFSET(control, fri),
buf, buf_size);
@@ -548,7 +548,7 @@ amdgpu_ras_eeprom_update_header(struct
amdgpu_ras_eeprom_control *control)
}
down_read(>reset_sem);
- res = amdgpu_eeprom_read(>pm.smu_i2c,
+ res = amdgpu_eeprom_read(adev->pm.ras_eeprom_i2c_bus,
control->i2c_address +
control->ras_record_offset,
buf, buf_size);
@@ -644,7 +644,7 @@ static int __amdgpu_ras_eeprom_read(struct
amdgpu_ras_eeprom_control *control,
/* i2c may be unstable in gpu reset */
down_read(>reset_sem);
buf_size = num * RAS_TABLE_RECORD_SIZE;
- res = amdgpu_eeprom_read(>pm.smu_i2c,
+ res = amdgpu_eeprom_read(adev->pm.ras_eeprom_i2c_bus,
control->i2c_address +
RAS_INDEX_TO_OFFSET(control, fri),
buf, buf_size);
@@ -1009,7 +1009,7 @@ static int __verify_ras_table_checksum(struct
amdgpu_ras_eeprom_control *control
return -ENOMEM;
}
- res = amdgpu_eeprom_read(>pm.smu_i2c,
+ res = amdgpu_eeprom_read(adev->pm.ras_eeprom_i2c_bus,
control->i2c_address +
control->ras_header_offset,
