Re: [PATCH 1/4] drm/amdgpu: add new DF 1.7 register defs

2018-05-20 Thread Zhang, Jerry (Junwei) 

On 05/17/2018 04:51 AM, Alex Deucher wrote:

Signed-off-by: Alex Deucher 


Series is
Reviewed-by: Junwei Zhang 


---
  drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h  | 4 
  drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h | 4 
  2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h 
b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
index 2b305dd021e8..e6044e27a913 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
@@ -30,4 +30,8 @@
  #define mmDF_CS_AON0_DramBaseAddress0 
0x0044
  #define mmDF_CS_AON0_DramBaseAddress0_BASE_IDX
0

+#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0   
0x0214
+#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0_BASE_IDX  
0
+
+
  #endif
diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h 
b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
index 2ba849798924..a78c99480e2d 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
@@ -45,4 +45,8 @@
  #define DF_CS_AON0_DramBaseAddress0__IntLvAddrSel_MASK
0x0700L
  #define DF_CS_AON0_DramBaseAddress0__DramBaseAddr_MASK
0xF000L

+//DF_CS_AON0_CoherentSlaveModeCtrlA0
+#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW__SHIFT   
0x3
+#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW_MASK 
0x0008L
+
  #endif


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Re: [PATCH 1/4] drm/amdgpu: add new DF 1.7 register defs

2018-05-20 Thread Zhang, Jerry (Junwei) 

On 05/17/2018 04:51 AM, Alex Deucher wrote:

Signed-off-by: Alex Deucher 

Reviewed-by: Junwei Zhang 


---
  drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h  | 4 
  drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h | 4 
  2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h 
b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
index 2b305dd021e8..e6044e27a913 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
@@ -30,4 +30,8 @@
  #define mmDF_CS_AON0_DramBaseAddress0 
0x0044
  #define mmDF_CS_AON0_DramBaseAddress0_BASE_IDX
0

+#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0   
0x0214
+#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0_BASE_IDX  
0
+
+
  #endif
diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h 
b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
index 2ba849798924..a78c99480e2d 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
@@ -45,4 +45,8 @@
  #define DF_CS_AON0_DramBaseAddress0__IntLvAddrSel_MASK
0x0700L
  #define DF_CS_AON0_DramBaseAddress0__DramBaseAddr_MASK
0xF000L

+//DF_CS_AON0_CoherentSlaveModeCtrlA0
+#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW__SHIFT   
0x3
+#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW_MASK 
0x0008L
+
  #endif


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RE: [PATCH 1/4] drm/amdgpu: add new DF 1.7 register defs

2018-05-20 Thread Zhang, Hawking 
Series is Reviewed-by: Hawking Zhang <hawking.zh...@amd.com>

Regards,
Hawking

-Original Message-
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: 2018年5月19日 3:48
To: amd-gfx list <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <alexander.deuc...@amd.com>
Subject: Re: [PATCH 1/4] drm/amdgpu: add new DF 1.7 register defs

Ping?

On Wed, May 16, 2018 at 4:51 PM, Alex Deucher <alexdeuc...@gmail.com> wrote:
> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
>  drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h  | 4   
> drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h | 4 
>  2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h 
> b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
> index 2b305dd021e8..e6044e27a913 100644
> --- a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
> +++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
> @@ -30,4 +30,8 @@
>  #define mmDF_CS_AON0_DramBaseAddress0
>   0x0044
>  #define mmDF_CS_AON0_DramBaseAddress0_BASE_IDX   
>   0
>
> +#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0 
>   0x0214
> +#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0_BASE_IDX
>   0
> +
> +
>  #endif
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h 
> b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
> index 2ba849798924..a78c99480e2d 100644
> --- a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
> +++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
> @@ -45,4 +45,8 @@
>  #define DF_CS_AON0_DramBaseAddress0__IntLvAddrSel_MASK   
>   0x0700L
>  #define DF_CS_AON0_DramBaseAddress0__DramBaseAddr_MASK   
>   0xF000L
>
> +//DF_CS_AON0_CoherentSlaveModeCtrlA0
> +#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW__SHIFT 
>   0x3
> +#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW_MASK   
>   0x0008L
> +
>  #endif
> --
> 2.13.6
>
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Re: [PATCH 1/4] drm/amdgpu: add new DF 1.7 register defs

2018-05-18 Thread Alex Deucher 
Ping?

On Wed, May 16, 2018 at 4:51 PM, Alex Deucher  wrote:
> Signed-off-by: Alex Deucher 
> ---
>  drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h  | 4 
>  drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h | 4 
>  2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h 
> b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
> index 2b305dd021e8..e6044e27a913 100644
> --- a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
> +++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
> @@ -30,4 +30,8 @@
>  #define mmDF_CS_AON0_DramBaseAddress0
>   0x0044
>  #define mmDF_CS_AON0_DramBaseAddress0_BASE_IDX   
>   0
>
> +#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0 
>   0x0214
> +#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0_BASE_IDX
>   0
> +
> +
>  #endif
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h 
> b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
> index 2ba849798924..a78c99480e2d 100644
> --- a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
> +++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
> @@ -45,4 +45,8 @@
>  #define DF_CS_AON0_DramBaseAddress0__IntLvAddrSel_MASK   
>   0x0700L
>  #define DF_CS_AON0_DramBaseAddress0__DramBaseAddr_MASK   
>   0xF000L
>
> +//DF_CS_AON0_CoherentSlaveModeCtrlA0
> +#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW__SHIFT 
>   0x3
> +#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW_MASK   
>   0x0008L
> +
>  #endif
> --
> 2.13.6
>
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[PATCH 1/4] drm/amdgpu: add new DF 1.7 register defs

2018-05-16 Thread Alex Deucher 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h  | 4 
 drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h | 4 
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h 
b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
index 2b305dd021e8..e6044e27a913 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h
@@ -30,4 +30,8 @@
 #define mmDF_CS_AON0_DramBaseAddress0  
0x0044
 #define mmDF_CS_AON0_DramBaseAddress0_BASE_IDX 
0
 
+#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0   
0x0214
+#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0_BASE_IDX  
0
+
+
 #endif
diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h 
b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
index 2ba849798924..a78c99480e2d 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h
@@ -45,4 +45,8 @@
 #define DF_CS_AON0_DramBaseAddress0__IntLvAddrSel_MASK 
0x0700L
 #define DF_CS_AON0_DramBaseAddress0__DramBaseAddr_MASK 
0xF000L
 
+//DF_CS_AON0_CoherentSlaveModeCtrlA0
+#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW__SHIFT   
0x3
+#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW_MASK 
0x0008L
+
 #endif
-- 
2.13.6

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