Re: [PATCH 13/13] drm/amd/powerplay: cosmetic fix

2018-06-19 Thread Alex Deucher
On Tue, Jun 19, 2018 at 3:39 AM, Evan Quan  wrote:
> Fix coding style and drop unused variable.
>
> Change-Id: I9630f39154ec6bc30115e75924b35bcbe028a1a4
> Signed-off-by: Evan Quan 

Acked-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 10 +++---
>  .../gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h  | 18 
> +-
>  2 files changed, 12 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> index de61f86..a699416 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> @@ -811,9 +811,6 @@ static int vega12_enable_all_smu_features(struct pp_hwmgr 
> *hwmgr)
> enabled = (features_enabled & 
> data->smu_features[i].smu_feature_bitmap) ? true : false;
> data->smu_features[i].enabled = enabled;
> data->smu_features[i].supported = enabled;
> -   PP_ASSERT(
> -   !data->smu_features[i].allowed || enabled,
> -   "[EnableAllSMUFeatures] Enabled feature is 
> different from allowed, expected disabled!");
> }
> }
>
> @@ -1230,8 +1227,8 @@ static int vega12_get_current_gfx_clk_freq(struct 
> pp_hwmgr *hwmgr, uint32_t *gfx
>
> *gfx_freq = 0;
>
> -   PP_ASSERT_WITH_CODE(
> -   smum_send_msg_to_smc_with_parameter(hwmgr, 
> PPSMC_MSG_GetDpmClockFreq, (PPCLK_GFXCLK << 16)) == 0,
> +   PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
> +   PPSMC_MSG_GetDpmClockFreq, (PPCLK_GFXCLK << 16)) == 0,
> "[GetCurrentGfxClkFreq] Attempt to get Current GFXCLK 
> Frequency Failed!",
> return -1);
> PP_ASSERT_WITH_CODE(
> @@ -1790,7 +1787,6 @@ static int 
> vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
>  {
> struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
> Watermarks_t *table = &(data->smc_state_table.water_marks_table);
> -   int result = 0;
> uint32_t i;
>
> if (!data->registry_data.disable_water_mark &&
> @@ -1841,7 +1837,7 @@ static int 
> vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
> data->water_marks_bitmap &= ~WaterMarksLoaded;
> }
>
> -   return result;
> +   return 0;
>  }
>
>  static int vega12_force_clock_level(struct pp_hwmgr *hwmgr,
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h 
> b/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h
> index b08526f..b6ffd08 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h
> @@ -412,10 +412,10 @@ typedef struct {
>QuadraticInt_tReservedEquation2;
>QuadraticInt_tReservedEquation3;
>
> -   uint16_t MinVoltageUlvGfx;
> -   uint16_t MinVoltageUlvSoc;
> +  uint16_t MinVoltageUlvGfx;
> +  uint16_t MinVoltageUlvSoc;
>
> -   uint32_t Reserved[14];
> +  uint32_t Reserved[14];
>
>
>
> @@ -483,9 +483,9 @@ typedef struct {
>uint8_t  padding8_4;
>
>
> -   uint8_t  PllGfxclkSpreadEnabled;
> -   uint8_t  PllGfxclkSpreadPercent;
> -   uint16_t PllGfxclkSpreadFreq;
> +  uint8_t  PllGfxclkSpreadEnabled;
> +  uint8_t  PllGfxclkSpreadPercent;
> +  uint16_t PllGfxclkSpreadFreq;
>
>uint8_t  UclkSpreadEnabled;
>uint8_t  UclkSpreadPercent;
> @@ -495,9 +495,9 @@ typedef struct {
>uint8_t  SocclkSpreadPercent;
>uint16_t SocclkSpreadFreq;
>
> -   uint8_t  AcgGfxclkSpreadEnabled;
> -   uint8_t  AcgGfxclkSpreadPercent;
> -   uint16_t AcgGfxclkSpreadFreq;
> +  uint8_t  AcgGfxclkSpreadEnabled;
> +  uint8_t  AcgGfxclkSpreadPercent;
> +  uint16_t AcgGfxclkSpreadFreq;
>
>uint8_t  Vr2_I2C_address;
>uint8_t  padding_vr2[3];
> --
> 2.7.4
>
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[PATCH 13/13] drm/amd/powerplay: cosmetic fix

2018-06-19 Thread Evan Quan
Fix coding style and drop unused variable.

Change-Id: I9630f39154ec6bc30115e75924b35bcbe028a1a4
Signed-off-by: Evan Quan 
---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 10 +++---
 .../gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h  | 18 +-
 2 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
index de61f86..a699416 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
@@ -811,9 +811,6 @@ static int vega12_enable_all_smu_features(struct pp_hwmgr 
*hwmgr)
enabled = (features_enabled & 
data->smu_features[i].smu_feature_bitmap) ? true : false;
data->smu_features[i].enabled = enabled;
data->smu_features[i].supported = enabled;
-   PP_ASSERT(
-   !data->smu_features[i].allowed || enabled,
-   "[EnableAllSMUFeatures] Enabled feature is 
different from allowed, expected disabled!");
}
}
 
@@ -1230,8 +1227,8 @@ static int vega12_get_current_gfx_clk_freq(struct 
pp_hwmgr *hwmgr, uint32_t *gfx
 
*gfx_freq = 0;
 
-   PP_ASSERT_WITH_CODE(
-   smum_send_msg_to_smc_with_parameter(hwmgr, 
PPSMC_MSG_GetDpmClockFreq, (PPCLK_GFXCLK << 16)) == 0,
+   PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
+   PPSMC_MSG_GetDpmClockFreq, (PPCLK_GFXCLK << 16)) == 0,
"[GetCurrentGfxClkFreq] Attempt to get Current GFXCLK 
Frequency Failed!",
return -1);
PP_ASSERT_WITH_CODE(
@@ -1790,7 +1787,6 @@ static int vega12_set_watermarks_for_clocks_ranges(struct 
pp_hwmgr *hwmgr,
 {
struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
Watermarks_t *table = &(data->smc_state_table.water_marks_table);
-   int result = 0;
uint32_t i;
 
if (!data->registry_data.disable_water_mark &&
@@ -1841,7 +1837,7 @@ static int vega12_set_watermarks_for_clocks_ranges(struct 
pp_hwmgr *hwmgr,
data->water_marks_bitmap &= ~WaterMarksLoaded;
}
 
-   return result;
+   return 0;
 }
 
 static int vega12_force_clock_level(struct pp_hwmgr *hwmgr,
diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h 
b/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h
index b08526f..b6ffd08 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h
@@ -412,10 +412,10 @@ typedef struct {
   QuadraticInt_tReservedEquation2;
   QuadraticInt_tReservedEquation3;
 
-   uint16_t MinVoltageUlvGfx;
-   uint16_t MinVoltageUlvSoc;
+  uint16_t MinVoltageUlvGfx;
+  uint16_t MinVoltageUlvSoc;
 
-   uint32_t Reserved[14];
+  uint32_t Reserved[14];
 
 
 
@@ -483,9 +483,9 @@ typedef struct {
   uint8_t  padding8_4;
 
 
-   uint8_t  PllGfxclkSpreadEnabled;
-   uint8_t  PllGfxclkSpreadPercent;
-   uint16_t PllGfxclkSpreadFreq;
+  uint8_t  PllGfxclkSpreadEnabled;
+  uint8_t  PllGfxclkSpreadPercent;
+  uint16_t PllGfxclkSpreadFreq;
 
   uint8_t  UclkSpreadEnabled;
   uint8_t  UclkSpreadPercent;
@@ -495,9 +495,9 @@ typedef struct {
   uint8_t  SocclkSpreadPercent;
   uint16_t SocclkSpreadFreq;
 
-   uint8_t  AcgGfxclkSpreadEnabled;
-   uint8_t  AcgGfxclkSpreadPercent;
-   uint16_t AcgGfxclkSpreadFreq;
+  uint8_t  AcgGfxclkSpreadEnabled;
+  uint8_t  AcgGfxclkSpreadPercent;
+  uint16_t AcgGfxclkSpreadFreq;
 
   uint8_t  Vr2_I2C_address;
   uint8_t  padding_vr2[3];
-- 
2.7.4

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