Re: [PATCH 2/4 V2] drm/amd/pm: fix unsigned value asic_type compared against

2024-05-21 Thread Deucher, Alexander
[AMD Official Use Only - AMD Internal Distribution Only]

Reviewed-by: Alex Deucher 

From: Jesse Zhang 
Sent: Tuesday, May 21, 2024 3:16 AM
To: amd-gfx@lists.freedesktop.org 
Cc: Deucher, Alexander ; Koenig, Christian 
; Huang, Tim ; Zhang, Jesse(Jie) 
; Zhang, Jesse(Jie) 
Subject: [PATCH 2/4 V2] drm/amd/pm: fix unsigned value asic_type compared 
against

Enum asic_type always greater than or equal CHIP_TAHITI.

Signed-off-by: Jesse Zhang 
Suggested-by: Tim Huang 
---
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c 
b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index f245fc0bc6d3..68ac01a8bc3a 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -7928,12 +7928,8 @@ static void si_dpm_print_power_state(void *handle,
 DRM_INFO("\tuvdvclk: %d dclk: %d\n", rps->vclk, rps->dclk);
 for (i = 0; i < ps->performance_level_count; i++) {
 pl = >performance_levels[i];
-   if (adev->asic_type >= CHIP_TAHITI)
-   DRM_INFO("\t\tpower level %dsclk: %u mclk: %u vddc: 
%u vddci: %u pcie gen: %u\n",
-i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, 
pl->pcie_gen + 1);
-   else
-   DRM_INFO("\t\tpower level %dsclk: %u mclk: %u vddc: 
%u vddci: %u\n",
-i, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
+   DRM_INFO("\t\tpower level %dsclk: %u mclk: %u vddc: %u 
vddci: %u pcie gen: %u\n",
+i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, 
pl->pcie_gen + 1);
 }
 amdgpu_dpm_print_ps_status(adev, rps);
 }
--
2.25.1



[PATCH 2/4 V2] drm/amd/pm: fix unsigned value asic_type compared against

2024-05-21 Thread Jesse Zhang
Enum asic_type always greater than or equal CHIP_TAHITI.

Signed-off-by: Jesse Zhang 
Suggested-by: Tim Huang 
---
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c 
b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index f245fc0bc6d3..68ac01a8bc3a 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -7928,12 +7928,8 @@ static void si_dpm_print_power_state(void *handle,
DRM_INFO("\tuvdvclk: %d dclk: %d\n", rps->vclk, rps->dclk);
for (i = 0; i < ps->performance_level_count; i++) {
pl = >performance_levels[i];
-   if (adev->asic_type >= CHIP_TAHITI)
-   DRM_INFO("\t\tpower level %dsclk: %u mclk: %u vddc: 
%u vddci: %u pcie gen: %u\n",
-i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, 
pl->pcie_gen + 1);
-   else
-   DRM_INFO("\t\tpower level %dsclk: %u mclk: %u vddc: 
%u vddci: %u\n",
-i, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
+   DRM_INFO("\t\tpower level %dsclk: %u mclk: %u vddc: %u 
vddci: %u pcie gen: %u\n",
+i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, 
pl->pcie_gen + 1);
}
amdgpu_dpm_print_ps_status(adev, rps);
 }
-- 
2.25.1