subject:"\[PATCH 3\/3\] drm\/radeon\: enable ABGR and XBGR formats"

Re: [PATCH 3/3] drm/radeon: enable ABGR and XBGR formats

2018-08-01 Thread Alex Deucher

On Wed, Aug 1, 2018 at 4:25 AM, Mauro Rossi  wrote:
> Add support for DRM_FORMAT_{A,X}BGR in atombios_crtc
> R6xx crossbar registers are defined and used based on ASIC_IS_DCE2 condition,
> for DCE1/R5xx AVIVO_D1GRPH_SWAP_RB bit is used to swap red and blue channels.
>
> Signed-off-by: Mauro Rossi 
> ---
>  drivers/gpu/drm/radeon/atombios_crtc.c | 25 +
>  drivers/gpu/drm/radeon/r600_reg.h  | 31 +-
>  2 files changed, 51 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c 
> b/drivers/gpu/drm/radeon/atombios_crtc.c
> index efbd5816082d..a06ad6ab24a6 100644
> --- a/drivers/gpu/drm/radeon/atombios_crtc.c
> +++ b/drivers/gpu/drm/radeon/atombios_crtc.c
> @@ -1254,6 +1254,16 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
> /* Greater 8 bpc fb needs to bypass hw-lut to retain 
> precision */
> bypass_lut = true;
> break;
> +   case DRM_FORMAT_XBGR:
> +   case DRM_FORMAT_ABGR:
> +   fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_32BPP) 
> |
> +
> EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB));
> +   fb_swap = 
> (EVERGREEN_GRPH_RED_CROSSBAR(EVERGREEN_GRPH_RED_SEL_B) |
> +  
> EVERGREEN_GRPH_BLUE_CROSSBAR(EVERGREEN_GRPH_BLUE_SEL_R));
> +#ifdef __BIG_ENDIAN
> +   fb_swap = 
> EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32);
> +#endif
> +   break;
> default:
> DRM_ERROR("Unsupported screen format %s\n",
>   drm_get_format_name(target_fb->format->format, 
> _name));
> @@ -1551,6 +1561,21 @@ static int avivo_crtc_do_set_base(struct drm_crtc 
> *crtc,
> /* Greater 8 bpc fb needs to bypass hw-lut to retain 
> precision */
> bypass_lut = true;
> break;
> +   case DRM_FORMAT_XBGR:
> +   case DRM_FORMAT_ABGR:
> +   fb_format =
> +   AVIVO_D1GRPH_CONTROL_DEPTH_32BPP |
> +   AVIVO_D1GRPH_CONTROL_32BPP_ARGB;
> +   if (ASIC_IS_DCE2(rdev))
> +   fb_swap =
> +   (R600_D1GRPH_RED_CROSSBAR(R600_D1GRPH_RED_SEL_B) |
> +
> R600_D1GRPH_BLUE_CROSSBAR(R600_D1GRPH_BLUE_SEL_B));
> +   else /* DCE1 */
> +   fb_swap = AVIVO_D1GRPH_SWAP_RB;

This should be: fb_format |= AVIVO_D1GRPH_SWAP_RB;

Other than that, looks good.

Alex


> +#ifdef __BIG_ENDIAN
> +   fb_swap = R600_D1GRPH_SWAP_ENDIAN_32BIT;
> +#endif
> +   break;
> default:
> DRM_ERROR("Unsupported screen format %s\n",
>   drm_get_format_name(target_fb->format->format, 
> _name));
> diff --git a/drivers/gpu/drm/radeon/r600_reg.h 
> b/drivers/gpu/drm/radeon/r600_reg.h
> index 3ef202629e7e..85e85ac3ba4d 100644
> --- a/drivers/gpu/drm/radeon/r600_reg.h
> +++ b/drivers/gpu/drm/radeon/r600_reg.h
> @@ -87,11 +87,32 @@
>  #define R600_MEDIUM_VID_LOWER_GPIO_CNTL0x720
>  #define R600_LOW_VID_LOWER_GPIO_CNTL   0x724
>
> -#define R600_D1GRPH_SWAP_CONTROL   0x610C
> -#   define R600_D1GRPH_SWAP_ENDIAN_NONE(0 << 0)
> -#   define R600_D1GRPH_SWAP_ENDIAN_16BIT   (1 << 0)
> -#   define R600_D1GRPH_SWAP_ENDIAN_32BIT   (2 << 0)
> -#   define R600_D1GRPH_SWAP_ENDIAN_64BIT   (3 << 0)
> +#define R600_D1GRPH_SWAP_CONTROL 0x610C
> +#   define R600_D1GRPH_ENDIAN_SWAP(x)(((x) & 0x3) << 0)
> +#   define R600_D1GRPH_SWAP_ENDIAN_NONE  0
> +#   define R600_D1GRPH_SWAP_ENDIAN_16BIT 1
> +#   define R600_D1GRPH_SWAP_ENDIAN_32BIT 2
> +#   define R600_D1GRPH_SWAP_ENDIAN_64BIT 3
> +#   define R600_D1GRPH_RED_CROSSBAR(x)   (((x) & 0x3) << 4)
> +#   define R600_D1GRPH_RED_SEL_R 0
> +#   define R600_D1GRPH_RED_SEL_G 1
> +#   define R600_D1GRPH_RED_SEL_B 2
> +#   define R600_D1GRPH_RED_SEL_A 3
> +#   define R600_D1GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6)
> +#   define R600_D1GRPH_GREEN_SEL_G   0
> +#   define R600_D1GRPH_GREEN_SEL_B   1
> +#   define R600_D1GRPH_GREEN_SEL_A   2
> +#   define R600_D1GRPH_GREEN_SEL_R   3
> +#   define R600_D1GRPH_BLUE_CROSSBAR(x)  (((x) & 0x3) << 8)
> +#   define R600_D1GRPH_BLUE_SEL_B0
> +#   define R600_D1GRPH_BLUE_SEL_A1
> +#   define R600_D1GRPH_BLUE_SEL_R2
> +#   define R600_D1GRPH_BLUE_SEL_G3
> +#   define R600_D1GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3)

[PATCH 3/3] drm/radeon: enable ABGR and XBGR formats

2018-08-01 Thread Mauro Rossi

Add support for DRM_FORMAT_{A,X}BGR in atombios_crtc
R6xx crossbar registers are defined and used based on ASIC_IS_DCE2 condition,
for DCE1/R5xx AVIVO_D1GRPH_SWAP_RB bit is used to swap red and blue channels.

Signed-off-by: Mauro Rossi 
---
 drivers/gpu/drm/radeon/atombios_crtc.c | 25 +
 drivers/gpu/drm/radeon/r600_reg.h  | 31 +-
 2 files changed, 51 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c 
b/drivers/gpu/drm/radeon/atombios_crtc.c
index efbd5816082d..a06ad6ab24a6 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1254,6 +1254,16 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
/* Greater 8 bpc fb needs to bypass hw-lut to retain precision 
*/
bypass_lut = true;
break;
+   case DRM_FORMAT_XBGR:
+   case DRM_FORMAT_ABGR:
+   fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_32BPP) |
+
EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB));
+   fb_swap = 
(EVERGREEN_GRPH_RED_CROSSBAR(EVERGREEN_GRPH_RED_SEL_B) |
+  
EVERGREEN_GRPH_BLUE_CROSSBAR(EVERGREEN_GRPH_BLUE_SEL_R));
+#ifdef __BIG_ENDIAN
+   fb_swap = 
EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32);
+#endif
+   break;
default:
DRM_ERROR("Unsupported screen format %s\n",
  drm_get_format_name(target_fb->format->format, 
_name));
@@ -1551,6 +1561,21 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
/* Greater 8 bpc fb needs to bypass hw-lut to retain precision 
*/
bypass_lut = true;
break;
+   case DRM_FORMAT_XBGR:
+   case DRM_FORMAT_ABGR:
+   fb_format =
+   AVIVO_D1GRPH_CONTROL_DEPTH_32BPP |
+   AVIVO_D1GRPH_CONTROL_32BPP_ARGB;
+   if (ASIC_IS_DCE2(rdev))
+   fb_swap =
+   (R600_D1GRPH_RED_CROSSBAR(R600_D1GRPH_RED_SEL_B) |
+R600_D1GRPH_BLUE_CROSSBAR(R600_D1GRPH_BLUE_SEL_B));
+   else /* DCE1 */
+   fb_swap = AVIVO_D1GRPH_SWAP_RB;
+#ifdef __BIG_ENDIAN
+   fb_swap = R600_D1GRPH_SWAP_ENDIAN_32BIT;
+#endif
+   break;
default:
DRM_ERROR("Unsupported screen format %s\n",
  drm_get_format_name(target_fb->format->format, 
_name));
diff --git a/drivers/gpu/drm/radeon/r600_reg.h 
b/drivers/gpu/drm/radeon/r600_reg.h
index 3ef202629e7e..85e85ac3ba4d 100644
--- a/drivers/gpu/drm/radeon/r600_reg.h
+++ b/drivers/gpu/drm/radeon/r600_reg.h
@@ -87,11 +87,32 @@
 #define R600_MEDIUM_VID_LOWER_GPIO_CNTL0x720
 #define R600_LOW_VID_LOWER_GPIO_CNTL   0x724
 
-#define R600_D1GRPH_SWAP_CONTROL   0x610C
-#   define R600_D1GRPH_SWAP_ENDIAN_NONE(0 << 0)
-#   define R600_D1GRPH_SWAP_ENDIAN_16BIT   (1 << 0)
-#   define R600_D1GRPH_SWAP_ENDIAN_32BIT   (2 << 0)
-#   define R600_D1GRPH_SWAP_ENDIAN_64BIT   (3 << 0)
+#define R600_D1GRPH_SWAP_CONTROL 0x610C
+#   define R600_D1GRPH_ENDIAN_SWAP(x)(((x) & 0x3) << 0)
+#   define R600_D1GRPH_SWAP_ENDIAN_NONE  0
+#   define R600_D1GRPH_SWAP_ENDIAN_16BIT 1
+#   define R600_D1GRPH_SWAP_ENDIAN_32BIT 2
+#   define R600_D1GRPH_SWAP_ENDIAN_64BIT 3
+#   define R600_D1GRPH_RED_CROSSBAR(x)   (((x) & 0x3) << 4)
+#   define R600_D1GRPH_RED_SEL_R 0
+#   define R600_D1GRPH_RED_SEL_G 1
+#   define R600_D1GRPH_RED_SEL_B 2
+#   define R600_D1GRPH_RED_SEL_A 3
+#   define R600_D1GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6)
+#   define R600_D1GRPH_GREEN_SEL_G   0
+#   define R600_D1GRPH_GREEN_SEL_B   1
+#   define R600_D1GRPH_GREEN_SEL_A   2
+#   define R600_D1GRPH_GREEN_SEL_R   3
+#   define R600_D1GRPH_BLUE_CROSSBAR(x)  (((x) & 0x3) << 8)
+#   define R600_D1GRPH_BLUE_SEL_B0
+#   define R600_D1GRPH_BLUE_SEL_A1
+#   define R600_D1GRPH_BLUE_SEL_R2
+#   define R600_D1GRPH_BLUE_SEL_G3
+#   define R600_D1GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10)
+#   define R600_D1GRPH_ALPHA_SEL_A   0
+#   define R600_D1GRPH_ALPHA_SEL_R   1
+#   define R600_D1GRPH_ALPHA_SEL_G   2
+#   define R600_D1GRPH_ALPHA_SEL_B   3
 
 #define R600_HDP_NONSURFACE_BASE0x2c04
 
-- 
2.17.1

Re: [PATCH 3/3] drm/radeon: enable ABGR and XBGR formats

[PATCH 3/3] drm/radeon: enable ABGR and XBGR formats

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