Replace function prefix name from vega10 to arcturus
Change-Id: Ic21713f2dda30a0bc28c7b525e20d5f1fcde96dd
Signed-off-by: Alex Sierra <alex.sie...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/arcturus_ih.c | 162 +++++++++++------------
drivers/gpu/drm/amd/amdgpu/arcturus_ih.h | 8 +-
2 files changed, 85 insertions(+), 85 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/arcturus_ih.c
b/drivers/gpu/drm/amd/amdgpu/arcturus_ih.c
index b8cd5c3c8a36..b687fcc4c9b6 100644
--- a/drivers/gpu/drm/amd/amdgpu/arcturus_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/arcturus_ih.c
@@ -35,16 +35,16 @@
#define MAX_REARM_RETRY 10
-static void vega10_ih_set_interrupt_funcs(struct amdgpu_device *adev);
+static void arcturus_ih_set_interrupt_funcs(struct amdgpu_device *adev);
/**
- * vega10_ih_enable_interrupts - Enable the interrupt ring buffer
+ * arcturus_ih_enable_interrupts - Enable the interrupt ring buffer
*
* @adev: amdgpu_device pointer
*
- * Enable the interrupt ring buffer (VEGA10).
+ * Enable the interrupt ring buffer (ARCTURUS).
*/
-static void vega10_ih_enable_interrupts(struct amdgpu_device *adev)
+static void arcturus_ih_enable_interrupts(struct amdgpu_device *adev)
{
u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL);
@@ -94,13 +94,13 @@ static void vega10_ih_enable_interrupts(struct
amdgpu_device *adev)
}
/**
- * vega10_ih_disable_interrupts - Disable the interrupt ring buffer
+ * arcturus_ih_disable_interrupts - Disable the interrupt ring buffer
*
* @adev: amdgpu_device pointer
*
- * Disable the interrupt ring buffer (VEGA10).
+ * Disable the interrupt ring buffer (ARCTURUS).
*/
-static void vega10_ih_disable_interrupts(struct amdgpu_device *adev)
+static void arcturus_ih_disable_interrupts(struct amdgpu_device *adev)
{
u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL);
@@ -163,7 +163,7 @@ static void vega10_ih_disable_interrupts(struct
amdgpu_device *adev)
}
}
-static uint32_t vega10_ih_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t
ih_rb_cntl)
+static uint32_t arcturus_ih_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t
ih_rb_cntl)
{
int rb_bufsz = order_base_2(ih->ring_size / 4);
@@ -186,7 +186,7 @@ static uint32_t vega10_ih_rb_cntl(struct amdgpu_ih_ring
*ih, uint32_t ih_rb_cntl
return ih_rb_cntl;
}
-static uint32_t vega10_ih_doorbell_rptr(struct amdgpu_ih_ring *ih)
+static uint32_t arcturus_ih_doorbell_rptr(struct amdgpu_ih_ring *ih)
{
u32 ih_doorbell_rtpr = 0;
@@ -206,7 +206,7 @@ static uint32_t vega10_ih_doorbell_rptr(struct
amdgpu_ih_ring *ih)
}
/**
- * vega10_ih_irq_init - init and enable the interrupt ring
+ * arcturus_ih_irq_init - init and enable the interrupt ring
*
* @adev: amdgpu_device pointer
*
@@ -216,7 +216,7 @@ static uint32_t vega10_ih_doorbell_rptr(struct
amdgpu_ih_ring *ih)
* Called at device load and reume.
* Returns 0 for success, errors for failure.
*/
-static int vega10_ih_irq_init(struct amdgpu_device *adev)
+static int arcturus_ih_irq_init(struct amdgpu_device *adev)
{
struct amdgpu_ih_ring *ih;
u32 ih_rb_cntl, ih_chicken;
@@ -224,7 +224,7 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
u32 tmp;
/* disable irqs */
- vega10_ih_disable_interrupts(adev);
+ arcturus_ih_disable_interrupts(adev);
adev->nbio.funcs->ih_control(adev);
@@ -234,7 +234,7 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE_HI, (ih->gpu_addr >> 40) & 0xff);
ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL);
- ih_rb_cntl = vega10_ih_rb_cntl(ih, ih_rb_cntl);
+ ih_rb_cntl = arcturus_ih_rb_cntl(ih, ih_rb_cntl);
ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RPTR_REARM,
!!adev->irq.msi_enabled);
if (amdgpu_sriov_vf(adev)) {
@@ -269,7 +269,7 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, 0);
WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR,
- vega10_ih_doorbell_rptr(ih));
+ arcturus_ih_doorbell_rptr(ih));
ih = &adev->irq.ih1;
if (ih->ring_size) {
@@ -278,7 +278,7 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
(ih->gpu_addr >> 40) & 0xff);
ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
- ih_rb_cntl = vega10_ih_rb_cntl(ih, ih_rb_cntl);
+ ih_rb_cntl = arcturus_ih_rb_cntl(ih, ih_rb_cntl);
ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL,
WPTR_OVERFLOW_ENABLE, 0);
ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL,
@@ -298,7 +298,7 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING1, 0);
WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR_RING1,
- vega10_ih_doorbell_rptr(ih));
+ arcturus_ih_doorbell_rptr(ih));
}
ih = &adev->irq.ih2;
@@ -308,7 +308,7 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
(ih->gpu_addr >> 40) & 0xff);
ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2);
- ih_rb_cntl = vega10_ih_rb_cntl(ih, ih_rb_cntl);
+ ih_rb_cntl = arcturus_ih_rb_cntl(ih, ih_rb_cntl);
if (amdgpu_sriov_vf(adev)) {
if (psp_reg_program(&adev->psp,
PSP_REG_IH_RB_CNTL_RING2,
@@ -325,7 +325,7 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING2, 0);
WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR_RING2,
- vega10_ih_doorbell_rptr(ih));
+ arcturus_ih_doorbell_rptr(ih));
}
tmp = RREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL);
@@ -340,37 +340,37 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
pci_set_master(adev->pdev);
/* enable interrupts */
- vega10_ih_enable_interrupts(adev);
+ arcturus_ih_enable_interrupts(adev);
return ret;
}
/**
- * vega10_ih_irq_disable - disable interrupts
+ * arcturus_ih_irq_disable - disable interrupts
*
* @adev: amdgpu_device pointer
*
- * Disable interrupts on the hw (VEGA10).
+ * Disable interrupts on the hw (ARCTURUS).
*/
-static void vega10_ih_irq_disable(struct amdgpu_device *adev)
+static void arcturus_ih_irq_disable(struct amdgpu_device *adev)
{
- vega10_ih_disable_interrupts(adev);
+ arcturus_ih_disable_interrupts(adev);
/* Wait and acknowledge irq */
mdelay(1);
}
/**
- * vega10_ih_get_wptr - get the IH ring buffer wptr
+ * arcturus_ih_get_wptr - get the IH ring buffer wptr
*
* @adev: amdgpu_device pointer
*
* Get the IH ring buffer wptr from either the register
- * or the writeback memory buffer (VEGA10). Also check for
+ * or the writeback memory buffer (ARCTURUS). Also check for
* ring buffer overflow and deal with it.
* Returns the value of the wptr.
*/
-static u32 vega10_ih_get_wptr(struct amdgpu_device *adev,
+static u32 arcturus_ih_get_wptr(struct amdgpu_device *adev,
struct amdgpu_ih_ring *ih)
{
u32 wptr, reg, tmp;
@@ -425,14 +425,14 @@ static u32 vega10_ih_get_wptr(struct amdgpu_device *adev,
}
/**
- * vega10_ih_decode_iv - decode an interrupt vector
+ * arcturus_ih_decode_iv - decode an interrupt vector
*
* @adev: amdgpu_device pointer
*
* Decodes the interrupt vector at the current rptr
* position and also advance the position.
*/
-static void vega10_ih_decode_iv(struct amdgpu_device *adev,
+static void arcturus_ih_decode_iv(struct amdgpu_device *adev,
struct amdgpu_ih_ring *ih,
struct amdgpu_iv_entry *entry)
{
@@ -468,12 +468,12 @@ static void vega10_ih_decode_iv(struct amdgpu_device
*adev,
}
/**
- * vega10_ih_irq_rearm - rearm IRQ if lost
+ * arcturus_ih_irq_rearm - rearm IRQ if lost
*
* @adev: amdgpu_device pointer
*
*/
-static void vega10_ih_irq_rearm(struct amdgpu_device *adev,
+static void arcturus_ih_irq_rearm(struct amdgpu_device *adev,
struct amdgpu_ih_ring *ih)
{
uint32_t reg_rptr = 0;
@@ -500,13 +500,13 @@ static void vega10_ih_irq_rearm(struct amdgpu_device
*adev,
}
/**
- * vega10_ih_set_rptr - set the IH ring buffer rptr
+ * arcturus_ih_set_rptr - set the IH ring buffer rptr
*
* @adev: amdgpu_device pointer
*
* Set the IH ring buffer rptr.
*/
-static void vega10_ih_set_rptr(struct amdgpu_device *adev,
+static void arcturus_ih_set_rptr(struct amdgpu_device *adev,
struct amdgpu_ih_ring *ih)
{
if (ih->use_doorbell) {
@@ -515,7 +515,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
WDOORBELL32(ih->doorbell_index, ih->rptr);
if (amdgpu_sriov_vf(adev))
- vega10_ih_irq_rearm(adev, ih);
+ arcturus_ih_irq_rearm(adev, ih);
} else if (ih == &adev->irq.ih) {
WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr);
} else if (ih == &adev->irq.ih1) {
@@ -526,7 +526,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
}
/**
- * vega10_ih_self_irq - dispatch work for ring 1 and 2
+ * arcturus_ih_self_irq - dispatch work for ring 1 and 2
*
* @adev: amdgpu_device pointer
* @source: irq source
@@ -534,7 +534,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
*
* Update the WPTR from the IV and schedule work to handle the entries.
*/
-static int vega10_ih_self_irq(struct amdgpu_device *adev,
+static int arcturus_ih_self_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
@@ -555,26 +555,26 @@ static int vega10_ih_self_irq(struct amdgpu_device *adev,
return 0;
}
-static const struct amdgpu_irq_src_funcs vega10_ih_self_irq_funcs = {
- .process = vega10_ih_self_irq,
+static const struct amdgpu_irq_src_funcs arcturus_ih_self_irq_funcs = {
+ .process = arcturus_ih_self_irq,
};
-static void vega10_ih_set_self_irq_funcs(struct amdgpu_device *adev)
+static void arcturus_ih_set_self_irq_funcs(struct amdgpu_device *adev)
{
adev->irq.self_irq.num_types = 0;
- adev->irq.self_irq.funcs = &vega10_ih_self_irq_funcs;
+ adev->irq.self_irq.funcs = &arcturus_ih_self_irq_funcs;
}
-static int vega10_ih_early_init(void *handle)
+static int arcturus_ih_early_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- vega10_ih_set_interrupt_funcs(adev);
- vega10_ih_set_self_irq_funcs(adev);
+ arcturus_ih_set_interrupt_funcs(adev);
+ arcturus_ih_set_self_irq_funcs(adev);
return 0;
}
-static int vega10_ih_sw_init(void *handle)
+static int arcturus_ih_sw_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
int r;
@@ -610,7 +610,7 @@ static int vega10_ih_sw_init(void *handle)
return r;
}
-static int vega10_ih_sw_fini(void *handle)
+static int arcturus_ih_sw_fini(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -622,61 +622,61 @@ static int vega10_ih_sw_fini(void *handle)
return 0;
}
-static int vega10_ih_hw_init(void *handle)
+static int arcturus_ih_hw_init(void *handle)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- r = vega10_ih_irq_init(adev);
+ r = arcturus_ih_irq_init(adev);
if (r)
return r;
return 0;
}
-static int vega10_ih_hw_fini(void *handle)
+static int arcturus_ih_hw_fini(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- vega10_ih_irq_disable(adev);
+ arcturus_ih_irq_disable(adev);
return 0;
}
-static int vega10_ih_suspend(void *handle)
+static int arcturus_ih_suspend(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- return vega10_ih_hw_fini(adev);
+ return arcturus_ih_hw_fini(adev);
}
-static int vega10_ih_resume(void *handle)
+static int arcturus_ih_resume(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- return vega10_ih_hw_init(adev);
+ return arcturus_ih_hw_init(adev);
}
-static bool vega10_ih_is_idle(void *handle)
+static bool arcturus_ih_is_idle(void *handle)
{
/* todo */
return true;
}
-static int vega10_ih_wait_for_idle(void *handle)
+static int arcturus_ih_wait_for_idle(void *handle)
{
/* todo */
return -ETIMEDOUT;
}
-static int vega10_ih_soft_reset(void *handle)
+static int arcturus_ih_soft_reset(void *handle)
{
/* todo */
return 0;
}
-static void vega10_ih_update_clockgating_state(struct amdgpu_device *adev,
+static void arcturus_ih_update_clockgating_state(struct amdgpu_device *adev,
bool enable)
{
uint32_t data, def, field_val;
@@ -703,55 +703,55 @@ static void vega10_ih_update_clockgating_state(struct
amdgpu_device *adev,
}
}
-static int vega10_ih_set_clockgating_state(void *handle,
+static int arcturus_ih_set_clockgating_state(void *handle,
enum amd_clockgating_state state)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- vega10_ih_update_clockgating_state(adev,
+ arcturus_ih_update_clockgating_state(adev,
state == AMD_CG_STATE_GATE);
return 0;
}
-static int vega10_ih_set_powergating_state(void *handle,
+static int arcturus_ih_set_powergating_state(void *handle,
enum amd_powergating_state state)
{
return 0;
}
-const struct amd_ip_funcs vega10_ih_ip_funcs = {
- .name = "vega10_ih",
- .early_init = vega10_ih_early_init,
+const struct amd_ip_funcs arcturus_ih_ip_funcs = {
+ .name = "arcturus_ih",
+ .early_init = arcturus_ih_early_init,
.late_init = NULL,
- .sw_init = vega10_ih_sw_init,
- .sw_fini = vega10_ih_sw_fini,
- .hw_init = vega10_ih_hw_init,
- .hw_fini = vega10_ih_hw_fini,
- .suspend = vega10_ih_suspend,
- .resume = vega10_ih_resume,
- .is_idle = vega10_ih_is_idle,
- .wait_for_idle = vega10_ih_wait_for_idle,
- .soft_reset = vega10_ih_soft_reset,
- .set_clockgating_state = vega10_ih_set_clockgating_state,
- .set_powergating_state = vega10_ih_set_powergating_state,
+ .sw_init = arcturus_ih_sw_init,
+ .sw_fini = arcturus_ih_sw_fini,
+ .hw_init = arcturus_ih_hw_init,
+ .hw_fini = arcturus_ih_hw_fini,
+ .suspend = arcturus_ih_suspend,
+ .resume = arcturus_ih_resume,
+ .is_idle = arcturus_ih_is_idle,
+ .wait_for_idle = arcturus_ih_wait_for_idle,
+ .soft_reset = arcturus_ih_soft_reset,
+ .set_clockgating_state = arcturus_ih_set_clockgating_state,
+ .set_powergating_state = arcturus_ih_set_powergating_state,
};
-static const struct amdgpu_ih_funcs vega10_ih_funcs = {
- .get_wptr = vega10_ih_get_wptr,
- .decode_iv = vega10_ih_decode_iv,
- .set_rptr = vega10_ih_set_rptr
+static const struct amdgpu_ih_funcs arcturus_ih_funcs = {
+ .get_wptr = arcturus_ih_get_wptr,
+ .decode_iv = arcturus_ih_decode_iv,
+ .set_rptr = arcturus_ih_set_rptr
};
-static void vega10_ih_set_interrupt_funcs(struct amdgpu_device *adev)
+static void arcturus_ih_set_interrupt_funcs(struct amdgpu_device *adev)
{
- adev->irq.ih_funcs = &vega10_ih_funcs;
+ adev->irq.ih_funcs = &arcturus_ih_funcs;
}
-const struct amdgpu_ip_block_version vega10_ih_ip_block = {
+const struct amdgpu_ip_block_version arcturus_ih_ip_block = {
.type = AMD_IP_BLOCK_TYPE_IH,
.major = 4,
.minor = 0,
.rev = 0,
- .funcs = &vega10_ih_ip_funcs,
+ .funcs = &arcturus_ih_ip_funcs,
};
diff --git a/drivers/gpu/drm/amd/amdgpu/arcturus_ih.h
b/drivers/gpu/drm/amd/amdgpu/arcturus_ih.h
index 54daf8cf6ff3..56da58ac0e97 100644
--- a/drivers/gpu/drm/amd/amdgpu/arcturus_ih.h
+++ b/drivers/gpu/drm/amd/amdgpu/arcturus_ih.h
@@ -21,10 +21,10 @@
*
*/
-#ifndef __VEGA10_IH_H__
-#define __VEGA10_IH_H__
+#ifndef __ARCTURUS_IH_H__
+#define __ARCTURUS_IH_H__
-extern const struct amd_ip_funcs vega10_ih_ip_funcs;
-extern const struct amdgpu_ip_block_version vega10_ih_ip_block;
+extern const struct amd_ip_funcs arcturus_ih_ip_funcs;
+extern const struct amdgpu_ip_block_version arcturus_ih_ip_block;
#endif
--
2.17.1
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