Modify mmhub block ras funcions to fit for the unified ras function pointers.

Signed-off-by: yipechai <yipeng.c...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  8 ++++----
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c    |  8 ++++----
 drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h  |  9 ++-------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c    | 20 ++++++++++----------
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c      |  4 ++--
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c    | 10 ++++++----
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c    | 14 ++++++++------
 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c    | 12 +++++++-----
 8 files changed, 43 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 73ec46140d68..fcdd06bdb5d7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3378,8 +3378,8 @@ static void amdgpu_device_xgmi_reset_func(struct 
work_struct *__work)
                        goto fail;
 
                if (adev->mmhub.ras_funcs &&
-                   adev->mmhub.ras_funcs->reset_ras_error_count)
-                       adev->mmhub.ras_funcs->reset_ras_error_count(adev);
+                   adev->mmhub.ras_funcs->ops.reset_ras_error_count)
+                       adev->mmhub.ras_funcs->ops.reset_ras_error_count(adev);
        } else {
 
                task_barrier_full(&hive->tb);
@@ -4704,8 +4704,8 @@ int amdgpu_do_asic_reset(struct list_head 
*device_list_handle,
        if (!r && amdgpu_ras_intr_triggered()) {
                list_for_each_entry(tmp_adev, device_list_handle, reset_list) {
                        if (tmp_adev->mmhub.ras_funcs &&
-                           tmp_adev->mmhub.ras_funcs->reset_ras_error_count)
-                               
tmp_adev->mmhub.ras_funcs->reset_ras_error_count(tmp_adev);
+                           
tmp_adev->mmhub.ras_funcs->ops.reset_ras_error_count)
+                               
tmp_adev->mmhub.ras_funcs->ops.reset_ras_error_count(tmp_adev);
                }
 
                amdgpu_ras_intr_cleared();
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 024342969267..7780effdf3ac 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -442,8 +442,8 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
        }
 
        if (adev->mmhub.ras_funcs &&
-           adev->mmhub.ras_funcs->ras_late_init) {
-               r = adev->mmhub.ras_funcs->ras_late_init(adev);
+           adev->mmhub.ras_funcs->ops.ras_late_init) {
+               r = adev->mmhub.ras_funcs->ops.ras_late_init(adev);
                if (r)
                        return r;
        }
@@ -496,8 +496,8 @@ void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
                adev->umc.ras_funcs->ras_fini(adev);
 
        if (adev->mmhub.ras_funcs &&
-           adev->mmhub.ras_funcs->ras_fini)
-               adev->mmhub.ras_funcs->ras_fini(adev);
+           adev->mmhub.ras_funcs->ops.ras_fini)
+               adev->mmhub.ras_funcs->ops.ras_fini(adev);
 
        if (adev->gmc.xgmi.ras_funcs &&
            adev->gmc.xgmi.ras_funcs->ops.ras_fini)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h
index b27fcbccce2b..ff7f28ef1d6c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h
@@ -20,15 +20,10 @@
  */
 #ifndef __AMDGPU_MMHUB_H__
 #define __AMDGPU_MMHUB_H__
+#include "amdgpu_ras.h"
 
 struct amdgpu_mmhub_ras_funcs {
-       int (*ras_late_init)(struct amdgpu_device *adev);
-       void (*ras_fini)(struct amdgpu_device *adev);
-       void (*query_ras_error_count)(struct amdgpu_device *adev,
-                                     void *ras_error_status);
-       void (*query_ras_error_status)(struct amdgpu_device *adev);
-       void (*reset_ras_error_count)(struct amdgpu_device *adev);
-       void (*reset_ras_error_status)(struct amdgpu_device *adev);
+       struct amdgpu_ras_block_ops ops;
 };
 
 struct amdgpu_mmhub_funcs {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index e7cd2de07665..2d9ef677a2ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -929,12 +929,12 @@ int amdgpu_ras_query_error_status(struct amdgpu_device 
*adev,
                break;
        case AMDGPU_RAS_BLOCK__MMHUB:
                if (adev->mmhub.ras_funcs &&
-                   adev->mmhub.ras_funcs->query_ras_error_count)
-                       adev->mmhub.ras_funcs->query_ras_error_count(adev, 
&err_data);
+                   adev->mmhub.ras_funcs->ops.query_ras_error_count)
+                       adev->mmhub.ras_funcs->ops.query_ras_error_count(adev, 
&err_data);
 
                if (adev->mmhub.ras_funcs &&
-                   adev->mmhub.ras_funcs->query_ras_error_status)
-                       adev->mmhub.ras_funcs->query_ras_error_status(adev);
+                   adev->mmhub.ras_funcs->ops.query_ras_error_status)
+                       adev->mmhub.ras_funcs->ops.query_ras_error_status(adev);
                break;
        case AMDGPU_RAS_BLOCK__PCIE_BIF:
                if (adev->nbio.ras_funcs &&
@@ -1027,12 +1027,12 @@ int amdgpu_ras_reset_error_status(struct amdgpu_device 
*adev,
                break;
        case AMDGPU_RAS_BLOCK__MMHUB:
                if (adev->mmhub.ras_funcs &&
-                   adev->mmhub.ras_funcs->reset_ras_error_count)
-                       adev->mmhub.ras_funcs->reset_ras_error_count(adev);
+                   adev->mmhub.ras_funcs->ops.reset_ras_error_count)
+                       adev->mmhub.ras_funcs->ops.reset_ras_error_count(adev);
 
                if (adev->mmhub.ras_funcs &&
-                   adev->mmhub.ras_funcs->reset_ras_error_status)
-                       adev->mmhub.ras_funcs->reset_ras_error_status(adev);
+                   adev->mmhub.ras_funcs->ops.reset_ras_error_status)
+                       adev->mmhub.ras_funcs->ops.reset_ras_error_status(adev);
                break;
        case AMDGPU_RAS_BLOCK__SDMA:
                if (adev->sdma.funcs->reset_ras_error_count)
@@ -1739,8 +1739,8 @@ static void amdgpu_ras_error_status_query(struct 
amdgpu_device *adev,
                break;
        case AMDGPU_RAS_BLOCK__MMHUB:
                if (adev->mmhub.ras_funcs &&
-                   adev->mmhub.ras_funcs->query_ras_error_status)
-                       adev->mmhub.ras_funcs->query_ras_error_status(adev);
+                   adev->mmhub.ras_funcs->ops.query_ras_error_status)
+                       adev->mmhub.ras_funcs->ops.query_ras_error_status(adev);
                break;
        default:
                break;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index c40c669d49c3..4470049874c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1297,8 +1297,8 @@ static int gmc_v9_0_late_init(void *handle)
 
        if (!amdgpu_persistent_edc_harvesting_supported(adev)) {
                if (adev->mmhub.ras_funcs &&
-                   adev->mmhub.ras_funcs->reset_ras_error_count)
-                       adev->mmhub.ras_funcs->reset_ras_error_count(adev);
+                   adev->mmhub.ras_funcs->ops.reset_ras_error_count)
+                       adev->mmhub.ras_funcs->ops.reset_ras_error_count(adev);
 
                if (adev->hdp.ras_funcs &&
                    adev->hdp.ras_funcs->ops.reset_ras_error_count)
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index b3bede1dc41d..3b7133fb0cf6 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -775,10 +775,12 @@ static void mmhub_v1_0_reset_ras_error_count(struct 
amdgpu_device *adev)
 }
 
 const struct amdgpu_mmhub_ras_funcs mmhub_v1_0_ras_funcs = {
-       .ras_late_init = amdgpu_mmhub_ras_late_init,
-       .ras_fini = amdgpu_mmhub_ras_fini,
-       .query_ras_error_count = mmhub_v1_0_query_ras_error_count,
-       .reset_ras_error_count = mmhub_v1_0_reset_ras_error_count,
+       .ops = {
+               .ras_late_init = amdgpu_mmhub_ras_late_init,
+               .ras_fini = amdgpu_mmhub_ras_fini,
+               .query_ras_error_count = mmhub_v1_0_query_ras_error_count,
+               .reset_ras_error_count = mmhub_v1_0_reset_ras_error_count,
+       },
 };
 
 const struct amdgpu_mmhub_funcs mmhub_v1_0_funcs = {
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
index f5f7181f9af5..841fba8b0e08 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
@@ -1322,12 +1322,14 @@ static void mmhub_v1_7_reset_ras_error_status(struct 
amdgpu_device *adev)
 }
 
 const struct amdgpu_mmhub_ras_funcs mmhub_v1_7_ras_funcs = {
-       .ras_late_init = amdgpu_mmhub_ras_late_init,
-       .ras_fini = amdgpu_mmhub_ras_fini,
-       .query_ras_error_count = mmhub_v1_7_query_ras_error_count,
-       .reset_ras_error_count = mmhub_v1_7_reset_ras_error_count,
-       .query_ras_error_status = mmhub_v1_7_query_ras_error_status,
-       .reset_ras_error_status = mmhub_v1_7_reset_ras_error_status,
+       .ops = {
+               .ras_late_init = amdgpu_mmhub_ras_late_init,
+               .ras_fini = amdgpu_mmhub_ras_fini,
+               .query_ras_error_count = mmhub_v1_7_query_ras_error_count,
+               .reset_ras_error_count = mmhub_v1_7_reset_ras_error_count,
+               .query_ras_error_status = mmhub_v1_7_query_ras_error_status,
+               .reset_ras_error_status = mmhub_v1_7_reset_ras_error_status,
+       },
 };
 
 const struct amdgpu_mmhub_funcs mmhub_v1_7_funcs = {
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index ff49eeaf7882..1173190c4d8d 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -1656,11 +1656,13 @@ static void mmhub_v9_4_query_ras_error_status(struct 
amdgpu_device *adev)
 }
 
 const struct amdgpu_mmhub_ras_funcs mmhub_v9_4_ras_funcs = {
-       .ras_late_init = amdgpu_mmhub_ras_late_init,
-       .ras_fini = amdgpu_mmhub_ras_fini,
-       .query_ras_error_count = mmhub_v9_4_query_ras_error_count,
-       .reset_ras_error_count = mmhub_v9_4_reset_ras_error_count,
-       .query_ras_error_status = mmhub_v9_4_query_ras_error_status,
+       .ops = {
+               .ras_late_init = amdgpu_mmhub_ras_late_init,
+               .ras_fini = amdgpu_mmhub_ras_fini,
+               .query_ras_error_count = mmhub_v9_4_query_ras_error_count,
+               .reset_ras_error_count = mmhub_v9_4_reset_ras_error_count,
+               .query_ras_error_status = mmhub_v9_4_query_ras_error_status,
+       },
 };
 
 const struct amdgpu_mmhub_funcs mmhub_v9_4_funcs = {
-- 
2.25.1

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