From: Leo Chen <sancc...@amd.com>

[ Upstream commit 026a71babf48efb6b9884a3a66fa31aec9e1ea54 ]

[Why & How]
HDMI TMDS does not have ODM support. Filtering 420 modes that
exceed the 4096 FMT limitation on DCN31 will resolve
intermittent corruptions issues.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlaus...@amd.com>
Acked-by: Tom Chung <chiahsuan.ch...@amd.com>
Signed-off-by: Leo Chen <sancc...@amd.com>
Tested-by: Daniel Wheeler <daniel.whee...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 .../gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c    | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index ebc04b72b284b..9c84561ff3bc4 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
@@ -4133,7 +4133,9 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct 
display_mode_lib *mode_l
                                }
                                if (v->OutputFormat[k] == dm_420 && 
v->HActive[k] > DCN31_MAX_FMT_420_BUFFER_WIDTH
                                                && 
v->ODMCombineEnablePerState[i][k] != dm_odm_combine_mode_4to1) {
-                                       if (v->HActive[k] / 2 > 
DCN31_MAX_FMT_420_BUFFER_WIDTH) {
+                                       if (v->Output[k] == dm_hdmi) {
+                                               FMTBufferExceeded = true;
+                                       } else if (v->HActive[k] / 2 > 
DCN31_MAX_FMT_420_BUFFER_WIDTH) {
                                                
v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_4to1;
                                                v->PlaneRequiredDISPCLK = 
v->PlaneRequiredDISPCLKWithODMCombine4To1;
 
-- 
2.40.1

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