Re: [PATCH libdrm] amdgpu:support 16 ibs per submit for PAL/SRIOV

2018-03-08 Thread Alex Deucher
On Thu, Mar 8, 2018 at 12:31 PM, Marek Olšák  wrote:
> From: Qiang Yu 
>
> to support SRIOV and MCBP, need 16 IBs per submit
>
> Signed-off-by: Qiang Yu 
> Reviewed-by: Junwei Zhang 

Reviewed-by: Alex Deucher 

> ---
>  amdgpu/amdgpu.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
> index 928b2a6..8950341 100644
> --- a/amdgpu/amdgpu.h
> +++ b/amdgpu/amdgpu.h
> @@ -46,21 +46,21 @@ struct drm_amdgpu_info_hw_ip;
>  
> /*--*/
>  /* --- Defines  
> */
>  
> /*--*/
>
>  /**
>   * Define max. number of Command Buffers (IB) which could be sent to the 
> single
>   * hardware IP to accommodate CE/DE requirements
>   *
>   * \sa amdgpu_cs_ib_info
>  */
> -#define AMDGPU_CS_MAX_IBS_PER_SUBMIT   4
> +#define AMDGPU_CS_MAX_IBS_PER_SUBMIT   16
>
>  /**
>   * Special timeout value meaning that the timeout is infinite.
>   */
>  #define AMDGPU_TIMEOUT_INFINITE0xull
>
>  /**
>   * Used in amdgpu_cs_query_fence_status(), meaning that the given timeout
>   * is absolute.
>   */
> --
> 2.7.4
>
> ___
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx


Re: [PATCH libdrm] amdgpu:support 16 ibs per submit for PAL/SRIOV

2018-03-08 Thread Christian König

Am 08.03.2018 um 18:31 schrieb Marek Olšák:

From: Qiang Yu 

to support SRIOV and MCBP, need 16 IBs per submit

Signed-off-by: Qiang Yu 
Reviewed-by: Junwei Zhang 


Acked-by: Christian König 


---
  amdgpu/amdgpu.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 928b2a6..8950341 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -46,21 +46,21 @@ struct drm_amdgpu_info_hw_ip;
  /*--*/
  /* --- Defines  */
  /*--*/
  
  /**

   * Define max. number of Command Buffers (IB) which could be sent to the 
single
   * hardware IP to accommodate CE/DE requirements
   *
   * \sa amdgpu_cs_ib_info
  */
-#define AMDGPU_CS_MAX_IBS_PER_SUBMIT   4
+#define AMDGPU_CS_MAX_IBS_PER_SUBMIT   16
  
  /**

   * Special timeout value meaning that the timeout is infinite.
   */
  #define AMDGPU_TIMEOUT_INFINITE   0xull
  
  /**

   * Used in amdgpu_cs_query_fence_status(), meaning that the given timeout
   * is absolute.
   */


___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx


[PATCH libdrm] amdgpu:support 16 ibs per submit for PAL/SRIOV

2018-03-08 Thread Marek Olšák
From: Qiang Yu 

to support SRIOV and MCBP, need 16 IBs per submit

Signed-off-by: Qiang Yu 
Reviewed-by: Junwei Zhang 
---
 amdgpu/amdgpu.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 928b2a6..8950341 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -46,21 +46,21 @@ struct drm_amdgpu_info_hw_ip;
 /*--*/
 /* --- Defines  */
 /*--*/
 
 /**
  * Define max. number of Command Buffers (IB) which could be sent to the single
  * hardware IP to accommodate CE/DE requirements
  *
  * \sa amdgpu_cs_ib_info
 */
-#define AMDGPU_CS_MAX_IBS_PER_SUBMIT   4
+#define AMDGPU_CS_MAX_IBS_PER_SUBMIT   16
 
 /**
  * Special timeout value meaning that the timeout is infinite.
  */
 #define AMDGPU_TIMEOUT_INFINITE0xull
 
 /**
  * Used in amdgpu_cs_query_fence_status(), meaning that the given timeout
  * is absolute.
  */
-- 
2.7.4

___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx