Re: [PATCH v2 6/8] drm/amd/display: Introduce KUnit tests for dcn20_fpu
Hi "Maíra,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on drm/drm-next drm-intel/for-linux-next
drm-tip/drm-tip linus/master v6.0-rc3 next-20220901]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Ma-ra-Canal/drm-amd-display-Introduce-KUnit-to-Display-Mode-Library/20220901-012715
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
config: x86_64-allyesconfig
(https://download.01.org/0day-ci/archive/20220904/202209040310.aa1jd14e-...@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-5) 11.3.0
reproduce (this is a W=1 build):
#
https://github.com/intel-lab-lkp/linux/commit/6b01e906d58654fb9c209fa848883658d203b073
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review
Ma-ra-Canal/drm-amd-display-Introduce-KUnit-to-Display-Mode-Library/20220901-012715
git checkout 6b01e906d58654fb9c209fa848883658d203b073
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/amd/amdgpu/../display/tests/dc/dml/dcn20/dcn20_fpu_test.c:455:5:
>> warning: no previous prototype for
>> 'dcn20_fpu_dcn21_update_bw_bounding_box_test_init' [-Wmissing-prototypes]
455 | int dcn20_fpu_dcn21_update_bw_bounding_box_test_init(struct kunit
*test)
| ^~~~
In file included from
drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32,
from
drivers/gpu/drm/amd/amdgpu/../display/dc/inc/resource.h:28,
from
drivers/gpu/drm/amd/amdgpu/../display/tests/dc/dml/dcn20/dcn20_fpu_test.c:10:
drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:137:22:
warning: 'SYNAPTICS_DEVICE_ID' defined but not used [-Wunused-const-variable=]
137 | static const uint8_t SYNAPTICS_DEVICE_ID[] = "SYNA";
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:134:17:
warning: 'DP_SINK_BRANCH_DEV_NAME_7580' defined but not used
[-Wunused-const-variable=]
134 | static const u8 DP_SINK_BRANCH_DEV_NAME_7580[] = "7580\x80u";
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:132:22:
warning: 'DP_SINK_DEVICE_STR_ID_2' defined but not used
[-Wunused-const-variable=]
132 | static const uint8_t DP_SINK_DEVICE_STR_ID_2[] = {7, 1, 8, 7, 5, 0};
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:131:22:
warning: 'DP_SINK_DEVICE_STR_ID_1' defined but not used
[-Wunused-const-variable=]
131 | static const uint8_t DP_SINK_DEVICE_STR_ID_1[] = {7, 1, 8, 7, 3, 0};
| ^~~
vim +/dcn20_fpu_dcn21_update_bw_bounding_box_test_init +455
drivers/gpu/drm/amd/amdgpu/../display/tests/dc/dml/dcn20/dcn20_fpu_test.c
450
451 /**
452 * dcn20_fpu_dcn21_update_bw_bounding_box_test_init - Store backup
copies of DCN global structures
453 * @test: represents a running instance of a test.
454 */
> 455 int dcn20_fpu_dcn21_update_bw_bounding_box_test_init(struct kunit *test)
456 {
457 memcpy(&original_dcn2_1_soc, &dcn2_1_soc, sizeof(struct
_vcs_dpi_soc_bounding_box_st));
458 memcpy(&original_dcn2_1_ip, &dcn2_1_ip, sizeof(struct
_vcs_dpi_ip_params_st));
459
460 return 0;
461 }
462
--
0-DAY CI Kernel Test Service
https://01.org/lkp
[PATCH v2 6/8] drm/amd/display: Introduce KUnit tests for dcn20_fpu
From: Magali Lemes
This commit adds unit tests to the functions dcn20_cap_soc_clocks and
dcn21_update_bw_bounding_box from dcn20/dcn20_fpu.
Signed-off-by: Magali Lemes
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/tests/Makefile| 3 +-
.../tests/dc/dml/dcn20/dcn20_fpu_test.c | 561 ++
2 files changed, 563 insertions(+), 1 deletion(-)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
diff --git a/drivers/gpu/drm/amd/display/tests/Makefile
b/drivers/gpu/drm/amd/display/tests/Makefile
index cc1e9edd38c3..a34677808e48 100644
--- a/drivers/gpu/drm/amd/display/tests/Makefile
+++ b/drivers/gpu/drm/amd/display/tests/Makefile
@@ -9,7 +9,8 @@ endif
ifdef CONFIG_DML_KUNIT_TEST
CFLAGS_$(AMDDALPATH)/tests/dc/dml/display_mode_vba_test.o :=
$(dml_ccflags)
- DC_TESTS += dc/dml/display_mode_vba_test.o
+ CFLAGS_$(AMDDALPATH)/tests/dc/dml/dcn20/dcn20_fpu_test.o :=
$(dml_ccflags)
+ DC_TESTS += dc/dml/display_mode_vba_test.o dc/dml/dcn20/dcn20_fpu_test.o
endif
AMD_DAL_DC_TESTS = $(addprefix $(AMDDALPATH)/tests/,$(DC_TESTS))
diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
new file mode 100644
index ..6b7ebb78fec9
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
@@ -0,0 +1,561 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/dcn20/dcn20_fpu.h
+ *
+ * Copyright (C) 2022, Magali Lemes
+ */
+
+#include
+
+#include "dc/inc/resource.h"
+#include "dc/inc/hw/clk_mgr.h"
+#include "dc/dcn21/dcn21_resource.h"
+
+#include "dml/dcn20/dcn20_fpu.h"
+
+/**
+ * DOC: Unit tests for AMDGPU DML dcn20/dcn20_fpu.h
+ */
+
+struct dcn20_cap_soc_clocks_test_case {
+ const char *desc;
+ struct _vcs_dpi_soc_bounding_box_st bb;
+ struct pp_smu_nv_clock_table max_clocks;
+ const int clock_states;
+ const struct _vcs_dpi_voltage_scaling_st
expected_clock_limits[DC__VOLTAGE_STATES];
+};
+
+struct dcn21_update_bw_bounding_box_test_case {
+ const char *desc;
+ struct dc dc;
+ struct clk_bw_params bw_params;
+ const int clocks_to_compare;
+ const struct _vcs_dpi_voltage_scaling_st
expected_clock_limits[DC__VOLTAGE_STATES];
+};
+
+struct dcn20_cap_soc_clocks_test_case dcn20_cap_soc_clocks_test_cases[] = {
+ {
+ .desc = "4-state bounding box clock limits ",
+ .bb = {
+ .clock_limits = {
+ {
+ .dcfclk_mhz = 506.0,
+ .fabricclk_mhz = 506.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 400.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 506.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 1600.0,
+ },
+ {
+ .dcfclk_mhz = 540.0,
+ .fabricclk_mhz = 540.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 1284.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 540.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 8000.0,
+ },
+ {
+ .dcfclk_mhz = 675.0,
+ .fabricclk_mhz = 675.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 1284.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 675.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 1.0,
+ },
+ {
+ .dcfclk_mhz = 1265.0,
+ .fabricclk_mhz = 1266.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 1284.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 1266.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 15000.0,
+ },
+ },
+ .num_states = 4,
+ },
+ .max_clocks = {
+ .dcfClockInKhz
