Re: Changes for enabling ATS support from PTE

2017-07-26 Thread Christian König 

Hi Yong,

looks pretty good to me, but still quite a few comments.

First of all please send the patches directly to the mailing list using 
"git send-email" and not as attachment.


Patch #1:

+
+   switch (word_size) {
+   case 4:
+   num_dw = num_loops * adev->mman.buffer_funcs->fill_num_dw;
+   break;
+   case 8: /* 10 double words for each SDMA_OP_PTEPDE cmd */
+   num_dw = num_loops * 10;
+   break;
+   default:
+   return -EINVAL;
+   }
That is to complicated, we don't use the 32bit pattern during the fill 
anyway. So just change that to a 64bit pattern and always use the 
amdgpu_vm_set_pte_pde() function.


Patch #2:

+/* Flag that supports ATS through PTE on GFX9 */
+#define AMDGPU_GEM_CLEAR_PTE_WITH_ATS_SUPPORT  (1 << 6)

NAK to that approach, GEM flags are visible to userspace.

Instead add the pattern to use for the clear to 
amdgpu_bo_create()/amdgpu_bo_create_restricted().



/* Flag to indicate if VM tables are updated by CPU or GPU (SDMA) */
booluse_cpu_for_update;
  
-	/* Whether this is a Compute or GFX Context */

-   int vm_context;
+   /* flags indicating the properties of VM context */
+   int vm_context_flags;
Either merge use_cpu_for_update into the flags as well or use a separate 
boolean for this (I prefer the later).


If you want to merge drop the "vm_context_" prefix in the name, just 
flags should be sufficient.


Regards,
Christian.

Am 26.07.2017 um 00:48 schrieb Yong Zhao:

Hi there,

Attached are two patches made to amdgpu in order to support ATS on 
Raven. Please review them.


Regards,

Yong



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Changes for enabling ATS support from PTE

2017-07-25 Thread Yong Zhao 

Hi there,

Attached are two patches made to amdgpu in order to support ATS on 
Raven. Please review them.


Regards,

Yong

>From 0657ddb14a16d1b809c419b51e805287fb6a9989 Mon Sep 17 00:00:00 2001
From: Yong Zhao 
Date: Thu, 20 Jul 2017 18:44:10 -0400
Subject: [PATCH 1/2] drm/amdgpu: Add support for filling a buffer with 64 bit
 value

That function will be used later to support setting a page table
block with 64 bit value.

Change-Id: Ib142ebd4163d6e23670a3f0ceed536d59133b942
Signed-off-by: Yong Zhao 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 38 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h|  2 +-
 3 files changed, 34 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 21e0814..4dfec57 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -416,7 +416,7 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
 	bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
 		struct dma_fence *fence;
 
-		r = amdgpu_fill_buffer(bo, 0, bo->tbo.resv, );
+		r = amdgpu_fill_buffer(bo, 0, 4, bo->tbo.resv, );
 		if (unlikely(r))
 			goto fail_unreserve;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 7820e81..99db4aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1611,11 +1611,12 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
 }
 
 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
-		   uint32_t src_data,
-		   struct reservation_object *resv,
-		   struct dma_fence **fence)
+			uint64_t src_data, unsigned int word_size,
+			struct reservation_object *resv,
+			struct dma_fence **fence)
 {
 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+	/* max_bytes applies to both SDMA_OP_CONST_FILL and SDMA_OP_PTEPDE */
 	uint32_t max_bytes = adev->mman.buffer_funcs->fill_max_bytes;
 	struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
 
@@ -1647,7 +1648,17 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
 		num_pages -= mm_node->size;
 		++mm_node;
 	}
-	num_dw = num_loops * adev->mman.buffer_funcs->fill_num_dw;
+
+	switch (word_size) {
+	case 4:
+		num_dw = num_loops * adev->mman.buffer_funcs->fill_num_dw;
+		break;
+	case 8: /* 10 double words for each SDMA_OP_PTEPDE cmd */
+		num_dw = num_loops * 10;
+		break;
+	default:
+		return -EINVAL;
+	}
 
 	/* for IB padding */
 	num_dw += 64;
@@ -1676,8 +1687,23 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
 		while (byte_count) {
 			uint32_t cur_size_in_bytes = min(byte_count, max_bytes);
 
-			amdgpu_emit_fill_buffer(adev, >ibs[0], src_data,
-		dst_addr, cur_size_in_bytes);
+			switch (word_size) {
+			case 4: /* only take the lower 32 bits of src_data */
+amdgpu_emit_fill_buffer(adev, >ibs[0],
+		(uint32_t)src_data, dst_addr,
+		cur_size_in_bytes);
+break;
+			case 8:
+WARN_ONCE(cur_size_in_bytes & 0x7,
+	"size should be a multiple of 8");
+amdgpu_vm_set_pte_pde(adev, >ibs[0],
+		dst_addr, 0,
+		cur_size_in_bytes >> 3, 0,
+		src_data);
+break;
+			}
+
+
 
 			dst_addr += cur_size_in_bytes;
 			byte_count -= cur_size_in_bytes;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index a22e430..067e5e5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -73,7 +73,7 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
 		   struct dma_fence **fence, bool direct_submit,
 		   bool vm_needs_flush);
 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
-			uint32_t src_data,
+			uint64_t src_data, unsigned int word_size,
 			struct reservation_object *resv,
 			struct dma_fence **fence);
 
-- 
2.7.4

>From e0bb154b8ae014989e88a40f19379eec9a8b Mon Sep 17 00:00:00 2001
From: Yong Zhao 
Date: Thu, 20 Jul 2017 18:49:09 -0400
Subject: [PATCH 2/2] drm/amdgpu: Support IOMMU on Raven

We achieved that by setting the PTEs to 2 (the SYSTEM bit is set) when
the corresponding addresses are not occupied by gpu driver allocated
buffers.

Change-Id: I995c11c7a25bdaf7a16700d9e08a8fe287d49417
Signed-off-by: Yong Zhao 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 10 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 30 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h |  8 
 include/uapi/drm/amdgpu_drm.h  |  2 ++
 5 files changed, 39 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 9182def..433a90e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c