RE: [PATCH] drm/amdgpu: remove unused and mostly unimplemented CGS functions
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Wednesday, April 26, 2017 9:14 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH] drm/amdgpu: remove unused and mostly unimplemented
> CGS functions
>
> From: Christian König
>
> Those functions are all unused and some not even implemented.
>
> Signed-off-by: Christian König
I think some of this is used by the ACP driver (cgs_get_pci_resource for
example). Make sure that is enabled in your build. You might also want to
check with Felix for KFD.
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 233
> drivers/gpu/drm/amd/include/cgs_common.h | 303 -
> --
> 2 files changed, 536 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> index a1a2d44..93f5dcc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> @@ -42,82 +42,6 @@ struct amdgpu_cgs_device {
> struct amdgpu_device *adev =\
> ((struct amdgpu_cgs_device *)cgs_device)->adev
>
> -static int amdgpu_cgs_gpu_mem_info(struct cgs_device *cgs_device, enum
> cgs_gpu_mem_type type,
> -uint64_t *mc_start, uint64_t *mc_size,
> -uint64_t *mem_size)
> -{
> - CGS_FUNC_ADEV;
> - switch(type) {
> - case CGS_GPU_MEM_TYPE__VISIBLE_CONTIG_FB:
> - case CGS_GPU_MEM_TYPE__VISIBLE_FB:
> - *mc_start = 0;
> - *mc_size = adev->mc.visible_vram_size;
> - *mem_size = adev->mc.visible_vram_size - adev-
> >vram_pin_size;
> - break;
> - case CGS_GPU_MEM_TYPE__INVISIBLE_CONTIG_FB:
> - case CGS_GPU_MEM_TYPE__INVISIBLE_FB:
> - *mc_start = adev->mc.visible_vram_size;
> - *mc_size = adev->mc.real_vram_size - adev-
> >mc.visible_vram_size;
> - *mem_size = *mc_size;
> - break;
> - case CGS_GPU_MEM_TYPE__GART_CACHEABLE:
> - case CGS_GPU_MEM_TYPE__GART_WRITECOMBINE:
> - *mc_start = adev->mc.gtt_start;
> - *mc_size = adev->mc.gtt_size;
> - *mem_size = adev->mc.gtt_size - adev->gart_pin_size;
> - break;
> - default:
> - return -EINVAL;
> - }
> -
> - return 0;
> -}
> -
> -static int amdgpu_cgs_gmap_kmem(struct cgs_device *cgs_device, void
> *kmem,
> - uint64_t size,
> - uint64_t min_offset, uint64_t max_offset,
> - cgs_handle_t *kmem_handle, uint64_t
> *mcaddr)
> -{
> - CGS_FUNC_ADEV;
> - int ret;
> - struct amdgpu_bo *bo;
> - struct page *kmem_page = vmalloc_to_page(kmem);
> - int npages = ALIGN(size, PAGE_SIZE) >> PAGE_SHIFT;
> -
> - struct sg_table *sg = drm_prime_pages_to_sg(&kmem_page,
> npages);
> - ret = amdgpu_bo_create(adev, size, PAGE_SIZE, false,
> -AMDGPU_GEM_DOMAIN_GTT, 0, sg, NULL,
> &bo);
> - if (ret)
> - return ret;
> - ret = amdgpu_bo_reserve(bo, false);
> - if (unlikely(ret != 0))
> - return ret;
> -
> - /* pin buffer into GTT */
> - ret = amdgpu_bo_pin_restricted(bo,
> AMDGPU_GEM_DOMAIN_GTT,
> -min_offset, max_offset, mcaddr);
> - amdgpu_bo_unreserve(bo);
> -
> - *kmem_handle = (cgs_handle_t)bo;
> - return ret;
> -}
> -
> -static int amdgpu_cgs_gunmap_kmem(struct cgs_device *cgs_device,
> cgs_handle_t kmem_handle)
> -{
> - struct amdgpu_bo *obj = (struct amdgpu_bo *)kmem_handle;
> -
> - if (obj) {
> - int r = amdgpu_bo_reserve(obj, false);
> - if (likely(r == 0)) {
> - amdgpu_bo_unpin(obj);
> - amdgpu_bo_unreserve(obj);
> - }
> - amdgpu_bo_unref(&obj);
> -
> - }
> - return 0;
> -}
> -
> static int amdgpu_cgs_alloc_gpu_mem(struct cgs_device *cgs_device,
> enum cgs_gpu_mem_type type,
> uint64_t size, uint64_t align,
> @@ -349,96 +273,6 @@ static void amdgpu_cgs_write_ind_register(struct
> cgs_device *cgs_device,
> WARN(1, "Invalid indirect register space");
> }
>
> -static uint8_t amdgpu_cgs_read_pci_config_byte(struct cgs_device
> *cgs_device, unsigned addr)
> -{
> - CGS_FUNC_ADEV;
> - uint8_t val;
> - int ret = pci_read_config_byte(adev->pdev, addr, &val);
> - if (WARN(ret, "pci_read_config_byte error"))
> - return 0;
> - return val;
> -}
> -
> -static uint16_t amdgpu_cgs_read_pci_config_word(struct cgs_device
> *cgs_device, unsigned addr)
> -{
> - CGS_FUNC_ADEV;
> - uint16_t val;
> - int ret = pci_read_config_word(adev->pdev, addr, &val);
> - if (WARN(ret, "pci_read_config_word error"))
>
Re: [PATCH] drm/amdgpu: remove unused and mostly unimplemented CGS functions
Am 26.04.2017 um 18:36 schrieb Deucher, Alexander:
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Christian König
Sent: Wednesday, April 26, 2017 9:14 AM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH] drm/amdgpu: remove unused and mostly unimplemented
CGS functions
From: Christian König
Those functions are all unused and some not even implemented.
Signed-off-by: Christian König
I think some of this is used by the ACP driver (cgs_get_pci_resource for
example). Make sure that is enabled in your build. You might also want to
check with Felix for KFD.
Good point. I was only searching outside of the amdgpu subdirectory for
users. Why is a file which is part of amdgpu even using this?
v2 is on the list.
Christian.
Alex
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 233
drivers/gpu/drm/amd/include/cgs_common.h | 303 -
--
2 files changed, 536 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index a1a2d44..93f5dcc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -42,82 +42,6 @@ struct amdgpu_cgs_device {
struct amdgpu_device *adev =\
((struct amdgpu_cgs_device *)cgs_device)->adev
-static int amdgpu_cgs_gpu_mem_info(struct cgs_device *cgs_device, enum
cgs_gpu_mem_type type,
- uint64_t *mc_start, uint64_t *mc_size,
- uint64_t *mem_size)
-{
- CGS_FUNC_ADEV;
- switch(type) {
- case CGS_GPU_MEM_TYPE__VISIBLE_CONTIG_FB:
- case CGS_GPU_MEM_TYPE__VISIBLE_FB:
- *mc_start = 0;
- *mc_size = adev->mc.visible_vram_size;
- *mem_size = adev->mc.visible_vram_size - adev-
vram_pin_size;
- break;
- case CGS_GPU_MEM_TYPE__INVISIBLE_CONTIG_FB:
- case CGS_GPU_MEM_TYPE__INVISIBLE_FB:
- *mc_start = adev->mc.visible_vram_size;
- *mc_size = adev->mc.real_vram_size - adev-
mc.visible_vram_size;
- *mem_size = *mc_size;
- break;
- case CGS_GPU_MEM_TYPE__GART_CACHEABLE:
- case CGS_GPU_MEM_TYPE__GART_WRITECOMBINE:
- *mc_start = adev->mc.gtt_start;
- *mc_size = adev->mc.gtt_size;
- *mem_size = adev->mc.gtt_size - adev->gart_pin_size;
- break;
- default:
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int amdgpu_cgs_gmap_kmem(struct cgs_device *cgs_device, void
*kmem,
- uint64_t size,
- uint64_t min_offset, uint64_t max_offset,
- cgs_handle_t *kmem_handle, uint64_t
*mcaddr)
-{
- CGS_FUNC_ADEV;
- int ret;
- struct amdgpu_bo *bo;
- struct page *kmem_page = vmalloc_to_page(kmem);
- int npages = ALIGN(size, PAGE_SIZE) >> PAGE_SHIFT;
-
- struct sg_table *sg = drm_prime_pages_to_sg(&kmem_page,
npages);
- ret = amdgpu_bo_create(adev, size, PAGE_SIZE, false,
- AMDGPU_GEM_DOMAIN_GTT, 0, sg, NULL,
&bo);
- if (ret)
- return ret;
- ret = amdgpu_bo_reserve(bo, false);
- if (unlikely(ret != 0))
- return ret;
-
- /* pin buffer into GTT */
- ret = amdgpu_bo_pin_restricted(bo,
AMDGPU_GEM_DOMAIN_GTT,
- min_offset, max_offset, mcaddr);
- amdgpu_bo_unreserve(bo);
-
- *kmem_handle = (cgs_handle_t)bo;
- return ret;
-}
-
-static int amdgpu_cgs_gunmap_kmem(struct cgs_device *cgs_device,
cgs_handle_t kmem_handle)
-{
- struct amdgpu_bo *obj = (struct amdgpu_bo *)kmem_handle;
-
- if (obj) {
- int r = amdgpu_bo_reserve(obj, false);
- if (likely(r == 0)) {
- amdgpu_bo_unpin(obj);
- amdgpu_bo_unreserve(obj);
- }
- amdgpu_bo_unref(&obj);
-
- }
- return 0;
-}
-
static int amdgpu_cgs_alloc_gpu_mem(struct cgs_device *cgs_device,
enum cgs_gpu_mem_type type,
uint64_t size, uint64_t align,
@@ -349,96 +273,6 @@ static void amdgpu_cgs_write_ind_register(struct
cgs_device *cgs_device,
WARN(1, "Invalid indirect register space");
}
-static uint8_t amdgpu_cgs_read_pci_config_byte(struct cgs_device
*cgs_device, unsigned addr)
-{
- CGS_FUNC_ADEV;
- uint8_t val;
- int ret = pci_read_config_byte(adev->pdev, addr, &val);
- if (WARN(ret, "pci_read_config_byte error"))
- return 0;
- return val;
-}
-
-static uint16_t amdgpu_cgs_read_pci_config_word(struct cgs_device
*cgs_device, unsigned addr)
-{
- CGS_FUNC_ADEV;
- uint16_t val;
- int ret =
RE: [PATCH] drm/amdgpu: remove unused and mostly unimplemented CGS functions
KFD doesn't use CGS.
Regards,
Felix
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Deucher, Alexander
Sent: Wednesday, April 26, 2017 12:36 PM
To: 'Christian König'; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: remove unused and mostly unimplemented CGS
functions
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Wednesday, April 26, 2017 9:14 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH] drm/amdgpu: remove unused and mostly unimplemented
> CGS functions
>
> From: Christian König
>
> Those functions are all unused and some not even implemented.
>
> Signed-off-by: Christian König
I think some of this is used by the ACP driver (cgs_get_pci_resource for
example). Make sure that is enabled in your build. You might also want to
check with Felix for KFD.
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 233
> drivers/gpu/drm/amd/include/cgs_common.h |
> 303 -
> --
> 2 files changed, 536 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> index a1a2d44..93f5dcc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> @@ -42,82 +42,6 @@ struct amdgpu_cgs_device {
> struct amdgpu_device *adev =\
> ((struct amdgpu_cgs_device *)cgs_device)->adev
>
> -static int amdgpu_cgs_gpu_mem_info(struct cgs_device *cgs_device,
> enum cgs_gpu_mem_type type,
> -uint64_t *mc_start, uint64_t *mc_size,
> -uint64_t *mem_size)
> -{
> - CGS_FUNC_ADEV;
> - switch(type) {
> - case CGS_GPU_MEM_TYPE__VISIBLE_CONTIG_FB:
> - case CGS_GPU_MEM_TYPE__VISIBLE_FB:
> - *mc_start = 0;
> - *mc_size = adev->mc.visible_vram_size;
> - *mem_size = adev->mc.visible_vram_size - adev-
> >vram_pin_size;
> - break;
> - case CGS_GPU_MEM_TYPE__INVISIBLE_CONTIG_FB:
> - case CGS_GPU_MEM_TYPE__INVISIBLE_FB:
> - *mc_start = adev->mc.visible_vram_size;
> - *mc_size = adev->mc.real_vram_size - adev-
> >mc.visible_vram_size;
> - *mem_size = *mc_size;
> - break;
> - case CGS_GPU_MEM_TYPE__GART_CACHEABLE:
> - case CGS_GPU_MEM_TYPE__GART_WRITECOMBINE:
> - *mc_start = adev->mc.gtt_start;
> - *mc_size = adev->mc.gtt_size;
> - *mem_size = adev->mc.gtt_size - adev->gart_pin_size;
> - break;
> - default:
> - return -EINVAL;
> - }
> -
> - return 0;
> -}
> -
> -static int amdgpu_cgs_gmap_kmem(struct cgs_device *cgs_device, void
> *kmem,
> - uint64_t size,
> - uint64_t min_offset, uint64_t max_offset,
> - cgs_handle_t *kmem_handle, uint64_t
> *mcaddr)
> -{
> - CGS_FUNC_ADEV;
> - int ret;
> - struct amdgpu_bo *bo;
> - struct page *kmem_page = vmalloc_to_page(kmem);
> - int npages = ALIGN(size, PAGE_SIZE) >> PAGE_SHIFT;
> -
> - struct sg_table *sg = drm_prime_pages_to_sg(&kmem_page,
> npages);
> - ret = amdgpu_bo_create(adev, size, PAGE_SIZE, false,
> -AMDGPU_GEM_DOMAIN_GTT, 0, sg, NULL,
> &bo);
> - if (ret)
> - return ret;
> - ret = amdgpu_bo_reserve(bo, false);
> - if (unlikely(ret != 0))
> - return ret;
> -
> - /* pin buffer into GTT */
> - ret = amdgpu_bo_pin_restricted(bo,
> AMDGPU_GEM_DOMAIN_GTT,
> -min_offset, max_offset, mcaddr);
> - amdgpu_bo_unreserve(bo);
> -
> - *kmem_handle = (cgs_handle_t)bo;
> - return ret;
> -}
> -
> -static int amdgpu_cgs_gunmap_kmem(struct cgs_device *cgs_device,
> cgs_handle_t kmem_handle) -{
> - struct amdgpu_bo *obj = (struct amdgpu_bo *)kmem_handle;
> -
> - if (obj) {
> - int r = amdgpu_bo_reserve(obj, false);
> - if (likely(r == 0)) {
> - amdgpu_bo_unpin(obj);
> - amdgpu_bo_unreserve(obj);
> - }
> - amdgpu_bo_unref(&obj);
> -
> - }
> - return 0;
> -}
> -
> static int amdgpu_cgs_alloc_gpu_mem(struct cgs_device *cgs_device,
> enum cgs_gpu_mem_type type,
> uint64_
Re: [PATCH] drm/amdgpu: remove unused and mostly unimplemented CGS functions v2
On Thu, Apr 27, 2017 at 9:22 AM, Christian König
wrote:
> From: Christian König
>
> Those functions are all unused and some not even implemented.
>
> v2: keep cgs_get_pci_resource it is used by the ACP driver.
>
> Signed-off-by: Christian König
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 198 ---
> drivers/gpu/drm/amd/include/cgs_common.h | 270
> ---
> 2 files changed, 468 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> index a1a2d44..9d22ebd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
> @@ -42,82 +42,6 @@ struct amdgpu_cgs_device {
> struct amdgpu_device *adev =\
> ((struct amdgpu_cgs_device *)cgs_device)->adev
>
> -static int amdgpu_cgs_gpu_mem_info(struct cgs_device *cgs_device, enum
> cgs_gpu_mem_type type,
> - uint64_t *mc_start, uint64_t *mc_size,
> - uint64_t *mem_size)
> -{
> - CGS_FUNC_ADEV;
> - switch(type) {
> - case CGS_GPU_MEM_TYPE__VISIBLE_CONTIG_FB:
> - case CGS_GPU_MEM_TYPE__VISIBLE_FB:
> - *mc_start = 0;
> - *mc_size = adev->mc.visible_vram_size;
> - *mem_size = adev->mc.visible_vram_size - adev->vram_pin_size;
> - break;
> - case CGS_GPU_MEM_TYPE__INVISIBLE_CONTIG_FB:
> - case CGS_GPU_MEM_TYPE__INVISIBLE_FB:
> - *mc_start = adev->mc.visible_vram_size;
> - *mc_size = adev->mc.real_vram_size -
> adev->mc.visible_vram_size;
> - *mem_size = *mc_size;
> - break;
> - case CGS_GPU_MEM_TYPE__GART_CACHEABLE:
> - case CGS_GPU_MEM_TYPE__GART_WRITECOMBINE:
> - *mc_start = adev->mc.gtt_start;
> - *mc_size = adev->mc.gtt_size;
> - *mem_size = adev->mc.gtt_size - adev->gart_pin_size;
> - break;
> - default:
> - return -EINVAL;
> - }
> -
> - return 0;
> -}
> -
> -static int amdgpu_cgs_gmap_kmem(struct cgs_device *cgs_device, void *kmem,
> - uint64_t size,
> - uint64_t min_offset, uint64_t max_offset,
> - cgs_handle_t *kmem_handle, uint64_t *mcaddr)
> -{
> - CGS_FUNC_ADEV;
> - int ret;
> - struct amdgpu_bo *bo;
> - struct page *kmem_page = vmalloc_to_page(kmem);
> - int npages = ALIGN(size, PAGE_SIZE) >> PAGE_SHIFT;
> -
> - struct sg_table *sg = drm_prime_pages_to_sg(&kmem_page, npages);
> - ret = amdgpu_bo_create(adev, size, PAGE_SIZE, false,
> - AMDGPU_GEM_DOMAIN_GTT, 0, sg, NULL, &bo);
> - if (ret)
> - return ret;
> - ret = amdgpu_bo_reserve(bo, false);
> - if (unlikely(ret != 0))
> - return ret;
> -
> - /* pin buffer into GTT */
> - ret = amdgpu_bo_pin_restricted(bo, AMDGPU_GEM_DOMAIN_GTT,
> - min_offset, max_offset, mcaddr);
> - amdgpu_bo_unreserve(bo);
> -
> - *kmem_handle = (cgs_handle_t)bo;
> - return ret;
> -}
> -
> -static int amdgpu_cgs_gunmap_kmem(struct cgs_device *cgs_device,
> cgs_handle_t kmem_handle)
> -{
> - struct amdgpu_bo *obj = (struct amdgpu_bo *)kmem_handle;
> -
> - if (obj) {
> - int r = amdgpu_bo_reserve(obj, false);
> - if (likely(r == 0)) {
> - amdgpu_bo_unpin(obj);
> - amdgpu_bo_unreserve(obj);
> - }
> - amdgpu_bo_unref(&obj);
> -
> - }
> - return 0;
> -}
> -
> static int amdgpu_cgs_alloc_gpu_mem(struct cgs_device *cgs_device,
> enum cgs_gpu_mem_type type,
> uint64_t size, uint64_t align,
> @@ -349,62 +273,6 @@ static void amdgpu_cgs_write_ind_register(struct
> cgs_device *cgs_device,
> WARN(1, "Invalid indirect register space");
> }
>
> -static uint8_t amdgpu_cgs_read_pci_config_byte(struct cgs_device
> *cgs_device, unsigned addr)
> -{
> - CGS_FUNC_ADEV;
> - uint8_t val;
> - int ret = pci_read_config_byte(adev->pdev, addr, &val);
> - if (WARN(ret, "pci_read_config_byte error"))
> - return 0;
> - return val;
> -}
> -
> -static uint16_t amdgpu_cgs_read_pci_config_word(struct cgs_device
> *cgs_device, unsigned addr)
> -{
> - CGS_FUNC_ADEV;
> - uint16_t val;
> - int ret = pci_read_config_word(adev->pdev, addr, &val);
> - if (WARN(ret, "pci_read_config_word error"))
> - return 0;
> - return val;
> -}
> -
> -static uint32_t amdgpu_cgs_read_pci_config_dword(struct cgs_device
> *cgs_device,
> -
