Re: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

2019-08-19 Thread Wang, Kevin(Yang)
Reviewed-by: Kevin Wang 

Best Regards,
Kevin

From: Quan, Evan 
Sent: Tuesday, August 20, 2019 10:09 AM
To: amd-gfx@lists.freedesktop.org 
Cc: Wang, Kevin(Yang) 
Subject: RE: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value


Ping..



From: Quan, Evan
Sent: Friday, August 16, 2019 4:00 PM
To: Wang, Kevin(Yang) ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value



Since smu_get_atom_data_table() was already used in 
smu_v11_0_get_vbios_bootup_values(). We should get all our needed information 
at once.

Also, what smu_get_atom_data_table() does is to get the data table from vbios. 
It’s a time and resource cost job.

I do not think it’s a good idea to call it again just to get some information 
we should already know.



Regards,

Evan

From: Wang, Kevin(Yang) mailto:kevin1.w...@amd.com>>
Sent: Friday, August 16, 2019 3:10 PM
To: Quan, Evan mailto:evan.q...@amd.com>>; 
amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value



i think we can use a function to retrieve this information without storing it 
separately.

likes:  ret = smu_get_atom_data_table(smu, index, &size, &frev, &crev,
  (uint8_t **)&header);

because these information is a generic information from 
atom_common_table_header.

and other function don't care it except in smu_v11_0_get_clk_info_from_vbios.



Best Regards,
Kevin



From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Evan Quan mailto:evan.q...@amd.com>>
Sent: Friday, August 16, 2019 2:08 PM
To: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Quan, Evan mailto:evan.q...@amd.com>>
Subject: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value



This is available with firmwareinfo table v3.2 or later.

Change-Id: I223edf3c616b9e3e2527c752214fef5ab53d1cea
Signed-off-by: Evan Quan mailto:evan.q...@amd.com>>
---
 .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h|  3 +++
 drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 21 +++
 2 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 
b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index ca9b9ec39de8..2c16eb412954 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -222,6 +222,9 @@ struct smu_bios_boot_up_values
 uint16_tvdd_gfx;
 uint8_t cooling_id;
 uint32_tpp_table_id;
+   uint32_tformat_revision;
+   uint32_tcontent_revision;
+   uint32_tfclk;
 };

 enum smu_table_id
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c 
b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 4a51de4ff162..df7b65360ac7 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -568,6 +568,9 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context 
*smu)
 smu->smu_table.boot_values.pp_table_id = 
v_3_3->pplib_pptable_id;
 }

+   smu->smu_table.boot_values.format_revision = header->format_revision;
+   smu->smu_table.boot_values.content_revision = header->content_revision;
+
 return 0;
 }

@@ -647,6 +650,24 @@ static int smu_v11_0_get_clk_info_from_vbios(struct 
smu_context *smu)
 output = (struct atom_get_smu_clock_info_output_parameters_v3_1 
*)&input;
 smu->smu_table.boot_values.dclk = 
le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 1;

+   if ((smu->smu_table.boot_values.format_revision == 3) &&
+   (smu->smu_table.boot_values.content_revision >= 2)) {
+   memset(&input, 0, sizeof(input));
+   input.clk_id = SMU11_SYSPLL1_0_FCLK_ID;
+   input.syspll_id = SMU11_SYSPLL1_2_ID;
+   input.command = GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ;
+   index = 
get_index_into_master_table(atom_master_list_of_command_functions_v2_1,
+   getsmuclockinfo);
+
+   ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, 
index,
+   (uint32_t *)&input);
+   if (ret)
+   return -EINVAL;
+
+   output = (struct atom_get_smu_clock_info_output_parameters_v3_1 
*)&input;
+   smu->smu_table.boot_values.fclk = 
le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 1;
+   }
+
 return 0;
 }

--
2.22.0

___
am

RE: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

2019-08-19 Thread Quan, Evan
Ping..

From: Quan, Evan
Sent: Friday, August 16, 2019 4:00 PM
To: Wang, Kevin(Yang) ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

Since smu_get_atom_data_table() was already used in 
smu_v11_0_get_vbios_bootup_values(). We should get all our needed information 
at once.
Also, what smu_get_atom_data_table() does is to get the data table from vbios. 
It's a time and resource cost job.
I do not think it's a good idea to call it again just to get some information 
we should already know.

Regards,
Evan
From: Wang, Kevin(Yang) mailto:kevin1.w...@amd.com>>
Sent: Friday, August 16, 2019 3:10 PM
To: Quan, Evan mailto:evan.q...@amd.com>>; 
amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

i think we can use a function to retrieve this information without storing it 
separately.
likes:  ret = smu_get_atom_data_table(smu, index, &size, &frev, &crev,
  (uint8_t **)&header);
because these information is a generic information from 
atom_common_table_header.
and other function don't care it except in smu_v11_0_get_clk_info_from_vbios.

Best Regards,
Kevin

From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Evan Quan mailto:evan.q...@amd.com>>
Sent: Friday, August 16, 2019 2:08 PM
To: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Quan, Evan mailto:evan.q...@amd.com>>
Subject: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

This is available with firmwareinfo table v3.2 or later.

Change-Id: I223edf3c616b9e3e2527c752214fef5ab53d1cea
Signed-off-by: Evan Quan mailto:evan.q...@amd.com>>
---
 .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h|  3 +++
 drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 21 +++
 2 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 
b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index ca9b9ec39de8..2c16eb412954 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -222,6 +222,9 @@ struct smu_bios_boot_up_values
 uint16_tvdd_gfx;
 uint8_t cooling_id;
 uint32_tpp_table_id;
+   uint32_tformat_revision;
+   uint32_tcontent_revision;
+   uint32_tfclk;
 };

 enum smu_table_id
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c 
b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 4a51de4ff162..df7b65360ac7 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -568,6 +568,9 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context 
*smu)
 smu->smu_table.boot_values.pp_table_id = 
v_3_3->pplib_pptable_id;
 }

+   smu->smu_table.boot_values.format_revision = header->format_revision;
+   smu->smu_table.boot_values.content_revision = header->content_revision;
+
 return 0;
 }

@@ -647,6 +650,24 @@ static int smu_v11_0_get_clk_info_from_vbios(struct 
smu_context *smu)
 output = (struct atom_get_smu_clock_info_output_parameters_v3_1 
*)&input;
 smu->smu_table.boot_values.dclk = 
le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 1;

+   if ((smu->smu_table.boot_values.format_revision == 3) &&
+   (smu->smu_table.boot_values.content_revision >= 2)) {
+   memset(&input, 0, sizeof(input));
+   input.clk_id = SMU11_SYSPLL1_0_FCLK_ID;
+   input.syspll_id = SMU11_SYSPLL1_2_ID;
+   input.command = GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ;
+   index = 
get_index_into_master_table(atom_master_list_of_command_functions_v2_1,
+   getsmuclockinfo);
+
+   ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, 
index,
+   (uint32_t *)&input);
+   if (ret)
+   return -EINVAL;
+
+   output = (struct atom_get_smu_clock_info_output_parameters_v3_1 
*)&input;
+   smu->smu_table.boot_values.fclk = 
le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 1;
+   }
+
 return 0;
 }

--
2.22.0

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RE: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

2019-08-16 Thread Quan, Evan
Since smu_get_atom_data_table() was already used in 
smu_v11_0_get_vbios_bootup_values(). We should get all our needed information 
at once.
Also, what smu_get_atom_data_table() does is to get the data table from vbios. 
It's a time and resource cost job.
I do not think it's a good idea to call it again just to get some information 
we should already know.

Regards,
Evan
From: Wang, Kevin(Yang) 
Sent: Friday, August 16, 2019 3:10 PM
To: Quan, Evan ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

i think we can use a function to retrieve this information without storing it 
separately.
likes:  ret = smu_get_atom_data_table(smu, index, &size, &frev, &crev,
  (uint8_t **)&header);
because these information is a generic information from 
atom_common_table_header.
and other function don't care it except in smu_v11_0_get_clk_info_from_vbios.

Best Regards,
Kevin

From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Evan Quan mailto:evan.q...@amd.com>>
Sent: Friday, August 16, 2019 2:08 PM
To: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Quan, Evan mailto:evan.q...@amd.com>>
Subject: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

This is available with firmwareinfo table v3.2 or later.

Change-Id: I223edf3c616b9e3e2527c752214fef5ab53d1cea
Signed-off-by: Evan Quan mailto:evan.q...@amd.com>>
---
 .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h|  3 +++
 drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 21 +++
 2 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 
b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index ca9b9ec39de8..2c16eb412954 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -222,6 +222,9 @@ struct smu_bios_boot_up_values
 uint16_tvdd_gfx;
 uint8_t cooling_id;
 uint32_tpp_table_id;
+   uint32_tformat_revision;
+   uint32_tcontent_revision;
+   uint32_tfclk;
 };

 enum smu_table_id
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c 
b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 4a51de4ff162..df7b65360ac7 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -568,6 +568,9 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context 
*smu)
 smu->smu_table.boot_values.pp_table_id = 
v_3_3->pplib_pptable_id;
 }

+   smu->smu_table.boot_values.format_revision = header->format_revision;
+   smu->smu_table.boot_values.content_revision = header->content_revision;
+
 return 0;
 }

@@ -647,6 +650,24 @@ static int smu_v11_0_get_clk_info_from_vbios(struct 
smu_context *smu)
 output = (struct atom_get_smu_clock_info_output_parameters_v3_1 
*)&input;
 smu->smu_table.boot_values.dclk = 
le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 1;

+   if ((smu->smu_table.boot_values.format_revision == 3) &&
+   (smu->smu_table.boot_values.content_revision >= 2)) {
+   memset(&input, 0, sizeof(input));
+   input.clk_id = SMU11_SYSPLL1_0_FCLK_ID;
+   input.syspll_id = SMU11_SYSPLL1_2_ID;
+   input.command = GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ;
+   index = 
get_index_into_master_table(atom_master_list_of_command_functions_v2_1,
+   getsmuclockinfo);
+
+   ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, 
index,
+   (uint32_t *)&input);
+   if (ret)
+   return -EINVAL;
+
+   output = (struct atom_get_smu_clock_info_output_parameters_v3_1 
*)&input;
+   smu->smu_table.boot_values.fclk = 
le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 1;
+   }
+
 return 0;
 }

--
2.22.0

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Re: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

2019-08-16 Thread Wang, Kevin(Yang)
i think we can use a function to retrieve this information without storing it 
separately.
likes:  ret = smu_get_atom_data_table(smu, index, &size, &frev, &crev,
  (uint8_t **)&header);
because these information is a generic information from 
atom_common_table_header.
and other function don't care it except in smu_v11_0_get_clk_info_from_vbios.

Best Regards,
Kevin

From: amd-gfx  on behalf of Evan Quan 

Sent: Friday, August 16, 2019 2:08 PM
To: amd-gfx@lists.freedesktop.org 
Cc: Quan, Evan 
Subject: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

This is available with firmwareinfo table v3.2 or later.

Change-Id: I223edf3c616b9e3e2527c752214fef5ab53d1cea
Signed-off-by: Evan Quan 
---
 .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h|  3 +++
 drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 21 +++
 2 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 
b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index ca9b9ec39de8..2c16eb412954 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -222,6 +222,9 @@ struct smu_bios_boot_up_values
 uint16_tvdd_gfx;
 uint8_t cooling_id;
 uint32_tpp_table_id;
+   uint32_tformat_revision;
+   uint32_tcontent_revision;
+   uint32_tfclk;
 };

 enum smu_table_id
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c 
b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 4a51de4ff162..df7b65360ac7 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -568,6 +568,9 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context 
*smu)
 smu->smu_table.boot_values.pp_table_id = 
v_3_3->pplib_pptable_id;
 }

+   smu->smu_table.boot_values.format_revision = header->format_revision;
+   smu->smu_table.boot_values.content_revision = header->content_revision;
+
 return 0;
 }

@@ -647,6 +650,24 @@ static int smu_v11_0_get_clk_info_from_vbios(struct 
smu_context *smu)
 output = (struct atom_get_smu_clock_info_output_parameters_v3_1 
*)&input;
 smu->smu_table.boot_values.dclk = 
le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 1;

+   if ((smu->smu_table.boot_values.format_revision == 3) &&
+   (smu->smu_table.boot_values.content_revision >= 2)) {
+   memset(&input, 0, sizeof(input));
+   input.clk_id = SMU11_SYSPLL1_0_FCLK_ID;
+   input.syspll_id = SMU11_SYSPLL1_2_ID;
+   input.command = GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ;
+   index = 
get_index_into_master_table(atom_master_list_of_command_functions_v2_1,
+   getsmuclockinfo);
+
+   ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, 
index,
+   (uint32_t *)&input);
+   if (ret)
+   return -EINVAL;
+
+   output = (struct atom_get_smu_clock_info_output_parameters_v3_1 
*)&input;
+   smu->smu_table.boot_values.fclk = 
le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 1;
+   }
+
 return 0;
 }

--
2.22.0

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