Re: [PATCH 4/8] ASoC: AMD: added condition checks for CZ specific code
On Thu, Jun 29, 2017 at 12:58:02PM +, Mukunda, Vijendar wrote: > -Original Message- > From: Mark Brown [mailto:broo...@kernel.org] > Sent: Wednesday, June 28, 2017 11:36 PM > To: Alex Deucher Please fix your mail client to quote mails in a more normal fashion, this looks pretty broken... > >These defines are being added in the middle of a file but CHIP_STONEY is > >also used in another file in the previous patch (and apparently extensively > >throughout the DRM driver already). This is obviously not good, >we > >shouldn't have multiple copies of the definition. ...especially in that it's reflowing the message it's replying to to cause 80 column problems and has serious problems in that regard itself. > We will modify code to use single definition for CHIP_STONEY and CHIP_CARRIZO. > There are only two chip sets based on ACP 2.x design(Carrizo and Stoney). > Our future Chip sets going to use different design based on next ACP IP > version. Write the code well, that way we don't have bad patterns in the codebase and if plans change with regard to new variants you're covered. > In the current patch, Condition checks added for Carrizo for setting SRAM > BANK state. > Memory Gating is disabled in Stoney,i.e SRAM Bank's won't be turned off. The > default state for SRAM banks is ON. > As Memory Gating is disabled, there is no need to add condition checks for > Stoney to set SRAM Bank state. Some documentation of this in the code would be good. signature.asc Description: PGP signature ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
RE: [PATCH 4/8] ASoC: AMD: added condition checks for CZ specific code
-Original Message-
From: Mark Brown [mailto:broo...@kernel.org]
Sent: Wednesday, June 28, 2017 11:36 PM
To: Alex Deucher
Cc: dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org;
alsa-de...@alsa-project.org; airl...@gmail.com; Mukunda, Vijendar;
rajeevkumar.li...@gmail.com; lgirdw...@gmail.com; ti...@suse.de;
pe...@perex.cz; Deucher, Alexander
Subject: Re: [PATCH 4/8] ASoC: AMD: added condition checks for CZ specific code
On Fri, Jun 23, 2017 at 12:35:02PM -0400, Alex Deucher wrote:
> Reviewed-by: Alex Deucher
> index dcbf997..e48ae5d 100644
> --- a/sound/soc/amd/acp-pcm-dma.c
> +++ b/sound/soc/amd/acp-pcm-dma.c
> @@ -34,6 +34,8 @@
>
> #define MAX_BUFFER (PLAYBACK_MAX_PERIOD_SIZE *
> PLAYBACK_MAX_NUM_PERIODS) #define MIN_BUFFER MAX_BUFFER
> +#define CHIP_STONEY 14
> +#define CHIP_CARRIZO 13
>These defines are being added in the middle of a file but CHIP_STONEY is also
>used in another file in the previous patch (and apparently extensively
>throughout the DRM driver already). This is obviously not good, >we shouldn't
>have multiple copies of the definition.
> - } else {
> + if (adata->asic_type == CHIP_CARRIZO) {
> + for (bank = 1; bank <= 4; bank++)
> + acp_set_sram_bank_state(adata->acp_mmio, bank,
> + false);
> I'm not seeing any poweroff cases for other chips being added, and again
> switch statements please.
We will modify code to use single definition for CHIP_STONEY and CHIP_CARRIZO.
There are only two chip sets based on ACP 2.x design(Carrizo and Stoney).
Our future Chip sets going to use different design based on next ACP IP version.
In the current patch, Condition checks added for Carrizo for setting SRAM BANK
state.
Memory Gating is disabled in Stoney,i.e SRAM Bank's won't be turned off. The
default state for SRAM banks is ON.
As Memory Gating is disabled, there is no need to add condition checks for
Stoney to set SRAM Bank state.
Apart from Memory Gating, there are few more differences between Stoney and
Carrizo chip sets.
Stoney specific DMA driver changes submitted in a separate patch.
Vijendar
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 4/8] ASoC: AMD: added condition checks for CZ specific code
On Fri, Jun 23, 2017 at 12:35:02PM -0400, Alex Deucher wrote:
> Reviewed-by: Alex Deucher
> index dcbf997..e48ae5d 100644
> --- a/sound/soc/amd/acp-pcm-dma.c
> +++ b/sound/soc/amd/acp-pcm-dma.c
> @@ -34,6 +34,8 @@
>
> #define MAX_BUFFER (PLAYBACK_MAX_PERIOD_SIZE * PLAYBACK_MAX_NUM_PERIODS)
> #define MIN_BUFFER MAX_BUFFER
> +#define CHIP_STONEY 14
> +#define CHIP_CARRIZO 13
These defines are being added in the middle of a file but CHIP_STONEY is
also used in another file in the previous patch (and apparently
extensively throughout the DRM driver already). This is obviously not
good, we shouldn't have multiple copies of the definition.
> - } else {
> + if (adata->asic_type == CHIP_CARRIZO) {
> + for (bank = 1; bank <= 4; bank++)
> + acp_set_sram_bank_state(adata->acp_mmio, bank,
> + false);
I'm not seeing any poweroff cases for other chips being added, and again
switch statements please.
signature.asc
Description: PGP signature
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
