Re: [PATCH] drm/amdgpu/si/dpm: fix swapped ck enable

2016-09-14 Thread StDenis, Tom 
Yup, that looks better.  My apologies.  Guess that's the downside of having 
assertions for enable and disable in the same driver.


Reviewed-by: Tom St Denis 



From: amd-gfx  on behalf of Alex Deucher 

Sent: Wednesday, September 14, 2016 09:47
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu/si/dpm: fix swapped ck enable

Fixes a regression in:
drm/amd/amdgpu: Tidy up SI SMC code

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=97801

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/si_smc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/si_smc.c 
b/drivers/gpu/drm/amd/amdgpu/si_smc.c
index 2cc628c..47bbb40 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_smc.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_smc.c
@@ -143,9 +143,9 @@ void si_smc_clock(struct amdgpu_device *adev, bool enable)
 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);

 if (enable)
-   tmp |= CK_DISABLE;
-   else
 tmp &= ~CK_DISABLE;
+   else
+   tmp |= CK_DISABLE;

 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);
 }
--
2.5.5

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Re: [PATCH] drm/amdgpu/si/dpm: fix swapped ck enable

2016-09-14 Thread Christian König 

Am 14.09.2016 um 15:47 schrieb Alex Deucher:

Fixes a regression in:
drm/amd/amdgpu: Tidy up SI SMC code

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=97801

Signed-off-by: Alex Deucher 


Reviewed-by: Christian König .


---
  drivers/gpu/drm/amd/amdgpu/si_smc.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/si_smc.c 
b/drivers/gpu/drm/amd/amdgpu/si_smc.c
index 2cc628c..47bbb40 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_smc.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_smc.c
@@ -143,9 +143,9 @@ void si_smc_clock(struct amdgpu_device *adev, bool enable)
u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);
  
  	if (enable)

-   tmp |= CK_DISABLE;
-   else
tmp &= ~CK_DISABLE;
+   else
+   tmp |= CK_DISABLE;
  
  	WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);

  }



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