RE: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing
Hi Monk, Yes, actually this patch is to disable decode ring, and also want to let gstreamer could continue running. As gstreamer will check both encode and decode capability, if any of this is missing, then it couldn't run. As for navi12 sriov it disables decode ring, so adev->vcn.inst[i].ring_dec.sched.ready will be false, so add extra follow code here to report decode. + if (adev->vcn.inst[i].ring_dec.sched.ready || + (adev->asic_type == CHIP_NAVI12 && + amdgpu_sriov_vf(adev))) ++num_rings; Best wishes Emily Deng From: amd-gfx On Behalf Of Li, Xin (Justin) Sent: Thursday, May 27, 2021 3:18 PM To: Liu, Monk ; amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Min, Frank ; Koenig, Christian Subject: Re: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing Hi, friends. My apologize for this patch. I've ported this patch from another branch to fix gstreamer's lack of "vaapi264enc", currently this ported patch did fix that issue. However, since this patch is ported from another branch, I might need to do some alternations and audits mainly in its commit messages. I will file another review right after my fixes. Thank you all for you time. BR, Justin From: Liu, Monk mailto:monk@amd.com>> Date: Thursday, May 27, 2021 at 07:57 To: Li, Xin (Justin) mailto:xin2...@amd.com>>, amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> mailto:amd-gfx@lists.freedesktop.org>> Cc: Li, Xin (Justin) mailto:xin2...@amd.com>>, Deucher, Alexander mailto:alexander.deuc...@amd.com>>, Min, Frank mailto:frank@amd.com>>, Koenig, Christian mailto:christian.koe...@amd.com>> Subject: RE: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing [AMD Official Use Only] Looks it lack enough background for people to review: - if (adev->vcn.inst[i].ring_dec.sched.ready) + if (adev->vcn.inst[i].ring_dec.sched.ready || + (adev->asic_type == CHIP_NAVI12 && + amdgpu_sriov_vf(adev))) ++num_rings; [ml] why for SRIOV navi12 is forced to have those DEC rings ? since SRIOV navi12 have no decode capability , any explain here ? - if (amdgpu_is_tmz(adev)) - dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ; [ML] why this is removed ? is it related to your issue ? Thanks -- Monk Liu | Cloud-GPU Core team -- -Original Message- From: amd-gfx mailto:amd-gfx-boun...@lists.freedesktop.org>> On Behalf Of Li, Xin (Justin) Sent: Wednesday, May 26, 2021 6:13 PM To: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> Cc: Li, Xin (Justin) mailto:xin2...@amd.com>>; Deucher, Alexander mailto:alexander.deuc...@amd.com>>; Min, Frank mailto:frank@amd.com>>; Koenig, Christian mailto:christian.koe...@amd.com>> Subject: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing since vcn decoding ring is not required, so just disable it. Cc: Alex.Deucher mailto:alexander.deuc...@amd.com>> Cc: Christian.Konig mailto:christian.koe...@amd.com>> Signed-off-by: Li.Xin.Justin mailto:xin2...@amd.com>> Signed-off-by: Frank.Min mailto:frank@amd.com>> --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 +++--- drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 25 ++--- 2 files changed, 17 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 524e4fe5efe8..614e6b06e94e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev, if (adev->uvd.harvest_config & (1 << i)) continue; - if (adev->vcn.inst[i].ring_dec.sched.ready) + if (adev->vcn.inst[i].ring_dec.sched.ready || + (adev->asic_type == CHIP_NAVI12 && + amdgpu_sriov_vf(adev))) ++num_rings; } ib_start_alignment = 16; @@ -770,8 +772,6 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION; if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION; - if (amdgpu_is_tmz(adev)) - dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
Re: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing
[Public]
On 2021-05-26 6:49 a.m., Christian König wrote:
> Am 26.05.21 um 12:13 schrieb Li, Xin (Justin):
>> since vcn decoding ring is not required, so just disable it.
>>
>> Cc: Alex.Deucher
>> Cc: Christian.Konig
>> Signed-off-by: Li.Xin.Justin
>> Signed-off-by: Frank.Min
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 +++---
>> drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 25 ++---
>> 2 files changed, 17 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> index 524e4fe5efe8..614e6b06e94e 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> @@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device
>> *adev,
>> if (adev->uvd.harvest_config & (1 << i))
>> continue;
>> -if (adev->vcn.inst[i].ring_dec.sched.ready)
>> +if (adev->vcn.inst[i].ring_dec.sched.ready ||
>> +(adev->asic_type == CHIP_NAVI12 &&
>> +amdgpu_sriov_vf(adev)))
>
> Leo needs to take a closer look, but that looks fishy to me.
The decode is explicitly disabled with sriov case with vcn2
+ring->sched.ready = false;
and I don't understand either why to add the ring number here if already
have it disabled. If you are trying to workaround some issues, the
changes from here is very bad hack and you probably need to find the
real root cause.
Regards,
Leo
>
> Why should the ring be available if it is disabled? That doesn't make
> sense.
>
> Christian.
>
>> ++num_rings;
>> }
>> ib_start_alignment = 16;
>> @@ -770,8 +772,6 @@ int amdgpu_info_ioctl(struct drm_device *dev,
>> void *data, struct drm_file *filp)
>> dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
>> if (amdgpu_mcbp || amdgpu_sriov_vf(adev))
>> dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
>> -if (amdgpu_is_tmz(adev))
>> -dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
>> vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
>> vm_size -= AMDGPU_VA_RESERVED_SIZE;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
>> b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
>> index 8af567c546db..dc8a36766c4a 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
>> @@ -220,17 +220,20 @@ static int vcn_v2_0_hw_init(void *handle)
>> {
>> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>> struct amdgpu_ring *ring = >vcn.inst->ring_dec;
>> -int i, r;
>> +int i, r = -1;
>> adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
>>ring->doorbell_index, 0);
>> -if (amdgpu_sriov_vf(adev))
>> +if (amdgpu_sriov_vf(adev)) {
>> vcn_v2_0_start_sriov(adev);
>> -
>> -r = amdgpu_ring_test_helper(ring);
>> -if (r)
>> -goto done;
>> +if (adev->asic_type == CHIP_NAVI12)
>> +ring->sched.ready = false;
>> +} else {
>> +r = amdgpu_ring_test_helper(ring);
>> +if (r)
>> +goto done;
>> +}
>> //Disable vcn decode for sriov
>> if (amdgpu_sriov_vf(adev))
>> @@ -245,8 +248,11 @@ static int vcn_v2_0_hw_init(void *handle)
>> done:
>> if (!r)
>> -DRM_INFO("VCN decode and encode initialized
>> successfully(under %s).\n",
>> -(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG
>> Mode":"SPG Mode");
>> +DRM_INFO("VCN %s encode initialized successfully(under %s).\n",
>> +(adev->asic_type == CHIP_NAVI12 &&
>> +amdgpu_sriov_vf(adev))?"":"decode and",
>> +(adev->pg_flags &
>> +AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
>> return r;
>> }
>> @@ -1721,9 +1727,6 @@ int vcn_v2_0_dec_ring_test_ring(struct
>> amdgpu_ring *ring)
>> unsigned i;
>> int r;
>> -if (amdgpu_sriov_vf(adev))
>> -return 0;
>> -
>> WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD);
>> r = amdgpu_ring_alloc(ring, 4);
>> if (r)
>
___
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Re: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing
On 2021-05-26 6:49 a.m., Christian König wrote:
Am 26.05.21 um 12:13 schrieb Li, Xin (Justin):
since vcn decoding ring is not required, so just disable it.
Cc: Alex.Deucher
Cc: Christian.Konig
Signed-off-by: Li.Xin.Justin
Signed-off-by: Frank.Min
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 25 ++---
2 files changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 524e4fe5efe8..614e6b06e94e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device
*adev,
if (adev->uvd.harvest_config & (1 << i))
continue;
- if (adev->vcn.inst[i].ring_dec.sched.ready)
+ if (adev->vcn.inst[i].ring_dec.sched.ready ||
+ (adev->asic_type == CHIP_NAVI12 &&
+ amdgpu_sriov_vf(adev)))
Leo needs to take a closer look, but that looks fishy to me.
The decode is explicitly disabled with sriov case with vcn2
+ ring->sched.ready = false;
and I don't understand either why to add the ring number here if already
have it disabled. If you are trying to workaround some issues, the
changes from here is very bad hack and you probably need to find the
real root cause.
Regards,
Leo
Why should the ring be available if it is disabled? That doesn't make
sense.
Christian.
++num_rings;
}
ib_start_alignment = 16;
@@ -770,8 +772,6 @@ int amdgpu_info_ioctl(struct drm_device *dev,
void *data, struct drm_file *filp)
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
if (amdgpu_mcbp || amdgpu_sriov_vf(adev))
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
- if (amdgpu_is_tmz(adev))
- dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
vm_size -= AMDGPU_VA_RESERVED_SIZE;
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 8af567c546db..dc8a36766c4a 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -220,17 +220,20 @@ static int vcn_v2_0_hw_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_ring *ring = >vcn.inst->ring_dec;
- int i, r;
+ int i, r = -1;
adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
ring->doorbell_index, 0);
- if (amdgpu_sriov_vf(adev))
+ if (amdgpu_sriov_vf(adev)) {
vcn_v2_0_start_sriov(adev);
-
- r = amdgpu_ring_test_helper(ring);
- if (r)
- goto done;
+ if (adev->asic_type == CHIP_NAVI12)
+ ring->sched.ready = false;
+ } else {
+ r = amdgpu_ring_test_helper(ring);
+ if (r)
+ goto done;
+ }
//Disable vcn decode for sriov
if (amdgpu_sriov_vf(adev))
@@ -245,8 +248,11 @@ static int vcn_v2_0_hw_init(void *handle)
done:
if (!r)
- DRM_INFO("VCN decode and encode initialized
successfully(under %s).\n",
- (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG
Mode":"SPG Mode");
+ DRM_INFO("VCN %s encode initialized successfully(under %s).\n",
+ (adev->asic_type == CHIP_NAVI12 &&
+ amdgpu_sriov_vf(adev))?"":"decode and",
+ (adev->pg_flags &
+ AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
return r;
}
@@ -1721,9 +1727,6 @@ int vcn_v2_0_dec_ring_test_ring(struct
amdgpu_ring *ring)
unsigned i;
int r;
- if (amdgpu_sriov_vf(adev))
- return 0;
-
WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD);
r = amdgpu_ring_alloc(ring, 4);
if (r)
___
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Re: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing
Hi, friends.
My apologize for this patch.
I’ve ported this patch from another branch to fix gstreamer’s lack of
“vaapi264enc”, currently this ported patch did fix that issue. However, since
this patch is ported from another branch, I might need to do some alternations
and audits mainly in its commit messages. I will file another review right
after my fixes.
Thank you all for you time.
BR,
Justin
From: Liu, Monk
Date: Thursday, May 27, 2021 at 07:57
To: Li, Xin (Justin) , amd-gfx@lists.freedesktop.org
Cc: Li, Xin (Justin) , Deucher, Alexander
, Min, Frank , Koenig, Christian
Subject: RE: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing
[AMD Official Use Only]
Looks it lack enough background for people to review:
- if (adev->vcn.inst[i].ring_dec.sched.ready)
+ if (adev->vcn.inst[i].ring_dec.sched.ready ||
+ (adev->asic_type == CHIP_NAVI12 &&
+ amdgpu_sriov_vf(adev)))
++num_rings;
[ml] why for SRIOV navi12 is forced to have those DEC rings ? since SRIOV
navi12 have no decode capability , any explain here ?
- if (amdgpu_is_tmz(adev))
- dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
[ML] why this is removed ? is it related to your issue ?
Thanks
--
Monk Liu | Cloud-GPU Core team
--
-Original Message-
From: amd-gfx On Behalf Of Li, Xin
(Justin)
Sent: Wednesday, May 26, 2021 6:13 PM
To: amd-gfx@lists.freedesktop.org
Cc: Li, Xin (Justin) ; Deucher, Alexander
; Min, Frank ; Koenig, Christian
Subject: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing
since vcn decoding ring is not required, so just disable it.
Cc: Alex.Deucher
Cc: Christian.Konig
Signed-off-by: Li.Xin.Justin
Signed-off-by: Frank.Min
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 25 ++---
2 files changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 524e4fe5efe8..614e6b06e94e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
if (adev->uvd.harvest_config & (1 << i))
continue;
- if (adev->vcn.inst[i].ring_dec.sched.ready)
+ if (adev->vcn.inst[i].ring_dec.sched.ready ||
+ (adev->asic_type == CHIP_NAVI12 &&
+ amdgpu_sriov_vf(adev)))
++num_rings;
}
ib_start_alignment = 16;
@@ -770,8 +772,6 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
if (amdgpu_mcbp || amdgpu_sriov_vf(adev))
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
- if (amdgpu_is_tmz(adev))
- dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
vm_size -= AMDGPU_VA_RESERVED_SIZE;
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 8af567c546db..dc8a36766c4a 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -220,17 +220,20 @@ static int vcn_v2_0_hw_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_ring *ring = >vcn.inst->ring_dec;
- int i, r;
+ int i, r = -1;
adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
ring->doorbell_index, 0);
- if (amdgpu_sriov_vf(adev))
+ if (amdgpu_sriov_vf(adev)) {
vcn_v2_0_start_sriov(adev);
-
- r = amdgpu_ring_test_helper(ring);
- if (r)
- goto done;
+ if (adev->asic_type == CHIP_NAVI12)
+ ring->sched.ready = false;
+ } else {
+ r = amdgpu_ring_test_helper(ring);
+ if (r)
+ goto done;
+ }
//Disable vcn decode for sriov
if (amdgpu_sriov_vf(adev))
@@ -245,8 +248,11 @@ static int vcn_v2_0_hw_init(void *handle)
done:
if (!r)
- DRM_INFO("VCN decode and encode initialized successfully(under
%s).\n",
- (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG
Mode":"SPG Mode");
+
RE: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing
[AMD Official Use Only]
Looks it lack enough background for people to review:
- if (adev->vcn.inst[i].ring_dec.sched.ready)
+ if (adev->vcn.inst[i].ring_dec.sched.ready ||
+ (adev->asic_type == CHIP_NAVI12 &&
+ amdgpu_sriov_vf(adev)))
++num_rings;
[ml] why for SRIOV navi12 is forced to have those DEC rings ? since SRIOV
navi12 have no decode capability , any explain here ?
- if (amdgpu_is_tmz(adev))
- dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
[ML] why this is removed ? is it related to your issue ?
Thanks
--
Monk Liu | Cloud-GPU Core team
--
-Original Message-
From: amd-gfx On Behalf Of Li, Xin
(Justin)
Sent: Wednesday, May 26, 2021 6:13 PM
To: amd-gfx@lists.freedesktop.org
Cc: Li, Xin (Justin) ; Deucher, Alexander
; Min, Frank ; Koenig, Christian
Subject: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing
since vcn decoding ring is not required, so just disable it.
Cc: Alex.Deucher
Cc: Christian.Konig
Signed-off-by: Li.Xin.Justin
Signed-off-by: Frank.Min
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 25 ++---
2 files changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 524e4fe5efe8..614e6b06e94e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
if (adev->uvd.harvest_config & (1 << i))
continue;
- if (adev->vcn.inst[i].ring_dec.sched.ready)
+ if (adev->vcn.inst[i].ring_dec.sched.ready ||
+ (adev->asic_type == CHIP_NAVI12 &&
+ amdgpu_sriov_vf(adev)))
++num_rings;
}
ib_start_alignment = 16;
@@ -770,8 +772,6 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
if (amdgpu_mcbp || amdgpu_sriov_vf(adev))
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
- if (amdgpu_is_tmz(adev))
- dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
vm_size -= AMDGPU_VA_RESERVED_SIZE;
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 8af567c546db..dc8a36766c4a 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -220,17 +220,20 @@ static int vcn_v2_0_hw_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_ring *ring = >vcn.inst->ring_dec;
- int i, r;
+ int i, r = -1;
adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
ring->doorbell_index, 0);
- if (amdgpu_sriov_vf(adev))
+ if (amdgpu_sriov_vf(adev)) {
vcn_v2_0_start_sriov(adev);
-
- r = amdgpu_ring_test_helper(ring);
- if (r)
- goto done;
+ if (adev->asic_type == CHIP_NAVI12)
+ ring->sched.ready = false;
+ } else {
+ r = amdgpu_ring_test_helper(ring);
+ if (r)
+ goto done;
+ }
//Disable vcn decode for sriov
if (amdgpu_sriov_vf(adev))
@@ -245,8 +248,11 @@ static int vcn_v2_0_hw_init(void *handle)
done:
if (!r)
- DRM_INFO("VCN decode and encode initialized successfully(under
%s).\n",
- (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG
Mode":"SPG Mode");
+ DRM_INFO("VCN %s encode initialized successfully(under %s).\n",
+ (adev->asic_type == CHIP_NAVI12 &&
+ amdgpu_sriov_vf(adev))?"":"decode and",
+ (adev->pg_flags &
+ AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
return r;
}
@@ -1721,9 +1727,6 @@ int vcn_v2_0_dec_ring_test_ring(struct amdgpu_ring *ring)
unsigned i;
int r;
- if (amdgpu_sriov_vf(adev))
- return 0;
-
WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD);
r = amdgpu_ring_alloc(ring, 4);
if (r)
--
2.25.1
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Re: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing
On Wed, May 26, 2021 at 6:13 AM Li, Xin (Justin) wrote:
>
> since vcn decoding ring is not required, so just disable it.
>
> Cc: Alex.Deucher
> Cc: Christian.Konig
> Signed-off-by: Li.Xin.Justin
> Signed-off-by: Frank.Min
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 +++---
> drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 25 ++---
> 2 files changed, 17 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 524e4fe5efe8..614e6b06e94e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
> if (adev->uvd.harvest_config & (1 << i))
> continue;
>
> - if (adev->vcn.inst[i].ring_dec.sched.ready)
> + if (adev->vcn.inst[i].ring_dec.sched.ready ||
> + (adev->asic_type == CHIP_NAVI12 &&
> + amdgpu_sriov_vf(adev)))
> ++num_rings;
> }
> ib_start_alignment = 16;
> @@ -770,8 +772,6 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data,
> struct drm_file *filp)
> dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
> if (amdgpu_mcbp || amdgpu_sriov_vf(adev))
> dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
> - if (amdgpu_is_tmz(adev))
> - dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
>
This looks unrelated and should be dropped.
> vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
> vm_size -= AMDGPU_VA_RESERVED_SIZE;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> index 8af567c546db..dc8a36766c4a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> @@ -220,17 +220,20 @@ static int vcn_v2_0_hw_init(void *handle)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> struct amdgpu_ring *ring = >vcn.inst->ring_dec;
> - int i, r;
> + int i, r = -1;
>
> adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
> ring->doorbell_index, 0);
>
> - if (amdgpu_sriov_vf(adev))
> + if (amdgpu_sriov_vf(adev)) {
> vcn_v2_0_start_sriov(adev);
> -
> - r = amdgpu_ring_test_helper(ring);
> - if (r)
> - goto done;
> + if (adev->asic_type == CHIP_NAVI12)
> + ring->sched.ready = false;
> + } else {
> + r = amdgpu_ring_test_helper(ring);
> + if (r)
> + goto done;
> + }
>
> //Disable vcn decode for sriov
> if (amdgpu_sriov_vf(adev))
> @@ -245,8 +248,11 @@ static int vcn_v2_0_hw_init(void *handle)
>
> done:
> if (!r)
> - DRM_INFO("VCN decode and encode initialized
> successfully(under %s).\n",
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG
> Mode":"SPG Mode");
> + DRM_INFO("VCN %s encode initialized successfully(under
> %s).\n",
> + (adev->asic_type == CHIP_NAVI12 &&
> + amdgpu_sriov_vf(adev))?"":"decode and",
> + (adev->pg_flags &
> + AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG
> Mode");
>
> return r;
> }
> @@ -1721,9 +1727,6 @@ int vcn_v2_0_dec_ring_test_ring(struct amdgpu_ring
> *ring)
> unsigned i;
> int r;
>
> - if (amdgpu_sriov_vf(adev))
> - return 0;
> -
> WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD);
> r = amdgpu_ring_alloc(ring, 4);
> if (r)
> --
> 2.25.1
>
> ___
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> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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Re: [PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing
Am 26.05.21 um 12:13 schrieb Li, Xin (Justin):
since vcn decoding ring is not required, so just disable it.
Cc: Alex.Deucher
Cc: Christian.Konig
Signed-off-by: Li.Xin.Justin
Signed-off-by: Frank.Min
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 25 ++---
2 files changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 524e4fe5efe8..614e6b06e94e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
if (adev->uvd.harvest_config & (1 << i))
continue;
- if (adev->vcn.inst[i].ring_dec.sched.ready)
+ if (adev->vcn.inst[i].ring_dec.sched.ready ||
+ (adev->asic_type == CHIP_NAVI12 &&
+ amdgpu_sriov_vf(adev)))
Leo needs to take a closer look, but that looks fishy to me.
Why should the ring be available if it is disabled? That doesn't make sense.
Christian.
++num_rings;
}
ib_start_alignment = 16;
@@ -770,8 +772,6 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
if (amdgpu_mcbp || amdgpu_sriov_vf(adev))
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
- if (amdgpu_is_tmz(adev))
- dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
vm_size -= AMDGPU_VA_RESERVED_SIZE;
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 8af567c546db..dc8a36766c4a 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -220,17 +220,20 @@ static int vcn_v2_0_hw_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_ring *ring = >vcn.inst->ring_dec;
- int i, r;
+ int i, r = -1;
adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
ring->doorbell_index, 0);
- if (amdgpu_sriov_vf(adev))
+ if (amdgpu_sriov_vf(adev)) {
vcn_v2_0_start_sriov(adev);
-
- r = amdgpu_ring_test_helper(ring);
- if (r)
- goto done;
+ if (adev->asic_type == CHIP_NAVI12)
+ ring->sched.ready = false;
+ } else {
+ r = amdgpu_ring_test_helper(ring);
+ if (r)
+ goto done;
+ }
//Disable vcn decode for sriov
if (amdgpu_sriov_vf(adev))
@@ -245,8 +248,11 @@ static int vcn_v2_0_hw_init(void *handle)
done:
if (!r)
- DRM_INFO("VCN decode and encode initialized successfully(under
%s).\n",
- (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG
Mode");
+ DRM_INFO("VCN %s encode initialized successfully(under %s).\n",
+ (adev->asic_type == CHIP_NAVI12 &&
+ amdgpu_sriov_vf(adev))?"":"decode and",
+ (adev->pg_flags &
+ AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
return r;
}
@@ -1721,9 +1727,6 @@ int vcn_v2_0_dec_ring_test_ring(struct amdgpu_ring *ring)
unsigned i;
int r;
- if (amdgpu_sriov_vf(adev))
- return 0;
-
WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD);
r = amdgpu_ring_alloc(ring, 4);
if (r)
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