Re: [PATCH 1/2] drm/amdgpu: add the IP discovery IP versions for HW INFO data

[Marek Olšák]

Reviewed-by: Marek Olšák 

for the series.

Marek

On Tue, Jul 19, 2022 at 3:53 PM Alex Deucher  wrote:

> Ping on this series.
>
> Alex
>
> On Fri, Jul 8, 2022 at 6:56 PM Alex Deucher 
> wrote:
> >
> > Use the former pad element to store the IP versions from the
> > IP discovery table.  This allows userspace to get the IP
> > version from the kernel to better align with hardware IP
> > versions.
> >
> > Proposed mesa patch:
> >
> https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075
> >
> > Signed-off-by: Alex Deucher 
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 24 
> >  include/uapi/drm/amdgpu_drm.h   |  3 ++-
> >  2 files changed, 26 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> > index 4b44a4bc2fb3..7e03f3719d11 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> > @@ -473,6 +473,30 @@ static int amdgpu_hw_ip_info(struct amdgpu_device
> *adev,
> >
> > result->hw_ip_version_major = adev->ip_blocks[i].version->major;
> > result->hw_ip_version_minor = adev->ip_blocks[i].version->minor;
> > +
> > +   if (adev->asic_type >= CHIP_VEGA10) {
> > +   switch (type) {
> > +   case AMD_IP_BLOCK_TYPE_GFX:
> > +   result->ip_discovery_version =
> adev->ip_versions[GC_HWIP][0];
> > +   break;
> > +   case AMD_IP_BLOCK_TYPE_SDMA:
> > +   result->ip_discovery_version =
> adev->ip_versions[SDMA0_HWIP][0];
> > +   break;
> > +   case AMD_IP_BLOCK_TYPE_UVD:
> > +   case AMD_IP_BLOCK_TYPE_VCN:
> > +   case AMD_IP_BLOCK_TYPE_JPEG:
> > +   result->ip_discovery_version =
> adev->ip_versions[UVD_HWIP][0];
> > +   break;
> > +   case AMD_IP_BLOCK_TYPE_VCE:
> > +   result->ip_discovery_version =
> adev->ip_versions[VCE_HWIP][0];
> > +   break;
> > +   default:
> > +   result->ip_discovery_version = 0;
> > +   break;
> > +   }
> > +   } else {
> > +   result->ip_discovery_version = 0;
> > +   }
> > result->capabilities_flags = 0;
> > result->available_rings = (1 << num_rings) - 1;
> > result->ib_start_alignment = ib_start_alignment;
> > diff --git a/include/uapi/drm/amdgpu_drm.h
> b/include/uapi/drm/amdgpu_drm.h
> > index 18d3246d636e..3a2674b4a2d9 100644
> > --- a/include/uapi/drm/amdgpu_drm.h
> > +++ b/include/uapi/drm/amdgpu_drm.h
> > @@ -1093,7 +1093,8 @@ struct drm_amdgpu_info_hw_ip {
> > __u32  ib_size_alignment;
> > /** Bitmask of available rings. Bit 0 means ring 0, etc. */
> > __u32  available_rings;
> > -   __u32  _pad;
> > +   /** version info: bits 23:16 major, 15:8 minor, 7:0 revision */
> > +   __u32  ip_discovery_version;
> >  };
> >
> >  struct drm_amdgpu_info_num_handles {
> > --
> > 2.35.3
> >
>

Re: [PATCH 1/2] drm/amdgpu: add the IP discovery IP versions for HW INFO data

[Alex Deucher]

Ping on this series.

Alex

On Fri, Jul 8, 2022 at 6:56 PM Alex Deucher  wrote:
>
> Use the former pad element to store the IP versions from the
> IP discovery table.  This allows userspace to get the IP
> version from the kernel to better align with hardware IP
> versions.
>
> Proposed mesa patch:
> https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075
>
> Signed-off-by: Alex Deucher 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 24 
>  include/uapi/drm/amdgpu_drm.h   |  3 ++-
>  2 files changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 4b44a4bc2fb3..7e03f3719d11 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -473,6 +473,30 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
>
> result->hw_ip_version_major = adev->ip_blocks[i].version->major;
> result->hw_ip_version_minor = adev->ip_blocks[i].version->minor;
> +
> +   if (adev->asic_type >= CHIP_VEGA10) {
> +   switch (type) {
> +   case AMD_IP_BLOCK_TYPE_GFX:
> +   result->ip_discovery_version = 
> adev->ip_versions[GC_HWIP][0];
> +   break;
> +   case AMD_IP_BLOCK_TYPE_SDMA:
> +   result->ip_discovery_version = 
> adev->ip_versions[SDMA0_HWIP][0];
> +   break;
> +   case AMD_IP_BLOCK_TYPE_UVD:
> +   case AMD_IP_BLOCK_TYPE_VCN:
> +   case AMD_IP_BLOCK_TYPE_JPEG:
> +   result->ip_discovery_version = 
> adev->ip_versions[UVD_HWIP][0];
> +   break;
> +   case AMD_IP_BLOCK_TYPE_VCE:
> +   result->ip_discovery_version = 
> adev->ip_versions[VCE_HWIP][0];
> +   break;
> +   default:
> +   result->ip_discovery_version = 0;
> +   break;
> +   }
> +   } else {
> +   result->ip_discovery_version = 0;
> +   }
> result->capabilities_flags = 0;
> result->available_rings = (1 << num_rings) - 1;
> result->ib_start_alignment = ib_start_alignment;
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 18d3246d636e..3a2674b4a2d9 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -1093,7 +1093,8 @@ struct drm_amdgpu_info_hw_ip {
> __u32  ib_size_alignment;
> /** Bitmask of available rings. Bit 0 means ring 0, etc. */
> __u32  available_rings;
> -   __u32  _pad;
> +   /** version info: bits 23:16 major, 15:8 minor, 7:0 revision */
> +   __u32  ip_discovery_version;
>  };
>
>  struct drm_amdgpu_info_num_handles {
> --
> 2.35.3
>