Re: [Amforth] 16/32 Bit Fetch & Store.
> > Is my simplistic picture correct? Yes > Or can the assembler words @ ! +! > indeed be interrupted from within AmForth? No Matthias ___ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
Re: [Amforth] 16/32 Bit Fetch & Store.
On 19Oct18 19:32, Matthias Trute wrote: > Am Freitag, den 19.10.2018, 14:46 +0200 schrieb Tristan: > > Hello Martin, > > > > Very intriguing, just when I am away from my machine so I can’t test > > things out! > > > > If I remember correctly, the default Amforth avr build uses (rx,tx) > > interrupts to handle the serial prompt. If at the serial prompt I > > type in the word -int and “all” -int did was to issue the assembler > > cli instruction I should lose my serial prompt. I can’t check now but > > if the serial prompt does not disappear then there is other machinery > > at work. > > It depends. Serial send (TX) is since long not interrupt driven. It > works even with disabled interrupts. Receiving is usually interrupt > driven, but can be configured to a polling code. It has 2 advantages: > smaller code and works almost always. The disadvantage is, that > characters may be lost if they arrive too fast. > > The non-avr platforms are all non-interrupt based. > > Matthias > > PS: nice discussions this week :=) > > > > > ___ > Amforth-devel mailing list for http://amforth.sf.net/ > Amforth-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/amforth-devel Hello Matthias, Martin, Martin's original post raised the question whether @ ! +! 2@ 2! d+! should disable interrupts on the AVR8 (bracketing with cli and sei). I am particularly interested as to whether the words @ ! +! could indeed be interrupted within AmForth. After trying to use 1ms for a purpose it was not suited to, I re-read http://amforth.sourceforge.net/TG/AVR8.html and tried to form a picture of how AmForth handled interrupts. This is what I settled on based on my reading of the sections "Inner Interpreter", "NEXT", "Interrupts" from "Core System" in the link above. 'The inner interpreter checks for set interrupt flags in the "space" between forth words. An interrupt service routine can only be executed by the inner interpreter. If the inner interpreter finds a set interrupt flag, it executes the associated interrupt service routine (which will not be interrupted) and clears the interrupt flag before moving on to execute the next forth word. As forth words usually comprise of other forth words this is a recursive process until the inner interpreter finds a word written in assembler. Such a word will not contain any "space" in which the inner interpreter can check for set interrupt flags. Consequently, that assembler word will always run uninterrupted. After the execution of the assembler word, there is once again "space" and the process repeats. Should an interrupt flag be set whilst the assembler word is being executed, the execution of an associated interrupt routine is deferred until after the execution of the assembler word and so is not lost.' Is my simplistic picture correct? Or can the assembler words @ ! +! indeed be interrupted from within AmForth? Best wishes, Tristan ___ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
Re: [Amforth] 16/32 Bit Fetch & Store.
Am Freitag, den 19.10.2018, 14:46 +0200 schrieb Tristan: > Hello Martin, > > Very intriguing, just when I am away from my machine so I can’t test > things out! > > If I remember correctly, the default Amforth avr build uses (rx,tx) > interrupts to handle the serial prompt. If at the serial prompt I > type in the word -int and “all” -int did was to issue the assembler > cli instruction I should lose my serial prompt. I can’t check now but > if the serial prompt does not disappear then there is other machinery > at work. It depends. Serial send (TX) is since long not interrupt driven. It works even with disabled interrupts. Receiving is usually interrupt driven, but can be configured to a polling code. It has 2 advantages: smaller code and works almost always. The disadvantage is, that characters may be lost if they arrive too fast. The non-avr platforms are all non-interrupt based. Matthias PS: nice discussions this week :=) ___ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
Re: [Amforth] 16/32 Bit Fetch & Store.
Hello Martin, Very intriguing, just when I am away from my machine so I can’t test things out! If I remember correctly, the default Amforth avr build uses (rx,tx) interrupts to handle the serial prompt. If at the serial prompt I type in the word -int and “all” -int did was to issue the assembler cli instruction I should lose my serial prompt. I can’t check now but if the serial prompt does not disappear then there is other machinery at work. Best wishes, Tristan Sent from my iPhone > On 19 Oct 2018, at 10:36, Martin Nicholas via Amforth-devel > wrote: > > On Wed, 17 Oct 2018 13:27:09 +0100 > Tristan Williams wrote: > >>> On 17Oct18 10:25, Martin Nicholas via Amforth-devel wrote: >>> Hi, >>> >>> I think that @ ! +! 2@ 2! d+! should disable interrupts on the AVR. >>> Although it's possible to code around a variable being changed by an >>> interrupt (using C@ C! for example), the 16-bit counter registers >>> can't be dealt with in a similar way. Section 17.3 of the datasheet >>> "Accessing 16-bit Registers" deals with all this. @ and ! do do the >>> byte accesses in the right order, but an interrupt using the 16-bit >>> registers associated with a particular counter will overwrite the >>> "TEMP (8-bit)" register (see Figure 17-4). >>> >>> Cheers! >>> >>> >> >> Hello Martin, >> >> This page http://amforth.sourceforge.net/TG/AVR8.html sets out how >> AmForth handles interrupts and I think it is relevant to your post. >> >> Earlier this year I wrote some forth[1] that used the word 1ms and it >> was not running as I expected. I had not realised that the execution >> of AmForth words written in assembler would not be interrupted. @ ! +! >> are assembler words and so will not be interrupted. >> >> Tristan >> >> [1] >> https://sourceforge.net/p/amforth/mailman/amforth-devel/?viewmonth=201806 >> > > No, thie problem with 1ms is specific to 1ms. I suspect the tight inner > loop is uninterruptable. It is: >> sbiw Z, 1 >> brne pc-1 > > Interrupts are enabled at all times (by APPLTURNKEY) unless you > specifically disable them. > > Looking at the vanilla build at: > amforth-6.7/appl/template/template.lst > These words enable interrupts: +INT APPLTURNKEY. > These disable: -INT. > These temporarily disable interrupts: RP! !E @E (!I-NRWW). They are > re-enabled before exit. > That's it. Search for "cli" and "sei". > > When I have time I'll test my theory about 1ms. Atmel documentation is > no help on this, although there are dark hints in the documentation > for BRNE. > > Confirm interrupt status with: > "hex 5f c@ ." > > Cheers! > > -- > Regards, > > Martin Nicholas. > > E-mail: m...@mgn.org.uk. > > > ___ > Amforth-devel mailing list for http://amforth.sf.net/ > Amforth-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/amforth-devel > ___ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
Re: [Amforth] 16/32 Bit Fetch & Store.
On Wed, 17 Oct 2018 13:27:09 +0100 Tristan Williams wrote: > On 17Oct18 10:25, Martin Nicholas via Amforth-devel wrote: > > Hi, > > > > I think that @ ! +! 2@ 2! d+! should disable interrupts on the AVR. > > Although it's possible to code around a variable being changed by an > > interrupt (using C@ C! for example), the 16-bit counter registers > > can't be dealt with in a similar way. Section 17.3 of the datasheet > > "Accessing 16-bit Registers" deals with all this. @ and ! do do the > > byte accesses in the right order, but an interrupt using the 16-bit > > registers associated with a particular counter will overwrite the > > "TEMP (8-bit)" register (see Figure 17-4). > > > > Cheers! > > > > > > Hello Martin, > > This page http://amforth.sourceforge.net/TG/AVR8.html sets out how > AmForth handles interrupts and I think it is relevant to your post. > > Earlier this year I wrote some forth[1] that used the word 1ms and it > was not running as I expected. I had not realised that the execution > of AmForth words written in assembler would not be interrupted. @ ! +! > are assembler words and so will not be interrupted. > > Tristan > > [1] > https://sourceforge.net/p/amforth/mailman/amforth-devel/?viewmonth=201806 > No, thie problem with 1ms is specific to 1ms. I suspect the tight inner loop is uninterruptable. It is: > sbiw Z, 1 > brne pc-1 Interrupts are enabled at all times (by APPLTURNKEY) unless you specifically disable them. Looking at the vanilla build at: amforth-6.7/appl/template/template.lst These words enable interrupts: +INT APPLTURNKEY. These disable: -INT. These temporarily disable interrupts: RP! !E @E (!I-NRWW). They are re-enabled before exit. That's it. Search for "cli" and "sei". When I have time I'll test my theory about 1ms. Atmel documentation is no help on this, although there are dark hints in the documentation for BRNE. Confirm interrupt status with: "hex 5f c@ ." Cheers! -- Regards, Martin Nicholas. E-mail: m...@mgn.org.uk. ___ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
Re: [Amforth] 16/32 Bit Fetch & Store.
On 17Oct18 10:25, Martin Nicholas via Amforth-devel wrote: > Hi, > > I think that @ ! +! 2@ 2! d+! should disable interrupts on the AVR. > Although it's possible to code around a variable being changed by an > interrupt (using C@ C! for example), the 16-bit counter registers can't > be dealt with in a similar way. Section 17.3 of the datasheet > "Accessing 16-bit Registers" deals with all this. @ and ! do do the byte > accesses in the right order, but an interrupt using the 16-bit > registers associated with a particular counter will overwrite the "TEMP > (8-bit)" register (see Figure 17-4). > > Cheers! > > -- > Regards, > > Martin Nicholas. > > E-mail: reply-2...@mgn.org.uk > > > ___ > Amforth-devel mailing list for http://amforth.sf.net/ > Amforth-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/amforth-devel > Hello Martin, This page http://amforth.sourceforge.net/TG/AVR8.html sets out how AmForth handles interrupts and I think it is relevant to your post. Earlier this year I wrote some forth[1] that used the word 1ms and it was not running as I expected. I had not realised that the execution of AmForth words written in assembler would not be interrupted. @ ! +! are assembler words and so will not be interrupted. Tristan [1] https://sourceforge.net/p/amforth/mailman/amforth-devel/?viewmonth=201806 ___ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
[Amforth] 16/32 Bit Fetch & Store.
Hi, I think that @ ! +! 2@ 2! d+! should disable interrupts on the AVR. Although it's possible to code around a variable being changed by an interrupt (using C@ C! for example), the 16-bit counter registers can't be dealt with in a similar way. Section 17.3 of the datasheet "Accessing 16-bit Registers" deals with all this. @ and ! do do the byte accesses in the right order, but an interrupt using the 16-bit registers associated with a particular counter will overwrite the "TEMP (8-bit)" register (see Figure 17-4). Cheers! -- Regards, Martin Nicholas. E-mail: reply-2...@mgn.org.uk ___ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
