[arch-commits] Commit in verilator/trunk (PKGBUILD)

2022-09-03 Thread Felix Yan via arch-commits 
Date: Saturday, September 3, 2022 @ 06:56:09
  Author: felixonmars
Revision: 1291030

upgpkg: verilator 4.226-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2022-09-03 06:54:51 UTC (rev 1291029)
+++ PKGBUILD2022-09-03 06:56:09 UTC (rev 1291030)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.224
+pkgver=4.226
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -13,14 +13,11 @@
 optdepends=('systemc')
 # lsb-release is used by configure script to enable usage of c++17
 makedepends=('python' 'systemc' 'lsb-release')
-source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz;
-
$pkgname-use-c++17-on-arch.patch::https://github.com/verilator/verilator/pull/3479.patch)
-sha512sums=('a2a37948878ad897668ce89b0f12978dcbda3726cebb134db6ff6f172573d4e488748699a84008359d808d5b6fad19c013edaebc7f8a24a5452b61b1d57dc283'
-
'd608fba917db62974a3a083829fcaf3bb11d4cf25b3bea5a078d720132e104cdbba1500d1d69ccbc090c3731338f00c84fa46fb6772434367835736e821259dc')
+source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz;)
+sha512sums=('bede9024f45491884533929aa04705908aaf9fda5848a8ee7ca865569b2e5c9267ba20d8e140e67d86f322f7c7cf6d4562014f00e826ec69c8c39a3a3644c5c3')
 
 prepare() {
   cd verilator-$pkgver
-  patch -p1 -i ../$pkgname-use-c++17-on-arch.patch
   autoconf
 }

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2022-06-29 Thread Felix Yan via arch-commits 
Date: Wednesday, June 29, 2022 @ 10:24:52
  Author: felixonmars
Revision: 1240197

upgpkg: verilator 4.224-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |   13 -
 1 file changed, 8 insertions(+), 5 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2022-06-29 10:23:14 UTC (rev 1240196)
+++ PKGBUILD2022-06-29 10:24:52 UTC (rev 1240197)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.222
+pkgver=4.224
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -11,13 +11,16 @@
 license=('LGPL')
 depends=('perl')
 optdepends=('systemc')
-makedepends=('python' 'systemc')
-source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz;)
-sha512sums=('bd155c7b9c4949687aac88f4d965a2d3605aa0ebe93967ae8e2a9da18dc3823c2473972a10e3ab6fee4082b961842213586beb8f0d7b1cefd393349229c57b25')
+# lsb-release is used by configure script to enable usage of c++17
+makedepends=('python' 'systemc' 'lsb-release')
+source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz;
+
$pkgname-use-c++17-on-arch.patch::https://github.com/verilator/verilator/pull/3479.patch)
+sha512sums=('a2a37948878ad897668ce89b0f12978dcbda3726cebb134db6ff6f172573d4e488748699a84008359d808d5b6fad19c013edaebc7f8a24a5452b61b1d57dc283'
+
'd608fba917db62974a3a083829fcaf3bb11d4cf25b3bea5a078d720132e104cdbba1500d1d69ccbc090c3731338f00c84fa46fb6772434367835736e821259dc')
 
 prepare() {
   cd verilator-$pkgver
-  sed -i 
's/#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)/_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)/'
 configure.ac
+  patch -p1 -i ../$pkgname-use-c++17-on-arch.patch
   autoconf
 }

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2022-05-09 Thread Felix Yan via arch-commits 
Date: Tuesday, May 10, 2022 @ 04:29:19
  Author: felixonmars
Revision: 1196567

upgpkg: verilator 4.222-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2022-05-10 04:21:15 UTC (rev 1196566)
+++ PKGBUILD2022-05-10 04:29:19 UTC (rev 1196567)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.220
+pkgver=4.222
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -13,7 +13,7 @@
 optdepends=('systemc')
 makedepends=('python' 'systemc')
 
source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz;)
-sha512sums=('d7435de47cf66a2a360b154e2073f75a540100cb66249eeaa24de78d60bc9376ebbe6cac6df3a421c4f6c7b883eb17e47118835b9b2ed973486d4291fe8fc588')
+sha512sums=('bd155c7b9c4949687aac88f4d965a2d3605aa0ebe93967ae8e2a9da18dc3823c2473972a10e3ab6fee4082b961842213586beb8f0d7b1cefd393349229c57b25')
 
 prepare() {
   cd verilator-$pkgver

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2022-03-13 Thread Felix Yan via arch-commits 
Date: Sunday, March 13, 2022 @ 20:53:12
  Author: felixonmars
Revision: 1151378

upgpkg: verilator 4.220-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2022-03-13 20:53:04 UTC (rev 1151377)
+++ PKGBUILD2022-03-13 20:53:12 UTC (rev 1151378)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.218
+pkgver=4.220
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -13,7 +13,7 @@
 optdepends=('systemc')
 makedepends=('python' 'systemc')
 
source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz;)
-sha512sums=('26b36f60a10a13adae34d8401f55afbb32fc48a4cade7b1e58226930fe7d5c982deffaae1cff2cc52a8f9a22638ae73957d3ae7f6ac77d35ac6a8e4228dcf9e4')
+sha512sums=('d7435de47cf66a2a360b154e2073f75a540100cb66249eeaa24de78d60bc9376ebbe6cac6df3a421c4f6c7b883eb17e47118835b9b2ed973486d4291fe8fc588')
 
 prepare() {
   cd verilator-$pkgver

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2022-01-20 Thread Felix Yan via arch-commits 
Date: Thursday, January 20, 2022 @ 23:01:48
  Author: felixonmars
Revision: 567

upgpkg: verilator 4.218-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2022-01-20 21:08:22 UTC (rev 566)
+++ PKGBUILD2022-01-20 23:01:48 UTC (rev 567)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.216
+pkgver=4.218
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -13,7 +13,7 @@
 optdepends=('systemc')
 makedepends=('python' 'systemc')
 
source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz;)
-sha512sums=('e90dd57bfb4128feb51aa94bf590f84fb645e2560e5f928f7ff8999bd7c7c77d941cfd988ae8b05c1e61d6c9d54f857e122e307528f2a42700807ece3fc64856')
+sha512sums=('26b36f60a10a13adae34d8401f55afbb32fc48a4cade7b1e58226930fe7d5c982deffaae1cff2cc52a8f9a22638ae73957d3ae7f6ac77d35ac6a8e4228dcf9e4')
 
 prepare() {
   cd verilator-$pkgver

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2021-12-11 Thread Felix Yan via arch-commits 
Date: Saturday, December 11, 2021 @ 22:11:24
  Author: felixonmars
Revision: 1068355

upgpkg: verilator 4.216-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2021-12-11 22:11:00 UTC (rev 1068354)
+++ PKGBUILD2021-12-11 22:11:24 UTC (rev 1068355)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.214
+pkgver=4.216
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -13,7 +13,7 @@
 optdepends=('systemc')
 makedepends=('python' 'systemc')
 
source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz;)
-sha512sums=('e06884f1a0c21ca52cdd6978c101878fcff1732a14b50839552db1e336013d9fd3b923ce399820216a8d84edb6abc7acc37644a436839be87d08c734fc144ddd')
+sha512sums=('e90dd57bfb4128feb51aa94bf590f84fb645e2560e5f928f7ff8999bd7c7c77d941cfd988ae8b05c1e61d6c9d54f857e122e307528f2a42700807ece3fc64856')
 
 prepare() {
   cd verilator-$pkgver

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2021-10-18 Thread Felix Yan via arch-commits 
Date: Monday, October 18, 2021 @ 18:11:58
  Author: felixonmars
Revision: 1030872

upgpkg: verilator 4.214-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2021-10-18 18:10:51 UTC (rev 1030871)
+++ PKGBUILD2021-10-18 18:11:58 UTC (rev 1030872)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.212
+pkgver=4.214
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -13,7 +13,7 @@
 optdepends=('systemc')
 makedepends=('python' 'systemc')
 
source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz;)
-sha512sums=('efa6d38a1a2e4bde67fd2914f3fb88ea2f7d7d40b9309932ce1e307dfeccd3fefb4fbf3fd5e277232e0fc1ed315b5aa65ae48e6f567c14db0b84e245e9c02095')
+sha512sums=('e06884f1a0c21ca52cdd6978c101878fcff1732a14b50839552db1e336013d9fd3b923ce399820216a8d84edb6abc7acc37644a436839be87d08c734fc144ddd')
 
 prepare() {
   cd verilator-$pkgver

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2021-09-11 Thread Felix Yan via arch-commits 
Date: Sunday, September 12, 2021 @ 02:30:13
  Author: felixonmars
Revision: 1014382

upgpkg: verilator 4.212-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |   10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2021-09-11 23:56:40 UTC (rev 1014381)
+++ PKGBUILD2021-09-12 02:30:13 UTC (rev 1014382)
@@ -3,8 +3,8 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.210
-pkgrel=2
+pkgver=4.212
+pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
 arch=('x86_64')
@@ -12,12 +12,12 @@
 depends=('perl')
 optdepends=('systemc')
 makedepends=('python' 'systemc')
-source=("https://www.veripool.org/ftp/verilator-$pkgver.tgz;)
-sha512sums=('ca16cf2c2f3ce6da5b7dadb47358efea1c0179fdfd8ea021cf1a9ffea85f3d01432582791be60a5425256776c2d9fec9b6e382a1a719b8c63630f07d4ea7afb0')
+source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz;)
+sha512sums=('efa6d38a1a2e4bde67fd2914f3fb88ea2f7d7d40b9309932ce1e307dfeccd3fefb4fbf3fd5e277232e0fc1ed315b5aa65ae48e6f567c14db0b84e245e9c02095')
 
 prepare() {
   cd verilator-$pkgver
-  sed -i 
's/#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)/_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)/'
 configure.ac
+  sed -i 
's/#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)/_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)/'
 configure.ac
   autoconf
 }

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2021-07-28 Thread Felix Yan via arch-commits 
Date: Wednesday, July 28, 2021 @ 08:29:37
  Author: felixonmars
Revision: 988561

upgpkg: verilator 4.210-2: enable systemc support and tests

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |   18 ++
 1 file changed, 14 insertions(+), 4 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2021-07-28 08:25:32 UTC (rev 988560)
+++ PKGBUILD2021-07-28 08:29:37 UTC (rev 988561)
@@ -4,25 +4,35 @@
 
 pkgname=verilator
 pkgver=4.210
-pkgrel=1
+pkgrel=2
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
 arch=('x86_64')
 license=('LGPL')
 depends=('perl')
-makedepends=('python')
+optdepends=('systemc')
+makedepends=('python' 'systemc')
 source=("https://www.veripool.org/ftp/verilator-$pkgver.tgz;)
 
sha512sums=('ca16cf2c2f3ce6da5b7dadb47358efea1c0179fdfd8ea021cf1a9ffea85f3d01432582791be60a5425256776c2d9fec9b6e382a1a719b8c63630f07d4ea7afb0')
 
+prepare() {
+  cd verilator-$pkgver
+  sed -i 
's/#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)/_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)/'
 configure.ac
+  autoconf
+}
+
 build() {
   cd verilator-$pkgver
-
   ./configure --prefix=/usr
   make
 }
 
+check() {
+  cd verilator-$pkgver
+  make test
+}
+
 package() {
   cd verilator-$pkgver
-
   make install DESTDIR="$pkgdir"
 }

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2021-07-08 Thread Felix Yan via arch-commits 
Date: Thursday, July 8, 2021 @ 06:55:11
  Author: felixonmars
Revision: 975754

upgpkg: verilator 4.210-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2021-07-08 06:54:34 UTC (rev 975753)
+++ PKGBUILD2021-07-08 06:55:11 UTC (rev 975754)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.204
+pkgver=4.210
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -12,7 +12,7 @@
 depends=('perl')
 makedepends=('python')
 source=("https://www.veripool.org/ftp/verilator-$pkgver.tgz;)
-sha512sums=('a889df10abdd17593b458062df6c3c2368c0bf20b930eb2b7c13a2896fcc0d5299ed3bce6798b9c8dc806bdbc648773b05aa89ada4207d2040f2b7abce70634d')
+sha512sums=('ca16cf2c2f3ce6da5b7dadb47358efea1c0179fdfd8ea021cf1a9ffea85f3d01432582791be60a5425256776c2d9fec9b6e382a1a719b8c63630f07d4ea7afb0')
 
 build() {
   cd verilator-$pkgver

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2021-06-29 Thread Felix Yan via arch-commits 
Date: Wednesday, June 30, 2021 @ 00:33:53
  Author: felixonmars
Revision: 967881

upgpkg: verilator 4.204-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2021-06-29 22:15:49 UTC (rev 967880)
+++ PKGBUILD2021-06-30 00:33:53 UTC (rev 967881)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.202
+pkgver=4.204
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -12,7 +12,7 @@
 depends=('perl')
 makedepends=('python')
 source=("https://www.veripool.org/ftp/verilator-$pkgver.tgz;)
-sha512sums=('9cb61125bde350bc30746d616a8ee19f30007b920d8809acf3cf8b1d57edc534f4760fe92c07c27e60b81d98ef832c0aeab8dc7da07d64c99ae74cff354adc00')
+sha512sums=('a889df10abdd17593b458062df6c3c2368c0bf20b930eb2b7c13a2896fcc0d5299ed3bce6798b9c8dc806bdbc648773b05aa89ada4207d2040f2b7abce70634d')
 
 build() {
   cd verilator-$pkgver

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2021-06-28 Thread Felix Yan via arch-commits 
Date: Tuesday, June 29, 2021 @ 03:30:49
  Author: felixonmars
Revision: 967829

upgpkg: verilator 4.202-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2021-06-29 03:28:44 UTC (rev 967828)
+++ PKGBUILD2021-06-29 03:30:49 UTC (rev 967829)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.200
+pkgver=4.202
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -12,7 +12,7 @@
 depends=('perl')
 makedepends=('python')
 source=("https://www.veripool.org/ftp/verilator-$pkgver.tgz;)
-sha512sums=('7de40cbd2421da6d0f36722793c65b0c7c6ad73999a9753263851e02b5fa85cd3face6f03e6ad81b09ca0075b76de06ee70c494e9cea2a42c71ce07c99714876')
+sha512sums=('9cb61125bde350bc30746d616a8ee19f30007b920d8809acf3cf8b1d57edc534f4760fe92c07c27e60b81d98ef832c0aeab8dc7da07d64c99ae74cff354adc00')
 
 build() {
   cd verilator-$pkgver

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2021-04-22 Thread Filipe Laíns via arch-commits 
Date: Thursday, April 22, 2021 @ 15:15:39
  Author: ffy00
Revision: 921147

upgpkg: verilator 4.200-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2021-04-22 15:06:59 UTC (rev 921146)
+++ PKGBUILD2021-04-22 15:15:39 UTC (rev 921147)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.108
+pkgver=4.200
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -12,7 +12,7 @@
 depends=('perl')
 makedepends=('python')
 source=("https://www.veripool.org/ftp/verilator-$pkgver.tgz;)
-sha512sums=('6dcdabe8731d926500c54cb2cad609820261e7889abc37a852f2de0fbdf5dc6ef25dbb14ae5ebcdb3a27a1a9672c929c7e638a8bda92160d8148f9c6d8b337ee')
+sha512sums=('7de40cbd2421da6d0f36722793c65b0c7c6ad73999a9753263851e02b5fa85cd3face6f03e6ad81b09ca0075b76de06ee70c494e9cea2a42c71ce07c99714876')
 
 build() {
   cd verilator-$pkgver

[arch-commits] Commit in verilator/trunk (PKGBUILD)

2021-01-29 Thread Felix Yan via arch-commits 
Date: Friday, January 29, 2021 @ 12:56:45
  Author: felixonmars
Revision: 834640

upgpkg: verilator 4.108-1

Modified:
  verilator/trunk/PKGBUILD

--+
 PKGBUILD |6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Modified: PKGBUILD
===
--- PKGBUILD2021-01-29 12:56:11 UTC (rev 834639)
+++ PKGBUILD2021-01-29 12:56:45 UTC (rev 834640)
@@ -3,7 +3,7 @@
 # Contributor: Jeffrey Tolar 
 
 pkgname=verilator
-pkgver=4.106
+pkgver=4.108
 pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
@@ -10,9 +10,9 @@
 arch=('x86_64')
 license=('LGPL')
 depends=('perl')
-makedepends=('gcc')
+makedepends=('python')
 source=("https://www.veripool.org/ftp/verilator-$pkgver.tgz;)
-sha512sums=('003663961bbbe6d043b5fbdcee324c7a80c79e04c0c3fb51219b8246f0af00570d2bc4ee5371be01df86c051917ef51f26fc8cad235f0523b9bb0871f7b5431d')
+sha512sums=('6dcdabe8731d926500c54cb2cad609820261e7889abc37a852f2de0fbdf5dc6ef25dbb14ae5ebcdb3a27a1a9672c929c7e638a8bda92160d8148f9c6d8b337ee')
 
 build() {
   cd verilator-$pkgver