Here is a patch that should add .bin generation on the KC705 with Vivado
(Sorry I don't have a machine with Vivado installed with me, so I'm not
able to test, but I've used parameters I use for another design).
There was also an issue with bitgen_opt with ISE, so it will maybe solve
your second issue too.
Regards,
Florent
2015-03-29 7:27 GMT+02:00 Sébastien Bourdeauducq s...@m-labs.hk:
Hi,
Seems to work here, thanks for fixing!
I found two other bugs while testing:
* Vivado fails to generate the .bin raw binary bitstream file:
https://github.com/m-labs/migen/issues/9
This breaks loading the bitstream into flash wish xc3sprog. Building
with ISE works around the problem.
* loading the MiSoC bitstream into SRAM with xc3sprog now results in
Device failed to configure, INSTRUCTION_CAPTURE is 0x19.
xc3sprog otherwise loaded the flash proxy bitstream just fine (including
when loading it directly, i.e. xc3sprog -c jtaghs1_fast
bscan_spi_kc705.bit). I used Vivado Programmer instead with the MiSoC
bitfile, which worked fine.
Sébastien
On 03/29/2015 06:50 AM, Florent Kermarrec wrote:
Hi,
the issue should be fixed. I found 2 issues:
- the number of rows for the KC705's DDR3 was not correct (we were
using rowbits=16 instead of 14).
- the current mapping we are using on the Wishbone bus limit us to
256MB. (The real size of the KC705's DDR3 is 1GB, it's now artificially
limited to 256MB).
I'm now able to load an runtime (not tested with ARTIQ) and run it from
the DDR3.
Sebastien, if you have access to your KC705, can you do a test with the
ARTIQ runtime?
Florent
0001-platforms-kc705-fix-.bin-generation-with-ISE-and-Viv.patch
Description: Binary data
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