Re: Modify ECB COMECBPT Intermittent response

2018-12-09 Thread Joseph Reichman
Thank you worked now I have to try it a number if times



> On Dec 9, 2018, at 4:03 PM, Charles Mills  wrote:
> 
> That is how I do it:
> 
> EXTRACT COMADDR,FIELDS=COMM,MF=(E,EXTRACTL)
> L R8,COMADDR  GET ADDRESS OF THE AREA
> USING COM,R8  USE R8 AS BASE ADDRESS OF COMM AREA
> ICM   R7,B'',COMCIBPT GET CIB ADDRESS FROM COM AREA
> JZCIBDELET_NoCIB  NO CIB
> 
> QEDIT ORIGIN=COMCIBPT,BLOCK=(R7)
> 
> CIBDELET_NoCIB EQU *
> QEDIT ORIGIN=COMCIBPT,CIBCTR=1
> 
> Charles
> 
> 
> -Original Message-
> From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] 
> On Behalf Of Joseph Reichman
> Sent: Sunday, December 9, 2018 12:20 PM
> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
> Subject: Re: Modify ECB COMECBPT Intermittent response
> 
> I think that was it 
> 
> From what I understand After getting the CIB address via extract 
> I have to issue 2 QEDIT’s
> 
> The first with a BLOCK parameter to free the start CIB
> The second to a limit on the number if CIB
> L   RX,COMCIBPT
> 1st QEDIT ORIGIN=COMCIBPT,ORIGIN=(RX)
> 2nd QEDIT ORIGIN=COMCIBPT,CIBCTR=4
> Thanks 
> 
> 
> Joe Reichman
> 170-10 73 rd ave 
> Fresh meadows NY 11366
> 
>> On Dec 7, 2018, at 9:27 AM, Joseph Reichman  wrote:
>> 
>> Let me check 
>> Thanks 
>> 
>> 
>> 
>>> On Dec 7, 2018, at 9:20 AM, Charles Mills  wrote:
>>> 
>>> Do you perhaps have a logic error relative to QEDIT? If you don't free the 
>>> CIB you may never get another MODIFY.
>>> 
>>> Charles
>>> 
>>> -Original Message-
>>> From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] 
>>> On Behalf Of Joseph Reichman
>>> Sent: Thursday, December 6, 2018 10:48 AM
>>> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
>>> Subject: Re: Modify ECB COMECBPT Intermittent response
>>> 
>>> It doesn’t have a wait bit there is only one task waiting on it 
>>> The main task  has 2 ECB’s in the list 
>>> One for the EZASMI SELECT and one for the communication ECB
>>> 
>>> The one task that got dispatched has a number of ECB’s waiting 
>>> 
>>> Things is 1 out of 4 times the posted logic works 


Re: Modify ECB COMECBPT Intermittent response

2018-12-09 Thread Charles Mills
That is how I do it:

 EXTRACT COMADDR,FIELDS=COMM,MF=(E,EXTRACTL)
 L R8,COMADDR  GET ADDRESS OF THE AREA
 USING COM,R8  USE R8 AS BASE ADDRESS OF COMM AREA
 ICM   R7,B'',COMCIBPT GET CIB ADDRESS FROM COM AREA
 JZCIBDELET_NoCIB  NO CIB

 QEDIT ORIGIN=COMCIBPT,BLOCK=(R7)

CIBDELET_NoCIB EQU *
 QEDIT ORIGIN=COMCIBPT,CIBCTR=1

Charles


-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of Joseph Reichman
Sent: Sunday, December 9, 2018 12:20 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Modify ECB COMECBPT Intermittent response

I think that was it 

>From what I understand After getting the CIB address via extract 
I have to issue 2 QEDIT’s

The first with a BLOCK parameter to free the start CIB
The second to a limit on the number if CIB
L   RX,COMCIBPT
1st QEDIT ORIGIN=COMCIBPT,ORIGIN=(RX)
2nd QEDIT ORIGIN=COMCIBPT,CIBCTR=4
Thanks 


Joe Reichman
170-10 73 rd ave 
Fresh meadows NY 11366

> On Dec 7, 2018, at 9:27 AM, Joseph Reichman  wrote:
> 
> Let me check 
> Thanks 
> 
> 
> 
>> On Dec 7, 2018, at 9:20 AM, Charles Mills  wrote:
>> 
>> Do you perhaps have a logic error relative to QEDIT? If you don't free the 
>> CIB you may never get another MODIFY.
>> 
>> Charles
>> 
>> -Original Message-
>> From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] 
>> On Behalf Of Joseph Reichman
>> Sent: Thursday, December 6, 2018 10:48 AM
>> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
>> Subject: Re: Modify ECB COMECBPT Intermittent response
>> 
>> It doesn’t have a wait bit there is only one task waiting on it 
>> The main task  has 2 ECB’s in the list 
>> One for the EZASMI SELECT and one for the communication ECB
>> 
>> The one task that got dispatched has a number of ECB’s waiting 
>> 
>> Things is 1 out of 4 times the posted logic works 


Re: Modify ECB COMECBPT Intermittent response

2018-12-09 Thread Joseph Reichman
I think that was it 

From what I understand After getting the CIB address via extract 
I have to issue 2 QEDIT’s

The first with a BLOCK parameter to free the start CIB
The second to a limit on the number if CIB
L   RX,COMCIBPT
1st QEDIT ORIGIN=COMCIBPT,ORIGIN=(RX)
2nd QEDIT ORIGIN=COMCIBPT,CIBCTR=4
Thanks 


Joe Reichman
170-10 73 rd ave 
Fresh meadows NY 11366

> On Dec 7, 2018, at 9:27 AM, Joseph Reichman  wrote:
> 
> Let me check 
> Thanks 
> 
> 
> 
>> On Dec 7, 2018, at 9:20 AM, Charles Mills  wrote:
>> 
>> Do you perhaps have a logic error relative to QEDIT? If you don't free the 
>> CIB you may never get another MODIFY.
>> 
>> Charles
>> 
>> -Original Message-
>> From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] 
>> On Behalf Of Joseph Reichman
>> Sent: Thursday, December 6, 2018 10:48 AM
>> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
>> Subject: Re: Modify ECB COMECBPT Intermittent response
>> 
>> It doesn’t have a wait bit there is only one task waiting on it 
>> The main task  has 2 ECB’s in the list 
>> One for the EZASMI SELECT and one for the communication ECB
>> 
>> The one task that got dispatched has a number of ECB’s waiting 
>> 
>> Things is 1 out of 4 times the posted logic works 


Re: Getting the Last Condition Code

2018-12-09 Thread Bob Raicer

Speaking as someone who has worked on OS and I/O subsystem
development for more than 45 years, I wholeheartedly agree with the
comments and observations posted by Brent Longborough.  I've always
found the style of invoking some function and depending upon the
Condition Code upon return to be worse than just smelly.  If,
during the course of a code review, the more seasoned folks on my
development team encountered that style, the code was rejected and
it was required to be reworked.

I'm also not a big fan of the "vectored returns" (e.g., B 0(,R14)
for one condition, B 4(,R14) for another, etc.).  Among other
things, this introduces an undesirable dependency upon the size of
the instruction(s) following the linkage instruction in the caller's
code.  Return Codes and Reason Codes (typically in R15 and R0,
respectively) work quite nicely and are much more maintainable.

Of course, nothing is perfect and developers need to be very much
aware of what they are doing and what kind of a mess (or hopefully,
lack thereof) they are leaving for the next individual who has to
work on the code.

Bob