Re: SHI instruction

[Alan Atkinson]

Which is just what we did - but turned it onto a macro.

 MACRO
SHI   ,   SUBTRACT HALFWORD IMMEDIATE
AHI   ,-()
 MEXIT
 MEND

On 12/20/21, 1:06 PM, "IBM Mainframe Assembler List on behalf of Ed Jaffe" 
 
wrote:


 EXTERNAL 


==
On 12/20/2021 10:03 AM, industryn...@winwholesale.com wrote:
>AHI   ,()*-1

Or you could simply use:

   AHI ,-()

-- 
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 90245
https://www.phoenixsoftware.com/




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Re: Getting the Last Condition Code

[Alan Atkinson]

The RC in our case is the CC. Type in haste repent at leisure.
Equal - ok, low - bad, high - unexpected. 
We don’t (say) set an 8 in r15 everywhere.
Allows us to branch conditionally without requiring a compare after the return.




> On Dec 8, 2018, at 3:58 AM, Robin Vowels  wrote:
> 
> 
> EXTERNAL 
> ==
> From: "Alan Atkinson" 
> Sent: Saturday, December 08, 2018 1:34 PM
> 
> 
>> So smelly or not we have a lot of stuff that branches conditionally based on 
>> return codes
> 
> Nothing unusual about that.
> 
> Has nothing to do with condition codes.
> 
>> from whatever was just called. CLI *,0 and *,255 along with CR R11,R11 gives 
>> a range of options for indicating if something was good, bad or indifferent.
>> 
>> The ability to insert (say) a logging routine to trace an operation by using 
>> an IPM /  / SPM and not having to do the  
>> over again or worry that  changed the cc outweighs the idea that doing 
>>  twice is somehow more intellectually pure.
>> 
>> YMMV, but it works. 
> 
> 
> ---
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Re: Getting the Last Condition Code

[Alan Atkinson]

So smelly or not we have a lot of stuff that branches conditionally based on 
return codes from whatever was just called. CLI *,0 and *,255 along with CR 
R11,R11 gives a range of options for indicating if something was good, bad or 
indifferent.

The ability to insert (say) a logging routine to trace an operation by using an 
IPM /  / SPM and not having to do the  over 
again or worry that  changed the cc outweighs the idea that doing 
 twice is somehow more intellectually pure.

YMMV, but it works. 
In production. 
Consistently.
I’ll take that over running IDF at 3am.



> On Dec 7, 2018, at 9:08 PM, Robin Vowels  wrote:
> 
> 
> EXTERNAL 
> ==
> From: "Brent Longborough" 
> Sent: Friday, December 07, 2018 11:24 PM
> 
> 
>> IMHO this is a Code Smell.
>> If you need the CC in order to print it out for debugging, it's probably
>> more useful to print the data that led to that CC.
>> If you want to save the CC, go off somewhere and do something else, and
>> restore the CC when you get back, that can be buggy
> 
> It's not going to be "buggy".
> It's simple and trivial.
> 
>> and make debugging difficult.
>> For me, it's better (where simple enough) to repeat the test that
>> produced the CC: the code is much clearer.
> 
> Why repeat the computation. That can be buggy,
> because some of the values used in arriving at the CC
> may have been changed in the meantime.
> 
>> If the test cannot be reproduced after the "something else", then it's
>> conceivable that the CC isn't even valid any more,
> 
> The CC can be restored trivially.
> 
>> and, of course,
>> debugging the original setting of that CC is likely to be difficult.
> 
> No it isn't.
> 
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Re: Getting the Last Condition code

[Alan Atkinson]

IPM?


ALAN ATKINSON |   SR. DIRECTOR SOFTWARE ARCHITECTURE
T 212 633 5313  | 
aatkin...@mediaocean.com<https://webmail.mediaocean.com/owa/redir.aspx?C=1_58sqLAcDTMwKZpc1tNXWVDQTlmH0jWAS1Lk8vIVfjzpmZ34jPUCA..=mailto%3aaatkinson%40mediaocean.com>
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From: IBM Mainframe Assembler List  on behalf 
of Gibney, Dave 
Sent: Thursday, December 6, 2018 5:36:02 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Getting the Last Condition code


 EXTERNAL


==
Branch (or Jump) on condition :)

> -Original Message-
> From: IBM Mainframe Assembler List [mailto:ASSEMBLER-
> l...@listserv.uga.edu] On Behalf Of esst...@juno.com
> Sent: Thursday, December 06, 2018 2:15 PM
> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
> Subject: Getting the Last Condition code
>
> Hi,I seeem to recall am instruction that returned the last/current condition
> code. Does any one Know the name of this instruction or its OP code ?
> .
> .
> Paul D'Angelo
> .
> .

Re: EX

[Alan Atkinson]

We do the same.
The relative halfword count is at +2 - so the instruction is 00
It's handy to see where exactly you died. And why.


On 8/6/18, 10:51 AM, "IBM Mainframe Assembler List on behalf of Paul 
Gilmartin"  wrote:
On 2018-08-06, at 08:35:57, Ed Jaffe wrote:

> We use 'Jxx *+2' which disturbs no registers and is guaranteed to fail 
with an 0C1.
>  
I am *not* going to read the PoOps to learn why that "is guaranteed
to fail".  I'm merely dismissing it as elitist opaque code.  Comments
help only slightly.

> On 8/6/2018 3:10 AM, Jonathan Scott wrote:
>> J *+1 isn't even possible, as the hardware offset for relative
>> addressing is in halfwords.
>> 
>> For many years I have been using a conditional TRAP macro which
>> is equivalent to
>> BC cond,*+1
>> but which is coded using LA with an ORG back to change the
>> opcode, to avoid getting an error message. This avoids a branch
>> in the normal case. It is primarily used for integrity and
>> consistency checks, and my recovery routine recognizes this
>> convention and reports it as "TRAP occurred at offset &1 in &2".
>>  
John Gilmore has argued, reasonably, in IBM-MAIN, for proper use
of the ABEND macro rather than such flamboyant stunts.

-- gil

Re: Instruction/Data Cache Usage (was EQU *)

[Alan Atkinson]

"Inline data is no more expensive than data in another page. In either case, 
the reference to the data requires a cache line load to the D-cache, but does 
not invalidate/disturb the I-cache"


Is that also now true for the target of an execute perchance?

We went through a whole exercise to get rid of all the


EX *+8

J *+??




in the code a few years back in the name of efficiency


We needed to do it after the way pipelining was handled changed between 
machines - it made a huge difference to performance inside a very very active 
chunk of code. It was enough to affect the entire machine throughput.


If I was mildly less demented I'd recall the machine versions (I'm sorta 
thinking going from a Z9 to a Z11) but it was a few years back.

If it's not necessary we can go back to being able to see what you meant to do 
without scrolling.

I haven't looked at MF architecture in a couple of years so I'm a bit behind 
the times in this area.

Re: storing and restoring condition code

[Alan Atkinson]

IPM and SPM work fine for this. We use it all the time.

Sent from my iPad

> On May 5, 2018, at 11:23 AM, Pieter Wiid  wrote:
> 
> Will only work in AMODE 24. 
> IPM is better
> 
> -Original Message-
> From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] 
> On Behalf Of robi...@dodo.com.au
> Sent: 05 May 2018 13:31
> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
> Subject: Re: storing and restoring condition code
> 
> BALR with second operand 0 will give you the condition code.
> 
> - Original Message -
> From: "IBM Mainframe Assembler List"  
> Sent:Sat, 5 May 2018 06:22:32 -0400
> 
> In 20+ years of heavy assembler coding, I never needed to store and  restore 
> the condition code, until now.
> 
> I have some 'standard' macros I use that allow me to turn some debug  code on 
> and off during testing. Yesterday, I was using some of this code  and had a 
> program failure due to the fact that it uses code that sets
> 
> the condition code. The program code has many places where a BALR  function 
> returns not a R15 value, but instead returns a condition code  setting.
> 
> So, what methods do some of you use that will equate to a save and  restore a 
> condition code? My code will be in a macro, so it can be a  little 
> 'dicey'/'unreadable' if needed.
> 
> --
> Tony Thigpen
> 
> 
> ---
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Re: SDWA - SDWACMPC conversion

[Alan Atkinson]

I lost half this thread, but wouldn't this whole deal be easier if you used a 
mix of SRL and SRDL in an even odd pair to separate the nibbles and then either 
a couple of OI's depending on the value of the nibble or a table "0-9A-F" to 
index into? That way you'd get the hex value to look up.


ALAN ATKINSON |   SR. DIRECTOR SOFTWARE ARCHITECTURE
T 212 633 5313  | 
aatkin...@mediaocean.com<https://webmail.mediaocean.com/owa/redir.aspx?C=1_58sqLAcDTMwKZpc1tNXWVDQTlmH0jWAS1Lk8vIVfjzpmZ34jPUCA..=mailto%3aaatkinson%40mediaocean.com>
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if received in error you should not copy or distribute. Email transmission 
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Any view expressed may not necessarily be the views of Mediaocean.

From: IBM Mainframe Assembler List <ASSEMBLER-LIST@LISTSERV.UGA.EDU> on behalf 
of Seymour J Metz <sme...@gmu.edu>
Sent: Friday, April 13, 2018 10:02:09 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: SDWA - SDWACMPC conversion

Unpacking x'0123' gives you x'F0F132'; the OI then gives you x'F0F1F2'; what 
you want is x'F0F1F2F3'. Or with an UNNPK length of 4 you get x'F0F0F1F2'; 
still not what you want.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Assembler List <ASSEMBLER-LIST@listserv.uga.edu> on behalf 
of Keven <k...@k3n.us>
Sent: Thursday, April 12, 2018 7:40 PM
To: ASSEMBLER-LIST@listserv.uga.edu
Subject: Re: SDWA - SDWACMPC conversion





“Keep in mind that UNPK swaps bits 0-3 of the right byte with 
bits 4-7.”
That’s why the Or Immediate is there; it enforces a zone nibble of 0xF for the 
last hex digit and ensures correct execution of the TRanslate.









On Thu, Apr 12, 2018 at 3:00 PM -0500, "Seymour J Metz" <sme...@gmu.edu> wrote:










Keep in mind that UNPK swaps bits 0-3 of the right byte with bits 4-7.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Assembler List  on behalf of Keven
Sent: Wednesday, April 11, 2018 4:15 PM
To: ASSEMBLER-LIST@listserv.uga.edu
Subject: Re: SDWA - SDWACMPC conversion





Good point; I should have stuck with HEXTBL-240 but I decided 
last minute that hexadecimal notation would make for a better aesthetic and for 
some reason X’C0’ stepped forward instead of the apposite value.
Using the UNPK/OI does mean no reading past the last byte of the value to be 
converted which may be desirable for a generalized implementation.
Keven









On Fri, Apr 6, 2018 at 9:22 AM -0500, "J R"  wrote:










As you're concerned with robustness, it might be better to address the 
translate table thus:

 TRZONED,HEXTBL-X'F0'X'C1C2C3'

> On Apr 5, 2018, at 18:29, Keven  wrote:
>
> TRZONED,HEXTBL-X'C0'X'C1C2C3'

Re: Two string instruction questions

[Alan Atkinson]

Yeah  - mea culpa. It's been years since I looked at that code. We escaped our 
search strings and then looked for the opening character.
You might still do better to do an SRST / CLC loop.


On 3/15/18, 11:04 AM, "IBM Mainframe Assembler List on behalf of Charles 
Mills" <ASSEMBLER-LIST@LISTSERV.UGA.EDU on behalf of charl...@mcn.org> wrote:

Nothing, so far as I know. :-)

But it finds only a single character and not a substring in a string; a 
needle in a haystack, to use the Rexx idiom.

For finding a single character in a string, SRST is almost undoubtedly 
faster than TRT. For finding either of two characters, hard to say, but I am 
going to guess SRST is still faster.

Charles


-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] 
On Behalf Of Alan Atkinson
Sent: Thursday, March 15, 2018 7:32 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Two string instruction questions

Am I missing something? What's wrong with SRST?


On 3/15/18, 10:28 AM, "IBM Mainframe Assembler List on behalf of Charles 
Mills" <ASSEMBLER-LIST@LISTSERV.UGA.EDU on behalf of charl...@mcn.org> wrote:

Traditional, but not anywhere near optimally quick.

1. Read the Wikipedia article @Gil linked to. There are faster ways 
than the
obvious way.

2. TRT is a single op code but that does not make it "fast." Picture an
assembler loop to do what TRT does. Not very fast, right? Now picture 
the
same loop in millicode. Still not very fast. That's TRT. Millicode is 
not
magic; it's more or less machine code running under the covers. SRST is
probably considerably faster (although still not magically fast, and not
case-insensitive as TRT potentially is). On the other hand, "it 
depends";
and cache misses are what is slow -- instructions themselves hardly 
matter.

Charles


-Original Message-
From: IBM Mainframe Assembler List 
[mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Robin Vowels
Sent: Wednesday, March 14, 2018 7:32 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Two string instruction questions

From: "Charles Mills" <charl...@mcn.org>
Sent: Thursday, March 15, 2018 2:51 AM


> 1.   Is there a machine instruction that will find one string 
within
> another? That given "Now is the time" and "is" would find the "is" 
and 
> return a pointer to it? A machine instruction analog of Rexx POS?
> 
> 2.   Searching the PoOp for such an instruction led me to CUSE. It
does
> not seem that CUSE could be used for this - is that correct? If I am 
> reading CUSE correctly, then given "Now is the time", "All is well" 
> and 2 or 3 would return the position of "is". Is my reading correct? 
> What would that be good for? What would be a reasonable real-world 
use?

The traditional TRT to search for the first letter, followed by CLC for 
the
word (for which the search can commence at the second letter, because 
the
first letter has already been found), will likely be the quickest.

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Re: Two string instruction questions

[Alan Atkinson]

Am I missing something? What's wrong with SRST?


On 3/15/18, 10:28 AM, "IBM Mainframe Assembler List on behalf of Charles 
Mills"  wrote:

Traditional, but not anywhere near optimally quick.

1. Read the Wikipedia article @Gil linked to. There are faster ways than the
obvious way.

2. TRT is a single op code but that does not make it "fast." Picture an
assembler loop to do what TRT does. Not very fast, right? Now picture the
same loop in millicode. Still not very fast. That's TRT. Millicode is not
magic; it's more or less machine code running under the covers. SRST is
probably considerably faster (although still not magically fast, and not
case-insensitive as TRT potentially is). On the other hand, "it depends";
and cache misses are what is slow -- instructions themselves hardly matter.

Charles


-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Robin Vowels
Sent: Wednesday, March 14, 2018 7:32 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Two string instruction questions

From: "Charles Mills" 
Sent: Thursday, March 15, 2018 2:51 AM


> 1.   Is there a machine instruction that will find one string within
> another? That given "Now is the time" and "is" would find the "is" and 
> return a pointer to it? A machine instruction analog of Rexx POS?
> 
> 2.   Searching the PoOp for such an instruction led me to CUSE. It
does
> not seem that CUSE could be used for this - is that correct? If I am 
> reading CUSE correctly, then given "Now is the time", "All is well" 
> and 2 or 3 would return the position of "is". Is my reading correct? 
> What would that be good for? What would be a reasonable real-world use?

The traditional TRT to search for the first letter, followed by CLC for the
word (for which the search can commence at the second letter, because the
first letter has already been found), will likely be the quickest.

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Re: Table Searchig with a Mask

[Alan Atkinson]

The time to do compares is likely to pale into insignificance compared to 
looping around a two dimensional unsorted array, unless the sizes are trivial...

I'd be inclined to have a cli/clc pair for each element. 
I'd also be thinking hard about sorting or indexing the array being searched. 


Sent from my iPad

> On Jun 17, 2017, at 1:15 PM, retired mainframer  
> wrote:
> 
> If asterisks will only appear in the first position of a field, you could
> use a TRT instruction to determine if (and where) an asterisk appears.  If
> one does appear, the position would let you "calculate" which field it
> appears in so you can move the corresponding data into the compare operand.
> If more than one field of a table entry can contain an asterisk, you would
> need to repeat the test until no asterisks remained.
> 
> If your outer loop is over the table elements and your inner loop is over
> the structure data, then I would set a flag for each field of the table
> containing an asterisk.  Then you need only test the flags to determine
> which structure data needs to be copied to the compare operand.
> 
> But if you have to do I/O for the structure data, you may want the opposite
> loop order so you would read each structure element only once.  If the
> number of entries in the Acceptable Values table is reasonable, you could
> preprocess them into an array of flags and avoid multiple I/Os for that data
> also.
> 
>> -Original Message-
>> From: IBM Mainframe Assembler List [mailto:ASSEMBLER-
>> l...@listserv.uga.edu] On Behalf Of esst...@juno.com
>> Sent: Saturday, June 17, 2017 8:55 AM
>> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
>> Subject: Table Searchig with a Mask
>> 
>> Hi everyone
>> 
>> I would like some help in reducing the number of instructions required to
> search a table.
>> The table is in no particular order, so a Binary Search may not be
> appropriate here.
>> .
>> .
>> I will try to explain this.
>> .
>> I have a structure with X number of fields
>> For this example lets assume:
>> STRUCTUREEQU *
>> USERID   DS CL8
>> COMPANY_CODE DS CL4
>> JOB_NAME DS CL8
>> FILE DS CL8
>> 
>> I also have an Array (table) of Acceptable Values with the same elements
>> as my structure.
>> I can search the table using a single compare for a length of 28.
>> .
>> .
>> However some of the table entries contain an asterisk "*" in the first
> position of
>> the respective field. The asterisk means to accept any value from the
> structure.
>> For Example:
>> ARRAY EQU  *
>> TUSERID   DC CL8'JOSEPH  '
>> TCOMPANY_CODE DC CL4'*   '
>> TJOB_NAME DC CL8'REPORT  '
>> TFILE DC CL8'*   '
>> .
>> In order to search the table using a single compare instruction, I would
> need to overlay
>> the respective elements in the structure with the Asterisk from the
> corresponding element
>> in the Array Table Entry.
>> .
>> This would mean I would need to compare each element in the ARRAY entry
> for the
>> Asterisk,
>> and if present move the corresponding field to the structure.
>>   CLI TCOMPANY_CODE,=C'*'
>>   JNE NEXT_ELEMENT
>>   MVC COMPANY_CODE,TCOMPANY_CODE
>> .
>> I prefer not to test each element in the ARRAY for an Asterisk and Move
> them individually
>> to the structure, prior to comparing the structure with the Array Entry.
>> .
>> I'm not aware of any instruction that will move selectively all fields
>> with an Asterisk "*". Which Is what I am looking for, then I can use a
> single move
>> or four Moves and continue to use a single compare instruction.
>> .
>> Again I'm looking for the fewest amount of instructions to accomplish
> this.
>> .
>> What Alternatives are there ?
>> A long time ago I did see someone do something similar with a Translate
> and Test.
>> But again this is several iterations of TRT and a Move for each Array
> element.
>> .
>> 
>> Thank You
>> Paul D'Angelo
>> 

Re: Using ORG like CNOP

[Alan Atkinson]

Right I remember vaguely - one of those things one just copies and pastes - we 
use the csect in there to turn it into a displacement.

More like org csect + (((*-csect)+7)/8)

If that's not it I'll pull one tomorrow.
We use it to round stuff up to page boundaries all over.

Sent from my iPad

> On Nov 27, 2016, at 8:31 PM, Charles Mills <charl...@mcn.org> wrote:
> 
> Yeah, I have done this in the past somehow with that kind of cleverness, but
> it looks like the fancy new three-operand ORG instruction is intended for
> exactly this problem.
> 
> (*+7)/8 can't be right -- you are dividing * by 8 which can't be right --
> but yes, I get the idea. 
> 
> Charles
> 
> -Original Message-
> From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
> On Behalf Of Alan Atkinson
> Sent: Sunday, November 27, 2016 5:21 PM
> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
> Subject: Re: Using ORG like CNOP
> 
> I'm doing this from memory - I can't face logging in. 
> If I mess it up let me know and I'll pull one tomorrow from a listing.
> 
> IIRC something like org (*+7)/8 will do it.
> 
> 
> Sent from my iPad
> 
>> On Nov 27, 2016, at 8:14 PM, Charles Mills <charl...@mcn.org> wrote:
>> 
>> I have a DSECT where I want to define a fullword such that the next 
>> address after the fullword will be on a doubleword boundary. I would 
>> like the alignment to be independent of the preceding alignment (be
> change-proof).
>> 
>> CNOP 4,8 would do exactly what I want, but CNOP seems inappropriate in 
>> non-executable code.
>> 
>> I naively coded ORG *,8,-4. As luck would have it the existing 
>> alignment was six bytes into a doubleword and so that ended up effectively
> being ORG *-2.
>> 
>> How do I use ORG to accomplish what I want? Can I use something like 
>> what I coded but always have it ORG forwards and never backwards? I 
>> could probably figure this out but hoped there was someone here who 
>> knew the answer right off.
>> 
>> Or should I shut up and use CNOP: "If it ain't broke, don't fix it."
>> 
>> Charles 

Re: Using ORG like CNOP

[Alan Atkinson]

I'm doing this from memory - I can't face logging in. 
If I mess it up let me know and I'll pull one tomorrow from a listing.

IIRC something like org (*+7)/8 will do it.


Sent from my iPad

> On Nov 27, 2016, at 8:14 PM, Charles Mills  wrote:
> 
> I have a DSECT where I want to define a fullword such that the next address
> after the fullword will be on a doubleword boundary. I would like the
> alignment to be independent of the preceding alignment (be change-proof).
> 
> CNOP 4,8 would do exactly what I want, but CNOP seems inappropriate in
> non-executable code. 
> 
> I naively coded ORG *,8,-4. As luck would have it the existing alignment was
> six bytes into a doubleword and so that ended up effectively being ORG *-2.
> 
> How do I use ORG to accomplish what I want? Can I use something like what I
> coded but always have it ORG forwards and never backwards? I could probably
> figure this out but hoped there was someone here who knew the answer right
> off.
> 
> Or should I shut up and use CNOP: "If it ain't broke, don't fix it."
> 
> Charles 

Re: Displaying port nr in decimal

[Alan Atkinson]

Can't you just cvd, oi the last byte with x'0f' and unpack(5). 
Or are you looking for something more sophisticated where you trim leading 
zeros and left align?

 

From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf 
of Elardus Engelbrecht [elardus.engelbre...@sita.co.za]
Sent: Monday, October 26, 2015 10:14 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Displaying port nr in decimal

To all,

My oh my, I can't believe my Assembler skills are that rusty!

But here is the challenge. With this snippet, I could show the Remote Port from 
SMF record type 118 in decimal.

I'm feeling my code, while working as designed, is not that optimal, especially 
usage of R11, Double Word and too long edit field.

 SLR   R11,R11  CLEAR
 MVC   DWORD,R11CLEAR DWORD
 MVC   DWORD+2(2),SMF118TRP.MOVE PORT
 L R11,DWORD   .
 CVD   R11,DWORD   .CONVERT TO DECIMAL
 MVC   EDWORK2,EDMASK2
 EDEDWORK2,DWORD+2
 MVC   OUTTRP,EDWORK2  .MOVE REMOTE PORT
*
DWORDDSD
EDWORK2  DCXL12'00'
EDMASK2  DCXL12'202020202020202020202020'
*
OUTTRP   DSXL12   .REMOTE PORT NUMBER
*
SMF118TRP DS   XL2.REMOTE PORT NUMBER

This is the display I got, but as you can see, I'm wasting bytes in the output. 
I want to trim the output from 12 bytes to 5 columns (max port nr is 65535).

REMOTE PORT
DCDDEC4DDDE
95463507693

   1218
2222
00012180

Is there a more elegant way to do above? (z/OS v1.13 and v2.1)

Perhaps with CVD and UNPK and OI instructions?

Please and many thanks on advance.

Groete / Greetings
Elardus Engelbrecht

Re: Defunct? (Was: ASSEMBLER-LIST Digest)

[Alan Atkinson]

button type=buttonLike/button

There you go. 

Although on second thoughts with this lot, this will probably set off an 
argument as to how the html isn't properly formed and it won't work as 
written...



-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of mar...@pi-sysprog.de
Sent: Wednesday, October 01, 2014 10:36 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Defunct? (Was: ASSEMBLER-LIST Digest)

 No.

But it sure is missing the like button

--
Martin

Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at 
http://www.picapcpu.de

Re: Can Someone Point Out My error Here

[Alan Atkinson]

any access registers?


From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf 
of esst...@juno.com [esst...@juno.com]
Sent: Sunday, August 17, 2014 4:24 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Can Someone Point Out My error Here

Im executing 5 Instructions and then I force an Abend.
I load the address of a storage area into Register 1 nd verify it by the 
presence of an eye-catcher.
After executing the 5 instructions below; I expect the area Labeled LOCLCOMM 
to contain a copy of the eye-catcher that Register 1 is pointing to. However 
after execiting the 5 instructions the area LOCLCOMM contains 256 Binary zeroes 
???
.
.
There is No Multi Tasking as this is a single TCB program.
.
.
 L R1,ANCHOR1@ Storage Anchor Address
 CLC   STATIC_EYE,00(R1)  Valid Eye Catcher
 JNE   NO_STATIC_EYE  NO Eye-Catcher
*  LARL  
R14,LOCLCOMM DEBUG
 MVC   00(16,R14),00(R1)DEBUG
 ABEND 444,DUMP,STEPDEBUG
*
*
*
 DS  0D   Alignment
 DC  CL8'LOCLCOMM' Eye Catcher
LOCLCOMM DS  CL256
 DC  CL12'LOCLCOMMEND 'Eye Catcher
ORG ,
.
.
So what Am I missing here ?
Can someone point out my mistake ?
.
.
Paul

Re: SNAP macro for storage above the 2G bar?

[Alan Atkinson]

Plain text account / passwords in the dump perhaps?

IMO it's silly, but then I don't work there...


-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of DASDBILL2
Sent: Friday, August 15, 2014 10:44 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: SNAP macro for storage above the 2G bar?

Apparently this bank then allows anyone to access anyone else's data sets, so 
they must also forbid anyone's using TSO, ISPF, or any other software that 
could possibly access a data set. 
There may be a different reason than what is stated, but the stated reason is 
palpably absurd. 
  
Bill Fairchild 

- Original Message -

From: John Gilmore jwgli...@gmail.com
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Sent: Friday, August 15, 2014 9:10:33 AM
Subject: Re: SNAP macro for storage above the 2G bar? 

Sam Siegel wrote: 

begin extract
I work at a bank and IPCS is restricted to use by systems staff. 
Application staff cannot use IPCS. 
/end extract 

This is sad; and, sadly, it is not uncommon.  It is nevertheless indefensible. 

One protects data, not tools; and failure to understand and make this 
distinction is prima facie evidence of technical incompetence 

John Gilmore, Ashland, MA 01721 - USA 

Re: Subtasking program

[Alan Atkinson]

It's called a producer consumer pattern.
It's directly applicable here - the producer creates the work and the 
consumer(s) process it.

Consumers can either be in separate address spaces or attached subtasks. 
It doesn't matter for purposes of what they are doing.

You - as it says below - link them with a queue.
You can use MQ, or USS queues (forget what they are called - it's been a while 
since I wrote anything using USS) to do this if you don't want to write your 
own queueing implementation.

MQ has the advantage that it handles a lot of the concurrency concerns.
You can hang multiple consumers off a queue and it will post all the waiting 
ECBs when input arrives. The first one to wake up and start work will get the 
message and carries on, the rest should just loop back to wait.

We've used this in this manner in a few places. I don't have access to TSO from 
where I am or I'd post the control loop.



From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf 
of Farley, Peter x23353 [peter.far...@broadridge.com]
Sent: Thursday, July 24, 2014 10:43 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Subtasking program

Tony,

I am also not aware of any specific examples out in the wild.  However, you may 
have some luck examining the area that the CS kids call design patterns.  
These patterns mostly seem to be applied to object-oriented programming, but 
the principles are the same for z/OS subtasking, just translate what they call 
thread to subtask and the paradigms pretty much still apply.

Here is one paradigm I have used successfully

Feeder (sub)task:

Wait for input (and maybe a normal termination ECB as well)
Receive input
Lock the queue
Add item to be processed to the queue (usually FIFO, YMMV)
Unlock the queue
POST ECB's for *all* reader tasks if they are not already posted (PoOP has a 
good example of this kind of POST in the Instruction Examples appendix)
Loop to wait for new input

Eater (sub)tasks(s):

Wait on unique ECB posted by Feeder (and maybe a normal termination ECB as well)
Clear the ECB
Lock the queue
Pop first item off the queue (or last, or whatever queue processing you need to 
get one item)
Unlock the queue
Process the item
Loop to wait for more input

Lock the queue itself can have another WAIT (ECB or timed WAIT) embedded for 
the queue to be available, but there are some good queue lock management 
algorithms out there, and IIRC PoOP has some good queue serialization examples 
in the Instruction Examples appendix.

You also need initialization logic in the eater (sub)tasks(s) to wait until the 
feeder subtask finishes setting up the initial queue structure.  The feeder 
would post all eater ECB's once after initialization so they can finish their 
own initializations after the queue is initialized.

The feeder (sub)task termination logic (normal or abnormal) needs to decide 
what to do if there are un-processed items left in the queue at termination.  
Similarly the eater (sub)task abnormal termination logic needs to decide if it 
should (or can) return the partially processed item to the queue and what to do 
with the item if it cannot be returned to the queue.

HTH

Peter


-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of Tony Thigpen
Sent: Thursday, July 24, 2014 8:51 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Subtasking program

  May be faster to have the main build a queue of records and let the
subtasks
  feed themselves. There are interesting serialization concerns with
multiple
  eaters. The feeder can post all waiting tasks when food is available.


I know this is a very old thread...

I have been re-reading it simply because I am looking for a better way.

Does anybody know of any real good documentation on subtask usage as it
relates to, what Binyamin called, single feeder, multiple eater
processing? Including the queuing of requests.

Or examples. I have scanned the CBT tape, but I did not spot any that
indicated they used such.

Tony Thigpen

-Original Message -
  From: Binyamin Dissen
  Sent: 04/10/2011 11:51 AM
 On Sun, 10 Apr 2011 06:23:15 -0400 Joe Owens joe_ow...@standardlife.com
 wrote:

 :After such a great response to my last post, I thought I would try here
 :again for some useful advice on the best design for a program I am about to
 :write.
 :I have a mainline program that reads an input file and will then pass a
 :record to a subtask to process.

 May be faster to have the main build a queue of records and let the subtasks
 feed themselves. There are interesting serialization concerns with multiple
 eaters. The feeder can post all waiting tasks when food is available.

 :The subtask has a work cycle
 :MQPUT messsage
 :MQGET message (with wait option, by corellid, gets the response message)
 :write message to preopened output file.
 :When the mainline program wishes to send another message, it must 

Re: ASSEMBLER-LIST Digest - 24 Mar 2014 to 25 Mar 2014 (#2014-55)

[Alan Atkinson]

From the OED:
Arcane: adjective: Understood by few; mysterious or secret

And IBM Assembler ~isn't~ arcane?
:rolleyes:


-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of John Walker
Sent: Wednesday, March 26, 2014 9:08 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: ASSEMBLER-LIST Digest - 24 Mar 2014 to 25 Mar 2014 (#2014-55)

Well, I went a bit over the top in terms of my response.  And thanks for polite 
responses.  Having dealt with the emotions, I'll try to be more logical.  
Regular expressions may be able to do stuff, and again I emphasize my distant 
acquaintanceship with it, but I dislike arcane languages and regular 
expressions is nothing but arcane.  WIdely accepted, well, yes, but only in the 
same way that Cobol once was, and with the same rationale.  Everyone uses it. 
 So?  That doesn't promote anything well.  It just says, 'lot's of us use it, 
so we aren't going to change our minds.'.  It also means the argument I give is 
moot.  I just greatly dislike complicated things when they don't need to be.  
And rexx really does do things in a vastly simpler way than regular 
expressions.  I don't mean unix rexx, I mean mainframe rexx.  I created 
self-reprogramming interpreted rexx programs which followed logic chains that I 
gave them how to reprogram themselves.  And parsing  played a big part i!
 n it.  And I coul never conceivably have done that with regular expressions.  
So, enjoy complexity at the expense of ease of use.

On Tue, 3/25/14, Automatic digest processor lists...@listserv.uga.edu wrote:

 Subject: ASSEMBLER-LIST Digest - 24 Mar 2014 to 25 Mar 2014 (#2014-55)
 To: Recipients of ASSEMBLER-LIST digests ASSEMBLER-LIST@LISTSERV.UGA.EDU
 Date: Tuesday, March 25, 2014, 11:05 PM

 ASSEMBLER-LIST Digest - 24 Mar 2014
 to 25 Mar 2014 (#2014-55)





 LISTSERV at the University of Georgia





















 ASSEMBLER-LIST Digest - 24 Mar 2014 to 25 Mar 2014
 (#2014-55)

 Table of contents:

 ASSEMBLER-LIST Digest - 22
 Mar 2014 to 24 Mar 2014 (#2014-54)
 Another Article On Lagging
 Mainframe Skills (3)
 Automatische Antwort:
 Another Article On Lagging Mainframe Skills  Wrapping it up (2)


 ASSEMBLER-LIST Digest - 22
 Mar 2014 to 24 Mar 2014 (#2014-54)
 Re: ASSEMBLER-LIST Digest
 - 22 Mar 2014 to 24 Mar 2014 (#2014-54) (03/25)
 From: John Walker jwalker...@yahoo.com  Another Article On Lagging  
Mainframe Skills
 Re: Another Article On
 Lagging Mainframe Skills (03/25)
 From: Farley, Peter x23353
 peter.far...@broadridge.com
 Re: Another Article On
 Lagging Mainframe Skills (03/25)
 From: Ze'ev Atlas zatl...@yahoo.com
 Re: Another Article On
 Lagging Mainframe Skills (03/24)
 From: Michael McCawley
 mikedba...@gmail.com
 Automatische Antwort:
 Another Article On Lagging Mainframe Skills  Automatische Antwort:
 Another Article On Lagging Mainframe Skills (03/25)
 From: Lenz Boris boris.l...@axa-tech.com  Wrapping it up  Wrapping it up
 (03/25)
 From: Steve Comstock st...@trainersfriend.com
 Re: Wrapping it up
 (03/25)
 From: John Ehrman ehr...@us.ibm.com






 Browse the ASSEMBLER-LIST
 online archives.

Re: Linear search vs binary

[Alan Atkinson]

Someone at our place came up with a fairly slick solution for this about 30 
years ago.
Design was to get around paging and a desire to not allocate multiple buffers 
for a dynamic table in a TP system. Another one we use daily.

One large block. Key data is pulled from the record and built into a sorted 
binary searchable table with entry length of key + 3 at the top of the buffer. 
Inserts move end of table down. The + 3 is the displacement to the rest of the 
record minus the key. First two bytes of record are length of non key portion.

This is inserted into the same block, filling from the bottom up. When the 
pointers intersect the table is full. We can reorganize if necessary at that 
point to fill holes from deletes.

Careful tuning means we don't hit this often.


We have one other that we use for very large tables that are fairly static and 
built mostly up front. We cache security info in it.

Here we build a sorted array but add space for a forward pointer. On completion 
we turn the array into a linked list with each pointer linked to the entry's 
neighbor.

Initial search is binary, but if pointer  next then we traverse list for 
insert point. A CS is all it takes for an add - out of sequence stuff is shoved 
in next free slot in overflow.

That too works well for our use case.



Sent from my iPad

 On Oct 24, 2013, at 5:45 PM, Tony Thigpen t...@vse2pdf.com wrote:

 After a couple of posts about my post, I will go back to my point.

 You can only binary search a fixed length table. If you create an index
 table, the index table is the actual table being searched, not the
 original table.

 Now, Robert does have mention a neet trick where the fixed table
 contains a refference pointer to the actual data to be compared. But,
 the pointer table is still a fixed length table. :-)

 You just can't binary search a variable length table.

 Tony Thigpen

 -Original Message -
 From: Robert A. Rosenberg
 Sent: 10/24/2013 05:12 PM
 At 12:45 -0400 on 10/24/2013, Tony Thigpen wrote about Re: Linear
 search vs binary:

 All entries will be fixed length. Can't really have variable length and
 use a binary search.

 That depends. If the table you are sorting is a table of pointers to
 the actual data (and is ordered by the compare field), the entries
 can be variable length so long as the compare field is fixed length
 and is preceded by an entry length field. You use the pointer to find
 the compare field of an entry and once you find the correct entry,
 you back up to the location of the entry length and can then use the
 entry.

Re: Linear search vs binary

[Alan Atkinson]

Glad you got some use out of it.
It's a pretty simplistic implementation, but sufficient for our needs.

Although based on how rapidly the discussion veered into other languages I 
thought I'd missed your point somehow.




Sent from my iPad

 On Oct 23, 2013, at 9:43 AM, Dougie Lawson dl1...@gmail.com wrote:

 Hi Alan,

 I found some test data.

 I found a ready written IMS macro to sort my test data (which was a real
 bonus).

 And I got your code sample to run and get the right answer.

 Thank you - I owe you a virtual beer.

 To all the other correspondents - thank you - a simple request has
 generated some extremely lively discussion (from some of the usual
 suspects).

 Dougie

Re: Linear search vs binary

[Alan Atkinson]

Leaving aside hashing and suchlike, we've used this for a while in multiple 
places.
It's a ripoff of the C binsrch algorithm in the Tenenbaum data structures book, 
so there's nothing ~that~ proprietary about it.

I edited it to take out our specific stuff, so check carefully as I may have 
missed a variable.
I'm sure it's easy to rip apart from an elegance standpoint, but it does what 
it says on the tin well enough.
I removed all our site specific macros, so you should be able to adapt it 
easily enough.

***
* BINARY SEARCH FOR REQUESTED TABLE ENTRY *
* NTRY: R1: KEY TO FIND   *
* EXIT: FULL: A(RECORD)  - CC:EQ*
*   FULL: A(INSERTION POINT) - CC:NEQ   *
***
 SPACE 1
BSRCHuse your favorite register preserving macro
 LRR4,R1   R4 = A(KEYARG)
 L R5,=A(YOUR TABLE)  R5 = A(START OF DATA)
 L  R0,=A(length of table)   R0 = LENGTH OF DATA IN 
BUFFER
 SRDL  R0,32
*
 LHIRF,l'single entry RF = LENGTH OF SINGLE ENTRY
 DRR0,RF
 CHI   R1,6
 BLSQSRCH  LESS THAN 6 - DO SEQUENTIAL SEARCH
*
 XRR0,R0   R0 = LOW
 BCTR  R1,0R1 = HIGH
 LHIRE,l'key-1RE = L'KEY-1
*
BSRCH02  CRR0,R1   WHILE LOW = HIGH
 BHBSRCH04 R0 POINTS TO INSERTION POINT
*
 LRR3,R0   R3 = MID
 ARR3,R1
 SRL   R3,1MID=(HIGH+LOW)/2
*
 LRRF,R3
 MHRF,ISKEYLN4
 ARRF,R5   RF=A(TEST ENTRY)
*
 EXRE,BSMTCH   TRY TO MATCH KEY
 BEBSXIT   KEY == K(MID)
*
 BL*+12
 LAR0,1(R3)IF CC HIGH : LOW = MID+1
 B BSRCH02
*
 LRR1,R3   IF CC LOW : HIGH = MID-1;
 BCTR  R1,0
 B BSRCH02
*
BSRCH04  LRRF,R0
 MHRF,ISKEYLN4
 ARRF,R5
 B BSXIT
*
SQSRCH   L RF,=A(YOUR TABLE)

 L R1,=A(YOUR TABLE)
 AR1,=a(l'table)
 AHIR1,l'entry R1 = A(LAST ENTRY)
*
 LHIR0,l'entry R0 = L'ENTRY
 LHIRE,l'key-1 RE = L'KEY-1
*
SSRCH02  EXRE,BSMTCH   TRY TO MATCH KEY
 BNH   BSXIT
 BXLE  RF,R0,SSRCH02
 DCH'0'
*
BSMTCH   CLC   0(0,R4),0(RF)   COMPARE REQUESTED KEY WITH RECORD
*
BSXITSTRF,FULL
   restore your registers

-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of Rob van der Heij
Sent: Monday, October 21, 2013 7:50 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Linear search vs binary

If you want to make it 4096 entries, you could step through the table with 
binary search very cheap by shifting a mask on each pass. I would already think 
about it with 35 entries... ;-)


On 21 October 2013 13:32, Dougie Lawson dl1...@gmail.com wrote:

 If I have a table of 3,500 entries of twelve bytes (I'm doing a
 compare of eight bytes to find the entry I'm looking for and a check
 on a half word marker for the end of the table to avoid running off
 the end) then is it worth the pain of re-writing it as a binary search.

 If it is worth the pain and does anyone have a sample binary search
 tucked away.

 The table is built into a CSECT at the bottom of my code. I can
 restructure it if we need any special pointers to make a binary search work.

 Dougie

Re: Linear search vs binary

[Alan Atkinson]

Bad edit - sorry.
SQSRCH   L RF,=A(YOUR TABLE)

 L R1,=A(YOUR TABLE)
 AR1,=a(l'table)
 AHIR1,l'entry R1 = A(LAST ENTRY)

Should be
SQSRCH   L RF,=A(YOUR TABLE)

 L R1,=A(YOUR TABLE)
 AR1,=a(l'table)
 AHIR1,-l'entry R1 = A(LAST ENTRY)

The code's from 98. All our lengths are in literals and I added the immediate 
instructions when I amended it.
Type in haste, repent at leisure. Mea culpa.


-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of Alan Atkinson
Sent: Monday, October 21, 2013 8:35 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Linear search vs binary

Leaving aside hashing and suchlike, we've used this for a while in multiple 
places.
It's a ripoff of the C binsrch algorithm in the Tenenbaum data structures book, 
so there's nothing ~that~ proprietary about it.

I edited it to take out our specific stuff, so check carefully as I may have 
missed a variable.
I'm sure it's easy to rip apart from an elegance standpoint, but it does what 
it says on the tin well enough.
I removed all our site specific macros, so you should be able to adapt it 
easily enough.

***
* BINARY SEARCH FOR REQUESTED TABLE ENTRY *
* NTRY: R1: KEY TO FIND   *
* EXIT: FULL: A(RECORD)  - CC:EQ*
*   FULL: A(INSERTION POINT) - CC:NEQ   *
***
 SPACE 1
BSRCHuse your favorite register preserving macro
 LRR4,R1   R4 = A(KEYARG)
 L R5,=A(YOUR TABLE)  R5 = A(START OF DATA)
 L  R0,=A(length of table)   R0 = LENGTH OF DATA IN 
BUFFER
 SRDL  R0,32
*
 LHIRF,l'single entry RF = LENGTH OF SINGLE ENTRY
 DRR0,RF
 CHI   R1,6
 BLSQSRCH  LESS THAN 6 - DO SEQUENTIAL SEARCH
*
 XRR0,R0   R0 = LOW
 BCTR  R1,0R1 = HIGH
 LHIRE,l'key-1RE = L'KEY-1
*
BSRCH02  CRR0,R1   WHILE LOW = HIGH
 BHBSRCH04 R0 POINTS TO INSERTION POINT
*
 LRR3,R0   R3 = MID
 ARR3,R1
 SRL   R3,1MID=(HIGH+LOW)/2
*
 LRRF,R3
 MHRF,ISKEYLN4
 ARRF,R5   RF=A(TEST ENTRY)
*
 EXRE,BSMTCH   TRY TO MATCH KEY
 BEBSXIT   KEY == K(MID)
*
 BL*+12
 LAR0,1(R3)IF CC HIGH : LOW = MID+1
 B BSRCH02
*
 LRR1,R3   IF CC LOW : HIGH = MID-1;
 BCTR  R1,0
 B BSRCH02
*
BSRCH04  LRRF,R0
 MHRF,ISKEYLN4
 ARRF,R5
 B BSXIT
*
SQSRCH   L RF,=A(YOUR TABLE)

 L R1,=A(YOUR TABLE)
 AR1,=a(l'table)
 AHIR1,l'entry R1 = A(LAST ENTRY)
*
 LHIR0,l'entry R0 = L'ENTRY
 LHIRE,l'key-1 RE = L'KEY-1
*
SSRCH02  EXRE,BSMTCH   TRY TO MATCH KEY
 BNH   BSXIT
 BXLE  RF,R0,SSRCH02
 DCH'0'
*
BSMTCH   CLC   0(0,R4),0(RF)   COMPARE REQUESTED KEY WITH RECORD
*
BSXITSTRF,FULL
   restore your registers

-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of Rob van der Heij
Sent: Monday, October 21, 2013 7:50 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Linear search vs binary

If you want to make it 4096 entries, you could step through the table with 
binary search very cheap by shifting a mask on each pass. I would already think 
about it with 35 entries... ;-)


On 21 October 2013 13:32, Dougie Lawson dl1...@gmail.com wrote:

 If I have a table of 3,500 entries of twelve bytes (I'm doing a
 compare of eight bytes to find the entry I'm looking for and a check
 on a half word marker for the end of the table to avoid running off
 the end) then is it worth the pain of re-writing it as a binary search.

 If it is worth the pain and does anyone have a sample binary search
 tucked away.

 The table is built into a CSECT at the bottom of my code. I can
 restructure it if we need any special pointers to make a binary search work.

 Dougie

Re: 3 job openings for mainframe Assembler/C programmers, dump readers

[Alan Atkinson]

Share.org
They run (or did a couple of years ago when I last went to one) classes in ISPF 
that are quite informative.

-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of Don V Nielsen
Sent: Thursday, July 25, 2013 8:45 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: 3 job openings for mainframe Assembler/C programmers, dump readers

Where might one one find good instruction on how to read a dump?  This is 
probably my poorest skill and I should be better at it.


On Wed, Jul 24, 2013 at 10:46 PM, William H. Blair wmhbl...@comcast.netwrote:

 This is being posted with the permission of the list owner. (My
 sincere thanks, Jean!)

 The infrastructure team I work with has three openings for mainframe
 developers and/or product support personnel who have experience with
 any useful combination of the following: Assembler, C, dump reading,
 SMP/E, security systems (RACF/ACF2/TSS), etc. We are looking for
 people who can read dumps (at least a little bit), write code to fix
 bugs, and develop new stuff in Assembler and/or C. We assume you know
 JCL, TSO, ISPF, how to get around an MVS system, and read IBM doc. If
 you are not a self-starter, please don't bother (we're not going to do
 your job for you, and in many cases the only documentation that exists
 is the code itself). It's OK to have to refer to POPS to make sure you
 know how something works, but if you can't understand it or won't use
 it, please don't bother. These positions do NOT require specific MVS
 subsystem knowledge (JESn, IMS, DB2, CICS, etc.), but if you have any
 we won't hold it against you (other groups concern themselves with
 those things). We deal with common, core, bare-metal MVS services for
 the most part.

 In other words, these jobs are perfect for people who like to hang out
 here (provided that your interests and talents are not limited to
 esoteric trivia ... I can probably beat you at that game). I can't
 think of a better place to look for candidates, which is why I am
 asking. Most of the group has been together for 23+ years, but we are
 getting gray, some have retired or moved on, so we need more like us
 ... gray hair or otherwise. Clearly, age is NOT an issue. Brains ARE
 the issue.

 There is no location for these positions. While I live near Houston
 TX, most mainframe developers, product support and QA folks work from
 home. Few people have an office; most don't live near one in the first
 place. Our four
 zEC12 and z196 boxes are in Arizona, anyway, so everybody actually
 works remotely. The team members live at locations that span 12 time
 zones (from Hawaii to Russia  Israel). We do virtually everything
 online or on the phone, so we really don't care where you live. These
 positions are perfect for people who want to work, but don't want to move.

 If you have potential interest, please respond to me, individually, at
 my personal email address. My email client can apparently neither
 provide nor override the default Reply-To address for messages I send
 to the list; therefore, do not mindlessly use either Reply or Reply
 All (I guess you should consider that the first part of the IQ and
 ability-to-follow-directions test). Instead, please direct your
 response to me personally at mailto:wmhbl...@comcast.net. There is no
 need to forward your resume; I am not interested in reading it at this
 time. Instead, I will tell you more about the positions, answer any
 questions you might then have, and tell you how to formally indicate
 interest (i.e., begin the application process).

 wmhbl...@comcast.net
 William H. Blair
 MainView Infrastructure
 BMC Software Houston TX

Re: 3 job openings for mainframe Assembler/C programmers, dump readers

[Alan Atkinson]

Yes.
Check timestamp of original post.
Not enough coffee...


Sent from my iPad

On Jul 25, 2013, at 10:26 PM, Steve Comstock st...@trainersfriend.com wrote:

 On 7/25/2013 6:57 AM, Alan Atkinson wrote:
 Share.org
 They run (or did a couple of years ago when I last went to one) classes in 
 ISPF that are quite informative.

 Do you mean IPCS?


 -Steve Comstock



 -Original Message-
 From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] 
 On Behalf Of Don V Nielsen
 Sent: Thursday, July 25, 2013 8:45 AM
 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
 Subject: Re: 3 job openings for mainframe Assembler/C programmers, dump 
 readers

 Where might one one find good instruction on how to read a dump?  This is 
 probably my poorest skill and I should be better at it.


 On Wed, Jul 24, 2013 at 10:46 PM, William H. Blair 
 wmhbl...@comcast.netwrote:

 This is being posted with the permission of the list owner. (My
 sincere thanks, Jean!)

 The infrastructure team I work with has three openings for mainframe
 developers and/or product support personnel who have experience with
 any useful combination of the following: Assembler, C, dump reading,
 SMP/E, security systems (RACF/ACF2/TSS), etc. We are looking for
 people who can read dumps (at least a little bit), write code to fix
 bugs, and develop new stuff in Assembler and/or C. We assume you know
 JCL, TSO, ISPF, how to get around an MVS system, and read IBM doc. If
 you are not a self-starter, please don't bother (we're not going to do
 your job for you, and in many cases the only documentation that exists
 is the code itself). It's OK to have to refer to POPS to make sure you
 know how something works, but if you can't understand it or won't use
 it, please don't bother. These positions do NOT require specific MVS
 subsystem knowledge (JESn, IMS, DB2, CICS, etc.), but if you have any
 we won't hold it against you (other groups concern themselves with
 those things). We deal with common, core, bare-metal MVS services for
 the most part.

 In other words, these jobs are perfect for people who like to hang out
 here (provided that your interests and talents are not limited to
 esoteric trivia ... I can probably beat you at that game). I can't
 think of a better place to look for candidates, which is why I am
 asking. Most of the group has been together for 23+ years, but we are
 getting gray, some have retired or moved on, so we need more like us
 ... gray hair or otherwise. Clearly, age is NOT an issue. Brains ARE
 the issue.

 There is no location for these positions. While I live near Houston
 TX, most mainframe developers, product support and QA folks work from
 home. Few people have an office; most don't live near one in the first
 place. Our four
 zEC12 and z196 boxes are in Arizona, anyway, so everybody actually
 works remotely. The team members live at locations that span 12 time
 zones (from Hawaii to Russia  Israel). We do virtually everything
 online or on the phone, so we really don't care where you live. These
 positions are perfect for people who want to work, but don't want to move.

 If you have potential interest, please respond to me, individually, at
 my personal email address. My email client can apparently neither
 provide nor override the default Reply-To address for messages I send
 to the list; therefore, do not mindlessly use either Reply or Reply
 All (I guess you should consider that the first part of the IQ and
 ability-to-follow-directions test). Instead, please direct your
 response to me personally at mailto:wmhbl...@comcast.net. There is no
 need to forward your resume; I am not interested in reading it at this
 time. Instead, I will tell you more about the positions, answer any
 questions you might then have, and tell you how to formally indicate
 interest (i.e., begin the application process).

 wmhbl...@comcast.net
 William H. Blair
 MainView Infrastructure
 BMC Software Houston TX

Re: SVC 34

[Alan Atkinson]

http://publib.boulder.ibm.com/infocenter/zos/v1r11/index.jsp?topic=/com.ibm.zos.r11.ieav200/svc34.htm


-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of Ward, Mike S
Sent: Wednesday, January 16, 2013 5:26 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: SVC 34

Can anyone please tell me where the description on how to use SVC's in z/OS is.

I remember back when there was a book devoted to MVS svc's and the parameters 
required to call them. I can't seem to find one for z/OS.

Specifically SVC 34.

Any help appreciated.

==
This email, and any files transmitted with it, is confidential and intended 
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Re: Address space proliferation

[Alan Atkinson]

The queues aren't the issue - we're happy to have them all run at the same
priority.
The application is designed to use a producer : consumer pattern where
recovery process(es) act as the producer(s) and this is the consumer.

Use of the queues means that there's no I/O - this is acting as an MITM -
it's deriving some additional data from the message and passing it through
to a TCP process that shunts it all off mainframe. It has a side benefit
of isolating the TP system from this post processing work as the only link
is the queue - and we turn off processing if it fills up (different topic
entirely).

It's this quote that's driving this problem
z/OS handles many address spaces very well.

It's far less wonderful at handling them (at least in our experience) when
the machine is busy.
And ours is. Buy more MIPS isn't going to fly, so we're looking for
something creative.

There are a fixed (albeit high) number of instances in our model, so we
don't have to get fancy with dynamic startup.
The attach/manage restart isn't logic particularly complicated - there's
no hidden issues there - and everything we do in this space is written
re-entrant, so the code isn't too scary.

The only uncertainty really is whether multiple queues is overkill.
We're choosing (at least initially) to err on the side of caution - single
point of failure and all that.
As may TCBs as we can pack in there still looks like the way to go. It
will be an interesting exercise to see how many copies we can fit before
it goes pear shaped. I remember when we played with C a while ago the
limit was about 63 forks before the application lost the plot. I'm hoping
we can do better here...

I'm not sure why limiting the instances to the number of CPs makes any
sense.
Perhaps if this were the ~only~ thing running. What am I missing?





From:   Andy Coburn a...@andycoburn.com
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Date:   04/10/2011 05:23 PM
Subject:Re: Address space proliferation
Sent by:IBM Mainframe Assembler List
ASSEMBLER-LIST@LISTSERV.UGA.EDU



Andy
Are you able to post your response in this list


Here is my original post. Sorry about the confusion.

There are some other considerations here, I think.

Is there already coded and tested a maintask program capable of attaching
from 1 - n subtasks and managing and restarting them in case of abends?
The
issue of DD names must be dealt with because each instance would have to
have a unique one in order to run in the same address space. Operator
commands to monitor the tasks would be required.

The dispatching priority of each task is controlled by the maintask and
without some very sophisticated logic each task would probably retain its
original priority (set on the ATTACHX macro). CHAP could be used but
knowing
which task to CHAP would be problematic.

This is not the simplest of programs to write but it's not impossible
either. If it doesn't exist it will have to be created in order for
multiple
instances of the original stand alone program be run in a single address
space.

Limiting the number of instances to the number of CPs is an interesting
thought. However, if an instance does any sort of wait (e.g. for I/O) then
there's no reason that one instance per CP makes a lot of sense.

Speaking of limits, there are, of course, limits to everything. In one
address space there is a limit to the number of TCBs that can be attached.
This limit is quite high but there isn't an infinite amount of SQA. CSA
(as
opposed to ECSA) is quite limited and some is used for each address space.
These are just some of the trade-offs that should be considered.


If there becomes a need to establish a different priority for each POSIX
queue then WLM is the way to do it because CHAP can't increase the
dispatching priority of the address space only of the task. However, WLM
does not monitor tasks within an address space, only the address space
itself.

In the best of all possible worlds having a program which dynamically
starts
processing address spaces (via MGCRE for instance) and each address space
supporting multiple TCBs would give the best flexibility. Coding all of
this
might be more than anyone wants to do, however.

Andy Coburn