Csect - Dsect Question

2016-03-30 Thread Scott Ford
I have a need to create message table, with the following attributes:

1. MSGID = 9 chars
2. Length of msg
3. Message

I would like this "tab;e" in loose terms to be external. I have never done
external dsects. Am in right i can do that , create a external message
table, bring it into
storage and index into it to find messages ?   If so where can I find a
example ..

Regards,
Scott


Re: Csect - Dsect Question

2016-03-30 Thread Ed Jaffe

On 3/30/2016 7:05 AM, Scott Ford wrote:

I have a need to create message table, with the following attributes:

1. MSGID = 9 chars
2. Length of msg
3. Message

I would like this "tab;e" in loose terms to be external. I have never done
external dsects. Am in right i can do that , create a external message
table, bring it into
storage and index into it to find messages ?   If so where can I find a
example ..


For example:

MsgEntry DSECT ,
MsgIdDSCL9
MsgSize  DSXL1
MsgText  DSCL80
MsgLenth EQU   *-MsgEntry

Code LOCTR ,Switch to code
...
 LOAD  EPNAME==CL8'MSGTABLE'Load external message table
 NILH  R1,X'7FFF'   Turn off AMODE indicators
 NILL  R1,X'FFFE'   (same)
 STG   R1,MsgTable  Save clean table address
...
 LLGH  R4,MsgNumGet message number
 AGHI  R4,-1Make relative to zero
 MGHI  R4,MsgLenth  Compute offset into table
 AGR4,MsgTable  Point to message entry
 USING MsgEntry,R4 http://www.phoenixsoftware.com/


Re: Csect - Dsect Question

2016-03-31 Thread Scott Ford
Wow, Ed how do I say thank you, and yep I am a following your code.


It's great...


Regards,
Scott

On Wednesday, March 30, 2016, Ed Jaffe  wrote:

> On 3/30/2016 7:05 AM, Scott Ford wrote:
>
>> I have a need to create message table, with the following attributes:
>>
>> 1. MSGID = 9 chars
>> 2. Length of msg
>> 3. Message
>>
>> I would like this "tab;e" in loose terms to be external. I have never done
>> external dsects. Am in right i can do that , create a external message
>> table, bring it into
>> storage and index into it to find messages ?   If so where can I find a
>> example ..
>>
>
> For example:
>
> MsgEntry DSECT ,
> MsgIdDSCL9
> MsgSize  DSXL1
> MsgText  DSCL80
> MsgLenth EQU   *-MsgEntry
>
> Code LOCTR ,Switch to code
> ...
>  LOAD  EPNAME==CL8'MSGTABLE'Load external message table
>  NILH  R1,X'7FFF'   Turn off AMODE indicators
>  NILL  R1,X'FFFE'   (same)
>  STG   R1,MsgTable  Save clean table address
> ...
>  LLGH  R4,MsgNumGet message number
>  AGHI  R4,-1Make relative to zero
>  MGHI  R4,MsgLenth  Compute offset into table
>  AGR4,MsgTable  Point to message entry
>  USING MsgEntry,R4   LAY   R1,OutArea   Point to output area
>  MVC   0(L'MsgId,R1),MsgId  Copy message id
>  MVI   L'MsgId(R1),C' ' Set blank separator
>  LAR15,L'MsgID+1(,R1)   Point where MsgText goes
>  LLGC  R14,MsgSize  Get size of message
>  AGHI  R14,-1   Make relative to zero
>  EXR14,MoveTxt  Copy the message text
>
> Constant LOCTR  ,   Switch to constants
> MoveTxt  MVC   0(*-*,R15),MsgText   Dummy for execute
> Code LOCTR  ,   Switch back to code
>
>  LAR0,1(R14,R15)Compute total msg length
>  SGR   R0,R1 in R0 for WriteMsg service.
>  JAS   R14,WriteMsg R1 = TextPtr, R0 = TextgLen
>  DROP  R4   ...
>
> --
> Edward E Jaffe
> Phoenix Software International, Inc
> 831 Parkview Drive North
> El Segundo, CA 90245
> http://www.phoenixsoftware.com/
>


Re: Csect - Dsect Question

2016-03-31 Thread Tom Marchant
On Wed, 30 Mar 2016 07:42:10 -0700, Ed Jaffe wrote:

>  LOAD  EPNAME==CL8'MSGTABLE'Load external message table
>  NILH  R1,X'7FFF'   Turn off AMODE indicators
>  NILL  R1,X'FFFE'   (same)
>  STG   R1,MsgTable  Save clean table address

ITYM R0.

And the manual doesn't specify that the address returned is a clean 64-bit 
address except if it is AMODE 64. So I'd suggest replacing the NILH with

   LLGTR R0,R0

-- 
Tom Marchant


Re: Csect - Dsect Question

2016-03-31 Thread Ed Jaffe

On 3/31/2016 2:03 PM, Tom Marchant wrote:

On Wed, 30 Mar 2016 07:42:10 -0700, Ed Jaffe wrote:


  LOAD  EPNAME==CL8'MSGTABLE'Load external message table
  NILH  R1,X'7FFF'   Turn off AMODE indicators
  NILL  R1,X'FFFE'   (same)
  STG   R1,MsgTable  Save clean table address

ITYM R0.

And the manual doesn't specify that the address returned is a clean 64-bit
address except if it is AMODE 64. So I'd suggest replacing the NILH with

LLGTR R0,R0


Haha! You're right (re: R0) and good suggestion. That's better code...

(Still not a bad effort for typing HLASM code into an email. ;-) )

Another alternative would be to make MsgTable a fullword and change the 
AG to an AGF in the indexing/lookup code.


--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive North
El Segundo, CA 90245
http://www.phoenixsoftware.com/


Re: Csect - Dsect Question

2016-03-31 Thread John P. Hartmann

LLGT does not zero the 64-bit mode bit (63).

On 03/31/2016 11:19 PM, Ed Jaffe wrote:

On 3/31/2016 2:03 PM, Tom Marchant wrote:

On Wed, 30 Mar 2016 07:42:10 -0700, Ed Jaffe wrote:


  LOAD  EPNAME==CL8'MSGTABLE'Load external message table
  NILH  R1,X'7FFF'   Turn off AMODE indicators
  NILL  R1,X'FFFE'   (same)
  STG   R1,MsgTable  Save clean table address

ITYM R0.

And the manual doesn't specify that the address returned is a clean
64-bit
address except if it is AMODE 64. So I'd suggest replacing the NILH with

LLGTR R0,R0


Haha! You're right (re: R0) and good suggestion. That's better code...

(Still not a bad effort for typing HLASM code into an email. ;-) )

Another alternative would be to make MsgTable a fullword and change the
AG to an AGF in the indexing/lookup code.



Re: Csect - Dsect Question

2016-04-01 Thread Martin
The complete "corrected" version of the loading is this

..
  LOAD  EPNAME==CL8'MSGTABLE'Load external message table
  LLGTR R0,R0clean high order word and low high order bit  
  NILL  R0,X'FFFE'   (same)
  STG   R0,MsgTable  Save clean table address
...



-- 
Martin

Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE 
more at http://www.picapcpu.de


Re: Csect - Dsect Question

2016-04-01 Thread Gord Tomlin
If we're insisting on correctness (I wasn't, since Ed just blasted code 
from his head into an email), LOAD has no EPNAME argument. Coded as 
below, EPNAME should be EPLOC.


On 2016-04-01 03:14, mar...@pi-sysprog.de wrote:

The complete "corrected" version of the loading is this

..
   LOAD  EPNAME==CL8'MSGTABLE'Load external message table
   LLGTR R0,R0clean high order word and low high order bit
   NILL  R0,X'FFFE'   (same)
   STG   R0,MsgTable  Save clean table address
...


--

Regards, Gord Tomlin
Action Software International
(a division of Mazda Computer Corporation)
Tel: (905) 470-7113, Fax: (905) 470-6507


Re: Csect - Dsect Question

2016-04-01 Thread Ed Jaffe

On 4/1/2016 7:50 AM, Gord Tomlin wrote:
If we're insisting on correctness (I wasn't, since Ed just blasted 
code from his head into an email), LOAD has no EPNAME argument. Coded 
as below, EPNAME should be EPLOC.


On 2016-04-01 03:14, mar...@pi-sysprog.de wrote:

The complete "corrected" version of the loading is this

..
   LOAD  EPNAME==CL8'MSGTABLE'Load external message table
   LLGTR R0,R0clean high order word and low high order bit
   NILL  R0,X'FFFE'   (same)
   STG   R0,MsgTable  Save clean table address
...


Thanks, Gord! :-[ Obviously I should have "blasted" the code from my 
head into a source code editor, wrapped JCL around it, assembled it, 
executed and debugged it, and then finally pasted it into an email... 
LOL ;-)


--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive North
El Segundo, CA 90245
http://www.phoenixsoftware.com/


Re: Csect - Dsect Question

2016-04-01 Thread Martin
Ed,

>> ...and then finally pasted it ...

cann't you see the power of a "mass"-compile any bug left we have
yet to find? 

-- 
Martin

Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE 
more at http://www.picapcpu.de


Re: Csect - Dsect Question

2016-04-01 Thread Chuck Arney
 <<<any bug left we have yet to find?

If you intend to use RMODE64 in the future with that code you will want to
NOT use that LLGTR.

Chuck Arney
Arney Computer Systems
Web: http://zosdebug.com
Facebook: http://www.facebook.com/arneycomputer

-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of mar...@pi-sysprog.de
Sent: Friday, April 01, 2016 12:47 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Csect - Dsect Question

Ed,

>> ...and then finally pasted it ...

cann't you see the power of a "mass"-compile any bug left we have yet to
find? 


Re: Csect - Dsect Question

2016-04-01 Thread Martin
Chuck,

holy sh.. 

is RMODE64 supported yet on any op-sys (and don't forget
Scott; he wants it for COBOL)?

-- 
Martin

Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE 
more at http://www.picapcpu.de


Re: Csect - Dsect Question

2016-04-01 Thread Mark Boonie
z/TPF has supported RMODE64 code for over 10 years.  But we're a little 
different than most other OSes.  :-)

- mb

IBM Mainframe Assembler List  wrote on 
04/01/2016 02:17:06 PM:

> is RMODE64 supported yet on any op-sys (and don't forget
> Scott; he wants it for COBOL)?


Re: Csect - Dsect Question

2016-04-01 Thread Chuck Arney
It works fine on z/OS 1.13 and above.  We have lots of code running from
there.  However, only a directed LOAD can be done into RMODE64 or you have
to do the program management yourself which is what we do.  I wrote a blog
post on running RMODE64 code a while back.

Chuck Arney
Arney Computer Systems
Web: http://zosdebug.com
Facebook: http://www.facebook.com/arneycomputer


-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of mar...@pi-sysprog.de
Sent: Friday, April 01, 2016 1:17 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Csect - Dsect Question

Chuck,

holy sh.. 

is RMODE64 supported yet on any op-sys (and don't forget Scott; he wants it
for COBOL)?

--
Martin

Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at
http://www.picapcpu.de


Re: Csect - Dsect Question

2016-04-01 Thread Martin
Mark,

>> z/TPF has supported RMODE64 code for over 10 years. 

Oups- I love writing code transformed to being run on the 
metal by HLASM (I do know Pops by heart), but yet my CV lacks doing
anything in TPF. 

-- 
Martin

Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE 
more at http://www.picapcpu.de


Re: Csect - Dsect Question

2016-04-01 Thread Tom Marchant
On Fri, 1 Apr 2016 12:55:44 -0500, Chuck Arney wrote:

>If you intend to use RMODE64 in the future with that code you will want to
>NOT use that LLGTR.

Right. To cover that case you might want something like this:

LOAD  EP=MSGTABLE  Load external message table
TMLL  R0,X'0001'   RMODE(64)
JORMODE64
LLGTR R0,R0clean high order word and low high order bit
RMODE64 NILL  R0,X'FFFE'   (same)
STG   R0,MsgTable  Save clean table address

-- 
Tom Marchant


Re: Csect - Dsect Question

2016-04-01 Thread Ed Jaffe

On 3/31/2016 2:03 PM, Tom Marchant wrote:


ITYM R0.


Indeed!


And the manual doesn't specify that the address returned is a clean 64-bit
address except if it is AMODE 64. So I'd suggest replacing the NILH with

LLGTR R0,R0


Empirical testing shows R0 is returned with a clean 64-bit address, even 
for an old 24-bit program:


TCB#6 RB#1 - z/XDC TPUT 
INTERFACE 

XDC ===>
_  _0E957100 0s (A.S.EDJX2) --- EJESSUBS.EJESSUBS+2100, 
EJESSUBS+2100, XPRIVATE+1A57100

_ +2100 ***
_ +2100* Empirical Test for My ASSEMBLER-LIST 
Friends*

_ +2100 ***
_ +2100 EBEF C060 0004  LMG   R14,R15,=4FD'-1' Put garbage 
in R14-R1

_ +2106 LOAD  EPLOC==CL8'IEFBR14' Load a module
_ +2106 4100 C0C0 + LA0,=CL8'IEFBR14' LOAD 
PARAMETER INTO REG 0

_ +210A 1B11  + SR1,1 SHOW NO DCB PRESENT
_ +210C 0A08  + SVC   8
_ +210E   > DCH'0' Force an abend
_ +210E   >  +0 *..*

XDC ===> L RWREGS
_ RW0  _00EC5000 _0001  _7F363434 
_
_ RW4  _7F33A71E _0E9747CE  _0041 
_F000
_ RW8  _7F466D00 _7F33C1A4  _7F33A000 
_0E955000
_ RW12 _0E98E7B0 _7F466E00  _ 
0001_


--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive North
El Segundo, CA 90245
http://www.phoenixsoftware.com/


Re: Csect - Dsect Question

2016-04-01 Thread Tom Marchant
On Fri, 1 Apr 2016 15:08:59 -0400, Tom Marchant wrote:

>TMLL  R0,X'0001'   RMODE(64)
>JORMODE64

Oops. I mean

TMLL  R0,X'0001'   AMODE(64)
JOAMODE64  Yes, leave bits 0-32 as is

-- 
Tom Marchant


Re: Csect - Dsect Question

2016-04-01 Thread Tom Marchant
On Fri, 1 Apr 2016 12:36:01 -0700, Ed Jaffe wrote:

>Empirical testing shows R0 is returned with a clean 64-bit address, even
>for an old 24-bit program:

I believe it, but do we want to rely on undocumented behavior?

Perhaps an RCF is in order?

-- 
Tom Marchant


Re: Csect - Dsect Question

2016-04-01 Thread Bob Rutledge

Ol' friend, your test is incomplete.  That LMG doesn't go far enough.

Bob

On 4/1/2016 3:36 PM, Ed Jaffe wrote:

On 3/31/2016 2:03 PM, Tom Marchant wrote:


ITYM R0.


Indeed!


And the manual doesn't specify that the address returned is a clean 64-bit
address except if it is AMODE 64. So I'd suggest replacing the NILH with

LLGTR R0,R0


Empirical testing shows R0 is returned with a clean 64-bit address, even for an
old 24-bit program:

TCB#6 RB#1 - z/XDC TPUT
INTERFACE 
XDC ===>
_  _0E957100 0s (A.S.EDJX2) --- EJESSUBS.EJESSUBS+2100, EJESSUBS+2100,
XPRIVATE+1A57100
_ +2100 ***
_ +2100* Empirical Test for My ASSEMBLER-LIST
Friends*
_ +2100 ***
_ +2100 EBEF C060 0004  LMG   R14,R15,=4FD'-1' Put garbage in R14-R1
_ +2106 LOAD  EPLOC==CL8'IEFBR14' Load a module
_ +2106 4100 C0C0 + LA0,=CL8'IEFBR14' LOAD PARAMETER
INTO REG 0
_ +210A 1B11  + SR1,1 SHOW NO DCB PRESENT
_ +210C 0A08  + SVC   8
_ +210E   > DCH'0' Force an abend
_ +210E   >  +0 *..*

XDC ===> L RWREGS
_ RW0  _00EC5000 _0001  _7F363434 
_
_ RW4  _7F33A71E _0E9747CE  _0041 
_F000
_ RW8  _7F466D00 _7F33C1A4  _7F33A000 
_0E955000
_ RW12 _0E98E7B0 _7F466E00  _ 
0001_



Re: Csect - Dsect Question

2016-04-01 Thread Ed Jaffe

On 4/1/2016 12:48 PM, Bob Rutledge wrote:

Ol' friend, your test is incomplete.  That LMG doesn't go far enough.


Sorry. Pasted from the wrong test... :-[

TCB#6 RB#1 - z/XDC TPUT 
INTERFACE 

XDC ===>
_  _0E957100 0s (A.S.EDJX2) --- EJESSUBS.EJESSUBS+2100, 
EJESSUBS+2100, XPRIVATE+1A57100

_ +2100 ***
_ +2100* Empirical Test for My ASSEMBLER-LIST 
Friends*

_ +2100 ***
_ +2100 EBE1 C060 0004  LMG   R14,R1,=4FD'-1' Put garbage in 
R14-R1

_ +2106 LOAD  EPLOC==CL8'IEFBR14' Load a module
_ +2106 4100 C0C0 + LA0,=CL8'IEFBR14' LOAD 
PARAMETER INTO REG 0

_ +210A 1B11  + SR1,1 SHOW NO DCB PRESENT
_ +210C 0A08  + SVC   8
_ +210E   > DCH'0' Force an abend
_ +210E   >  +0 *..*

XDC ===> L RWREGS
_ RW0  _00EC5000 _0001  _7F363434 
_
_ RW4  _7F33A71E _0E9747CE  _0041 
_F000
_ RW8  _7F466D00 _7F33C1A4  _7F33A000 
_0E955000
_ RW12 _0E98E7B0 _7F466E00  _ 
0001_


--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive North
El Segundo, CA 90245
http://www.phoenixsoftware.com/


Re: Csect - Dsect Question

2016-04-02 Thread Peter Relson
>Empirical testing shows R0 is returned with a clean 64-bit address, even 
>for an old 24-bit program.

Of course there are other forms of LOAD (those that use SVC 7A). So a test 
of SVC 8 is not even a complete empirical test.
And of course none of the IBM-Main readers would ever rely on an empirical 
test. 

The intent of the doc is to show that the 64-bit GR0 can be used as a 
BASSM target in all cases.

I'll get it updated to make it clear that bits 0-31 are set to 0's for the 
AMODE 24 and AMODE 31 cases, and are not necessarily 0 for the AMODE 64 
case when LOAD with ADDR64 was used.
And if RMODE 64 is ever supported for normal LOAD, then the AMODE 64 case 
would change too.

Peter Relson
z/OS Core Technology Design


Re: Csect - Dsect Question

2016-04-02 Thread Ed Jaffe

On 4/2/2016 6:51 AM, Peter Relson wrote:
And of course none of the IBM-Main readers would ever rely on an 
empirical test.


Haha! Of course not! ;-)

(But, ASSEMBLER-LIST readers might ijs... :-) )

The intent of the doc is to show that the 64-bit GR0 can be used as a 
BASSM target in all cases. I'll get it updated to make it clear that 
bits 0-31 are set to 0's for the AMODE 24 and AMODE 31 cases, and are 
not necessarily 0 for the AMODE 64 case when LOAD with ADDR64 was 
used. And if RMODE 64 is ever supported for normal LOAD, then the 
AMODE 64 case would change too.


Thanks, Peter! That's a big help!

Otherwise, people will be putting LLGTRs into their code and then 
removing them (or forgetting to) if/when RMODE(64) becomes reality...


With all of this in mind, I suppose I should amend my example to read:

LOAD  EPLOC==CL8'MSGTABLE' Load external message table
TMLL  R0,X'0001'   RMODE(64) ?
JO*+8   ---\   Branch if yes
NIHL  R0,X'7FFF'   |   Turn of 31-bit indicator
NILL  R0,X'FFFE'  

Re: Csect - Dsect Question

2016-04-02 Thread Scott Ford
Guys,

This is great for me.  Have don't any 64bit Assembler work and want to..so
I am a sponge here...


Scott

On Saturday, April 2, 2016, Ed Jaffe  wrote:

> On 4/2/2016 6:51 AM, Peter Relson wrote:
>
>> And of course none of the IBM-Main readers would ever rely on an
>> empirical test.
>>
>
> Haha! Of course not! ;-)
>
> (But, ASSEMBLER-LIST readers might ijs... :-) )
>
> The intent of the doc is to show that the 64-bit GR0 can be used as a
>> BASSM target in all cases. I'll get it updated to make it clear that bits
>> 0-31 are set to 0's for the AMODE 24 and AMODE 31 cases, and are not
>> necessarily 0 for the AMODE 64 case when LOAD with ADDR64 was used. And if
>> RMODE 64 is ever supported for normal LOAD, then the AMODE 64 case would
>> change too.
>>
>
> Thanks, Peter! That's a big help!
>
> Otherwise, people will be putting LLGTRs into their code and then removing
> them (or forgetting to) if/when RMODE(64) becomes reality...
>
> With all of this in mind, I suppose I should amend my example to read:
>
> LOAD  EPLOC==CL8'MSGTABLE' Load external message table
> TMLL  R0,X'0001'   RMODE(64) ?
> JO*+8   ---\   Branch if yes
> NIHL  R0,X'7FFF'   |   Turn of 31-bit indicator
> NILL  R0,X'FFFE'   STG   R0,MsgTable  Save clean table address
>
> --
> Edward E Jaffe
> Phoenix Software International, Inc
> 831 Parkview Drive North
> El Segundo, CA 90245
> http://www.phoenixsoftware.com/
>


Re: Csect - Dsect Question

2016-04-02 Thread Steve Smith

NILH, not NIHL!

Sheesh, assembler is hard :-)

Too bad it's been obviated at this point, I was going to suggest NILF 
R0,x'7ffe'.


sas

On 4/2/2016 12:05, Ed Jaffe wrote:

On 4/2/2016 6:51 AM, Peter Relson wrote:
And of course none of the IBM-Main readers would ever rely on an 
empirical test.


Haha! Of course not! ;-)

(But, ASSEMBLER-LIST readers might ijs... :-) )

The intent of the doc is to show that the 64-bit GR0 can be used as a 
BASSM target in all cases. I'll get it updated to make it clear that 
bits 0-31 are set to 0's for the AMODE 24 and AMODE 31 cases, and are 
not necessarily 0 for the AMODE 64 case when LOAD with ADDR64 was 
used. And if RMODE 64 is ever supported for normal LOAD, then the 
AMODE 64 case would change too.


Thanks, Peter! That's a big help!

Otherwise, people will be putting LLGTRs into their code and then 
removing them (or forgetting to) if/when RMODE(64) becomes reality...


With all of this in mind, I suppose I should amend my example to read:

LOAD  EPLOC==CL8'MSGTABLE' Load external message table
TMLL  R0,X'0001'   RMODE(64) ?
JO*+8   ---\   Branch if yes
NIHL  R0,X'7FFF'   |   Turn of 31-bit indicator
NILL  R0,X'FFFE'  

Re: Csect - Dsect Question

2016-04-02 Thread Ed Jaffe

On 4/2/2016 9:22 AM, Steve Smith wrote:

NILH, not NIHL!



LOL. I should have quit while I was ahead.

This one has been desk-checked. (I even corrected the misspelling of the 
word "off"):


LOAD  EPLOC==CL8'MSGTABLE' Load external message table
TMLL  R0,X'0001'   RMODE(64) ?
JO*+8   ---\   Branch if yes
NILH  R0,X'7FFF'   |   Turn off 31-bit indicator
NILL  R0,X'FFFE'